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Merge tag 'drm-intel-next-2018-02-21' of git://anongit.freedesktop.org/drm/drm-intel...
[linux.git] / drivers / gpu / drm / amd / amdgpu / amdgpu_prime.c
1 /*
2  * Copyright 2012 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * based on nouveau_prime.c
23  *
24  * Authors: Alex Deucher
25  */
26 #include <drm/drmP.h>
27
28 #include "amdgpu.h"
29 #include "amdgpu_display.h"
30 #include <drm/amdgpu_drm.h>
31 #include <linux/dma-buf.h>
32
33 static const struct dma_buf_ops amdgpu_dmabuf_ops;
34
35 struct sg_table *amdgpu_gem_prime_get_sg_table(struct drm_gem_object *obj)
36 {
37         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
38         int npages = bo->tbo.num_pages;
39
40         return drm_prime_pages_to_sg(bo->tbo.ttm->pages, npages);
41 }
42
43 void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj)
44 {
45         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
46         int ret;
47
48         ret = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages,
49                           &bo->dma_buf_vmap);
50         if (ret)
51                 return ERR_PTR(ret);
52
53         return bo->dma_buf_vmap.virtual;
54 }
55
56 void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr)
57 {
58         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
59
60         ttm_bo_kunmap(&bo->dma_buf_vmap);
61 }
62
63 int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma)
64 {
65         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
66         struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
67         unsigned asize = amdgpu_bo_size(bo);
68         int ret;
69
70         if (!vma->vm_file)
71                 return -ENODEV;
72
73         if (adev == NULL)
74                 return -ENODEV;
75
76         /* Check for valid size. */
77         if (asize < vma->vm_end - vma->vm_start)
78                 return -EINVAL;
79
80         if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
81             (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)) {
82                 return -EPERM;
83         }
84         vma->vm_pgoff += amdgpu_bo_mmap_offset(bo) >> PAGE_SHIFT;
85
86         /* prime mmap does not need to check access, so allow here */
87         ret = drm_vma_node_allow(&obj->vma_node, vma->vm_file->private_data);
88         if (ret)
89                 return ret;
90
91         ret = ttm_bo_mmap(vma->vm_file, vma, &adev->mman.bdev);
92         drm_vma_node_revoke(&obj->vma_node, vma->vm_file->private_data);
93
94         return ret;
95 }
96
97 struct drm_gem_object *
98 amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
99                                  struct dma_buf_attachment *attach,
100                                  struct sg_table *sg)
101 {
102         struct reservation_object *resv = attach->dmabuf->resv;
103         struct amdgpu_device *adev = dev->dev_private;
104         struct amdgpu_bo *bo;
105         int ret;
106
107         ww_mutex_lock(&resv->lock, NULL);
108         ret = amdgpu_bo_create(adev, attach->dmabuf->size, PAGE_SIZE, false,
109                                AMDGPU_GEM_DOMAIN_GTT, 0, sg, resv, &bo);
110         ww_mutex_unlock(&resv->lock);
111         if (ret)
112                 return ERR_PTR(ret);
113
114         bo->prime_shared_count = 1;
115         return &bo->gem_base;
116 }
117
118 static int amdgpu_gem_map_attach(struct dma_buf *dma_buf,
119                                  struct device *target_dev,
120                                  struct dma_buf_attachment *attach)
121 {
122         struct drm_gem_object *obj = dma_buf->priv;
123         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
124         long r;
125
126         r = drm_gem_map_attach(dma_buf, target_dev, attach);
127         if (r)
128                 return r;
129
130         r = amdgpu_bo_reserve(bo, false);
131         if (unlikely(r != 0))
132                 goto error_detach;
133
134
135         if (dma_buf->ops != &amdgpu_dmabuf_ops) {
136                 /*
137                  * Wait for all shared fences to complete before we switch to future
138                  * use of exclusive fence on this prime shared bo.
139                  */
140                 r = reservation_object_wait_timeout_rcu(bo->tbo.resv,
141                                                         true, false,
142                                                         MAX_SCHEDULE_TIMEOUT);
143                 if (unlikely(r < 0)) {
144                         DRM_DEBUG_PRIME("Fence wait failed: %li\n", r);
145                         goto error_unreserve;
146                 }
147         }
148
149         /* pin buffer into GTT */
150         r = amdgpu_bo_pin(bo, AMDGPU_GEM_DOMAIN_GTT, NULL);
151         if (r)
152                 goto error_unreserve;
153
154         if (dma_buf->ops != &amdgpu_dmabuf_ops)
155                 bo->prime_shared_count++;
156
157 error_unreserve:
158         amdgpu_bo_unreserve(bo);
159
160 error_detach:
161         if (r)
162                 drm_gem_map_detach(dma_buf, attach);
163         return r;
164 }
165
166 static void amdgpu_gem_map_detach(struct dma_buf *dma_buf,
167                                   struct dma_buf_attachment *attach)
168 {
169         struct drm_gem_object *obj = dma_buf->priv;
170         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
171         int ret = 0;
172
173         ret = amdgpu_bo_reserve(bo, true);
174         if (unlikely(ret != 0))
175                 goto error;
176
177         amdgpu_bo_unpin(bo);
178         if (dma_buf->ops != &amdgpu_dmabuf_ops && bo->prime_shared_count)
179                 bo->prime_shared_count--;
180         amdgpu_bo_unreserve(bo);
181
182 error:
183         drm_gem_map_detach(dma_buf, attach);
184 }
185
186 struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *obj)
187 {
188         struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
189
190         return bo->tbo.resv;
191 }
192
193 static int amdgpu_gem_begin_cpu_access(struct dma_buf *dma_buf,
194                                        enum dma_data_direction direction)
195 {
196         struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
197         struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
198         struct ttm_operation_ctx ctx = { true, false };
199         u32 domain = amdgpu_display_framebuffer_domains(adev);
200         int ret;
201         bool reads = (direction == DMA_BIDIRECTIONAL ||
202                       direction == DMA_FROM_DEVICE);
203
204         if (!reads || !(domain & AMDGPU_GEM_DOMAIN_GTT))
205                 return 0;
206
207         /* move to gtt */
208         ret = amdgpu_bo_reserve(bo, false);
209         if (unlikely(ret != 0))
210                 return ret;
211
212         if (!bo->pin_count && (bo->allowed_domains & AMDGPU_GEM_DOMAIN_GTT)) {
213                 amdgpu_ttm_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_GTT);
214                 ret = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
215         }
216
217         amdgpu_bo_unreserve(bo);
218         return ret;
219 }
220
221 static const struct dma_buf_ops amdgpu_dmabuf_ops = {
222         .attach = amdgpu_gem_map_attach,
223         .detach = amdgpu_gem_map_detach,
224         .map_dma_buf = drm_gem_map_dma_buf,
225         .unmap_dma_buf = drm_gem_unmap_dma_buf,
226         .release = drm_gem_dmabuf_release,
227         .begin_cpu_access = amdgpu_gem_begin_cpu_access,
228         .map = drm_gem_dmabuf_kmap,
229         .map_atomic = drm_gem_dmabuf_kmap_atomic,
230         .unmap = drm_gem_dmabuf_kunmap,
231         .unmap_atomic = drm_gem_dmabuf_kunmap_atomic,
232         .mmap = drm_gem_dmabuf_mmap,
233         .vmap = drm_gem_dmabuf_vmap,
234         .vunmap = drm_gem_dmabuf_vunmap,
235 };
236
237 struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
238                                         struct drm_gem_object *gobj,
239                                         int flags)
240 {
241         struct amdgpu_bo *bo = gem_to_amdgpu_bo(gobj);
242         struct dma_buf *buf;
243
244         if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm) ||
245             bo->flags & AMDGPU_GEM_CREATE_VM_ALWAYS_VALID)
246                 return ERR_PTR(-EPERM);
247
248         buf = drm_gem_prime_export(dev, gobj, flags);
249         if (!IS_ERR(buf)) {
250                 buf->file->f_mapping = dev->anon_inode->i_mapping;
251                 buf->ops = &amdgpu_dmabuf_ops;
252         }
253
254         return buf;
255 }
256
257 struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
258                                             struct dma_buf *dma_buf)
259 {
260         struct drm_gem_object *obj;
261
262         if (dma_buf->ops == &amdgpu_dmabuf_ops) {
263                 obj = dma_buf->priv;
264                 if (obj->dev == dev) {
265                         /*
266                          * Importing dmabuf exported from out own gem increases
267                          * refcount on gem itself instead of f_count of dmabuf.
268                          */
269                         drm_gem_object_get(obj);
270                         return obj;
271                 }
272         }
273
274         return drm_gem_prime_import(dev, dma_buf);
275 }
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