2 * drivers/s390/net/qeth_core_main.c
4 * Copyright IBM Corp. 2007
11 #define KMSG_COMPONENT "qeth"
12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/string.h>
17 #include <linux/errno.h>
18 #include <linux/kernel.h>
20 #include <linux/ipv6.h>
21 #include <linux/tcp.h>
22 #include <linux/mii.h>
23 #include <linux/kthread.h>
25 #include <asm/ebcdic.h>
28 #include "qeth_core.h"
29 #include "qeth_core_offl.h"
31 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
32 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
34 [QETH_DBF_SETUP] = {"qeth_setup",
35 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
36 [QETH_DBF_QERR] = {"qeth_qerr",
37 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
38 [QETH_DBF_TRACE] = {"qeth_trace",
39 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
40 [QETH_DBF_MSG] = {"qeth_msg",
41 8, 1, 128, 3, &debug_sprintf_view, NULL},
42 [QETH_DBF_SENSE] = {"qeth_sense",
43 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
44 [QETH_DBF_MISC] = {"qeth_misc",
45 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
46 [QETH_DBF_CTRL] = {"qeth_control",
47 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
49 EXPORT_SYMBOL_GPL(qeth_dbf);
51 struct qeth_card_list_struct qeth_core_card_list;
52 EXPORT_SYMBOL_GPL(qeth_core_card_list);
53 struct kmem_cache *qeth_core_header_cache;
54 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
56 static struct device *qeth_core_root_dev;
57 static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
58 static struct lock_class_key qdio_out_skb_queue_key;
60 static void qeth_send_control_data_cb(struct qeth_channel *,
61 struct qeth_cmd_buffer *);
62 static int qeth_issue_next_read(struct qeth_card *);
63 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
64 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
65 static void qeth_free_buffer_pool(struct qeth_card *);
66 static int qeth_qdio_establish(struct qeth_card *);
69 static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
70 struct qdio_buffer *buffer, int is_tso,
71 int *next_element_to_fill)
73 struct skb_frag_struct *frag;
76 int element, cnt, dlen;
78 fragno = skb_shinfo(skb)->nr_frags;
79 element = *next_element_to_fill;
83 buffer->element[element].flags =
84 SBAL_FLAGS_MIDDLE_FRAG;
86 buffer->element[element].flags =
87 SBAL_FLAGS_FIRST_FRAG;
88 dlen = skb->len - skb->data_len;
90 buffer->element[element].addr = skb->data;
91 buffer->element[element].length = dlen;
94 for (cnt = 0; cnt < fragno; cnt++) {
95 frag = &skb_shinfo(skb)->frags[cnt];
96 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
98 buffer->element[element].addr = (char *)addr;
99 buffer->element[element].length = frag->size;
100 if (cnt < (fragno - 1))
101 buffer->element[element].flags =
102 SBAL_FLAGS_MIDDLE_FRAG;
104 buffer->element[element].flags =
105 SBAL_FLAGS_LAST_FRAG;
108 *next_element_to_fill = element;
111 static inline const char *qeth_get_cardname(struct qeth_card *card)
113 if (card->info.guestlan) {
114 switch (card->info.type) {
115 case QETH_CARD_TYPE_OSAE:
116 return " Guest LAN QDIO";
117 case QETH_CARD_TYPE_IQD:
118 return " Guest LAN Hiper";
123 switch (card->info.type) {
124 case QETH_CARD_TYPE_OSAE:
125 return " OSD Express";
126 case QETH_CARD_TYPE_IQD:
127 return " HiperSockets";
128 case QETH_CARD_TYPE_OSN:
137 /* max length to be returned: 14 */
138 const char *qeth_get_cardname_short(struct qeth_card *card)
140 if (card->info.guestlan) {
141 switch (card->info.type) {
142 case QETH_CARD_TYPE_OSAE:
143 return "GuestLAN QDIO";
144 case QETH_CARD_TYPE_IQD:
145 return "GuestLAN Hiper";
150 switch (card->info.type) {
151 case QETH_CARD_TYPE_OSAE:
152 switch (card->info.link_type) {
153 case QETH_LINK_TYPE_FAST_ETH:
155 case QETH_LINK_TYPE_HSTR:
157 case QETH_LINK_TYPE_GBIT_ETH:
159 case QETH_LINK_TYPE_10GBIT_ETH:
161 case QETH_LINK_TYPE_LANE_ETH100:
162 return "OSD_FE_LANE";
163 case QETH_LINK_TYPE_LANE_TR:
164 return "OSD_TR_LANE";
165 case QETH_LINK_TYPE_LANE_ETH1000:
166 return "OSD_GbE_LANE";
167 case QETH_LINK_TYPE_LANE:
168 return "OSD_ATM_LANE";
170 return "OSD_Express";
172 case QETH_CARD_TYPE_IQD:
173 return "HiperSockets";
174 case QETH_CARD_TYPE_OSN:
183 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
184 int clear_start_mask)
188 spin_lock_irqsave(&card->thread_mask_lock, flags);
189 card->thread_allowed_mask = threads;
190 if (clear_start_mask)
191 card->thread_start_mask &= threads;
192 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
193 wake_up(&card->wait_q);
195 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
197 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
202 spin_lock_irqsave(&card->thread_mask_lock, flags);
203 rc = (card->thread_running_mask & threads);
204 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
207 EXPORT_SYMBOL_GPL(qeth_threads_running);
209 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
211 return wait_event_interruptible(card->wait_q,
212 qeth_threads_running(card, threads) == 0);
214 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
216 void qeth_clear_working_pool_list(struct qeth_card *card)
218 struct qeth_buffer_pool_entry *pool_entry, *tmp;
220 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
221 list_for_each_entry_safe(pool_entry, tmp,
222 &card->qdio.in_buf_pool.entry_list, list){
223 list_del(&pool_entry->list);
226 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
228 static int qeth_alloc_buffer_pool(struct qeth_card *card)
230 struct qeth_buffer_pool_entry *pool_entry;
234 QETH_DBF_TEXT(TRACE, 5, "alocpool");
235 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
236 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
238 qeth_free_buffer_pool(card);
241 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
242 ptr = (void *) __get_free_page(GFP_KERNEL);
245 free_page((unsigned long)
246 pool_entry->elements[--j]);
248 qeth_free_buffer_pool(card);
251 pool_entry->elements[j] = ptr;
253 list_add(&pool_entry->init_list,
254 &card->qdio.init_pool.entry_list);
259 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
261 QETH_DBF_TEXT(TRACE, 2, "realcbp");
263 if ((card->state != CARD_STATE_DOWN) &&
264 (card->state != CARD_STATE_RECOVER))
267 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
268 qeth_clear_working_pool_list(card);
269 qeth_free_buffer_pool(card);
270 card->qdio.in_buf_pool.buf_count = bufcnt;
271 card->qdio.init_pool.buf_count = bufcnt;
272 return qeth_alloc_buffer_pool(card);
275 int qeth_set_large_send(struct qeth_card *card,
276 enum qeth_large_send_types type)
280 if (card->dev == NULL) {
281 card->options.large_send = type;
284 if (card->state == CARD_STATE_UP)
285 netif_tx_disable(card->dev);
286 card->options.large_send = type;
287 switch (card->options.large_send) {
288 case QETH_LARGE_SEND_EDDP:
289 if (card->info.type != QETH_CARD_TYPE_IQD) {
290 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
293 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
295 card->options.large_send = QETH_LARGE_SEND_NO;
299 case QETH_LARGE_SEND_TSO:
300 if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
301 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
304 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
306 card->options.large_send = QETH_LARGE_SEND_NO;
310 default: /* includes QETH_LARGE_SEND_NO */
311 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
315 if (card->state == CARD_STATE_UP)
316 netif_wake_queue(card->dev);
319 EXPORT_SYMBOL_GPL(qeth_set_large_send);
321 static int qeth_issue_next_read(struct qeth_card *card)
324 struct qeth_cmd_buffer *iob;
326 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
327 if (card->read.state != CH_STATE_UP)
329 iob = qeth_get_buffer(&card->read);
331 dev_warn(&card->gdev->dev, "The qeth device driver "
332 "failed to recover an error on the device\n");
333 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
334 "available\n", dev_name(&card->gdev->dev));
337 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
338 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
339 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
342 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
343 "rc=%i\n", dev_name(&card->gdev->dev), rc);
344 atomic_set(&card->read.irq_pending, 0);
345 qeth_schedule_recovery(card);
346 wake_up(&card->wait_q);
351 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
353 struct qeth_reply *reply;
355 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
357 atomic_set(&reply->refcnt, 1);
358 atomic_set(&reply->received, 0);
364 static void qeth_get_reply(struct qeth_reply *reply)
366 WARN_ON(atomic_read(&reply->refcnt) <= 0);
367 atomic_inc(&reply->refcnt);
370 static void qeth_put_reply(struct qeth_reply *reply)
372 WARN_ON(atomic_read(&reply->refcnt) <= 0);
373 if (atomic_dec_and_test(&reply->refcnt))
377 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
378 struct qeth_card *card)
381 int com = cmd->hdr.command;
382 ipa_name = qeth_get_ipa_cmd_name(com);
384 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
385 ipa_name, com, QETH_CARD_IFNAME(card),
386 rc, qeth_get_ipa_msg(rc));
388 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
389 ipa_name, com, QETH_CARD_IFNAME(card));
392 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
393 struct qeth_cmd_buffer *iob)
395 struct qeth_ipa_cmd *cmd = NULL;
397 QETH_DBF_TEXT(TRACE, 5, "chkipad");
398 if (IS_IPA(iob->data)) {
399 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
400 if (IS_IPA_REPLY(cmd)) {
401 if (cmd->hdr.command < IPA_CMD_SETCCID ||
402 cmd->hdr.command > IPA_CMD_MODCCID)
403 qeth_issue_ipa_msg(cmd,
404 cmd->hdr.return_code, card);
407 switch (cmd->hdr.command) {
408 case IPA_CMD_STOPLAN:
409 dev_warn(&card->gdev->dev,
410 "The link for interface %s on CHPID"
412 QETH_CARD_IFNAME(card),
414 card->lan_online = 0;
415 if (card->dev && netif_carrier_ok(card->dev))
416 netif_carrier_off(card->dev);
418 case IPA_CMD_STARTLAN:
419 dev_info(&card->gdev->dev,
420 "The link for %s on CHPID 0x%X has"
422 QETH_CARD_IFNAME(card),
424 netif_carrier_on(card->dev);
425 card->lan_online = 1;
426 qeth_schedule_recovery(card);
428 case IPA_CMD_MODCCID:
430 case IPA_CMD_REGISTER_LOCAL_ADDR:
431 QETH_DBF_TEXT(TRACE, 3, "irla");
433 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
434 QETH_DBF_TEXT(TRACE, 3, "urla");
437 QETH_DBF_MESSAGE(2, "Received data is IPA "
438 "but not a reply!\n");
446 void qeth_clear_ipacmd_list(struct qeth_card *card)
448 struct qeth_reply *reply, *r;
451 QETH_DBF_TEXT(TRACE, 4, "clipalst");
453 spin_lock_irqsave(&card->lock, flags);
454 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
455 qeth_get_reply(reply);
457 atomic_inc(&reply->received);
458 list_del_init(&reply->list);
459 wake_up(&reply->wait_q);
460 qeth_put_reply(reply);
462 spin_unlock_irqrestore(&card->lock, flags);
464 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
466 static int qeth_check_idx_response(unsigned char *buffer)
471 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
472 if ((buffer[2] & 0xc0) == 0xc0) {
473 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
474 "with cause code 0x%02x%s\n",
476 ((buffer[4] == 0x22) ?
477 " -- try another portname" : ""));
478 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
479 QETH_DBF_TEXT(TRACE, 2, " idxterm");
480 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
486 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
489 struct qeth_card *card;
491 QETH_DBF_TEXT(TRACE, 4, "setupccw");
492 card = CARD_FROM_CDEV(channel->ccwdev);
493 if (channel == &card->read)
494 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
496 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
497 channel->ccw.count = len;
498 channel->ccw.cda = (__u32) __pa(iob);
501 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
505 QETH_DBF_TEXT(TRACE, 6, "getbuff");
506 index = channel->io_buf_no;
508 if (channel->iob[index].state == BUF_STATE_FREE) {
509 channel->iob[index].state = BUF_STATE_LOCKED;
510 channel->io_buf_no = (channel->io_buf_no + 1) %
512 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
513 return channel->iob + index;
515 index = (index + 1) % QETH_CMD_BUFFER_NO;
516 } while (index != channel->io_buf_no);
521 void qeth_release_buffer(struct qeth_channel *channel,
522 struct qeth_cmd_buffer *iob)
526 QETH_DBF_TEXT(TRACE, 6, "relbuff");
527 spin_lock_irqsave(&channel->iob_lock, flags);
528 memset(iob->data, 0, QETH_BUFSIZE);
529 iob->state = BUF_STATE_FREE;
530 iob->callback = qeth_send_control_data_cb;
532 spin_unlock_irqrestore(&channel->iob_lock, flags);
534 EXPORT_SYMBOL_GPL(qeth_release_buffer);
536 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
538 struct qeth_cmd_buffer *buffer = NULL;
541 spin_lock_irqsave(&channel->iob_lock, flags);
542 buffer = __qeth_get_buffer(channel);
543 spin_unlock_irqrestore(&channel->iob_lock, flags);
547 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
549 struct qeth_cmd_buffer *buffer;
550 wait_event(channel->wait_q,
551 ((buffer = qeth_get_buffer(channel)) != NULL));
554 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
556 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
560 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
561 qeth_release_buffer(channel, &channel->iob[cnt]);
563 channel->io_buf_no = 0;
565 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
567 static void qeth_send_control_data_cb(struct qeth_channel *channel,
568 struct qeth_cmd_buffer *iob)
570 struct qeth_card *card;
571 struct qeth_reply *reply, *r;
572 struct qeth_ipa_cmd *cmd;
576 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
578 card = CARD_FROM_CDEV(channel->ccwdev);
579 if (qeth_check_idx_response(iob->data)) {
580 qeth_clear_ipacmd_list(card);
581 if (((iob->data[2] & 0xc0) == 0xc0) && iob->data[4] == 0xf6)
582 dev_err(&card->gdev->dev,
583 "The qeth device is not configured "
584 "for the OSI layer required by z/VM\n");
585 qeth_schedule_recovery(card);
589 cmd = qeth_check_ipa_data(card, iob);
590 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
592 /*in case of OSN : check if cmd is set */
593 if (card->info.type == QETH_CARD_TYPE_OSN &&
595 cmd->hdr.command != IPA_CMD_STARTLAN &&
596 card->osn_info.assist_cb != NULL) {
597 card->osn_info.assist_cb(card->dev, cmd);
601 spin_lock_irqsave(&card->lock, flags);
602 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
603 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
604 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
605 qeth_get_reply(reply);
606 list_del_init(&reply->list);
607 spin_unlock_irqrestore(&card->lock, flags);
609 if (reply->callback != NULL) {
611 reply->offset = (__u16)((char *)cmd -
613 keep_reply = reply->callback(card,
617 keep_reply = reply->callback(card,
622 reply->rc = (u16) cmd->hdr.return_code;
626 spin_lock_irqsave(&card->lock, flags);
627 list_add_tail(&reply->list,
628 &card->cmd_waiter_list);
629 spin_unlock_irqrestore(&card->lock, flags);
631 atomic_inc(&reply->received);
632 wake_up(&reply->wait_q);
634 qeth_put_reply(reply);
638 spin_unlock_irqrestore(&card->lock, flags);
640 memcpy(&card->seqno.pdu_hdr_ack,
641 QETH_PDU_HEADER_SEQ_NO(iob->data),
643 qeth_release_buffer(channel, iob);
646 static int qeth_setup_channel(struct qeth_channel *channel)
650 QETH_DBF_TEXT(SETUP, 2, "setupch");
651 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
652 channel->iob[cnt].data = (char *)
653 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
654 if (channel->iob[cnt].data == NULL)
656 channel->iob[cnt].state = BUF_STATE_FREE;
657 channel->iob[cnt].channel = channel;
658 channel->iob[cnt].callback = qeth_send_control_data_cb;
659 channel->iob[cnt].rc = 0;
661 if (cnt < QETH_CMD_BUFFER_NO) {
663 kfree(channel->iob[cnt].data);
667 channel->io_buf_no = 0;
668 atomic_set(&channel->irq_pending, 0);
669 spin_lock_init(&channel->iob_lock);
671 init_waitqueue_head(&channel->wait_q);
675 static int qeth_set_thread_start_bit(struct qeth_card *card,
676 unsigned long thread)
680 spin_lock_irqsave(&card->thread_mask_lock, flags);
681 if (!(card->thread_allowed_mask & thread) ||
682 (card->thread_start_mask & thread)) {
683 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
686 card->thread_start_mask |= thread;
687 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
691 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
695 spin_lock_irqsave(&card->thread_mask_lock, flags);
696 card->thread_start_mask &= ~thread;
697 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
698 wake_up(&card->wait_q);
700 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
702 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
706 spin_lock_irqsave(&card->thread_mask_lock, flags);
707 card->thread_running_mask &= ~thread;
708 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
709 wake_up(&card->wait_q);
711 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
713 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
718 spin_lock_irqsave(&card->thread_mask_lock, flags);
719 if (card->thread_start_mask & thread) {
720 if ((card->thread_allowed_mask & thread) &&
721 !(card->thread_running_mask & thread)) {
723 card->thread_start_mask &= ~thread;
724 card->thread_running_mask |= thread;
728 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
732 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
736 wait_event(card->wait_q,
737 (rc = __qeth_do_run_thread(card, thread)) >= 0);
740 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
742 void qeth_schedule_recovery(struct qeth_card *card)
744 QETH_DBF_TEXT(TRACE, 2, "startrec");
745 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
746 schedule_work(&card->kernel_thread_starter);
748 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
750 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
755 sense = (char *) irb->ecw;
756 cstat = irb->scsw.cmd.cstat;
757 dstat = irb->scsw.cmd.dstat;
759 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
760 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
761 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
762 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
763 dev_warn(&cdev->dev, "The qeth device driver "
764 "failed to recover an error on the device\n");
765 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x ",
766 dev_name(&cdev->dev), dstat, cstat);
767 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
772 if (dstat & DEV_STAT_UNIT_CHECK) {
773 if (sense[SENSE_RESETTING_EVENT_BYTE] &
774 SENSE_RESETTING_EVENT_FLAG) {
775 QETH_DBF_TEXT(TRACE, 2, "REVIND");
778 if (sense[SENSE_COMMAND_REJECT_BYTE] &
779 SENSE_COMMAND_REJECT_FLAG) {
780 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
783 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
784 QETH_DBF_TEXT(TRACE, 2, "AFFE");
787 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
788 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
791 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
797 static long __qeth_check_irb_error(struct ccw_device *cdev,
798 unsigned long intparm, struct irb *irb)
803 switch (PTR_ERR(irb)) {
805 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
806 dev_name(&cdev->dev));
807 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
808 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
811 dev_warn(&cdev->dev, "A hardware operation timed out"
813 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
814 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
815 if (intparm == QETH_RCD_PARM) {
816 struct qeth_card *card = CARD_FROM_CDEV(cdev);
818 if (card && (card->data.ccwdev == cdev)) {
819 card->data.state = CH_STATE_DOWN;
820 wake_up(&card->wait_q);
825 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
826 dev_name(&cdev->dev), PTR_ERR(irb));
827 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
828 QETH_DBF_TEXT(TRACE, 2, " rc???");
833 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
838 struct qeth_cmd_buffer *buffer;
839 struct qeth_channel *channel;
840 struct qeth_card *card;
841 struct qeth_cmd_buffer *iob;
844 QETH_DBF_TEXT(TRACE, 5, "irq");
846 if (__qeth_check_irb_error(cdev, intparm, irb))
848 cstat = irb->scsw.cmd.cstat;
849 dstat = irb->scsw.cmd.dstat;
851 card = CARD_FROM_CDEV(cdev);
855 if (card->read.ccwdev == cdev) {
856 channel = &card->read;
857 QETH_DBF_TEXT(TRACE, 5, "read");
858 } else if (card->write.ccwdev == cdev) {
859 channel = &card->write;
860 QETH_DBF_TEXT(TRACE, 5, "write");
862 channel = &card->data;
863 QETH_DBF_TEXT(TRACE, 5, "data");
865 atomic_set(&channel->irq_pending, 0);
867 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
868 channel->state = CH_STATE_STOPPED;
870 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
871 channel->state = CH_STATE_HALTED;
873 /*let's wake up immediately on data channel*/
874 if ((channel == &card->data) && (intparm != 0) &&
875 (intparm != QETH_RCD_PARM))
878 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
879 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
880 /* we don't have to handle this further */
883 if (intparm == QETH_HALT_CHANNEL_PARM) {
884 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
885 /* we don't have to handle this further */
888 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
889 (dstat & DEV_STAT_UNIT_CHECK) ||
891 if (irb->esw.esw0.erw.cons) {
892 dev_warn(&channel->ccwdev->dev,
893 "The qeth device driver failed to recover "
894 "an error on the device\n");
895 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
897 dev_name(&channel->ccwdev->dev), cstat, dstat);
898 print_hex_dump(KERN_WARNING, "qeth: irb ",
899 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
900 print_hex_dump(KERN_WARNING, "qeth: sense data ",
901 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
903 if (intparm == QETH_RCD_PARM) {
904 channel->state = CH_STATE_DOWN;
907 rc = qeth_get_problem(cdev, irb);
909 qeth_clear_ipacmd_list(card);
910 qeth_schedule_recovery(card);
915 if (intparm == QETH_RCD_PARM) {
916 channel->state = CH_STATE_RCD_DONE;
920 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
921 buffer->state = BUF_STATE_PROCESSED;
923 if (channel == &card->data)
925 if (channel == &card->read &&
926 channel->state == CH_STATE_UP)
927 qeth_issue_next_read(card);
930 index = channel->buf_no;
931 while (iob[index].state == BUF_STATE_PROCESSED) {
932 if (iob[index].callback != NULL)
933 iob[index].callback(channel, iob + index);
935 index = (index + 1) % QETH_CMD_BUFFER_NO;
937 channel->buf_no = index;
939 wake_up(&card->wait_q);
943 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
944 struct qeth_qdio_out_buffer *buf)
949 /* is PCI flag set on buffer? */
950 if (buf->buffer->element[0].flags & 0x40)
951 atomic_dec(&queue->set_pci_flags_count);
953 skb = skb_dequeue(&buf->skb_list);
955 atomic_dec(&skb->users);
956 dev_kfree_skb_any(skb);
957 skb = skb_dequeue(&buf->skb_list);
959 qeth_eddp_buf_release_contexts(buf);
960 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
961 if (buf->buffer->element[i].addr && buf->is_header[i])
962 kmem_cache_free(qeth_core_header_cache,
963 buf->buffer->element[i].addr);
964 buf->is_header[i] = 0;
965 buf->buffer->element[i].length = 0;
966 buf->buffer->element[i].addr = NULL;
967 buf->buffer->element[i].flags = 0;
969 buf->next_element_to_fill = 0;
970 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
973 void qeth_clear_qdio_buffers(struct qeth_card *card)
977 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
978 /* clear outbound buffers to free skbs */
979 for (i = 0; i < card->qdio.no_out_queues; ++i)
980 if (card->qdio.out_qs[i]) {
981 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
982 qeth_clear_output_buffer(card->qdio.out_qs[i],
983 &card->qdio.out_qs[i]->bufs[j]);
986 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
988 static void qeth_free_buffer_pool(struct qeth_card *card)
990 struct qeth_buffer_pool_entry *pool_entry, *tmp;
992 QETH_DBF_TEXT(TRACE, 5, "freepool");
993 list_for_each_entry_safe(pool_entry, tmp,
994 &card->qdio.init_pool.entry_list, init_list){
995 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
996 free_page((unsigned long)pool_entry->elements[i]);
997 list_del(&pool_entry->init_list);
1002 static void qeth_free_qdio_buffers(struct qeth_card *card)
1006 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
1007 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
1008 QETH_QDIO_UNINITIALIZED)
1010 kfree(card->qdio.in_q);
1011 card->qdio.in_q = NULL;
1012 /* inbound buffer pool */
1013 qeth_free_buffer_pool(card);
1014 /* free outbound qdio_qs */
1015 if (card->qdio.out_qs) {
1016 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1017 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
1018 qeth_clear_output_buffer(card->qdio.out_qs[i],
1019 &card->qdio.out_qs[i]->bufs[j]);
1020 kfree(card->qdio.out_qs[i]);
1022 kfree(card->qdio.out_qs);
1023 card->qdio.out_qs = NULL;
1027 static void qeth_clean_channel(struct qeth_channel *channel)
1031 QETH_DBF_TEXT(SETUP, 2, "freech");
1032 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1033 kfree(channel->iob[cnt].data);
1036 static int qeth_is_1920_device(struct qeth_card *card)
1038 int single_queue = 0;
1039 struct ccw_device *ccwdev;
1040 struct channelPath_dsc {
1051 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
1053 ccwdev = card->data.ccwdev;
1054 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1055 if (chp_dsc != NULL) {
1056 /* CHPP field bit 6 == 1 -> single queue */
1057 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1060 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
1061 return single_queue;
1064 static void qeth_init_qdio_info(struct qeth_card *card)
1066 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1067 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1069 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1070 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1071 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1072 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1073 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1076 static void qeth_set_intial_options(struct qeth_card *card)
1078 card->options.route4.type = NO_ROUTER;
1079 card->options.route6.type = NO_ROUTER;
1080 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1081 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1082 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1083 card->options.fake_broadcast = 0;
1084 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1085 card->options.performance_stats = 0;
1086 card->options.rx_sg_cb = QETH_RX_SG_CB;
1089 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1091 unsigned long flags;
1094 spin_lock_irqsave(&card->thread_mask_lock, flags);
1095 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
1096 (u8) card->thread_start_mask,
1097 (u8) card->thread_allowed_mask,
1098 (u8) card->thread_running_mask);
1099 rc = (card->thread_start_mask & thread);
1100 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1104 static void qeth_start_kernel_thread(struct work_struct *work)
1106 struct qeth_card *card = container_of(work, struct qeth_card,
1107 kernel_thread_starter);
1108 QETH_DBF_TEXT(TRACE , 2, "strthrd");
1110 if (card->read.state != CH_STATE_UP &&
1111 card->write.state != CH_STATE_UP)
1113 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1114 kthread_run(card->discipline.recover, (void *) card,
1118 static int qeth_setup_card(struct qeth_card *card)
1121 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1122 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1124 card->read.state = CH_STATE_DOWN;
1125 card->write.state = CH_STATE_DOWN;
1126 card->data.state = CH_STATE_DOWN;
1127 card->state = CARD_STATE_DOWN;
1128 card->lan_online = 0;
1129 card->use_hard_stop = 0;
1131 spin_lock_init(&card->vlanlock);
1132 spin_lock_init(&card->mclock);
1133 card->vlangrp = NULL;
1134 spin_lock_init(&card->lock);
1135 spin_lock_init(&card->ip_lock);
1136 spin_lock_init(&card->thread_mask_lock);
1137 card->thread_start_mask = 0;
1138 card->thread_allowed_mask = 0;
1139 card->thread_running_mask = 0;
1140 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1141 INIT_LIST_HEAD(&card->ip_list);
1142 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1143 if (!card->ip_tbd_list) {
1144 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1147 INIT_LIST_HEAD(card->ip_tbd_list);
1148 INIT_LIST_HEAD(&card->cmd_waiter_list);
1149 init_waitqueue_head(&card->wait_q);
1150 /* intial options */
1151 qeth_set_intial_options(card);
1152 /* IP address takeover */
1153 INIT_LIST_HEAD(&card->ipato.entries);
1154 card->ipato.enabled = 0;
1155 card->ipato.invert4 = 0;
1156 card->ipato.invert6 = 0;
1157 /* init QDIO stuff */
1158 qeth_init_qdio_info(card);
1162 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1164 struct qeth_card *card = container_of(slr, struct qeth_card,
1165 qeth_service_level);
1166 seq_printf(m, "qeth: %s firmware level %s\n", CARD_BUS_ID(card),
1167 card->info.mcl_level);
1170 static struct qeth_card *qeth_alloc_card(void)
1172 struct qeth_card *card;
1174 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1175 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1178 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1179 if (qeth_setup_channel(&card->read)) {
1183 if (qeth_setup_channel(&card->write)) {
1184 qeth_clean_channel(&card->read);
1188 card->options.layer2 = -1;
1189 card->qeth_service_level.seq_print = qeth_core_sl_print;
1190 register_service_level(&card->qeth_service_level);
1194 static int qeth_determine_card_type(struct qeth_card *card)
1198 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1200 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1201 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1202 while (known_devices[i][4]) {
1203 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1204 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1205 card->info.type = known_devices[i][4];
1206 card->qdio.no_out_queues = known_devices[i][8];
1207 card->info.is_multicast_different = known_devices[i][9];
1208 if (qeth_is_1920_device(card)) {
1209 dev_info(&card->gdev->dev,
1210 "Priority Queueing not supported\n");
1211 card->qdio.no_out_queues = 1;
1212 card->qdio.default_out_queue = 0;
1218 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1219 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1224 static int qeth_clear_channel(struct qeth_channel *channel)
1226 unsigned long flags;
1227 struct qeth_card *card;
1230 QETH_DBF_TEXT(TRACE, 3, "clearch");
1231 card = CARD_FROM_CDEV(channel->ccwdev);
1232 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1233 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1234 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1238 rc = wait_event_interruptible_timeout(card->wait_q,
1239 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1240 if (rc == -ERESTARTSYS)
1242 if (channel->state != CH_STATE_STOPPED)
1244 channel->state = CH_STATE_DOWN;
1248 static int qeth_halt_channel(struct qeth_channel *channel)
1250 unsigned long flags;
1251 struct qeth_card *card;
1254 QETH_DBF_TEXT(TRACE, 3, "haltch");
1255 card = CARD_FROM_CDEV(channel->ccwdev);
1256 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1257 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1258 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1262 rc = wait_event_interruptible_timeout(card->wait_q,
1263 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1264 if (rc == -ERESTARTSYS)
1266 if (channel->state != CH_STATE_HALTED)
1271 static int qeth_halt_channels(struct qeth_card *card)
1273 int rc1 = 0, rc2 = 0, rc3 = 0;
1275 QETH_DBF_TEXT(TRACE, 3, "haltchs");
1276 rc1 = qeth_halt_channel(&card->read);
1277 rc2 = qeth_halt_channel(&card->write);
1278 rc3 = qeth_halt_channel(&card->data);
1286 static int qeth_clear_channels(struct qeth_card *card)
1288 int rc1 = 0, rc2 = 0, rc3 = 0;
1290 QETH_DBF_TEXT(TRACE, 3, "clearchs");
1291 rc1 = qeth_clear_channel(&card->read);
1292 rc2 = qeth_clear_channel(&card->write);
1293 rc3 = qeth_clear_channel(&card->data);
1301 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1305 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1306 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
1309 rc = qeth_halt_channels(card);
1312 return qeth_clear_channels(card);
1315 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1319 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
1320 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1321 QETH_QDIO_CLEANING)) {
1322 case QETH_QDIO_ESTABLISHED:
1323 if (card->info.type == QETH_CARD_TYPE_IQD)
1324 rc = qdio_cleanup(CARD_DDEV(card),
1325 QDIO_FLAG_CLEANUP_USING_HALT);
1327 rc = qdio_cleanup(CARD_DDEV(card),
1328 QDIO_FLAG_CLEANUP_USING_CLEAR);
1330 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
1331 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1333 case QETH_QDIO_CLEANING:
1338 rc = qeth_clear_halt_card(card, use_halt);
1340 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
1341 card->state = CARD_STATE_DOWN;
1344 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1346 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1352 struct qeth_channel *channel = &card->data;
1353 unsigned long flags;
1356 * scan for RCD command in extended SenseID data
1358 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1359 if (!ciw || ciw->cmd == 0)
1361 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1365 channel->ccw.cmd_code = ciw->cmd;
1366 channel->ccw.cda = (__u32) __pa(rcd_buf);
1367 channel->ccw.count = ciw->count;
1368 channel->ccw.flags = CCW_FLAG_SLI;
1369 channel->state = CH_STATE_RCD;
1370 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1371 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1372 QETH_RCD_PARM, LPM_ANYPATH, 0,
1374 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1376 wait_event(card->wait_q,
1377 (channel->state == CH_STATE_RCD_DONE ||
1378 channel->state == CH_STATE_DOWN));
1379 if (channel->state == CH_STATE_DOWN)
1382 channel->state = CH_STATE_DOWN;
1388 *length = ciw->count;
1394 static int qeth_get_unitaddr(struct qeth_card *card)
1400 QETH_DBF_TEXT(SETUP, 2, "getunit");
1401 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
1403 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
1404 dev_name(&card->gdev->dev), rc);
1407 card->info.chpid = prcd[30];
1408 card->info.unit_addr2 = prcd[31];
1409 card->info.cula = prcd[63];
1410 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1411 (prcd[0x11] == _ascebc['M']));
1416 static void qeth_init_tokens(struct qeth_card *card)
1418 card->token.issuer_rm_w = 0x00010103UL;
1419 card->token.cm_filter_w = 0x00010108UL;
1420 card->token.cm_connection_w = 0x0001010aUL;
1421 card->token.ulp_filter_w = 0x0001010bUL;
1422 card->token.ulp_connection_w = 0x0001010dUL;
1425 static void qeth_init_func_level(struct qeth_card *card)
1427 if (card->ipato.enabled) {
1428 if (card->info.type == QETH_CARD_TYPE_IQD)
1429 card->info.func_level =
1430 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1432 card->info.func_level =
1433 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1435 if (card->info.type == QETH_CARD_TYPE_IQD)
1436 /*FIXME:why do we have same values for dis and ena for
1438 card->info.func_level =
1439 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1441 card->info.func_level =
1442 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1446 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1447 void (*idx_reply_cb)(struct qeth_channel *,
1448 struct qeth_cmd_buffer *))
1450 struct qeth_cmd_buffer *iob;
1451 unsigned long flags;
1453 struct qeth_card *card;
1455 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1456 card = CARD_FROM_CDEV(channel->ccwdev);
1457 iob = qeth_get_buffer(channel);
1458 iob->callback = idx_reply_cb;
1459 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1460 channel->ccw.count = QETH_BUFSIZE;
1461 channel->ccw.cda = (__u32) __pa(iob->data);
1463 wait_event(card->wait_q,
1464 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1465 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1466 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1467 rc = ccw_device_start(channel->ccwdev,
1468 &channel->ccw, (addr_t) iob, 0, 0);
1469 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1472 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1473 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1474 atomic_set(&channel->irq_pending, 0);
1475 wake_up(&card->wait_q);
1478 rc = wait_event_interruptible_timeout(card->wait_q,
1479 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1480 if (rc == -ERESTARTSYS)
1482 if (channel->state != CH_STATE_UP) {
1484 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1485 qeth_clear_cmd_buffers(channel);
1491 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1492 void (*idx_reply_cb)(struct qeth_channel *,
1493 struct qeth_cmd_buffer *))
1495 struct qeth_card *card;
1496 struct qeth_cmd_buffer *iob;
1497 unsigned long flags;
1501 struct ccw_dev_id temp_devid;
1503 card = CARD_FROM_CDEV(channel->ccwdev);
1505 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1507 iob = qeth_get_buffer(channel);
1508 iob->callback = idx_reply_cb;
1509 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1510 channel->ccw.count = IDX_ACTIVATE_SIZE;
1511 channel->ccw.cda = (__u32) __pa(iob->data);
1512 if (channel == &card->write) {
1513 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1514 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1515 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1516 card->seqno.trans_hdr++;
1518 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1519 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1520 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1522 tmp = ((__u8)card->info.portno) | 0x80;
1523 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1524 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1525 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1526 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1527 &card->info.func_level, sizeof(__u16));
1528 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1529 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1530 temp = (card->info.cula << 8) + card->info.unit_addr2;
1531 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1533 wait_event(card->wait_q,
1534 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1535 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1536 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1537 rc = ccw_device_start(channel->ccwdev,
1538 &channel->ccw, (addr_t) iob, 0, 0);
1539 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1542 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1544 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1545 atomic_set(&channel->irq_pending, 0);
1546 wake_up(&card->wait_q);
1549 rc = wait_event_interruptible_timeout(card->wait_q,
1550 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1551 if (rc == -ERESTARTSYS)
1553 if (channel->state != CH_STATE_ACTIVATING) {
1554 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1555 " failed to recover an error on the device\n");
1556 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1557 dev_name(&channel->ccwdev->dev));
1558 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1559 qeth_clear_cmd_buffers(channel);
1562 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1565 static int qeth_peer_func_level(int level)
1567 if ((level & 0xff) == 8)
1568 return (level & 0xff) + 0x400;
1569 if (((level >> 8) & 3) == 1)
1570 return (level & 0xff) + 0x200;
1574 static void qeth_idx_write_cb(struct qeth_channel *channel,
1575 struct qeth_cmd_buffer *iob)
1577 struct qeth_card *card;
1580 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1582 if (channel->state == CH_STATE_DOWN) {
1583 channel->state = CH_STATE_ACTIVATING;
1586 card = CARD_FROM_CDEV(channel->ccwdev);
1588 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1589 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1590 dev_err(&card->write.ccwdev->dev,
1591 "The adapter is used exclusively by another "
1594 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1595 " negative reply\n",
1596 dev_name(&card->write.ccwdev->dev));
1599 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1600 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1601 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1602 "function level mismatch (sent: 0x%x, received: "
1603 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1604 card->info.func_level, temp);
1607 channel->state = CH_STATE_UP;
1609 qeth_release_buffer(channel, iob);
1612 static void qeth_idx_read_cb(struct qeth_channel *channel,
1613 struct qeth_cmd_buffer *iob)
1615 struct qeth_card *card;
1618 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1619 if (channel->state == CH_STATE_DOWN) {
1620 channel->state = CH_STATE_ACTIVATING;
1624 card = CARD_FROM_CDEV(channel->ccwdev);
1625 if (qeth_check_idx_response(iob->data))
1628 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1629 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1630 dev_err(&card->write.ccwdev->dev,
1631 "The adapter is used exclusively by another "
1634 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1635 " negative reply\n",
1636 dev_name(&card->read.ccwdev->dev));
1641 * temporary fix for microcode bug
1642 * to revert it,replace OR by AND
1644 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1645 (card->info.type == QETH_CARD_TYPE_OSAE))
1646 card->info.portname_required = 1;
1648 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1649 if (temp != qeth_peer_func_level(card->info.func_level)) {
1650 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1651 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1652 dev_name(&card->read.ccwdev->dev),
1653 card->info.func_level, temp);
1656 memcpy(&card->token.issuer_rm_r,
1657 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1658 QETH_MPC_TOKEN_LENGTH);
1659 memcpy(&card->info.mcl_level[0],
1660 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1661 channel->state = CH_STATE_UP;
1663 qeth_release_buffer(channel, iob);
1666 void qeth_prepare_control_data(struct qeth_card *card, int len,
1667 struct qeth_cmd_buffer *iob)
1669 qeth_setup_ccw(&card->write, iob->data, len);
1670 iob->callback = qeth_release_buffer;
1672 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1673 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1674 card->seqno.trans_hdr++;
1675 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1676 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1677 card->seqno.pdu_hdr++;
1678 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1679 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1680 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1682 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1684 int qeth_send_control_data(struct qeth_card *card, int len,
1685 struct qeth_cmd_buffer *iob,
1686 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1691 unsigned long flags;
1692 struct qeth_reply *reply = NULL;
1693 unsigned long timeout;
1694 struct qeth_ipa_cmd *cmd;
1696 QETH_DBF_TEXT(TRACE, 2, "sendctl");
1698 reply = qeth_alloc_reply(card);
1702 reply->callback = reply_cb;
1703 reply->param = reply_param;
1704 if (card->state == CARD_STATE_DOWN)
1705 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1707 reply->seqno = card->seqno.ipa++;
1708 init_waitqueue_head(&reply->wait_q);
1709 spin_lock_irqsave(&card->lock, flags);
1710 list_add_tail(&reply->list, &card->cmd_waiter_list);
1711 spin_unlock_irqrestore(&card->lock, flags);
1712 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1714 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1715 qeth_prepare_control_data(card, len, iob);
1717 if (IS_IPA(iob->data))
1718 timeout = jiffies + QETH_IPA_TIMEOUT;
1720 timeout = jiffies + QETH_TIMEOUT;
1722 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
1723 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1724 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1725 (addr_t) iob, 0, 0);
1726 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1728 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1729 "ccw_device_start rc = %i\n",
1730 dev_name(&card->write.ccwdev->dev), rc);
1731 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
1732 spin_lock_irqsave(&card->lock, flags);
1733 list_del_init(&reply->list);
1734 qeth_put_reply(reply);
1735 spin_unlock_irqrestore(&card->lock, flags);
1736 qeth_release_buffer(iob->channel, iob);
1737 atomic_set(&card->write.irq_pending, 0);
1738 wake_up(&card->wait_q);
1742 /* we have only one long running ipassist, since we can ensure
1743 process context of this command we can sleep */
1744 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
1745 if ((cmd->hdr.command == IPA_CMD_SETIP) &&
1746 (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
1747 if (!wait_event_timeout(reply->wait_q,
1748 atomic_read(&reply->received), timeout))
1751 while (!atomic_read(&reply->received)) {
1752 if (time_after(jiffies, timeout))
1759 qeth_put_reply(reply);
1763 spin_lock_irqsave(&reply->card->lock, flags);
1764 list_del_init(&reply->list);
1765 spin_unlock_irqrestore(&reply->card->lock, flags);
1767 atomic_inc(&reply->received);
1768 wake_up(&reply->wait_q);
1770 qeth_put_reply(reply);
1773 EXPORT_SYMBOL_GPL(qeth_send_control_data);
1775 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1778 struct qeth_cmd_buffer *iob;
1780 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
1782 iob = (struct qeth_cmd_buffer *) data;
1783 memcpy(&card->token.cm_filter_r,
1784 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1785 QETH_MPC_TOKEN_LENGTH);
1786 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1790 static int qeth_cm_enable(struct qeth_card *card)
1793 struct qeth_cmd_buffer *iob;
1795 QETH_DBF_TEXT(SETUP, 2, "cmenable");
1797 iob = qeth_wait_for_buffer(&card->write);
1798 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1799 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1800 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1801 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1802 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1804 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1805 qeth_cm_enable_cb, NULL);
1809 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1813 struct qeth_cmd_buffer *iob;
1815 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
1817 iob = (struct qeth_cmd_buffer *) data;
1818 memcpy(&card->token.cm_connection_r,
1819 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1820 QETH_MPC_TOKEN_LENGTH);
1821 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1825 static int qeth_cm_setup(struct qeth_card *card)
1828 struct qeth_cmd_buffer *iob;
1830 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
1832 iob = qeth_wait_for_buffer(&card->write);
1833 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1834 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1835 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1836 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1837 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1838 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1839 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1840 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1841 qeth_cm_setup_cb, NULL);
1846 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1848 switch (card->info.type) {
1849 case QETH_CARD_TYPE_UNKNOWN:
1851 case QETH_CARD_TYPE_IQD:
1852 return card->info.max_mtu;
1853 case QETH_CARD_TYPE_OSAE:
1854 switch (card->info.link_type) {
1855 case QETH_LINK_TYPE_HSTR:
1856 case QETH_LINK_TYPE_LANE_TR:
1866 static inline int qeth_get_max_mtu_for_card(int cardtype)
1870 case QETH_CARD_TYPE_UNKNOWN:
1871 case QETH_CARD_TYPE_OSAE:
1872 case QETH_CARD_TYPE_OSN:
1874 case QETH_CARD_TYPE_IQD:
1881 static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1884 case QETH_CARD_TYPE_IQD:
1891 static inline int qeth_get_mtu_outof_framesize(int framesize)
1893 switch (framesize) {
1907 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1909 switch (card->info.type) {
1910 case QETH_CARD_TYPE_OSAE:
1911 return ((mtu >= 576) && (mtu <= 61440));
1912 case QETH_CARD_TYPE_IQD:
1913 return ((mtu >= 576) &&
1914 (mtu <= card->info.max_mtu + 4096 - 32));
1915 case QETH_CARD_TYPE_OSN:
1916 case QETH_CARD_TYPE_UNKNOWN:
1922 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1926 __u16 mtu, framesize;
1929 struct qeth_cmd_buffer *iob;
1931 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
1933 iob = (struct qeth_cmd_buffer *) data;
1934 memcpy(&card->token.ulp_filter_r,
1935 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1936 QETH_MPC_TOKEN_LENGTH);
1937 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1938 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1939 mtu = qeth_get_mtu_outof_framesize(framesize);
1942 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1945 card->info.max_mtu = mtu;
1946 card->info.initial_mtu = mtu;
1947 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1949 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1950 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1951 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1954 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1955 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1957 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1958 card->info.link_type = link_type;
1960 card->info.link_type = 0;
1961 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1965 static int qeth_ulp_enable(struct qeth_card *card)
1969 struct qeth_cmd_buffer *iob;
1971 /*FIXME: trace view callbacks*/
1972 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
1974 iob = qeth_wait_for_buffer(&card->write);
1975 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1977 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1978 (__u8) card->info.portno;
1979 if (card->options.layer2)
1980 if (card->info.type == QETH_CARD_TYPE_OSN)
1981 prot_type = QETH_PROT_OSN2;
1983 prot_type = QETH_PROT_LAYER2;
1985 prot_type = QETH_PROT_TCPIP;
1987 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1988 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1989 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1990 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1991 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1992 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1993 card->info.portname, 9);
1994 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1995 qeth_ulp_enable_cb, NULL);
2000 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
2003 struct qeth_cmd_buffer *iob;
2005 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
2007 iob = (struct qeth_cmd_buffer *) data;
2008 memcpy(&card->token.ulp_connection_r,
2009 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
2010 QETH_MPC_TOKEN_LENGTH);
2011 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
2015 static int qeth_ulp_setup(struct qeth_card *card)
2019 struct qeth_cmd_buffer *iob;
2020 struct ccw_dev_id dev_id;
2022 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
2024 iob = qeth_wait_for_buffer(&card->write);
2025 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2027 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2028 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2029 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2030 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2031 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2032 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2034 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2035 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2036 temp = (card->info.cula << 8) + card->info.unit_addr2;
2037 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2038 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2039 qeth_ulp_setup_cb, NULL);
2043 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2047 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2049 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2050 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2053 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
2055 if (!card->qdio.in_q)
2057 QETH_DBF_TEXT(SETUP, 2, "inq");
2058 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2059 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2060 /* give inbound qeth_qdio_buffers their qdio_buffers */
2061 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2062 card->qdio.in_q->bufs[i].buffer =
2063 &card->qdio.in_q->qdio_bufs[i];
2064 /* inbound buffer pool */
2065 if (qeth_alloc_buffer_pool(card))
2069 kmalloc(card->qdio.no_out_queues *
2070 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2071 if (!card->qdio.out_qs)
2073 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2074 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
2076 if (!card->qdio.out_qs[i])
2078 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2079 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2080 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2081 card->qdio.out_qs[i]->queue_no = i;
2082 /* give outbound qeth_qdio_buffers their qdio_buffers */
2083 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2084 card->qdio.out_qs[i]->bufs[j].buffer =
2085 &card->qdio.out_qs[i]->qdio_bufs[j];
2086 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2089 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2090 &qdio_out_skb_queue_key);
2091 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2098 kfree(card->qdio.out_qs[--i]);
2099 kfree(card->qdio.out_qs);
2100 card->qdio.out_qs = NULL;
2102 qeth_free_buffer_pool(card);
2104 kfree(card->qdio.in_q);
2105 card->qdio.in_q = NULL;
2107 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2111 static void qeth_create_qib_param_field(struct qeth_card *card,
2115 param_field[0] = _ascebc['P'];
2116 param_field[1] = _ascebc['C'];
2117 param_field[2] = _ascebc['I'];
2118 param_field[3] = _ascebc['T'];
2119 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card);
2120 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card);
2121 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card);
2124 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2127 param_field[16] = _ascebc['B'];
2128 param_field[17] = _ascebc['L'];
2129 param_field[18] = _ascebc['K'];
2130 param_field[19] = _ascebc['T'];
2131 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total;
2132 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet;
2133 *((unsigned int *) (¶m_field[28])) =
2134 card->info.blkt.inter_packet_jumbo;
2137 static int qeth_qdio_activate(struct qeth_card *card)
2139 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2140 return qdio_activate(CARD_DDEV(card));
2143 static int qeth_dm_act(struct qeth_card *card)
2146 struct qeth_cmd_buffer *iob;
2148 QETH_DBF_TEXT(SETUP, 2, "dmact");
2150 iob = qeth_wait_for_buffer(&card->write);
2151 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2153 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2154 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2155 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2156 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2157 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2161 static int qeth_mpc_initialize(struct qeth_card *card)
2165 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2167 rc = qeth_issue_next_read(card);
2169 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2172 rc = qeth_cm_enable(card);
2174 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2177 rc = qeth_cm_setup(card);
2179 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2182 rc = qeth_ulp_enable(card);
2184 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2187 rc = qeth_ulp_setup(card);
2189 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2192 rc = qeth_alloc_qdio_buffers(card);
2194 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2197 rc = qeth_qdio_establish(card);
2199 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2200 qeth_free_qdio_buffers(card);
2203 rc = qeth_qdio_activate(card);
2205 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2208 rc = qeth_dm_act(card);
2210 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2216 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2220 static void qeth_print_status_with_portname(struct qeth_card *card)
2225 sprintf(dbf_text, "%s", card->info.portname + 1);
2226 for (i = 0; i < 8; i++)
2228 (char) _ebcasc[(__u8) dbf_text[i]];
2230 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2231 "with link type %s (portname: %s)\n",
2232 qeth_get_cardname(card),
2233 (card->info.mcl_level[0]) ? " (level: " : "",
2234 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2235 (card->info.mcl_level[0]) ? ")" : "",
2236 qeth_get_cardname_short(card),
2241 static void qeth_print_status_no_portname(struct qeth_card *card)
2243 if (card->info.portname[0])
2244 dev_info(&card->gdev->dev, "Device is a%s "
2245 "card%s%s%s\nwith link type %s "
2246 "(no portname needed by interface).\n",
2247 qeth_get_cardname(card),
2248 (card->info.mcl_level[0]) ? " (level: " : "",
2249 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2250 (card->info.mcl_level[0]) ? ")" : "",
2251 qeth_get_cardname_short(card));
2253 dev_info(&card->gdev->dev, "Device is a%s "
2254 "card%s%s%s\nwith link type %s.\n",
2255 qeth_get_cardname(card),
2256 (card->info.mcl_level[0]) ? " (level: " : "",
2257 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2258 (card->info.mcl_level[0]) ? ")" : "",
2259 qeth_get_cardname_short(card));
2262 void qeth_print_status_message(struct qeth_card *card)
2264 switch (card->info.type) {
2265 case QETH_CARD_TYPE_OSAE:
2266 /* VM will use a non-zero first character
2267 * to indicate a HiperSockets like reporting
2268 * of the level OSA sets the first character to zero
2270 if (!card->info.mcl_level[0]) {
2271 sprintf(card->info.mcl_level, "%02x%02x",
2272 card->info.mcl_level[2],
2273 card->info.mcl_level[3]);
2275 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2279 case QETH_CARD_TYPE_IQD:
2280 if ((card->info.guestlan) ||
2281 (card->info.mcl_level[0] & 0x80)) {
2282 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2283 card->info.mcl_level[0]];
2284 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2285 card->info.mcl_level[1]];
2286 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2287 card->info.mcl_level[2]];
2288 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2289 card->info.mcl_level[3]];
2290 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2294 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2296 if (card->info.portname_required)
2297 qeth_print_status_with_portname(card);
2299 qeth_print_status_no_portname(card);
2301 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2303 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2305 struct qeth_buffer_pool_entry *entry;
2307 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
2309 list_for_each_entry(entry,
2310 &card->qdio.init_pool.entry_list, init_list) {
2311 qeth_put_buffer_pool_entry(card, entry);
2315 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2316 struct qeth_card *card)
2318 struct list_head *plh;
2319 struct qeth_buffer_pool_entry *entry;
2323 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2326 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2327 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2329 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2330 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2336 list_del_init(&entry->list);
2341 /* no free buffer in pool so take first one and swap pages */
2342 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2343 struct qeth_buffer_pool_entry, list);
2344 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2345 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2346 page = alloc_page(GFP_ATOMIC);
2350 free_page((unsigned long)entry->elements[i]);
2351 entry->elements[i] = page_address(page);
2352 if (card->options.performance_stats)
2353 card->perf_stats.sg_alloc_page_rx++;
2357 list_del_init(&entry->list);
2361 static int qeth_init_input_buffer(struct qeth_card *card,
2362 struct qeth_qdio_buffer *buf)
2364 struct qeth_buffer_pool_entry *pool_entry;
2367 pool_entry = qeth_find_free_buffer_pool_entry(card);
2372 * since the buffer is accessed only from the input_tasklet
2373 * there shouldn't be a need to synchronize; also, since we use
2374 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2378 buf->pool_entry = pool_entry;
2379 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2380 buf->buffer->element[i].length = PAGE_SIZE;
2381 buf->buffer->element[i].addr = pool_entry->elements[i];
2382 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2383 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2385 buf->buffer->element[i].flags = 0;
2390 int qeth_init_qdio_queues(struct qeth_card *card)
2395 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2398 memset(card->qdio.in_q->qdio_bufs, 0,
2399 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2400 qeth_initialize_working_pool_list(card);
2401 /*give only as many buffers to hardware as we have buffer pool entries*/
2402 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2403 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2404 card->qdio.in_q->next_buf_to_init =
2405 card->qdio.in_buf_pool.buf_count - 1;
2406 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2407 card->qdio.in_buf_pool.buf_count - 1);
2409 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2412 /* outbound queue */
2413 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2414 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2415 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2416 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2417 qeth_clear_output_buffer(card->qdio.out_qs[i],
2418 &card->qdio.out_qs[i]->bufs[j]);
2420 card->qdio.out_qs[i]->card = card;
2421 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2422 card->qdio.out_qs[i]->do_pack = 0;
2423 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2424 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2425 atomic_set(&card->qdio.out_qs[i]->state,
2426 QETH_OUT_Q_UNLOCKED);
2430 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2432 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2434 switch (link_type) {
2435 case QETH_LINK_TYPE_HSTR:
2442 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2443 struct qeth_ipa_cmd *cmd, __u8 command,
2444 enum qeth_prot_versions prot)
2446 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2447 cmd->hdr.command = command;
2448 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2449 cmd->hdr.seqno = card->seqno.ipa;
2450 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2451 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2452 if (card->options.layer2)
2453 cmd->hdr.prim_version_no = 2;
2455 cmd->hdr.prim_version_no = 1;
2456 cmd->hdr.param_count = 1;
2457 cmd->hdr.prot_version = prot;
2458 cmd->hdr.ipa_supported = 0;
2459 cmd->hdr.ipa_enabled = 0;
2462 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2463 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2465 struct qeth_cmd_buffer *iob;
2466 struct qeth_ipa_cmd *cmd;
2468 iob = qeth_wait_for_buffer(&card->write);
2469 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2470 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2474 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2476 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2479 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2480 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2481 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2482 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2484 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2486 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2487 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2494 QETH_DBF_TEXT(TRACE, 4, "sendipa");
2496 if (card->options.layer2)
2497 if (card->info.type == QETH_CARD_TYPE_OSN)
2498 prot_type = QETH_PROT_OSN2;
2500 prot_type = QETH_PROT_LAYER2;
2502 prot_type = QETH_PROT_TCPIP;
2503 qeth_prepare_ipa_cmd(card, iob, prot_type);
2504 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2505 iob, reply_cb, reply_param);
2508 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2510 static int qeth_send_startstoplan(struct qeth_card *card,
2511 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2514 struct qeth_cmd_buffer *iob;
2516 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2517 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2522 int qeth_send_startlan(struct qeth_card *card)
2526 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2528 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2531 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2533 int qeth_send_stoplan(struct qeth_card *card)
2538 * TODO: according to the IPA format document page 14,
2539 * TCP/IP (we!) never issue a STOPLAN
2542 QETH_DBF_TEXT(SETUP, 2, "stoplan");
2544 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2547 EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2549 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2550 struct qeth_reply *reply, unsigned long data)
2552 struct qeth_ipa_cmd *cmd;
2554 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
2556 cmd = (struct qeth_ipa_cmd *) data;
2557 if (cmd->hdr.return_code == 0)
2558 cmd->hdr.return_code =
2559 cmd->data.setadapterparms.hdr.return_code;
2562 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2564 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2565 struct qeth_reply *reply, unsigned long data)
2567 struct qeth_ipa_cmd *cmd;
2569 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
2571 cmd = (struct qeth_ipa_cmd *) data;
2572 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2573 card->info.link_type =
2574 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2575 card->options.adp.supported_funcs =
2576 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2577 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2580 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2581 __u32 command, __u32 cmdlen)
2583 struct qeth_cmd_buffer *iob;
2584 struct qeth_ipa_cmd *cmd;
2586 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2588 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2589 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2590 cmd->data.setadapterparms.hdr.command_code = command;
2591 cmd->data.setadapterparms.hdr.used_total = 1;
2592 cmd->data.setadapterparms.hdr.seq_no = 1;
2596 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2598 int qeth_query_setadapterparms(struct qeth_card *card)
2601 struct qeth_cmd_buffer *iob;
2603 QETH_DBF_TEXT(TRACE, 3, "queryadp");
2604 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2605 sizeof(struct qeth_ipacmd_setadpparms));
2606 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2609 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2611 int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error,
2612 const char *dbftext)
2615 QETH_DBF_TEXT(TRACE, 2, dbftext);
2616 QETH_DBF_TEXT(QERR, 2, dbftext);
2617 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
2618 buf->element[15].flags & 0xff);
2619 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
2620 buf->element[14].flags & 0xff);
2621 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
2626 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2628 void qeth_queue_input_buffer(struct qeth_card *card, int index)
2630 struct qeth_qdio_q *queue = card->qdio.in_q;
2636 count = (index < queue->next_buf_to_init)?
2637 card->qdio.in_buf_pool.buf_count -
2638 (queue->next_buf_to_init - index) :
2639 card->qdio.in_buf_pool.buf_count -
2640 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2641 /* only requeue at a certain threshold to avoid SIGAs */
2642 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2643 for (i = queue->next_buf_to_init;
2644 i < queue->next_buf_to_init + count; ++i) {
2645 if (qeth_init_input_buffer(card,
2646 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2653 if (newcount < count) {
2654 /* we are in memory shortage so we switch back to
2655 traditional skb allocation and drop packages */
2656 atomic_set(&card->force_alloc_skb, 3);
2659 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2663 * according to old code it should be avoided to requeue all
2664 * 128 buffers in order to benefit from PCI avoidance.
2665 * this function keeps at least one buffer (the buffer at
2666 * 'index') un-requeued -> this buffer is the first buffer that
2667 * will be requeued the next time
2669 if (card->options.performance_stats) {
2670 card->perf_stats.inbound_do_qdio_cnt++;
2671 card->perf_stats.inbound_do_qdio_start_time =
2674 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2675 queue->next_buf_to_init, count);
2676 if (card->options.performance_stats)
2677 card->perf_stats.inbound_do_qdio_time +=
2679 card->perf_stats.inbound_do_qdio_start_time;
2681 dev_warn(&card->gdev->dev,
2682 "QDIO reported an error, rc=%i\n", rc);
2683 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2684 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2686 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2687 QDIO_MAX_BUFFERS_PER_Q;
2690 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2692 static int qeth_handle_send_error(struct qeth_card *card,
2693 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
2695 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2697 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
2698 qeth_check_qdio_errors(buffer->buffer, qdio_err, "qouterr");
2701 return QETH_SEND_ERROR_NONE;
2703 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2704 return QETH_SEND_ERROR_RETRY;
2706 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2707 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2708 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
2709 (u16)qdio_err, (u8)sbalf15);
2710 return QETH_SEND_ERROR_LINK_FAILURE;
2714 * Switched to packing state if the number of used buffers on a queue
2715 * reaches a certain limit.
2717 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2719 if (!queue->do_pack) {
2720 if (atomic_read(&queue->used_buffers)
2721 >= QETH_HIGH_WATERMARK_PACK){
2722 /* switch non-PACKING -> PACKING */
2723 QETH_DBF_TEXT(TRACE, 6, "np->pack");
2724 if (queue->card->options.performance_stats)
2725 queue->card->perf_stats.sc_dp_p++;
2732 * Switches from packing to non-packing mode. If there is a packing
2733 * buffer on the queue this buffer will be prepared to be flushed.
2734 * In that case 1 is returned to inform the caller. If no buffer
2735 * has to be flushed, zero is returned.
2737 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2739 struct qeth_qdio_out_buffer *buffer;
2740 int flush_count = 0;
2742 if (queue->do_pack) {
2743 if (atomic_read(&queue->used_buffers)
2744 <= QETH_LOW_WATERMARK_PACK) {
2745 /* switch PACKING -> non-PACKING */
2746 QETH_DBF_TEXT(TRACE, 6, "pack->np");
2747 if (queue->card->options.performance_stats)
2748 queue->card->perf_stats.sc_p_dp++;
2750 /* flush packing buffers */
2751 buffer = &queue->bufs[queue->next_buf_to_fill];
2752 if ((atomic_read(&buffer->state) ==
2753 QETH_QDIO_BUF_EMPTY) &&
2754 (buffer->next_element_to_fill > 0)) {
2755 atomic_set(&buffer->state,
2756 QETH_QDIO_BUF_PRIMED);
2758 queue->next_buf_to_fill =
2759 (queue->next_buf_to_fill + 1) %
2760 QDIO_MAX_BUFFERS_PER_Q;
2768 * Called to flush a packing buffer if no more pci flags are on the queue.
2769 * Checks if there is a packing buffer and prepares it to be flushed.
2770 * In that case returns 1, otherwise zero.
2772 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2774 struct qeth_qdio_out_buffer *buffer;
2776 buffer = &queue->bufs[queue->next_buf_to_fill];
2777 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2778 (buffer->next_element_to_fill > 0)) {
2779 /* it's a packing buffer */
2780 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2781 queue->next_buf_to_fill =
2782 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2788 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2791 struct qeth_qdio_out_buffer *buf;
2794 unsigned int qdio_flags;
2796 for (i = index; i < index + count; ++i) {
2797 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2798 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2799 SBAL_FLAGS_LAST_ENTRY;
2801 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2804 if (!queue->do_pack) {
2805 if ((atomic_read(&queue->used_buffers) >=
2806 (QETH_HIGH_WATERMARK_PACK -
2807 QETH_WATERMARK_PACK_FUZZ)) &&
2808 !atomic_read(&queue->set_pci_flags_count)) {
2809 /* it's likely that we'll go to packing
2811 atomic_inc(&queue->set_pci_flags_count);
2812 buf->buffer->element[0].flags |= 0x40;
2815 if (!atomic_read(&queue->set_pci_flags_count)) {
2817 * there's no outstanding PCI any more, so we
2818 * have to request a PCI to be sure the the PCI
2819 * will wake at some time in the future then we
2820 * can flush packed buffers that might still be
2821 * hanging around, which can happen if no
2822 * further send was requested by the stack
2824 atomic_inc(&queue->set_pci_flags_count);
2825 buf->buffer->element[0].flags |= 0x40;
2830 queue->card->dev->trans_start = jiffies;
2831 if (queue->card->options.performance_stats) {
2832 queue->card->perf_stats.outbound_do_qdio_cnt++;
2833 queue->card->perf_stats.outbound_do_qdio_start_time =
2836 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2837 if (atomic_read(&queue->set_pci_flags_count))
2838 qdio_flags |= QDIO_FLAG_PCI_OUT;
2839 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2840 queue->queue_no, index, count);
2841 if (queue->card->options.performance_stats)
2842 queue->card->perf_stats.outbound_do_qdio_time +=
2844 queue->card->perf_stats.outbound_do_qdio_start_time;
2846 queue->card->stats.tx_errors += count;
2847 /* ignore temporary SIGA errors without busy condition */
2848 if (rc == QDIO_ERROR_SIGA_TARGET)
2850 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2851 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2852 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
2854 /* this must not happen under normal circumstances. if it
2855 * happens something is really wrong -> recover */
2856 qeth_schedule_recovery(queue->card);
2859 atomic_add(count, &queue->used_buffers);
2860 if (queue->card->options.performance_stats)
2861 queue->card->perf_stats.bufs_sent += count;
2864 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2868 int q_was_packing = 0;
2871 * check if weed have to switch to non-packing mode or if
2872 * we have to get a pci flag out on the queue
2874 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2875 !atomic_read(&queue->set_pci_flags_count)) {
2876 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2877 QETH_OUT_Q_UNLOCKED) {
2879 * If we get in here, there was no action in
2880 * do_send_packet. So, we check if there is a
2881 * packing buffer to be flushed here.
2883 netif_stop_queue(queue->card->dev);
2884 index = queue->next_buf_to_fill;
2885 q_was_packing = queue->do_pack;
2886 /* queue->do_pack may change */
2888 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2890 !atomic_read(&queue->set_pci_flags_count))
2892 qeth_flush_buffers_on_no_pci(queue);
2893 if (queue->card->options.performance_stats &&
2895 queue->card->perf_stats.bufs_sent_pack +=
2898 qeth_flush_buffers(queue, index, flush_cnt);
2899 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2904 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2905 unsigned int qdio_error, int __queue, int first_element,
2906 int count, unsigned long card_ptr)
2908 struct qeth_card *card = (struct qeth_card *) card_ptr;
2909 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2910 struct qeth_qdio_out_buffer *buffer;
2913 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
2914 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
2915 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2916 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2917 netif_stop_queue(card->dev);
2918 qeth_schedule_recovery(card);
2921 if (card->options.performance_stats) {
2922 card->perf_stats.outbound_handler_cnt++;
2923 card->perf_stats.outbound_handler_start_time =
2926 for (i = first_element; i < (first_element + count); ++i) {
2927 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2928 qeth_handle_send_error(card, buffer, qdio_error);
2929 qeth_clear_output_buffer(queue, buffer);
2931 atomic_sub(count, &queue->used_buffers);
2932 /* check if we need to do something on this outbound queue */
2933 if (card->info.type != QETH_CARD_TYPE_IQD)
2934 qeth_check_outbound_queue(queue);
2936 netif_wake_queue(queue->card->dev);
2937 if (card->options.performance_stats)
2938 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2939 card->perf_stats.outbound_handler_start_time;
2941 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2943 int qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb)
2945 int cast_type = RTN_UNSPEC;
2947 if (card->info.type == QETH_CARD_TYPE_OSN)
2950 if (skb->dst && skb->dst->neighbour) {
2951 cast_type = skb->dst->neighbour->type;
2952 if ((cast_type == RTN_BROADCAST) ||
2953 (cast_type == RTN_MULTICAST) ||
2954 (cast_type == RTN_ANYCAST))
2959 /* try something else */
2960 if (skb->protocol == ETH_P_IPV6)
2961 return (skb_network_header(skb)[24] == 0xff) ?
2963 else if (skb->protocol == ETH_P_IP)
2964 return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ?
2967 if (!memcmp(skb->data, skb->dev->broadcast, 6))
2968 return RTN_BROADCAST;
2972 hdr_mac = *((u16 *)skb->data);
2974 switch (card->info.link_type) {
2975 case QETH_LINK_TYPE_HSTR:
2976 case QETH_LINK_TYPE_LANE_TR:
2977 if ((hdr_mac == QETH_TR_MAC_NC) ||
2978 (hdr_mac == QETH_TR_MAC_C))
2979 return RTN_MULTICAST;
2981 /* eth or so multicast? */
2983 if ((hdr_mac == QETH_ETH_MAC_V4) ||
2984 (hdr_mac == QETH_ETH_MAC_V6))
2985 return RTN_MULTICAST;
2990 EXPORT_SYMBOL_GPL(qeth_get_cast_type);
2992 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2993 int ipv, int cast_type)
2995 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
2996 return card->qdio.default_out_queue;
2997 switch (card->qdio.no_out_queues) {
2999 if (cast_type && card->info.is_multicast_different)
3000 return card->info.is_multicast_different &
3001 (card->qdio.no_out_queues - 1);
3002 if (card->qdio.do_prio_queueing && (ipv == 4)) {
3003 const u8 tos = ip_hdr(skb)->tos;
3005 if (card->qdio.do_prio_queueing ==
3006 QETH_PRIO_Q_ING_TOS) {
3007 if (tos & IP_TOS_NOTIMPORTANT)
3009 if (tos & IP_TOS_HIGHRELIABILITY)
3011 if (tos & IP_TOS_HIGHTHROUGHPUT)
3013 if (tos & IP_TOS_LOWDELAY)
3016 if (card->qdio.do_prio_queueing ==
3017 QETH_PRIO_Q_ING_PREC)
3018 return 3 - (tos >> 6);
3019 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3022 return card->qdio.default_out_queue;
3023 case 1: /* fallthrough for single-out-queue 1920-device */
3025 return card->qdio.default_out_queue;
3028 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3030 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3031 struct sk_buff *skb, int elems)
3033 int elements_needed = 0;
3035 if (skb_shinfo(skb)->nr_frags > 0)
3036 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
3037 if (elements_needed == 0)
3038 elements_needed = 1 + (((((unsigned long) skb->data) %
3039 PAGE_SIZE) + skb->len) >> PAGE_SHIFT);
3040 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3041 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
3042 "(Number=%d / Length=%d). Discarded.\n",
3043 (elements_needed+elems), skb->len);
3046 return elements_needed;
3048 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3050 static inline void __qeth_fill_buffer(struct sk_buff *skb,
3051 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3054 int length = skb->len;
3060 element = *next_element_to_fill;
3062 first_lap = (is_tso == 0 ? 1 : 0);
3065 data = skb->data + offset;
3070 while (length > 0) {
3071 /* length_here is the remaining amount of data in this page */
3072 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3073 if (length < length_here)
3074 length_here = length;
3076 buffer->element[element].addr = data;
3077 buffer->element[element].length = length_here;
3078 length -= length_here;
3081 buffer->element[element].flags = 0;
3083 buffer->element[element].flags =
3084 SBAL_FLAGS_LAST_FRAG;
3087 buffer->element[element].flags =
3088 SBAL_FLAGS_FIRST_FRAG;
3090 buffer->element[element].flags =
3091 SBAL_FLAGS_MIDDLE_FRAG;
3093 data += length_here;
3097 *next_element_to_fill = element;
3100 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3101 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3102 struct qeth_hdr *hdr, int offset, int hd_len)
3104 struct qdio_buffer *buffer;
3105 int flush_cnt = 0, hdr_len, large_send = 0;
3107 buffer = buf->buffer;
3108 atomic_inc(&skb->users);
3109 skb_queue_tail(&buf->skb_list, skb);
3111 /*check first on TSO ....*/
3112 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3113 int element = buf->next_element_to_fill;
3115 hdr_len = sizeof(struct qeth_hdr_tso) +
3116 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3117 /*fill first buffer entry only with header information */
3118 buffer->element[element].addr = skb->data;
3119 buffer->element[element].length = hdr_len;
3120 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3121 buf->next_element_to_fill++;
3122 skb->data += hdr_len;
3123 skb->len -= hdr_len;
3128 int element = buf->next_element_to_fill;
3129 buffer->element[element].addr = hdr;
3130 buffer->element[element].length = sizeof(struct qeth_hdr) +
3132 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3133 buf->is_header[element] = 1;
3134 buf->next_element_to_fill++;
3137 if (skb_shinfo(skb)->nr_frags == 0)
3138 __qeth_fill_buffer(skb, buffer, large_send,
3139 (int *)&buf->next_element_to_fill, offset);
3141 __qeth_fill_buffer_frag(skb, buffer, large_send,
3142 (int *)&buf->next_element_to_fill);
3144 if (!queue->do_pack) {
3145 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
3146 /* set state to PRIMED -> will be flushed */
3147 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3150 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
3151 if (queue->card->options.performance_stats)
3152 queue->card->perf_stats.skbs_sent_pack++;
3153 if (buf->next_element_to_fill >=
3154 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3156 * packed buffer if full -> set state PRIMED
3157 * -> will be flushed
3159 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3166 int qeth_do_send_packet_fast(struct qeth_card *card,
3167 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3168 struct qeth_hdr *hdr, int elements_needed,
3169 struct qeth_eddp_context *ctx, int offset, int hd_len)
3171 struct qeth_qdio_out_buffer *buffer;
3172 int buffers_needed = 0;
3176 /* spin until we get the queue ... */
3177 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3178 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3179 /* ... now we've got the queue */
3180 index = queue->next_buf_to_fill;
3181 buffer = &queue->bufs[queue->next_buf_to_fill];
3183 * check if buffer is empty to make sure that we do not 'overtake'
3184 * ourselves and try to fill a buffer that is already primed
3186 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3189 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3190 QDIO_MAX_BUFFERS_PER_Q;
3192 buffers_needed = qeth_eddp_check_buffers_for_context(queue,
3194 if (buffers_needed < 0)
3196 queue->next_buf_to_fill =
3197 (queue->next_buf_to_fill + buffers_needed) %
3198 QDIO_MAX_BUFFERS_PER_Q;
3200 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3202 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3203 qeth_flush_buffers(queue, index, 1);
3205 flush_cnt = qeth_eddp_fill_buffer(queue, ctx, index);
3206 WARN_ON(buffers_needed != flush_cnt);
3207 qeth_flush_buffers(queue, index, flush_cnt);
3211 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3214 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3216 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3217 struct sk_buff *skb, struct qeth_hdr *hdr,
3218 int elements_needed, struct qeth_eddp_context *ctx)
3220 struct qeth_qdio_out_buffer *buffer;
3222 int flush_count = 0;
3227 /* spin until we get the queue ... */
3228 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3229 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3230 start_index = queue->next_buf_to_fill;
3231 buffer = &queue->bufs[queue->next_buf_to_fill];
3233 * check if buffer is empty to make sure that we do not 'overtake'
3234 * ourselves and try to fill a buffer that is already primed
3236 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3237 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3240 /* check if we need to switch packing state of this queue */
3241 qeth_switch_to_packing_if_needed(queue);
3242 if (queue->do_pack) {
3245 /* does packet fit in current buffer? */
3246 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3247 buffer->next_element_to_fill) < elements_needed) {
3248 /* ... no -> set state PRIMED */
3249 atomic_set(&buffer->state,
3250 QETH_QDIO_BUF_PRIMED);
3252 queue->next_buf_to_fill =
3253 (queue->next_buf_to_fill + 1) %
3254 QDIO_MAX_BUFFERS_PER_Q;
3255 buffer = &queue->bufs[queue->next_buf_to_fill];
3256 /* we did a step forward, so check buffer state
3258 if (atomic_read(&buffer->state) !=
3259 QETH_QDIO_BUF_EMPTY){
3260 qeth_flush_buffers(queue, start_index,
3262 atomic_set(&queue->state,
3263 QETH_OUT_Q_UNLOCKED);
3268 /* check if we have enough elements (including following
3269 * free buffers) to handle eddp context */
3270 if (qeth_eddp_check_buffers_for_context(queue, ctx)
3278 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3280 tmp = qeth_eddp_fill_buffer(queue, ctx,
3281 queue->next_buf_to_fill);
3287 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3288 QDIO_MAX_BUFFERS_PER_Q;
3292 qeth_flush_buffers(queue, start_index, flush_count);
3293 else if (!atomic_read(&queue->set_pci_flags_count))
3294 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3296 * queue->state will go from LOCKED -> UNLOCKED or from
3297 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3298 * (switch packing state or flush buffer to get another pci flag out).
3299 * In that case we will enter this loop
3301 while (atomic_dec_return(&queue->state)) {
3303 start_index = queue->next_buf_to_fill;
3304 /* check if we can go back to non-packing state */
3305 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3307 * check if we need to flush a packing buffer to get a pci
3308 * flag out on the queue
3310 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3311 flush_count += qeth_flush_buffers_on_no_pci(queue);
3313 qeth_flush_buffers(queue, start_index, flush_count);
3315 /* at this point the queue is UNLOCKED again */
3316 if (queue->card->options.performance_stats && do_pack)
3317 queue->card->perf_stats.bufs_sent_pack += flush_count;
3321 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3323 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3324 struct qeth_reply *reply, unsigned long data)
3326 struct qeth_ipa_cmd *cmd;
3327 struct qeth_ipacmd_setadpparms *setparms;
3329 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
3331 cmd = (struct qeth_ipa_cmd *) data;
3332 setparms = &(cmd->data.setadapterparms);
3334 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3335 if (cmd->hdr.return_code) {
3336 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
3337 setparms->data.mode = SET_PROMISC_MODE_OFF;
3339 card->info.promisc_mode = setparms->data.mode;
3343 void qeth_setadp_promisc_mode(struct qeth_card *card)
3345 enum qeth_ipa_promisc_modes mode;
3346 struct net_device *dev = card->dev;
3347 struct qeth_cmd_buffer *iob;
3348 struct qeth_ipa_cmd *cmd;
3350 QETH_DBF_TEXT(TRACE, 4, "setprom");
3352 if (((dev->flags & IFF_PROMISC) &&
3353 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3354 (!(dev->flags & IFF_PROMISC) &&
3355 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3357 mode = SET_PROMISC_MODE_OFF;
3358 if (dev->flags & IFF_PROMISC)
3359 mode = SET_PROMISC_MODE_ON;
3360 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
3362 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3363 sizeof(struct qeth_ipacmd_setadpparms));
3364 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3365 cmd->data.setadapterparms.data.mode = mode;
3366 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3368 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3370 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3372 struct qeth_card *card;
3375 card = dev->ml_priv;
3377 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
3378 sprintf(dbf_text, "%8x", new_mtu);
3379 QETH_DBF_TEXT(TRACE, 4, dbf_text);
3383 if (new_mtu > 65535)
3385 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3386 (!qeth_mtu_is_valid(card, new_mtu)))
3391 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3393 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3395 struct qeth_card *card;
3397 card = dev->ml_priv;
3399 QETH_DBF_TEXT(TRACE, 5, "getstat");
3401 return &card->stats;
3403 EXPORT_SYMBOL_GPL(qeth_get_stats);
3405 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3406 struct qeth_reply *reply, unsigned long data)
3408 struct qeth_ipa_cmd *cmd;
3410 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
3412 cmd = (struct qeth_ipa_cmd *) data;
3413 if (!card->options.layer2 ||
3414 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3415 memcpy(card->dev->dev_addr,
3416 &cmd->data.setadapterparms.data.change_addr.addr,
3418 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3420 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3424 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3427 struct qeth_cmd_buffer *iob;
3428 struct qeth_ipa_cmd *cmd;
3430 QETH_DBF_TEXT(TRACE, 4, "chgmac");
3432 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3433 sizeof(struct qeth_ipacmd_setadpparms));
3434 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3435 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3436 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3437 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3438 card->dev->dev_addr, OSA_ADDR_LEN);
3439 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3443 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3445 void qeth_tx_timeout(struct net_device *dev)
3447 struct qeth_card *card;
3449 card = dev->ml_priv;
3450 card->stats.tx_errors++;
3451 qeth_schedule_recovery(card);
3453 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3455 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3457 struct qeth_card *card = dev->ml_priv;
3461 case MII_BMCR: /* Basic mode control register */
3463 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3464 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3465 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3466 rc |= BMCR_SPEED100;
3468 case MII_BMSR: /* Basic mode status register */
3469 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3470 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3473 case MII_PHYSID1: /* PHYS ID 1 */
3474 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3476 rc = (rc >> 5) & 0xFFFF;
3478 case MII_PHYSID2: /* PHYS ID 2 */
3479 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3481 case MII_ADVERTISE: /* Advertisement control reg */
3484 case MII_LPA: /* Link partner ability reg */
3485 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3486 LPA_100BASE4 | LPA_LPACK;
3488 case MII_EXPANSION: /* Expansion register */
3490 case MII_DCOUNTER: /* disconnect counter */
3492 case MII_FCSCOUNTER: /* false carrier counter */
3494 case MII_NWAYTEST: /* N-way auto-neg test register */
3496 case MII_RERRCOUNTER: /* rx error counter */
3497 rc = card->stats.rx_errors;
3499 case MII_SREVISION: /* silicon revision */
3501 case MII_RESV1: /* reserved 1 */
3503 case MII_LBRERROR: /* loopback, rx, bypass error */
3505 case MII_PHYADDR: /* physical address */
3507 case MII_RESV2: /* reserved 2 */
3509 case MII_TPISTATUS: /* TPI status for 10mbps */
3511 case MII_NCONFIG: /* network interface config */
3518 EXPORT_SYMBOL_GPL(qeth_mdio_read);
3520 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3521 struct qeth_cmd_buffer *iob, int len,
3522 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3528 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
3530 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3531 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3532 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3533 /* adjust PDU length fields in IPA_PDU_HEADER */
3534 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3536 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3537 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3538 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3539 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3540 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3541 reply_cb, reply_param);
3544 static int qeth_snmp_command_cb(struct qeth_card *card,
3545 struct qeth_reply *reply, unsigned long sdata)
3547 struct qeth_ipa_cmd *cmd;
3548 struct qeth_arp_query_info *qinfo;
3549 struct qeth_snmp_cmd *snmp;
3550 unsigned char *data;
3553 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
3555 cmd = (struct qeth_ipa_cmd *) sdata;
3556 data = (unsigned char *)((char *)cmd - reply->offset);
3557 qinfo = (struct qeth_arp_query_info *) reply->param;
3558 snmp = &cmd->data.setadapterparms.data.snmp;
3560 if (cmd->hdr.return_code) {
3561 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
3564 if (cmd->data.setadapterparms.hdr.return_code) {
3565 cmd->hdr.return_code =
3566 cmd->data.setadapterparms.hdr.return_code;
3567 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
3570 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3571 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3572 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3574 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3576 /* check if there is enough room in userspace */
3577 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
3578 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
3579 cmd->hdr.return_code = -ENOMEM;
3582 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
3583 cmd->data.setadapterparms.hdr.used_total);
3584 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
3585 cmd->data.setadapterparms.hdr.seq_no);
3586 /*copy entries to user buffer*/
3587 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3588 memcpy(qinfo->udata + qinfo->udata_offset,
3590 data_len + offsetof(struct qeth_snmp_cmd, data));
3591 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3593 memcpy(qinfo->udata + qinfo->udata_offset,
3594 (char *)&snmp->request, data_len);
3596 qinfo->udata_offset += data_len;
3597 /* check if all replies received ... */
3598 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
3599 cmd->data.setadapterparms.hdr.used_total);
3600 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
3601 cmd->data.setadapterparms.hdr.seq_no);
3602 if (cmd->data.setadapterparms.hdr.seq_no <
3603 cmd->data.setadapterparms.hdr.used_total)
3608 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3610 struct qeth_cmd_buffer *iob;
3611 struct qeth_ipa_cmd *cmd;
3612 struct qeth_snmp_ureq *ureq;
3614 struct qeth_arp_query_info qinfo = {0, };
3617 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
3619 if (card->info.guestlan)
3622 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3623 (!card->options.layer2)) {
3626 /* skip 4 bytes (data_len struct member) to get req_len */
3627 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3629 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3631 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
3634 if (copy_from_user(ureq, udata,
3635 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3639 qinfo.udata_len = ureq->hdr.data_len;
3640 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3645 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3647 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3648 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3649 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3650 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3651 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3652 qeth_snmp_command_cb, (void *)&qinfo);
3654 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
3655 QETH_CARD_IFNAME(card), rc);
3657 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3665 EXPORT_SYMBOL_GPL(qeth_snmp_command);
3667 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3669 switch (card->info.type) {
3670 case QETH_CARD_TYPE_IQD:
3677 static int qeth_qdio_establish(struct qeth_card *card)
3679 struct qdio_initialize init_data;
3680 char *qib_param_field;
3681 struct qdio_buffer **in_sbal_ptrs;
3682 struct qdio_buffer **out_sbal_ptrs;
3686 QETH_DBF_TEXT(SETUP, 2, "qdioest");
3688 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3690 if (!qib_param_field)
3693 qeth_create_qib_param_field(card, qib_param_field);
3694 qeth_create_qib_param_field_blkt(card, qib_param_field);
3696 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3698 if (!in_sbal_ptrs) {
3699 kfree(qib_param_field);
3702 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3703 in_sbal_ptrs[i] = (struct qdio_buffer *)
3704 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3707 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3708 sizeof(void *), GFP_KERNEL);
3709 if (!out_sbal_ptrs) {
3710 kfree(in_sbal_ptrs);
3711 kfree(qib_param_field);
3714 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3715 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3716 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3717 card->qdio.out_qs[i]->bufs[j].buffer);
3720 memset(&init_data, 0, sizeof(struct qdio_initialize));
3721 init_data.cdev = CARD_DDEV(card);
3722 init_data.q_format = qeth_get_qdio_q_format(card);
3723 init_data.qib_param_field_format = 0;
3724 init_data.qib_param_field = qib_param_field;
3725 init_data.no_input_qs = 1;
3726 init_data.no_output_qs = card->qdio.no_out_queues;
3727 init_data.input_handler = card->discipline.input_handler;
3728 init_data.output_handler = card->discipline.output_handler;
3729 init_data.int_parm = (unsigned long) card;
3730 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3731 QDIO_OUTBOUND_0COPY_SBALS |
3732 QDIO_USE_OUTBOUND_PCIS;
3733 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3734 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3736 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3737 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3738 rc = qdio_initialize(&init_data);
3740 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3742 kfree(out_sbal_ptrs);
3743 kfree(in_sbal_ptrs);
3744 kfree(qib_param_field);
3748 static void qeth_core_free_card(struct qeth_card *card)
3751 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3752 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
3753 qeth_clean_channel(&card->read);
3754 qeth_clean_channel(&card->write);
3756 free_netdev(card->dev);
3757 kfree(card->ip_tbd_list);
3758 qeth_free_qdio_buffers(card);
3759 unregister_service_level(&card->qeth_service_level);
3763 static struct ccw_device_id qeth_ids[] = {
3764 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3765 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3766 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3769 MODULE_DEVICE_TABLE(ccw, qeth_ids);
3771 static struct ccw_driver qeth_ccw_driver = {
3774 .probe = ccwgroup_probe_ccwdev,
3775 .remove = ccwgroup_remove_ccwdev,
3778 static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3779 unsigned long driver_id)
3781 return ccwgroup_create_from_string(root_dev, driver_id,
3782 &qeth_ccw_driver, 3, buf);
3785 int qeth_core_hardsetup_card(struct qeth_card *card)
3787 struct qdio_ssqd_desc *ssqd;
3792 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
3793 atomic_set(&card->force_alloc_skb, 0);
3796 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
3797 dev_name(&card->gdev->dev));
3798 ccw_device_set_offline(CARD_DDEV(card));
3799 ccw_device_set_offline(CARD_WDEV(card));
3800 ccw_device_set_offline(CARD_RDEV(card));
3801 ccw_device_set_online(CARD_RDEV(card));
3802 ccw_device_set_online(CARD_WDEV(card));
3803 ccw_device_set_online(CARD_DDEV(card));
3805 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3806 if (rc == -ERESTARTSYS) {
3807 QETH_DBF_TEXT(SETUP, 2, "break1");
3810 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
3817 rc = qeth_get_unitaddr(card);
3819 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
3823 ssqd = kmalloc(sizeof(struct qdio_ssqd_desc), GFP_KERNEL);
3828 rc = qdio_get_ssqd_desc(CARD_DDEV(card), ssqd);
3834 mpno = min(mpno - 1, QETH_MAX_PORTNO);
3835 if (card->info.portno > mpno) {
3836 QETH_DBF_MESSAGE(2, "Device %s does not offer port number %d"
3837 "\n.", CARD_BUS_ID(card), card->info.portno);
3841 qeth_init_tokens(card);
3842 qeth_init_func_level(card);
3843 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3844 if (rc == -ERESTARTSYS) {
3845 QETH_DBF_TEXT(SETUP, 2, "break2");
3848 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
3854 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3855 if (rc == -ERESTARTSYS) {
3856 QETH_DBF_TEXT(SETUP, 2, "break3");
3859 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
3865 rc = qeth_mpc_initialize(card);
3867 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
3872 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
3873 "an error on the device\n");
3874 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
3875 dev_name(&card->gdev->dev), rc);
3878 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3880 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3881 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3883 struct page *page = virt_to_page(element->addr);
3884 if (*pskb == NULL) {
3885 /* the upper protocol layers assume that there is data in the
3886 * skb itself. Copy a small amount (64 bytes) to make them
3888 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3891 skb_reserve(*pskb, ETH_HLEN);
3892 if (data_len <= 64) {
3893 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3897 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3898 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3900 (*pskb)->data_len += data_len - 64;
3901 (*pskb)->len += data_len - 64;
3902 (*pskb)->truesize += data_len - 64;
3907 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3908 (*pskb)->data_len += data_len;
3909 (*pskb)->len += data_len;
3910 (*pskb)->truesize += data_len;
3916 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3917 struct qdio_buffer *buffer,
3918 struct qdio_buffer_element **__element, int *__offset,
3919 struct qeth_hdr **hdr)
3921 struct qdio_buffer_element *element = *__element;
3922 int offset = *__offset;
3923 struct sk_buff *skb = NULL;
3931 /* qeth_hdr must not cross element boundaries */
3932 if (element->length < offset + sizeof(struct qeth_hdr)) {
3933 if (qeth_is_last_sbale(element))
3937 if (element->length < sizeof(struct qeth_hdr))
3940 *hdr = element->addr + offset;
3942 offset += sizeof(struct qeth_hdr);
3943 if (card->options.layer2) {
3944 if (card->info.type == QETH_CARD_TYPE_OSN) {
3945 skb_len = (*hdr)->hdr.osn.pdu_length;
3946 headroom = sizeof(struct qeth_hdr);
3948 skb_len = (*hdr)->hdr.l2.pkt_length;
3951 skb_len = (*hdr)->hdr.l3.length;
3952 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
3953 (card->info.link_type == QETH_LINK_TYPE_HSTR))
3956 headroom = ETH_HLEN;
3962 if ((skb_len >= card->options.rx_sg_cb) &&
3963 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
3964 (!atomic_read(&card->force_alloc_skb))) {
3967 skb = dev_alloc_skb(skb_len + headroom);
3971 skb_reserve(skb, headroom);
3974 data_ptr = element->addr + offset;
3976 data_len = min(skb_len, (int)(element->length - offset));
3979 if (qeth_create_skb_frag(element, &skb, offset,
3983 memcpy(skb_put(skb, data_len), data_ptr,
3987 skb_len -= data_len;
3989 if (qeth_is_last_sbale(element)) {
3990 QETH_DBF_TEXT(TRACE, 4, "unexeob");
3991 QETH_DBF_TEXT_(TRACE, 4, "%s",
3993 QETH_DBF_TEXT(QERR, 2, "unexeob");
3994 QETH_DBF_TEXT_(QERR, 2, "%s",
3996 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
3997 dev_kfree_skb_any(skb);
3998 card->stats.rx_errors++;
4003 data_ptr = element->addr;
4008 *__element = element;
4010 if (use_rx_sg && card->options.performance_stats) {
4011 card->perf_stats.sg_skbs_rx++;
4012 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4016 if (net_ratelimit()) {
4017 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
4018 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4020 card->stats.rx_dropped++;
4023 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4025 static void qeth_unregister_dbf_views(void)
4028 for (x = 0; x < QETH_DBF_INFOS; x++) {
4029 debug_unregister(qeth_dbf[x].id);
4030 qeth_dbf[x].id = NULL;
4034 void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...)
4036 char dbf_txt_buf[32];
4039 if (level > (qeth_dbf[dbf_nix].id)->level)
4041 va_start(args, fmt);
4042 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4044 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf);
4046 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4048 static int qeth_register_dbf_views(void)
4053 for (x = 0; x < QETH_DBF_INFOS; x++) {
4054 /* register the areas */
4055 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4059 if (qeth_dbf[x].id == NULL) {
4060 qeth_unregister_dbf_views();
4064 /* register a view */
4065 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4067 qeth_unregister_dbf_views();
4071 /* set a passing level */
4072 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4078 int qeth_core_load_discipline(struct qeth_card *card,
4079 enum qeth_discipline_id discipline)
4082 switch (discipline) {
4083 case QETH_DISCIPLINE_LAYER3:
4084 card->discipline.ccwgdriver = try_then_request_module(
4085 symbol_get(qeth_l3_ccwgroup_driver),
4088 case QETH_DISCIPLINE_LAYER2:
4089 card->discipline.ccwgdriver = try_then_request_module(
4090 symbol_get(qeth_l2_ccwgroup_driver),
4094 if (!card->discipline.ccwgdriver) {
4095 dev_err(&card->gdev->dev, "There is no kernel module to "
4096 "support discipline %d\n", discipline);
4102 void qeth_core_free_discipline(struct qeth_card *card)
4104 if (card->options.layer2)
4105 symbol_put(qeth_l2_ccwgroup_driver);
4107 symbol_put(qeth_l3_ccwgroup_driver);
4108 card->discipline.ccwgdriver = NULL;
4111 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4113 struct qeth_card *card;
4116 unsigned long flags;
4118 QETH_DBF_TEXT(SETUP, 2, "probedev");
4121 if (!get_device(dev))
4124 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4126 card = qeth_alloc_card();
4128 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4132 card->read.ccwdev = gdev->cdev[0];
4133 card->write.ccwdev = gdev->cdev[1];
4134 card->data.ccwdev = gdev->cdev[2];
4135 dev_set_drvdata(&gdev->dev, card);
4137 gdev->cdev[0]->handler = qeth_irq;
4138 gdev->cdev[1]->handler = qeth_irq;
4139 gdev->cdev[2]->handler = qeth_irq;
4141 rc = qeth_determine_card_type(card);
4143 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4146 rc = qeth_setup_card(card);
4148 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4152 if (card->info.type == QETH_CARD_TYPE_OSN) {
4153 rc = qeth_core_create_osn_attributes(dev);
4156 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4158 qeth_core_remove_osn_attributes(dev);
4161 rc = card->discipline.ccwgdriver->probe(card->gdev);
4163 qeth_core_free_discipline(card);
4164 qeth_core_remove_osn_attributes(dev);
4168 rc = qeth_core_create_device_attributes(dev);
4173 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4174 list_add_tail(&card->list, &qeth_core_card_list.list);
4175 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4179 qeth_core_free_card(card);
4185 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4187 unsigned long flags;
4188 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4190 QETH_DBF_TEXT(SETUP, 2, "removedv");
4191 if (card->discipline.ccwgdriver) {
4192 card->discipline.ccwgdriver->remove(gdev);
4193 qeth_core_free_discipline(card);
4196 if (card->info.type == QETH_CARD_TYPE_OSN) {
4197 qeth_core_remove_osn_attributes(&gdev->dev);
4199 qeth_core_remove_device_attributes(&gdev->dev);
4201 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4202 list_del(&card->list);
4203 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4204 qeth_core_free_card(card);
4205 dev_set_drvdata(&gdev->dev, NULL);
4206 put_device(&gdev->dev);
4210 static int qeth_core_set_online(struct ccwgroup_device *gdev)
4212 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4216 if (!card->discipline.ccwgdriver) {
4217 if (card->info.type == QETH_CARD_TYPE_IQD)
4218 def_discipline = QETH_DISCIPLINE_LAYER3;
4220 def_discipline = QETH_DISCIPLINE_LAYER2;
4221 rc = qeth_core_load_discipline(card, def_discipline);
4224 rc = card->discipline.ccwgdriver->probe(card->gdev);
4228 rc = card->discipline.ccwgdriver->set_online(gdev);
4233 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4235 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4236 return card->discipline.ccwgdriver->set_offline(gdev);
4239 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4241 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4242 if (card->discipline.ccwgdriver &&
4243 card->discipline.ccwgdriver->shutdown)
4244 card->discipline.ccwgdriver->shutdown(gdev);
4247 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4248 .owner = THIS_MODULE,
4250 .driver_id = 0xD8C5E3C8,
4251 .probe = qeth_core_probe_device,
4252 .remove = qeth_core_remove_device,
4253 .set_online = qeth_core_set_online,
4254 .set_offline = qeth_core_set_offline,
4255 .shutdown = qeth_core_shutdown,
4259 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4263 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4264 qeth_core_ccwgroup_driver.driver_id);
4271 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4274 const char str[ETH_GSTRING_LEN];
4275 } qeth_ethtool_stats_keys[] = {
4280 {"tx skbs no packing"},
4281 {"tx buffers no packing"},
4282 {"tx skbs packing"},
4283 {"tx buffers packing"},
4286 /* 10 */{"rx sg skbs"},
4288 {"rx sg page allocs"},
4289 {"tx large kbytes"},
4291 {"tx pk state ch n->p"},
4292 {"tx pk state ch p->n"},
4293 {"tx pk watermark low"},
4294 {"tx pk watermark high"},
4295 {"queue 0 buffer usage"},
4296 /* 20 */{"queue 1 buffer usage"},
4297 {"queue 2 buffer usage"},
4298 {"queue 3 buffer usage"},
4299 {"rx handler time"},
4300 {"rx handler count"},
4301 {"rx do_QDIO time"},
4302 {"rx do_QDIO count"},
4303 {"tx handler time"},
4304 {"tx handler count"},
4306 /* 30 */{"tx count"},
4307 {"tx do_QDIO time"},
4308 {"tx do_QDIO count"},
4311 int qeth_core_get_stats_count(struct net_device *dev)
4313 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4315 EXPORT_SYMBOL_GPL(qeth_core_get_stats_count);
4317 void qeth_core_get_ethtool_stats(struct net_device *dev,
4318 struct ethtool_stats *stats, u64 *data)
4320 struct qeth_card *card = dev->ml_priv;
4321 data[0] = card->stats.rx_packets -
4322 card->perf_stats.initial_rx_packets;
4323 data[1] = card->perf_stats.bufs_rec;
4324 data[2] = card->stats.tx_packets -
4325 card->perf_stats.initial_tx_packets;
4326 data[3] = card->perf_stats.bufs_sent;
4327 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4328 - card->perf_stats.skbs_sent_pack;
4329 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4330 data[6] = card->perf_stats.skbs_sent_pack;
4331 data[7] = card->perf_stats.bufs_sent_pack;
4332 data[8] = card->perf_stats.sg_skbs_sent;
4333 data[9] = card->perf_stats.sg_frags_sent;
4334 data[10] = card->perf_stats.sg_skbs_rx;
4335 data[11] = card->perf_stats.sg_frags_rx;
4336 data[12] = card->perf_stats.sg_alloc_page_rx;
4337 data[13] = (card->perf_stats.large_send_bytes >> 10);
4338 data[14] = card->perf_stats.large_send_cnt;
4339 data[15] = card->perf_stats.sc_dp_p;
4340 data[16] = card->perf_stats.sc_p_dp;
4341 data[17] = QETH_LOW_WATERMARK_PACK;
4342 data[18] = QETH_HIGH_WATERMARK_PACK;
4343 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4344 data[20] = (card->qdio.no_out_queues > 1) ?
4345 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4346 data[21] = (card->qdio.no_out_queues > 2) ?
4347 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4348 data[22] = (card->qdio.no_out_queues > 3) ?
4349 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4350 data[23] = card->perf_stats.inbound_time;
4351 data[24] = card->perf_stats.inbound_cnt;
4352 data[25] = card->perf_stats.inbound_do_qdio_time;
4353 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4354 data[27] = card->perf_stats.outbound_handler_time;
4355 data[28] = card->perf_stats.outbound_handler_cnt;
4356 data[29] = card->perf_stats.outbound_time;
4357 data[30] = card->perf_stats.outbound_cnt;
4358 data[31] = card->perf_stats.outbound_do_qdio_time;
4359 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4361 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4363 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4365 switch (stringset) {
4367 memcpy(data, &qeth_ethtool_stats_keys,
4368 sizeof(qeth_ethtool_stats_keys));
4375 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4377 void qeth_core_get_drvinfo(struct net_device *dev,
4378 struct ethtool_drvinfo *info)
4380 struct qeth_card *card = dev->ml_priv;
4381 if (card->options.layer2)
4382 strcpy(info->driver, "qeth_l2");
4384 strcpy(info->driver, "qeth_l3");
4386 strcpy(info->version, "1.0");
4387 strcpy(info->fw_version, card->info.mcl_level);
4388 sprintf(info->bus_info, "%s/%s/%s",
4391 CARD_DDEV_ID(card));
4393 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4395 int qeth_core_ethtool_get_settings(struct net_device *netdev,
4396 struct ethtool_cmd *ecmd)
4398 struct qeth_card *card = netdev->ml_priv;
4399 enum qeth_link_types link_type;
4401 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4402 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4404 link_type = card->info.link_type;
4406 ecmd->transceiver = XCVR_INTERNAL;
4407 ecmd->supported = SUPPORTED_Autoneg;
4408 ecmd->advertising = ADVERTISED_Autoneg;
4409 ecmd->duplex = DUPLEX_FULL;
4410 ecmd->autoneg = AUTONEG_ENABLE;
4412 switch (link_type) {
4413 case QETH_LINK_TYPE_FAST_ETH:
4414 case QETH_LINK_TYPE_LANE_ETH100:
4415 ecmd->supported |= SUPPORTED_10baseT_Half |
4416 SUPPORTED_10baseT_Full |
4417 SUPPORTED_100baseT_Half |
4418 SUPPORTED_100baseT_Full |
4420 ecmd->advertising |= ADVERTISED_10baseT_Half |
4421 ADVERTISED_10baseT_Full |
4422 ADVERTISED_100baseT_Half |
4423 ADVERTISED_100baseT_Full |
4425 ecmd->speed = SPEED_100;
4426 ecmd->port = PORT_TP;
4429 case QETH_LINK_TYPE_GBIT_ETH:
4430 case QETH_LINK_TYPE_LANE_ETH1000:
4431 ecmd->supported |= SUPPORTED_10baseT_Half |
4432 SUPPORTED_10baseT_Full |
4433 SUPPORTED_100baseT_Half |
4434 SUPPORTED_100baseT_Full |
4435 SUPPORTED_1000baseT_Half |
4436 SUPPORTED_1000baseT_Full |
4438 ecmd->advertising |= ADVERTISED_10baseT_Half |
4439 ADVERTISED_10baseT_Full |
4440 ADVERTISED_100baseT_Half |
4441 ADVERTISED_100baseT_Full |
4442 ADVERTISED_1000baseT_Half |
4443 ADVERTISED_1000baseT_Full |
4445 ecmd->speed = SPEED_1000;
4446 ecmd->port = PORT_FIBRE;
4449 case QETH_LINK_TYPE_10GBIT_ETH:
4450 ecmd->supported |= SUPPORTED_10baseT_Half |
4451 SUPPORTED_10baseT_Full |
4452 SUPPORTED_100baseT_Half |
4453 SUPPORTED_100baseT_Full |
4454 SUPPORTED_1000baseT_Half |
4455 SUPPORTED_1000baseT_Full |
4456 SUPPORTED_10000baseT_Full |
4458 ecmd->advertising |= ADVERTISED_10baseT_Half |
4459 ADVERTISED_10baseT_Full |
4460 ADVERTISED_100baseT_Half |
4461 ADVERTISED_100baseT_Full |
4462 ADVERTISED_1000baseT_Half |
4463 ADVERTISED_1000baseT_Full |
4464 ADVERTISED_10000baseT_Full |
4466 ecmd->speed = SPEED_10000;
4467 ecmd->port = PORT_FIBRE;
4471 ecmd->supported |= SUPPORTED_10baseT_Half |
4472 SUPPORTED_10baseT_Full |
4474 ecmd->advertising |= ADVERTISED_10baseT_Half |
4475 ADVERTISED_10baseT_Full |
4477 ecmd->speed = SPEED_10;
4478 ecmd->port = PORT_TP;
4483 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4485 static int __init qeth_core_init(void)
4489 pr_info("loading core functions\n");
4490 INIT_LIST_HEAD(&qeth_core_card_list.list);
4491 rwlock_init(&qeth_core_card_list.rwlock);
4493 rc = qeth_register_dbf_views();
4496 rc = ccw_driver_register(&qeth_ccw_driver);
4499 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4502 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4503 &driver_attr_group);
4506 qeth_core_root_dev = root_device_register("qeth");
4507 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4511 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4512 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4513 if (!qeth_core_header_cache) {
4520 root_device_unregister(qeth_core_root_dev);
4522 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4523 &driver_attr_group);
4525 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4527 ccw_driver_unregister(&qeth_ccw_driver);
4529 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4530 qeth_unregister_dbf_views();
4532 pr_err("Initializing the qeth device driver failed\n");
4536 static void __exit qeth_core_exit(void)
4538 root_device_unregister(qeth_core_root_dev);
4539 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4540 &driver_attr_group);
4541 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4542 ccw_driver_unregister(&qeth_ccw_driver);
4543 kmem_cache_destroy(qeth_core_header_cache);
4544 qeth_unregister_dbf_views();
4545 pr_info("core functions removed\n");
4548 module_init(qeth_core_init);
4549 module_exit(qeth_core_exit);
4551 MODULE_DESCRIPTION("qeth core functions");
4552 MODULE_LICENSE("GPL");