drivers/media/platform/coda.c

   1 /*
   2  * Coda multi-standard codec IP
   3  *
   4  * Copyright (C) 2012 Vista Silicon S.L.
   5  *    Javier Martin, <[email protected]>
   6  *    Xavier Duret
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <linux/clk.h>
  15 #include <linux/delay.h>
  16 #include <linux/firmware.h>
  17 #include <linux/genalloc.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/io.h>
  20 #include <linux/irq.h>
  21 #include <linux/module.h>
  22 #include <linux/of_device.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/slab.h>
  25 #include <linux/videodev2.h>
  26 #include <linux/of.h>
  27 #include <linux/platform_data/coda.h>
  28
  29 #include <media/v4l2-ctrls.h>
  30 #include <media/v4l2-device.h>
  31 #include <media/v4l2-ioctl.h>
  32 #include <media/v4l2-mem2mem.h>
  33 #include <media/videobuf2-core.h>
  34 #include <media/videobuf2-dma-contig.h>
  35
  36 #include "coda.h"
  37
  38 #define CODA_NAME               "coda"
  39
  40 #define CODA_MAX_INSTANCES      4
  41
  42 #define CODA_FMO_BUF_SIZE       32
  43 #define CODADX6_WORK_BUF_SIZE   (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  44 #define CODA7_WORK_BUF_SIZE     (512 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  45 #define CODA_PARA_BUF_SIZE      (10 * 1024)
  46 #define CODA_ISRAM_SIZE (2048 * 2)
  47 #define CODADX6_IRAM_SIZE       0xb000
  48 #define CODA7_IRAM_SIZE         0x14000 /* 81920 bytes */
  49
  50 #define CODA_MAX_FRAMEBUFFERS   2
  51
  52 #define MAX_W           8192
  53 #define MAX_H           8192
  54 #define CODA_MAX_FRAME_SIZE     0x100000
  55 #define FMO_SLICE_SAVE_BUF_SIZE         (32)
  56 #define CODA_DEFAULT_GAMMA              4096
  57
  58 #define MIN_W 176
  59 #define MIN_H 144
  60
  61 #define S_ALIGN         1 /* multiple of 2 */
  62 #define W_ALIGN         1 /* multiple of 2 */
  63 #define H_ALIGN         1 /* multiple of 2 */
  64
  65 #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
  66
  67 static int coda_debug;
  68 module_param(coda_debug, int, 0644);
  69 MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
  70
  71 enum {
  72         V4L2_M2M_SRC = 0,
  73         V4L2_M2M_DST = 1,
  74 };
  75
  76 enum coda_inst_type {
  77         CODA_INST_ENCODER,
  78         CODA_INST_DECODER,
  79 };
  80
  81 enum coda_product {
  82         CODA_DX6 = 0xf001,
  83         CODA_7541 = 0xf012,
  84 };
  85
  86 struct coda_fmt {
  87         char *name;
  88         u32 fourcc;
  89 };
  90
  91 struct coda_codec {
  92         u32 mode;
  93         u32 src_fourcc;
  94         u32 dst_fourcc;
  95         u32 max_w;
  96         u32 max_h;
  97 };
  98
  99 struct coda_devtype {
 100         char                    *firmware;
 101         enum coda_product       product;
 102         struct coda_codec       *codecs;
 103         unsigned int            num_codecs;
 104         size_t                  workbuf_size;
 105 };
 106
 107 /* Per-queue, driver-specific private data */
 108 struct coda_q_data {
 109         unsigned int            width;
 110         unsigned int            height;
 111         unsigned int            sizeimage;
 112         unsigned int            fourcc;
 113 };
 114
 115 struct coda_aux_buf {
 116         void                    *vaddr;
 117         dma_addr_t              paddr;
 118         u32                     size;
 119 };
 120
 121 struct coda_dev {
 122         struct v4l2_device      v4l2_dev;
 123         struct video_device     vfd;
 124         struct platform_device  *plat_dev;
 125         const struct coda_devtype *devtype;
 126
 127         void __iomem            *regs_base;
 128         struct clk              *clk_per;
 129         struct clk              *clk_ahb;
 130
 131         struct coda_aux_buf     codebuf;
 132         struct coda_aux_buf     workbuf;
 133         struct gen_pool         *iram_pool;
 134         long unsigned int       iram_vaddr;
 135         long unsigned int       iram_paddr;
 136         unsigned long           iram_size;
 137
 138         spinlock_t              irqlock;
 139         struct mutex            dev_mutex;
 140         struct mutex            coda_mutex;
 141         struct v4l2_m2m_dev     *m2m_dev;
 142         struct vb2_alloc_ctx    *alloc_ctx;
 143         struct list_head        instances;
 144         unsigned long           instance_mask;
 145         struct delayed_work     timeout;
 146 };
 147
 148 struct coda_params {
 149         u8                      rot_mode;
 150         u8                      h264_intra_qp;
 151         u8                      h264_inter_qp;
 152         u8                      mpeg4_intra_qp;
 153         u8                      mpeg4_inter_qp;
 154         u8                      gop_size;
 155         int                     codec_mode;
 156         enum v4l2_mpeg_video_multi_slice_mode slice_mode;
 157         u32                     framerate;
 158         u16                     bitrate;
 159         u32                     slice_max_bits;
 160         u32                     slice_max_mb;
 161 };
 162
 163 struct coda_ctx {
 164         struct coda_dev                 *dev;
 165         struct list_head                list;
 166         int                             aborting;
 167         int                             streamon_out;
 168         int                             streamon_cap;
 169         u32                             isequence;
 170         struct coda_q_data              q_data[2];
 171         enum coda_inst_type             inst_type;
 172         struct coda_codec               *codec;
 173         enum v4l2_colorspace            colorspace;
 174         struct coda_params              params;
 175         struct v4l2_m2m_ctx             *m2m_ctx;
 176         struct v4l2_ctrl_handler        ctrls;
 177         struct v4l2_fh                  fh;
 178         int                             gopcounter;
 179         char                            vpu_header[3][64];
 180         int                             vpu_header_size[3];
 181         struct coda_aux_buf             parabuf;
 182         struct coda_aux_buf             internal_frames[CODA_MAX_FRAMEBUFFERS];
 183         int                             num_internal_frames;
 184         int                             idx;
 185 };
 186
 187 static const u8 coda_filler_nal[14] = { 0x00, 0x00, 0x00, 0x01, 0x0c, 0xff,
 188                         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x80 };
 189 static const u8 coda_filler_size[8] = { 0, 7, 14, 13, 12, 11, 10, 9 };
 190
 191 static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
 192 {
 193         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
 194                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
 195         writel(data, dev->regs_base + reg);
 196 }
 197
 198 static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
 199 {
 200         u32 data;
 201         data = readl(dev->regs_base + reg);
 202         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
 203                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
 204         return data;
 205 }
 206
 207 static inline unsigned long coda_isbusy(struct coda_dev *dev)
 208 {
 209         return coda_read(dev, CODA_REG_BIT_BUSY);
 210 }
 211
 212 static inline int coda_is_initialized(struct coda_dev *dev)
 213 {
 214         return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
 215 }
 216
 217 static int coda_wait_timeout(struct coda_dev *dev)
 218 {
 219         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
 220
 221         while (coda_isbusy(dev)) {
 222                 if (time_after(jiffies, timeout))
 223                         return -ETIMEDOUT;
 224         }
 225         return 0;
 226 }
 227
 228 static void coda_command_async(struct coda_ctx *ctx, int cmd)
 229 {
 230         struct coda_dev *dev = ctx->dev;
 231         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 232
 233         coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
 234         coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
 235         coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
 236 }
 237
 238 static int coda_command_sync(struct coda_ctx *ctx, int cmd)
 239 {
 240         struct coda_dev *dev = ctx->dev;
 241
 242         coda_command_async(ctx, cmd);
 243         return coda_wait_timeout(dev);
 244 }
 245
 246 static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
 247                                          enum v4l2_buf_type type)
 248 {
 249         switch (type) {
 250         case V4L2_BUF_TYPE_VIDEO_OUTPUT:
 251                 return &(ctx->q_data[V4L2_M2M_SRC]);
 252         case V4L2_BUF_TYPE_VIDEO_CAPTURE:
 253                 return &(ctx->q_data[V4L2_M2M_DST]);
 254         default:
 255                 BUG();
 256         }
 257         return NULL;
 258 }
 259
 260 /*
 261  * Array of all formats supported by any version of Coda:
 262  */
 263 static struct coda_fmt coda_formats[] = {
 264         {
 265                 .name = "YUV 4:2:0 Planar, YCbCr",
 266                 .fourcc = V4L2_PIX_FMT_YUV420,
 267         },
 268         {
 269                 .name = "YUV 4:2:0 Planar, YCrCb",
 270                 .fourcc = V4L2_PIX_FMT_YVU420,
 271         },
 272         {
 273                 .name = "H264 Encoded Stream",
 274                 .fourcc = V4L2_PIX_FMT_H264,
 275         },
 276         {
 277                 .name = "MPEG4 Encoded Stream",
 278                 .fourcc = V4L2_PIX_FMT_MPEG4,
 279         },
 280 };
 281
 282 #define CODA_CODEC(mode, src_fourcc, dst_fourcc, max_w, max_h) \
 283         { mode, src_fourcc, dst_fourcc, max_w, max_h }
 284
 285 /*
 286  * Arrays of codecs supported by each given version of Coda:
 287  *  i.MX27 -> codadx6
 288  *  i.MX5x -> coda7
 289  *  i.MX6  -> coda960
 290  * Use V4L2_PIX_FMT_YUV420 as placeholder for all supported YUV 4:2:0 variants
 291  */
 292 static struct coda_codec codadx6_codecs[] = {
 293         CODA_CODEC(CODADX6_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264,  720, 576),
 294         CODA_CODEC(CODADX6_MODE_ENCODE_MP4,  V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4, 720, 576),
 295 };
 296
 297 static struct coda_codec coda7_codecs[] = {
 298         CODA_CODEC(CODA7_MODE_ENCODE_H264, V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_H264,   1280, 720),
 299         CODA_CODEC(CODA7_MODE_ENCODE_MP4,  V4L2_PIX_FMT_YUV420, V4L2_PIX_FMT_MPEG4,  1280, 720),
 300 };
 301
 302 static bool coda_format_is_yuv(u32 fourcc)
 303 {
 304         switch (fourcc) {
 305         case V4L2_PIX_FMT_YUV420:
 306         case V4L2_PIX_FMT_YVU420:
 307                 return true;
 308         default:
 309                 return false;
 310         }
 311 }
 312
 313 /*
 314  * Normalize all supported YUV 4:2:0 formats to the value used in the codec
 315  * tables.
 316  */
 317 static u32 coda_format_normalize_yuv(u32 fourcc)
 318 {
 319         return coda_format_is_yuv(fourcc) ? V4L2_PIX_FMT_YUV420 : fourcc;
 320 }
 321
 322 static struct coda_codec *coda_find_codec(struct coda_dev *dev, int src_fourcc,
 323                                           int dst_fourcc)
 324 {
 325         struct coda_codec *codecs = dev->devtype->codecs;
 326         int num_codecs = dev->devtype->num_codecs;
 327         int k;
 328
 329         src_fourcc = coda_format_normalize_yuv(src_fourcc);
 330         dst_fourcc = coda_format_normalize_yuv(dst_fourcc);
 331         if (src_fourcc == dst_fourcc)
 332                 return NULL;
 333
 334         for (k = 0; k < num_codecs; k++) {
 335                 if (codecs[k].src_fourcc == src_fourcc &&
 336                     codecs[k].dst_fourcc == dst_fourcc)
 337                         break;
 338         }
 339
 340         if (k == num_codecs)
 341                 return NULL;
 342
 343         return &codecs[k];
 344 }
 345
 346 /*
 347  * V4L2 ioctl() operations.
 348  */
 349 static int vidioc_querycap(struct file *file, void *priv,
 350                            struct v4l2_capability *cap)
 351 {
 352         strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
 353         strlcpy(cap->card, CODA_NAME, sizeof(cap->card));
 354         strlcpy(cap->bus_info, "platform:" CODA_NAME, sizeof(cap->bus_info));
 355         /*
 356          * This is only a mem-to-mem video device. The capture and output
 357          * device capability flags are left only for backward compatibility
 358          * and are scheduled for removal.
 359          */
 360         cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
 361                            V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
 362         cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
 363
 364         return 0;
 365 }
 366
 367 static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
 368                         enum v4l2_buf_type type)
 369 {
 370         struct coda_ctx *ctx = fh_to_ctx(priv);
 371         struct coda_codec *codecs = ctx->dev->devtype->codecs;
 372         struct coda_fmt *formats = coda_formats;
 373         struct coda_fmt *fmt;
 374         int num_codecs = ctx->dev->devtype->num_codecs;
 375         int num_formats = ARRAY_SIZE(coda_formats);
 376         int i, k, num = 0;
 377
 378         for (i = 0; i < num_formats; i++) {
 379                 /* Both uncompressed formats are always supported */
 380                 if (coda_format_is_yuv(formats[i].fourcc)) {
 381                         if (num == f->index)
 382                                 break;
 383                         ++num;
 384                         continue;
 385                 }
 386                 /* Compressed formats may be supported, check the codec list */
 387                 for (k = 0; k < num_codecs; k++) {
 388                         if (type == V4L2_BUF_TYPE_VIDEO_CAPTURE &&
 389                             formats[i].fourcc == codecs[k].dst_fourcc)
 390                                 break;
 391                         if (type == V4L2_BUF_TYPE_VIDEO_OUTPUT &&
 392                             formats[i].fourcc == codecs[k].src_fourcc)
 393                                 break;
 394                 }
 395                 if (k < num_codecs) {
 396                         if (num == f->index)
 397                                 break;
 398                         ++num;
 399                 }
 400         }
 401
 402         if (i < num_formats) {
 403                 fmt = &formats[i];
 404                 strlcpy(f->description, fmt->name, sizeof(f->description));
 405                 f->pixelformat = fmt->fourcc;
 406                 return 0;
 407         }
 408
 409         /* Format not found */
 410         return -EINVAL;
 411 }
 412
 413 static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
 414                                    struct v4l2_fmtdesc *f)
 415 {
 416         return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 417 }
 418
 419 static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
 420                                    struct v4l2_fmtdesc *f)
 421 {
 422         return enum_fmt(priv, f, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 423 }
 424
 425 static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
 426 {
 427         struct vb2_queue *vq;
 428         struct coda_q_data *q_data;
 429         struct coda_ctx *ctx = fh_to_ctx(priv);
 430
 431         vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
 432         if (!vq)
 433                 return -EINVAL;
 434
 435         q_data = get_q_data(ctx, f->type);
 436
 437         f->fmt.pix.field        = V4L2_FIELD_NONE;
 438         f->fmt.pix.pixelformat  = q_data->fourcc;
 439         f->fmt.pix.width        = q_data->width;
 440         f->fmt.pix.height       = q_data->height;
 441         if (coda_format_is_yuv(f->fmt.pix.pixelformat))
 442                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
 443         else /* encoded formats h.264/mpeg4 */
 444                 f->fmt.pix.bytesperline = 0;
 445
 446         f->fmt.pix.sizeimage    = q_data->sizeimage;
 447         f->fmt.pix.colorspace   = ctx->colorspace;
 448
 449         return 0;
 450 }
 451
 452 static int vidioc_try_fmt(struct coda_codec *codec, struct v4l2_format *f)
 453 {
 454         unsigned int max_w, max_h;
 455         enum v4l2_field field;
 456
 457         field = f->fmt.pix.field;
 458         if (field == V4L2_FIELD_ANY)
 459                 field = V4L2_FIELD_NONE;
 460         else if (V4L2_FIELD_NONE != field)
 461                 return -EINVAL;
 462
 463         /* V4L2 specification suggests the driver corrects the format struct
 464          * if any of the dimensions is unsupported */
 465         f->fmt.pix.field = field;
 466
 467         if (codec) {
 468                 max_w = codec->max_w;
 469                 max_h = codec->max_h;
 470         } else {
 471                 max_w = MAX_W;
 472                 max_h = MAX_H;
 473         }
 474         v4l_bound_align_image(&f->fmt.pix.width, MIN_W, max_w,
 475                               W_ALIGN, &f->fmt.pix.height,
 476                               MIN_H, max_h, H_ALIGN, S_ALIGN);
 477
 478         if (coda_format_is_yuv(f->fmt.pix.pixelformat)) {
 479                 /* Frame stride must be multiple of 8 */
 480                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 8);
 481                 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
 482                                         f->fmt.pix.height * 3 / 2;
 483         } else { /*encoded formats h.264/mpeg4 */
 484                 f->fmt.pix.bytesperline = 0;
 485                 f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
 486         }
 487
 488         return 0;
 489 }
 490
 491 static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
 492                                   struct v4l2_format *f)
 493 {
 494         struct coda_ctx *ctx = fh_to_ctx(priv);
 495         struct coda_codec *codec = NULL;
 496
 497         /* Determine codec by the encoded format */
 498         codec = coda_find_codec(ctx->dev, V4L2_PIX_FMT_YUV420,
 499                                 f->fmt.pix.pixelformat);
 500
 501         f->fmt.pix.colorspace = ctx->colorspace;
 502
 503         return vidioc_try_fmt(codec, f);
 504 }
 505
 506 static int vidioc_try_fmt_vid_out(struct file *file, void *priv,
 507                                   struct v4l2_format *f)
 508 {
 509         struct coda_ctx *ctx = fh_to_ctx(priv);
 510         struct coda_codec *codec;
 511
 512         /* Determine codec by encoded format, returns NULL if raw or invalid */
 513         codec = coda_find_codec(ctx->dev, f->fmt.pix.pixelformat,
 514                                 V4L2_PIX_FMT_YUV420);
 515
 516         if (!f->fmt.pix.colorspace)
 517                 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
 518
 519         return vidioc_try_fmt(codec, f);
 520 }
 521
 522 static int vidioc_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
 523 {
 524         struct coda_q_data *q_data;
 525         struct vb2_queue *vq;
 526
 527         vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
 528         if (!vq)
 529                 return -EINVAL;
 530
 531         q_data = get_q_data(ctx, f->type);
 532         if (!q_data)
 533                 return -EINVAL;
 534
 535         if (vb2_is_busy(vq)) {
 536                 v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
 537                 return -EBUSY;
 538         }
 539
 540         q_data->fourcc = f->fmt.pix.pixelformat;
 541         q_data->width = f->fmt.pix.width;
 542         q_data->height = f->fmt.pix.height;
 543         q_data->sizeimage = f->fmt.pix.sizeimage;
 544
 545         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 546                 "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
 547                 f->type, q_data->width, q_data->height, q_data->fourcc);
 548
 549         return 0;
 550 }
 551
 552 static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
 553                                 struct v4l2_format *f)
 554 {
 555         struct coda_ctx *ctx = fh_to_ctx(priv);
 556         int ret;
 557
 558         ret = vidioc_try_fmt_vid_cap(file, priv, f);
 559         if (ret)
 560                 return ret;
 561
 562         return vidioc_s_fmt(ctx, f);
 563 }
 564
 565 static int vidioc_s_fmt_vid_out(struct file *file, void *priv,
 566                                 struct v4l2_format *f)
 567 {
 568         struct coda_ctx *ctx = fh_to_ctx(priv);
 569         int ret;
 570
 571         ret = vidioc_try_fmt_vid_out(file, priv, f);
 572         if (ret)
 573                 return ret;
 574
 575         ret = vidioc_s_fmt(ctx, f);
 576         if (ret)
 577                 ctx->colorspace = f->fmt.pix.colorspace;
 578
 579         return ret;
 580 }
 581
 582 static int vidioc_reqbufs(struct file *file, void *priv,
 583                           struct v4l2_requestbuffers *reqbufs)
 584 {
 585         struct coda_ctx *ctx = fh_to_ctx(priv);
 586
 587         return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
 588 }
 589
 590 static int vidioc_querybuf(struct file *file, void *priv,
 591                            struct v4l2_buffer *buf)
 592 {
 593         struct coda_ctx *ctx = fh_to_ctx(priv);
 594
 595         return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
 596 }
 597
 598 static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
 599 {
 600         struct coda_ctx *ctx = fh_to_ctx(priv);
 601
 602         return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
 603 }
 604
 605 static int vidioc_expbuf(struct file *file, void *priv,
 606                          struct v4l2_exportbuffer *eb)
 607 {
 608         struct coda_ctx *ctx = fh_to_ctx(priv);
 609
 610         return v4l2_m2m_expbuf(file, ctx->m2m_ctx, eb);
 611 }
 612
 613 static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
 614 {
 615         struct coda_ctx *ctx = fh_to_ctx(priv);
 616
 617         return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
 618 }
 619
 620 static int vidioc_create_bufs(struct file *file, void *priv,
 621                               struct v4l2_create_buffers *create)
 622 {
 623         struct coda_ctx *ctx = fh_to_ctx(priv);
 624
 625         return v4l2_m2m_create_bufs(file, ctx->m2m_ctx, create);
 626 }
 627
 628 static int vidioc_streamon(struct file *file, void *priv,
 629                            enum v4l2_buf_type type)
 630 {
 631         struct coda_ctx *ctx = fh_to_ctx(priv);
 632
 633         return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
 634 }
 635
 636 static int vidioc_streamoff(struct file *file, void *priv,
 637                             enum v4l2_buf_type type)
 638 {
 639         struct coda_ctx *ctx = fh_to_ctx(priv);
 640
 641         return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
 642 }
 643
 644 static const struct v4l2_ioctl_ops coda_ioctl_ops = {
 645         .vidioc_querycap        = vidioc_querycap,
 646
 647         .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
 648         .vidioc_g_fmt_vid_cap   = vidioc_g_fmt,
 649         .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
 650         .vidioc_s_fmt_vid_cap   = vidioc_s_fmt_vid_cap,
 651
 652         .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
 653         .vidioc_g_fmt_vid_out   = vidioc_g_fmt,
 654         .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
 655         .vidioc_s_fmt_vid_out   = vidioc_s_fmt_vid_out,
 656
 657         .vidioc_reqbufs         = vidioc_reqbufs,
 658         .vidioc_querybuf        = vidioc_querybuf,
 659
 660         .vidioc_qbuf            = vidioc_qbuf,
 661         .vidioc_expbuf          = vidioc_expbuf,
 662         .vidioc_dqbuf           = vidioc_dqbuf,
 663         .vidioc_create_bufs     = vidioc_create_bufs,
 664
 665         .vidioc_streamon        = vidioc_streamon,
 666         .vidioc_streamoff       = vidioc_streamoff,
 667 };
 668
 669 /*
 670  * Mem-to-mem operations.
 671  */
 672 static void coda_device_run(void *m2m_priv)
 673 {
 674         struct coda_ctx *ctx = m2m_priv;
 675         struct coda_q_data *q_data_src, *q_data_dst;
 676         struct vb2_buffer *src_buf, *dst_buf;
 677         struct coda_dev *dev = ctx->dev;
 678         int force_ipicture;
 679         int quant_param = 0;
 680         u32 picture_y, picture_cb, picture_cr;
 681         u32 pic_stream_buffer_addr, pic_stream_buffer_size;
 682         u32 dst_fourcc;
 683
 684         mutex_lock(&dev->coda_mutex);
 685
 686         src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
 687         dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
 688         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 689         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 690         dst_fourcc = q_data_dst->fourcc;
 691
 692         src_buf->v4l2_buf.sequence = ctx->isequence;
 693         dst_buf->v4l2_buf.sequence = ctx->isequence;
 694         ctx->isequence++;
 695
 696         /*
 697          * Workaround coda firmware BUG that only marks the first
 698          * frame as IDR. This is a problem for some decoders that can't
 699          * recover when a frame is lost.
 700          */
 701         if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
 702                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
 703                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
 704         } else {
 705                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
 706                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
 707         }
 708
 709         /*
 710          * Copy headers at the beginning of the first frame for H.264 only.
 711          * In MPEG4 they are already copied by the coda.
 712          */
 713         if (src_buf->v4l2_buf.sequence == 0) {
 714                 pic_stream_buffer_addr =
 715                         vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
 716                         ctx->vpu_header_size[0] +
 717                         ctx->vpu_header_size[1] +
 718                         ctx->vpu_header_size[2];
 719                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
 720                         ctx->vpu_header_size[0] -
 721                         ctx->vpu_header_size[1] -
 722                         ctx->vpu_header_size[2];
 723                 memcpy(vb2_plane_vaddr(dst_buf, 0),
 724                        &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
 725                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
 726                        &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
 727                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
 728                         ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
 729                         ctx->vpu_header_size[2]);
 730         } else {
 731                 pic_stream_buffer_addr =
 732                         vb2_dma_contig_plane_dma_addr(dst_buf, 0);
 733                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
 734         }
 735
 736         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
 737                 force_ipicture = 1;
 738                 switch (dst_fourcc) {
 739                 case V4L2_PIX_FMT_H264:
 740                         quant_param = ctx->params.h264_intra_qp;
 741                         break;
 742                 case V4L2_PIX_FMT_MPEG4:
 743                         quant_param = ctx->params.mpeg4_intra_qp;
 744                         break;
 745                 default:
 746                         v4l2_warn(&ctx->dev->v4l2_dev,
 747                                 "cannot set intra qp, fmt not supported\n");
 748                         break;
 749                 }
 750         } else {
 751                 force_ipicture = 0;
 752                 switch (dst_fourcc) {
 753                 case V4L2_PIX_FMT_H264:
 754                         quant_param = ctx->params.h264_inter_qp;
 755                         break;
 756                 case V4L2_PIX_FMT_MPEG4:
 757                         quant_param = ctx->params.mpeg4_inter_qp;
 758                         break;
 759                 default:
 760                         v4l2_warn(&ctx->dev->v4l2_dev,
 761                                 "cannot set inter qp, fmt not supported\n");
 762                         break;
 763                 }
 764         }
 765
 766         /* submit */
 767         coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
 768         coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
 769
 770
 771         picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
 772         switch (q_data_src->fourcc) {
 773         case V4L2_PIX_FMT_YVU420:
 774                 /* Switch Cb and Cr for YVU420 format */
 775                 picture_cr = picture_y + q_data_src->width * q_data_src->height;
 776                 picture_cb = picture_cr + q_data_src->width / 2 *
 777                                 q_data_src->height / 2;
 778                 break;
 779         case V4L2_PIX_FMT_YUV420:
 780         default:
 781                 picture_cb = picture_y + q_data_src->width * q_data_src->height;
 782                 picture_cr = picture_cb + q_data_src->width / 2 *
 783                                 q_data_src->height / 2;
 784                 break;
 785         }
 786
 787         coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
 788         coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
 789         coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
 790         coda_write(dev, force_ipicture << 1 & 0x2,
 791                    CODA_CMD_ENC_PIC_OPTION);
 792
 793         coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
 794         coda_write(dev, pic_stream_buffer_size / 1024,
 795                    CODA_CMD_ENC_PIC_BB_SIZE);
 796
 797         if (dev->devtype->product == CODA_7541) {
 798                 coda_write(dev, CODA7_USE_BIT_ENABLE | CODA7_USE_HOST_BIT_ENABLE |
 799                                 CODA7_USE_ME_ENABLE | CODA7_USE_HOST_ME_ENABLE,
 800                                 CODA7_REG_BIT_AXI_SRAM_USE);
 801         }
 802
 803         /* 1 second timeout in case CODA locks up */
 804         schedule_delayed_work(&dev->timeout, HZ);
 805
 806         coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
 807 }
 808
 809 static int coda_job_ready(void *m2m_priv)
 810 {
 811         struct coda_ctx *ctx = m2m_priv;
 812
 813         /*
 814          * For both 'P' and 'key' frame cases 1 picture
 815          * and 1 frame are needed.
 816          */
 817         if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) ||
 818                 !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
 819                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 820                          "not ready: not enough video buffers.\n");
 821                 return 0;
 822         }
 823
 824         if (ctx->aborting) {
 825                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 826                          "not ready: aborting\n");
 827                 return 0;
 828         }
 829
 830         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 831                         "job ready\n");
 832         return 1;
 833 }
 834
 835 static void coda_job_abort(void *priv)
 836 {
 837         struct coda_ctx *ctx = priv;
 838
 839         ctx->aborting = 1;
 840
 841         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 842                  "Aborting task\n");
 843 }
 844
 845 static void coda_lock(void *m2m_priv)
 846 {
 847         struct coda_ctx *ctx = m2m_priv;
 848         struct coda_dev *pcdev = ctx->dev;
 849         mutex_lock(&pcdev->dev_mutex);
 850 }
 851
 852 static void coda_unlock(void *m2m_priv)
 853 {
 854         struct coda_ctx *ctx = m2m_priv;
 855         struct coda_dev *pcdev = ctx->dev;
 856         mutex_unlock(&pcdev->dev_mutex);
 857 }
 858
 859 static struct v4l2_m2m_ops coda_m2m_ops = {
 860         .device_run     = coda_device_run,
 861         .job_ready      = coda_job_ready,
 862         .job_abort      = coda_job_abort,
 863         .lock           = coda_lock,
 864         .unlock         = coda_unlock,
 865 };
 866
 867 static void set_default_params(struct coda_ctx *ctx)
 868 {
 869         int max_w;
 870         int max_h;
 871
 872         ctx->codec = &ctx->dev->devtype->codecs[0];
 873         max_w = ctx->codec->max_w;
 874         max_h = ctx->codec->max_h;
 875
 876         ctx->params.codec_mode = CODA_MODE_INVALID;
 877         ctx->colorspace = V4L2_COLORSPACE_REC709;
 878         ctx->params.framerate = 30;
 879         ctx->aborting = 0;
 880
 881         /* Default formats for output and input queues */
 882         ctx->q_data[V4L2_M2M_SRC].fourcc = ctx->codec->src_fourcc;
 883         ctx->q_data[V4L2_M2M_DST].fourcc = ctx->codec->dst_fourcc;
 884         ctx->q_data[V4L2_M2M_SRC].width = max_w;
 885         ctx->q_data[V4L2_M2M_SRC].height = max_h;
 886         ctx->q_data[V4L2_M2M_SRC].sizeimage = (max_w * max_h * 3) / 2;
 887         ctx->q_data[V4L2_M2M_DST].width = max_w;
 888         ctx->q_data[V4L2_M2M_DST].height = max_h;
 889         ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
 890 }
 891
 892 /*
 893  * Queue operations
 894  */
 895 static int coda_queue_setup(struct vb2_queue *vq,
 896                                 const struct v4l2_format *fmt,
 897                                 unsigned int *nbuffers, unsigned int *nplanes,
 898                                 unsigned int sizes[], void *alloc_ctxs[])
 899 {
 900         struct coda_ctx *ctx = vb2_get_drv_priv(vq);
 901         struct coda_q_data *q_data;
 902         unsigned int size;
 903
 904         q_data = get_q_data(ctx, vq->type);
 905         size = q_data->sizeimage;
 906
 907         *nplanes = 1;
 908         sizes[0] = size;
 909
 910         alloc_ctxs[0] = ctx->dev->alloc_ctx;
 911
 912         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 913                  "get %d buffer(s) of size %d each.\n", *nbuffers, size);
 914
 915         return 0;
 916 }
 917
 918 static int coda_buf_prepare(struct vb2_buffer *vb)
 919 {
 920         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
 921         struct coda_q_data *q_data;
 922
 923         q_data = get_q_data(ctx, vb->vb2_queue->type);
 924
 925         if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
 926                 v4l2_warn(&ctx->dev->v4l2_dev,
 927                           "%s data will not fit into plane (%lu < %lu)\n",
 928                           __func__, vb2_plane_size(vb, 0),
 929                           (long)q_data->sizeimage);
 930                 return -EINVAL;
 931         }
 932
 933         return 0;
 934 }
 935
 936 static void coda_buf_queue(struct vb2_buffer *vb)
 937 {
 938         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
 939         v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
 940 }
 941
 942 static void coda_wait_prepare(struct vb2_queue *q)
 943 {
 944         struct coda_ctx *ctx = vb2_get_drv_priv(q);
 945         coda_unlock(ctx);
 946 }
 947
 948 static void coda_wait_finish(struct vb2_queue *q)
 949 {
 950         struct coda_ctx *ctx = vb2_get_drv_priv(q);
 951         coda_lock(ctx);
 952 }
 953
 954 static void coda_free_framebuffers(struct coda_ctx *ctx)
 955 {
 956         int i;
 957
 958         for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++) {
 959                 if (ctx->internal_frames[i].vaddr) {
 960                         dma_free_coherent(&ctx->dev->plat_dev->dev,
 961                                 ctx->internal_frames[i].size,
 962                                 ctx->internal_frames[i].vaddr,
 963                                 ctx->internal_frames[i].paddr);
 964                         ctx->internal_frames[i].vaddr = NULL;
 965                 }
 966         }
 967 }
 968
 969 static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
 970 {
 971         struct coda_dev *dev = ctx->dev;
 972         u32 *p = ctx->parabuf.vaddr;
 973
 974         if (dev->devtype->product == CODA_DX6)
 975                 p[index] = value;
 976         else
 977                 p[index ^ 1] = value;
 978 }
 979
 980 static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
 981 {
 982         struct coda_dev *dev = ctx->dev;
 983
 984         int height = q_data->height;
 985         dma_addr_t paddr;
 986         int ysize;
 987         int i;
 988
 989         ysize = round_up(q_data->width, 8) * height;
 990
 991         /* Allocate frame buffers */
 992         ctx->num_internal_frames = CODA_MAX_FRAMEBUFFERS;
 993         for (i = 0; i < ctx->num_internal_frames; i++) {
 994                 ctx->internal_frames[i].size = q_data->sizeimage;
 995                 if (fourcc == V4L2_PIX_FMT_H264 && dev->devtype->product != CODA_DX6)
 996                         ctx->internal_frames[i].size += ysize/4;
 997                 ctx->internal_frames[i].vaddr = dma_alloc_coherent(
 998                                 &dev->plat_dev->dev, ctx->internal_frames[i].size,
 999                                 &ctx->internal_frames[i].paddr, GFP_KERNEL);
1000                 if (!ctx->internal_frames[i].vaddr) {
1001                         coda_free_framebuffers(ctx);
1002                         return -ENOMEM;
1003                 }
1004         }
1005
1006         /* Register frame buffers in the parameter buffer */
1007         for (i = 0; i < ctx->num_internal_frames; i++) {
1008                 paddr = ctx->internal_frames[i].paddr;
1009                 coda_parabuf_write(ctx, i * 3 + 0, paddr); /* Y */
1010                 coda_parabuf_write(ctx, i * 3 + 1, paddr + ysize); /* Cb */
1011                 coda_parabuf_write(ctx, i * 3 + 2, paddr + ysize + ysize/4); /* Cr */
1012
1013                 if (dev->devtype->product != CODA_DX6 && fourcc == V4L2_PIX_FMT_H264)
1014                         coda_parabuf_write(ctx, 96 + i, ctx->internal_frames[i].paddr + ysize + ysize/4 + ysize/4);
1015         }
1016
1017         return 0;
1018 }
1019
1020 static int coda_h264_padding(int size, char *p)
1021 {
1022         int nal_size;
1023         int diff;
1024
1025         diff = size - (size & ~0x7);
1026         if (diff == 0)
1027                 return 0;
1028
1029         nal_size = coda_filler_size[diff];
1030         memcpy(p, coda_filler_nal, nal_size);
1031
1032         /* Add rbsp stop bit and trailing at the end */
1033         *(p + nal_size - 1) = 0x80;
1034
1035         return nal_size;
1036 }
1037
1038 static int coda_encode_header(struct coda_ctx *ctx, struct vb2_buffer *buf,
1039                               int header_code, u8 *header, int *size)
1040 {
1041         struct coda_dev *dev = ctx->dev;
1042         int ret;
1043
1044         coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0),
1045                    CODA_CMD_ENC_HEADER_BB_START);
1046         coda_write(dev, vb2_plane_size(buf, 0), CODA_CMD_ENC_HEADER_BB_SIZE);
1047         coda_write(dev, header_code, CODA_CMD_ENC_HEADER_CODE);
1048         ret = coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER);
1049         if (ret < 0) {
1050                 v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1051                 return ret;
1052         }
1053         *size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1054                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1055         memcpy(header, vb2_plane_vaddr(buf, 0), *size);
1056
1057         return 0;
1058 }
1059
1060 static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
1061 {
1062         struct coda_ctx *ctx = vb2_get_drv_priv(q);
1063         struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
1064         u32 bitstream_buf, bitstream_size;
1065         struct coda_dev *dev = ctx->dev;
1066         struct coda_q_data *q_data_src, *q_data_dst;
1067         struct vb2_buffer *buf;
1068         u32 dst_fourcc;
1069         u32 value;
1070         int ret = 0;
1071
1072         if (count < 1)
1073                 return -EINVAL;
1074
1075         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
1076                 ctx->streamon_out = 1;
1077         else
1078                 ctx->streamon_cap = 1;
1079
1080         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1081         if (ctx->streamon_out) {
1082                 if (coda_format_is_yuv(q_data_src->fourcc))
1083                         ctx->inst_type = CODA_INST_ENCODER;
1084                 else
1085                         ctx->inst_type = CODA_INST_DECODER;
1086         }
1087
1088         /* Don't start the coda unless both queues are on */
1089         if (!(ctx->streamon_out & ctx->streamon_cap))
1090                 return 0;
1091
1092         ctx->gopcounter = ctx->params.gop_size - 1;
1093         buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1094         bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
1095         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1096         bitstream_size = q_data_dst->sizeimage;
1097         dst_fourcc = q_data_dst->fourcc;
1098
1099         ctx->codec = coda_find_codec(ctx->dev, q_data_src->fourcc,
1100                                      q_data_dst->fourcc);
1101         if (!ctx->codec) {
1102                 v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
1103                 return -EINVAL;
1104         }
1105
1106         if (!coda_is_initialized(dev)) {
1107                 v4l2_err(v4l2_dev, "coda is not initialized.\n");
1108                 return -EFAULT;
1109         }
1110
1111         mutex_lock(&dev->coda_mutex);
1112
1113         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1114         coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->idx));
1115         coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->idx));
1116         switch (dev->devtype->product) {
1117         case CODA_DX6:
1118                 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
1119                         CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1120                 break;
1121         default:
1122                 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
1123                         CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1124         }
1125
1126         if (dev->devtype->product == CODA_DX6) {
1127                 /* Configure the coda */
1128                 coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
1129         }
1130
1131         /* Could set rotation here if needed */
1132         switch (dev->devtype->product) {
1133         case CODA_DX6:
1134                 value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
1135                 value |= (q_data_src->height & CODADX6_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
1136                 break;
1137         default:
1138                 value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
1139                 value |= (q_data_src->height & CODA7_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
1140         }
1141         coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
1142         coda_write(dev, ctx->params.framerate,
1143                    CODA_CMD_ENC_SEQ_SRC_F_RATE);
1144
1145         ctx->params.codec_mode = ctx->codec->mode;
1146         switch (dst_fourcc) {
1147         case V4L2_PIX_FMT_MPEG4:
1148                 coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
1149                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
1150                 break;
1151         case V4L2_PIX_FMT_H264:
1152                 coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
1153                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA);
1154                 break;
1155         default:
1156                 v4l2_err(v4l2_dev,
1157                          "dst format (0x%08x) invalid.\n", dst_fourcc);
1158                 ret = -EINVAL;
1159                 goto out;
1160         }
1161
1162         switch (ctx->params.slice_mode) {
1163         case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
1164                 value = 0;
1165                 break;
1166         case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
1167                 value  = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
1168                 value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
1169                 value |=  1 & CODA_SLICING_MODE_MASK;
1170                 break;
1171         case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
1172                 value  = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
1173                 value |= (0 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
1174                 value |=  1 & CODA_SLICING_MODE_MASK;
1175                 break;
1176         }
1177         coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
1178         value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
1179         coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
1180
1181         if (ctx->params.bitrate) {
1182                 /* Rate control enabled */
1183                 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
1184                 value |=  1 & CODA_RATECONTROL_ENABLE_MASK;
1185         } else {
1186                 value = 0;
1187         }
1188         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
1189
1190         coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
1191         coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH);
1192
1193         coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
1194         coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
1195
1196         /* set default gamma */
1197         value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET;
1198         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA);
1199
1200         if (CODA_DEFAULT_GAMMA > 0) {
1201                 if (dev->devtype->product == CODA_DX6)
1202                         value  = 1 << CODADX6_OPTION_GAMMA_OFFSET;
1203                 else
1204                         value  = 1 << CODA7_OPTION_GAMMA_OFFSET;
1205         } else {
1206                 value = 0;
1207         }
1208         coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
1209
1210         if (dst_fourcc == V4L2_PIX_FMT_H264) {
1211                 value  = (FMO_SLICE_SAVE_BUF_SIZE << 7);
1212                 value |= (0 & CODA_FMOPARAM_TYPE_MASK) << CODA_FMOPARAM_TYPE_OFFSET;
1213                 value |=  0 & CODA_FMOPARAM_SLICENUM_MASK;
1214                 if (dev->devtype->product == CODA_DX6) {
1215                         coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
1216                 } else {
1217                         coda_write(dev, dev->iram_paddr, CODA7_CMD_ENC_SEQ_SEARCH_BASE);
1218                         coda_write(dev, 48 * 1024, CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
1219                 }
1220         }
1221
1222         ret = coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT);
1223         if (ret < 0) {
1224                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1225                 goto out;
1226         }
1227
1228         if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0) {
1229                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT failed\n");
1230                 ret = -EFAULT;
1231                 goto out;
1232         }
1233
1234         ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
1235         if (ret < 0) {
1236                 v4l2_err(v4l2_dev, "failed to allocate framebuffers\n");
1237                 goto out;
1238         }
1239
1240         coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1241         coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE);
1242         if (dev->devtype->product != CODA_DX6) {
1243                 coda_write(dev, round_up(q_data_src->width, 8), CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
1244                 coda_write(dev, dev->iram_paddr + 48 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1245                 coda_write(dev, dev->iram_paddr + 53 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1246                 coda_write(dev, dev->iram_paddr + 58 * 1024, CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1247                 coda_write(dev, dev->iram_paddr + 68 * 1024, CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1248                 coda_write(dev, 0x0, CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1249         }
1250         ret = coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF);
1251         if (ret < 0) {
1252                 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1253                 goto out;
1254         }
1255
1256         /* Save stream headers */
1257         buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1258         switch (dst_fourcc) {
1259         case V4L2_PIX_FMT_H264:
1260                 /*
1261                  * Get SPS in the first frame and copy it to an
1262                  * intermediate buffer.
1263                  */
1264                 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_SPS,
1265                                          &ctx->vpu_header[0][0],
1266                                          &ctx->vpu_header_size[0]);
1267                 if (ret < 0)
1268                         goto out;
1269
1270                 /*
1271                  * Get PPS in the first frame and copy it to an
1272                  * intermediate buffer.
1273                  */
1274                 ret = coda_encode_header(ctx, buf, CODA_HEADER_H264_PPS,
1275                                          &ctx->vpu_header[1][0],
1276                                          &ctx->vpu_header_size[1]);
1277                 if (ret < 0)
1278                         goto out;
1279
1280                 /*
1281                  * Length of H.264 headers is variable and thus it might not be
1282                  * aligned for the coda to append the encoded frame. In that is
1283                  * the case a filler NAL must be added to header 2.
1284                  */
1285                 ctx->vpu_header_size[2] = coda_h264_padding(
1286                                         (ctx->vpu_header_size[0] +
1287                                          ctx->vpu_header_size[1]),
1288                                          ctx->vpu_header[2]);
1289                 break;
1290         case V4L2_PIX_FMT_MPEG4:
1291                 /*
1292                  * Get VOS in the first frame and copy it to an
1293                  * intermediate buffer
1294                  */
1295                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOS,
1296                                          &ctx->vpu_header[0][0],
1297                                          &ctx->vpu_header_size[0]);
1298                 if (ret < 0)
1299                         goto out;
1300
1301                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VIS,
1302                                          &ctx->vpu_header[1][0],
1303                                          &ctx->vpu_header_size[1]);
1304                 if (ret < 0)
1305                         goto out;
1306
1307                 ret = coda_encode_header(ctx, buf, CODA_HEADER_MP4V_VOL,
1308                                          &ctx->vpu_header[2][0],
1309                                          &ctx->vpu_header_size[2]);
1310                 if (ret < 0)
1311                         goto out;
1312                 break;
1313         default:
1314                 /* No more formats need to save headers at the moment */
1315                 break;
1316         }
1317
1318 out:
1319         mutex_unlock(&dev->coda_mutex);
1320         return ret;
1321 }
1322
1323 static int coda_stop_streaming(struct vb2_queue *q)
1324 {
1325         struct coda_ctx *ctx = vb2_get_drv_priv(q);
1326         struct coda_dev *dev = ctx->dev;
1327
1328         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1329                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1330                          "%s: output\n", __func__);
1331                 ctx->streamon_out = 0;
1332         } else {
1333                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1334                          "%s: capture\n", __func__);
1335                 ctx->streamon_cap = 0;
1336         }
1337
1338         /* Don't stop the coda unless both queues are off */
1339         if (ctx->streamon_out || ctx->streamon_cap)
1340                 return 0;
1341
1342         cancel_delayed_work(&dev->timeout);
1343
1344         mutex_lock(&dev->coda_mutex);
1345         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1346                  "%s: sent command 'SEQ_END' to coda\n", __func__);
1347         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1348                 v4l2_err(&dev->v4l2_dev,
1349                          "CODA_COMMAND_SEQ_END failed\n");
1350                 return -ETIMEDOUT;
1351         }
1352         mutex_unlock(&dev->coda_mutex);
1353
1354         coda_free_framebuffers(ctx);
1355
1356         return 0;
1357 }
1358
1359 static struct vb2_ops coda_qops = {
1360         .queue_setup            = coda_queue_setup,
1361         .buf_prepare            = coda_buf_prepare,
1362         .buf_queue              = coda_buf_queue,
1363         .wait_prepare           = coda_wait_prepare,
1364         .wait_finish            = coda_wait_finish,
1365         .start_streaming        = coda_start_streaming,
1366         .stop_streaming         = coda_stop_streaming,
1367 };
1368
1369 static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
1370 {
1371         struct coda_ctx *ctx =
1372                         container_of(ctrl->handler, struct coda_ctx, ctrls);
1373
1374         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1375                  "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
1376
1377         switch (ctrl->id) {
1378         case V4L2_CID_HFLIP:
1379                 if (ctrl->val)
1380                         ctx->params.rot_mode |= CODA_MIR_HOR;
1381                 else
1382                         ctx->params.rot_mode &= ~CODA_MIR_HOR;
1383                 break;
1384         case V4L2_CID_VFLIP:
1385                 if (ctrl->val)
1386                         ctx->params.rot_mode |= CODA_MIR_VER;
1387                 else
1388                         ctx->params.rot_mode &= ~CODA_MIR_VER;
1389                 break;
1390         case V4L2_CID_MPEG_VIDEO_BITRATE:
1391                 ctx->params.bitrate = ctrl->val / 1000;
1392                 break;
1393         case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
1394                 ctx->params.gop_size = ctrl->val;
1395                 break;
1396         case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
1397                 ctx->params.h264_intra_qp = ctrl->val;
1398                 break;
1399         case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
1400                 ctx->params.h264_inter_qp = ctrl->val;
1401                 break;
1402         case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
1403                 ctx->params.mpeg4_intra_qp = ctrl->val;
1404                 break;
1405         case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
1406                 ctx->params.mpeg4_inter_qp = ctrl->val;
1407                 break;
1408         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
1409                 ctx->params.slice_mode = ctrl->val;
1410                 break;
1411         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
1412                 ctx->params.slice_max_mb = ctrl->val;
1413                 break;
1414         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
1415                 ctx->params.slice_max_bits = ctrl->val * 8;
1416                 break;
1417         case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
1418                 break;
1419         default:
1420                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1421                         "Invalid control, id=%d, val=%d\n",
1422                         ctrl->id, ctrl->val);
1423                 return -EINVAL;
1424         }
1425
1426         return 0;
1427 }
1428
1429 static struct v4l2_ctrl_ops coda_ctrl_ops = {
1430         .s_ctrl = coda_s_ctrl,
1431 };
1432
1433 static int coda_ctrls_setup(struct coda_ctx *ctx)
1434 {
1435         v4l2_ctrl_handler_init(&ctx->ctrls, 9);
1436
1437         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1438                 V4L2_CID_HFLIP, 0, 1, 1, 0);
1439         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1440                 V4L2_CID_VFLIP, 0, 1, 1, 0);
1441         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1442                 V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
1443         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1444                 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
1445         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1446                 V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25);
1447         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1448                 V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25);
1449         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1450                 V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
1451         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1452                 V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
1453         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1454                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
1455                 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES, 0x0,
1456                 V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE);
1457         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1458                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
1459         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1460                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, 1, 0x3fffffff, 1, 500);
1461         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1462                 V4L2_CID_MPEG_VIDEO_HEADER_MODE,
1463                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
1464                 (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
1465                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
1466
1467         if (ctx->ctrls.error) {
1468                 v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
1469                         ctx->ctrls.error);
1470                 return -EINVAL;
1471         }
1472
1473         return v4l2_ctrl_handler_setup(&ctx->ctrls);
1474 }
1475
1476 static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
1477                       struct vb2_queue *dst_vq)
1478 {
1479         struct coda_ctx *ctx = priv;
1480         int ret;
1481
1482         src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
1483         src_vq->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR;
1484         src_vq->drv_priv = ctx;
1485         src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1486         src_vq->ops = &coda_qops;
1487         src_vq->mem_ops = &vb2_dma_contig_memops;
1488         src_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
1489
1490         ret = vb2_queue_init(src_vq);
1491         if (ret)
1492                 return ret;
1493
1494         dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1495         dst_vq->io_modes = VB2_DMABUF | VB2_MMAP | VB2_USERPTR;
1496         dst_vq->drv_priv = ctx;
1497         dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1498         dst_vq->ops = &coda_qops;
1499         dst_vq->mem_ops = &vb2_dma_contig_memops;
1500         dst_vq->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_COPY;
1501
1502         return vb2_queue_init(dst_vq);
1503 }
1504
1505 static int coda_next_free_instance(struct coda_dev *dev)
1506 {
1507         return ffz(dev->instance_mask);
1508 }
1509
1510 static int coda_open(struct file *file)
1511 {
1512         struct coda_dev *dev = video_drvdata(file);
1513         struct coda_ctx *ctx = NULL;
1514         int ret = 0;
1515         int idx;
1516
1517         idx = coda_next_free_instance(dev);
1518         if (idx >= CODA_MAX_INSTANCES)
1519                 return -EBUSY;
1520         set_bit(idx, &dev->instance_mask);
1521
1522         ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
1523         if (!ctx)
1524                 return -ENOMEM;
1525
1526         v4l2_fh_init(&ctx->fh, video_devdata(file));
1527         file->private_data = &ctx->fh;
1528         v4l2_fh_add(&ctx->fh);
1529         ctx->dev = dev;
1530         ctx->idx = idx;
1531
1532         set_default_params(ctx);
1533         ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
1534                                          &coda_queue_init);
1535         if (IS_ERR(ctx->m2m_ctx)) {
1536                 ret = PTR_ERR(ctx->m2m_ctx);
1537
1538                 v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
1539                          __func__, ret);
1540                 goto err;
1541         }
1542         ret = coda_ctrls_setup(ctx);
1543         if (ret) {
1544                 v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
1545                 goto err;
1546         }
1547
1548         ctx->fh.ctrl_handler = &ctx->ctrls;
1549
1550         ctx->parabuf.vaddr = dma_alloc_coherent(&dev->plat_dev->dev,
1551                         CODA_PARA_BUF_SIZE, &ctx->parabuf.paddr, GFP_KERNEL);
1552         if (!ctx->parabuf.vaddr) {
1553                 v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
1554                 ret = -ENOMEM;
1555                 goto err;
1556         }
1557
1558         coda_lock(ctx);
1559         list_add(&ctx->list, &dev->instances);
1560         coda_unlock(ctx);
1561
1562         clk_prepare_enable(dev->clk_per);
1563         clk_prepare_enable(dev->clk_ahb);
1564
1565         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
1566                  ctx->idx, ctx);
1567
1568         return 0;
1569
1570 err:
1571         v4l2_fh_del(&ctx->fh);
1572         v4l2_fh_exit(&ctx->fh);
1573         kfree(ctx);
1574         return ret;
1575 }
1576
1577 static int coda_release(struct file *file)
1578 {
1579         struct coda_dev *dev = video_drvdata(file);
1580         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1581
1582         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
1583                  ctx);
1584
1585         coda_lock(ctx);
1586         list_del(&ctx->list);
1587         coda_unlock(ctx);
1588
1589         dma_free_coherent(&dev->plat_dev->dev, CODA_PARA_BUF_SIZE,
1590                 ctx->parabuf.vaddr, ctx->parabuf.paddr);
1591         v4l2_m2m_ctx_release(ctx->m2m_ctx);
1592         v4l2_ctrl_handler_free(&ctx->ctrls);
1593         clk_disable_unprepare(dev->clk_per);
1594         clk_disable_unprepare(dev->clk_ahb);
1595         v4l2_fh_del(&ctx->fh);
1596         v4l2_fh_exit(&ctx->fh);
1597         clear_bit(ctx->idx, &dev->instance_mask);
1598         kfree(ctx);
1599
1600         return 0;
1601 }
1602
1603 static unsigned int coda_poll(struct file *file,
1604                                  struct poll_table_struct *wait)
1605 {
1606         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1607         int ret;
1608
1609         coda_lock(ctx);
1610         ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
1611         coda_unlock(ctx);
1612         return ret;
1613 }
1614
1615 static int coda_mmap(struct file *file, struct vm_area_struct *vma)
1616 {
1617         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1618
1619         return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
1620 }
1621
1622 static const struct v4l2_file_operations coda_fops = {
1623         .owner          = THIS_MODULE,
1624         .open           = coda_open,
1625         .release        = coda_release,
1626         .poll           = coda_poll,
1627         .unlocked_ioctl = video_ioctl2,
1628         .mmap           = coda_mmap,
1629 };
1630
1631 static irqreturn_t coda_irq_handler(int irq, void *data)
1632 {
1633         struct vb2_buffer *src_buf, *dst_buf;
1634         struct coda_dev *dev = data;
1635         u32 wr_ptr, start_ptr;
1636         struct coda_ctx *ctx;
1637
1638         cancel_delayed_work(&dev->timeout);
1639
1640         /* read status register to attend the IRQ */
1641         coda_read(dev, CODA_REG_BIT_INT_STATUS);
1642         coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
1643                       CODA_REG_BIT_INT_CLEAR);
1644
1645         ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
1646         if (ctx == NULL) {
1647                 v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
1648                 mutex_unlock(&dev->coda_mutex);
1649                 return IRQ_HANDLED;
1650         }
1651
1652         if (ctx->aborting) {
1653                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1654                          "task has been aborted\n");
1655                 mutex_unlock(&dev->coda_mutex);
1656                 return IRQ_HANDLED;
1657         }
1658
1659         if (coda_isbusy(ctx->dev)) {
1660                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1661                          "coda is still busy!!!!\n");
1662                 return IRQ_NONE;
1663         }
1664
1665         src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
1666         dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
1667
1668         /* Get results from the coda */
1669         coda_read(dev, CODA_RET_ENC_PIC_TYPE);
1670         start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
1671         wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx));
1672         /* Calculate bytesused field */
1673         if (dst_buf->v4l2_buf.sequence == 0) {
1674                 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr) +
1675                                                 ctx->vpu_header_size[0] +
1676                                                 ctx->vpu_header_size[1] +
1677                                                 ctx->vpu_header_size[2];
1678         } else {
1679                 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr);
1680         }
1681
1682         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
1683                  wr_ptr - start_ptr);
1684
1685         coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
1686         coda_read(dev, CODA_RET_ENC_PIC_FLAG);
1687
1688         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1689                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1690                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1691         } else {
1692                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1693                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1694         }
1695
1696         dst_buf->v4l2_buf.timestamp = src_buf->v4l2_buf.timestamp;
1697         dst_buf->v4l2_buf.timecode = src_buf->v4l2_buf.timecode;
1698
1699         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
1700         v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
1701
1702         ctx->gopcounter--;
1703         if (ctx->gopcounter < 0)
1704                 ctx->gopcounter = ctx->params.gop_size - 1;
1705
1706         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1707                 "job finished: encoding frame (%d) (%s)\n",
1708                 dst_buf->v4l2_buf.sequence,
1709                 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
1710                 "KEYFRAME" : "PFRAME");
1711
1712         mutex_unlock(&dev->coda_mutex);
1713
1714         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
1715
1716         return IRQ_HANDLED;
1717 }
1718
1719 static void coda_timeout(struct work_struct *work)
1720 {
1721         struct coda_ctx *ctx;
1722         struct coda_dev *dev = container_of(to_delayed_work(work),
1723                                             struct coda_dev, timeout);
1724
1725         dev_err(&dev->plat_dev->dev, "CODA PIC_RUN timeout, stopping all streams\n");
1726
1727         mutex_lock(&dev->dev_mutex);
1728         list_for_each_entry(ctx, &dev->instances, list) {
1729                 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1730                 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1731         }
1732         mutex_unlock(&dev->dev_mutex);
1733
1734         mutex_unlock(&dev->coda_mutex);
1735         ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
1736         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
1737 }
1738
1739 static u32 coda_supported_firmwares[] = {
1740         CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
1741         CODA_FIRMWARE_VERNUM(CODA_7541, 13, 4, 29),
1742 };
1743
1744 static bool coda_firmware_supported(u32 vernum)
1745 {
1746         int i;
1747
1748         for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
1749                 if (vernum == coda_supported_firmwares[i])
1750                         return true;
1751         return false;
1752 }
1753
1754 static char *coda_product_name(int product)
1755 {
1756         static char buf[9];
1757
1758         switch (product) {
1759         case CODA_DX6:
1760                 return "CodaDx6";
1761         case CODA_7541:
1762                 return "CODA7541";
1763         default:
1764                 snprintf(buf, sizeof(buf), "(0x%04x)", product);
1765                 return buf;
1766         }
1767 }
1768
1769 static int coda_hw_init(struct coda_dev *dev)
1770 {
1771         u16 product, major, minor, release;
1772         u32 data;
1773         u16 *p;
1774         int i;
1775
1776         clk_prepare_enable(dev->clk_per);
1777         clk_prepare_enable(dev->clk_ahb);
1778
1779         /*
1780          * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
1781          * The 16-bit chars in the code buffer are in memory access
1782          * order, re-sort them to CODA order for register download.
1783          * Data in this SRAM survives a reboot.
1784          */
1785         p = (u16 *)dev->codebuf.vaddr;
1786         if (dev->devtype->product == CODA_DX6) {
1787                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++)  {
1788                         data = CODA_DOWN_ADDRESS_SET(i) |
1789                                 CODA_DOWN_DATA_SET(p[i ^ 1]);
1790                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1791                 }
1792         } else {
1793                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
1794                         data = CODA_DOWN_ADDRESS_SET(i) |
1795                                 CODA_DOWN_DATA_SET(p[round_down(i, 4) +
1796                                                         3 - (i % 4)]);
1797                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1798                 }
1799         }
1800
1801         /* Clear registers */
1802         for (i = 0; i < 64; i++)
1803                 coda_write(dev, 0, CODA_REG_BIT_CODE_BUF_ADDR + i * 4);
1804
1805         /* Tell the BIT where to find everything it needs */
1806         coda_write(dev, dev->workbuf.paddr,
1807                       CODA_REG_BIT_WORK_BUF_ADDR);
1808         coda_write(dev, dev->codebuf.paddr,
1809                       CODA_REG_BIT_CODE_BUF_ADDR);
1810         coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
1811
1812         /* Set default values */
1813         switch (dev->devtype->product) {
1814         case CODA_DX6:
1815                 coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1816                 break;
1817         default:
1818                 coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1819         }
1820         coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
1821
1822         if (dev->devtype->product != CODA_DX6)
1823                 coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
1824
1825         coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
1826                       CODA_REG_BIT_INT_ENABLE);
1827
1828         /* Reset VPU and start processor */
1829         data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
1830         data |= CODA_REG_RESET_ENABLE;
1831         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1832         udelay(10);
1833         data &= ~CODA_REG_RESET_ENABLE;
1834         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1835         coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
1836
1837         /* Load firmware */
1838         coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
1839         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
1840         coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
1841         coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
1842         coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
1843         if (coda_wait_timeout(dev)) {
1844                 clk_disable_unprepare(dev->clk_per);
1845                 clk_disable_unprepare(dev->clk_ahb);
1846                 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
1847                 return -EIO;
1848         }
1849
1850         /* Check we are compatible with the loaded firmware */
1851         data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
1852         product = CODA_FIRMWARE_PRODUCT(data);
1853         major = CODA_FIRMWARE_MAJOR(data);
1854         minor = CODA_FIRMWARE_MINOR(data);
1855         release = CODA_FIRMWARE_RELEASE(data);
1856
1857         clk_disable_unprepare(dev->clk_per);
1858         clk_disable_unprepare(dev->clk_ahb);
1859
1860         if (product != dev->devtype->product) {
1861                 v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
1862                          " Version: %u.%u.%u\n",
1863                          coda_product_name(dev->devtype->product),
1864                          coda_product_name(product), major, minor, release);
1865                 return -EINVAL;
1866         }
1867
1868         v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
1869                   coda_product_name(product));
1870
1871         if (coda_firmware_supported(data)) {
1872                 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
1873                           major, minor, release);
1874         } else {
1875                 v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
1876                           "%u.%u.%u\n", major, minor, release);
1877         }
1878
1879         return 0;
1880 }
1881
1882 static void coda_fw_callback(const struct firmware *fw, void *context)
1883 {
1884         struct coda_dev *dev = context;
1885         struct platform_device *pdev = dev->plat_dev;
1886         int ret;
1887
1888         if (!fw) {
1889                 v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
1890                 return;
1891         }
1892
1893         /* allocate auxiliary per-device code buffer for the BIT processor */
1894         dev->codebuf.size = fw->size;
1895         dev->codebuf.vaddr = dma_alloc_coherent(&pdev->dev, fw->size,
1896                                                     &dev->codebuf.paddr,
1897                                                     GFP_KERNEL);
1898         if (!dev->codebuf.vaddr) {
1899                 dev_err(&pdev->dev, "failed to allocate code buffer\n");
1900                 return;
1901         }
1902
1903         /* Copy the whole firmware image to the code buffer */
1904         memcpy(dev->codebuf.vaddr, fw->data, fw->size);
1905         release_firmware(fw);
1906
1907         ret = coda_hw_init(dev);
1908         if (ret) {
1909                 v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
1910                 return;
1911         }
1912
1913         dev->vfd.fops   = &coda_fops,
1914         dev->vfd.ioctl_ops      = &coda_ioctl_ops;
1915         dev->vfd.release        = video_device_release_empty,
1916         dev->vfd.lock   = &dev->dev_mutex;
1917         dev->vfd.v4l2_dev       = &dev->v4l2_dev;
1918         dev->vfd.vfl_dir        = VFL_DIR_M2M;
1919         snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
1920         video_set_drvdata(&dev->vfd, dev);
1921
1922         dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1923         if (IS_ERR(dev->alloc_ctx)) {
1924                 v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
1925                 return;
1926         }
1927
1928         dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
1929         if (IS_ERR(dev->m2m_dev)) {
1930                 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
1931                 goto rel_ctx;
1932         }
1933
1934         ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
1935         if (ret) {
1936                 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
1937                 goto rel_m2m;
1938         }
1939         v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
1940                   dev->vfd.num);
1941
1942         return;
1943
1944 rel_m2m:
1945         v4l2_m2m_release(dev->m2m_dev);
1946 rel_ctx:
1947         vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
1948 }
1949
1950 static int coda_firmware_request(struct coda_dev *dev)
1951 {
1952         char *fw = dev->devtype->firmware;
1953
1954         dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
1955                 coda_product_name(dev->devtype->product));
1956
1957         return request_firmware_nowait(THIS_MODULE, true,
1958                 fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
1959 }
1960
1961 enum coda_platform {
1962         CODA_IMX27,
1963         CODA_IMX53,
1964 };
1965
1966 static const struct coda_devtype coda_devdata[] = {
1967         [CODA_IMX27] = {
1968                 .firmware   = "v4l-codadx6-imx27.bin",
1969                 .product    = CODA_DX6,
1970                 .codecs     = codadx6_codecs,
1971                 .num_codecs = ARRAY_SIZE(codadx6_codecs),
1972         },
1973         [CODA_IMX53] = {
1974                 .firmware   = "v4l-coda7541-imx53.bin",
1975                 .product    = CODA_7541,
1976                 .codecs     = coda7_codecs,
1977                 .num_codecs = ARRAY_SIZE(coda7_codecs),
1978         },
1979 };
1980
1981 static struct platform_device_id coda_platform_ids[] = {
1982         { .name = "coda-imx27", .driver_data = CODA_IMX27 },
1983         { .name = "coda-imx53", .driver_data = CODA_IMX53 },
1984         { /* sentinel */ }
1985 };
1986 MODULE_DEVICE_TABLE(platform, coda_platform_ids);
1987
1988 #ifdef CONFIG_OF
1989 static const struct of_device_id coda_dt_ids[] = {
1990         { .compatible = "fsl,imx27-vpu", .data = &coda_devdata[CODA_IMX27] },
1991         { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
1992         { /* sentinel */ }
1993 };
1994 MODULE_DEVICE_TABLE(of, coda_dt_ids);
1995 #endif
1996
1997 static int coda_probe(struct platform_device *pdev)
1998 {
1999         const struct of_device_id *of_id =
2000                         of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
2001         const struct platform_device_id *pdev_id;
2002         struct coda_platform_data *pdata = pdev->dev.platform_data;
2003         struct device_node *np = pdev->dev.of_node;
2004         struct gen_pool *pool;
2005         struct coda_dev *dev;
2006         struct resource *res;
2007         int ret, irq;
2008
2009         dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
2010         if (!dev) {
2011                 dev_err(&pdev->dev, "Not enough memory for %s\n",
2012                         CODA_NAME);
2013                 return -ENOMEM;
2014         }
2015
2016         spin_lock_init(&dev->irqlock);
2017         INIT_LIST_HEAD(&dev->instances);
2018         INIT_DELAYED_WORK(&dev->timeout, coda_timeout);
2019
2020         dev->plat_dev = pdev;
2021         dev->clk_per = devm_clk_get(&pdev->dev, "per");
2022         if (IS_ERR(dev->clk_per)) {
2023                 dev_err(&pdev->dev, "Could not get per clock\n");
2024                 return PTR_ERR(dev->clk_per);
2025         }
2026
2027         dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
2028         if (IS_ERR(dev->clk_ahb)) {
2029                 dev_err(&pdev->dev, "Could not get ahb clock\n");
2030                 return PTR_ERR(dev->clk_ahb);
2031         }
2032
2033         /* Get  memory for physical registers */
2034         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2035         if (res == NULL) {
2036                 dev_err(&pdev->dev, "failed to get memory region resource\n");
2037                 return -ENOENT;
2038         }
2039
2040         dev->regs_base = devm_ioremap_resource(&pdev->dev, res);
2041         if (IS_ERR(dev->regs_base))
2042                 return PTR_ERR(dev->regs_base);
2043
2044         /* IRQ */
2045         irq = platform_get_irq(pdev, 0);
2046         if (irq < 0) {
2047                 dev_err(&pdev->dev, "failed to get irq resource\n");
2048                 return -ENOENT;
2049         }
2050
2051         if (devm_request_irq(&pdev->dev, irq, coda_irq_handler,
2052                 0, CODA_NAME, dev) < 0) {
2053                 dev_err(&pdev->dev, "failed to request irq\n");
2054                 return -ENOENT;
2055         }
2056
2057         /* Get IRAM pool from device tree or platform data */
2058         pool = of_get_named_gen_pool(np, "iram", 0);
2059         if (!pool && pdata)
2060                 pool = dev_get_gen_pool(pdata->iram_dev);
2061         if (!pool) {
2062                 dev_err(&pdev->dev, "iram pool not available\n");
2063                 return -ENOMEM;
2064         }
2065         dev->iram_pool = pool;
2066
2067         ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
2068         if (ret)
2069                 return ret;
2070
2071         mutex_init(&dev->dev_mutex);
2072         mutex_init(&dev->coda_mutex);
2073
2074         pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
2075
2076         if (of_id) {
2077                 dev->devtype = of_id->data;
2078         } else if (pdev_id) {
2079                 dev->devtype = &coda_devdata[pdev_id->driver_data];
2080         } else {
2081                 v4l2_device_unregister(&dev->v4l2_dev);
2082                 return -EINVAL;
2083         }
2084
2085         /* allocate auxiliary per-device buffers for the BIT processor */
2086         switch (dev->devtype->product) {
2087         case CODA_DX6:
2088                 dev->workbuf.size = CODADX6_WORK_BUF_SIZE;
2089                 break;
2090         default:
2091                 dev->workbuf.size = CODA7_WORK_BUF_SIZE;
2092         }
2093         dev->workbuf.vaddr = dma_alloc_coherent(&pdev->dev, dev->workbuf.size,
2094                                                     &dev->workbuf.paddr,
2095                                                     GFP_KERNEL);
2096         if (!dev->workbuf.vaddr) {
2097                 dev_err(&pdev->dev, "failed to allocate work buffer\n");
2098                 v4l2_device_unregister(&dev->v4l2_dev);
2099                 return -ENOMEM;
2100         }
2101
2102         if (dev->devtype->product == CODA_DX6)
2103                 dev->iram_size = CODADX6_IRAM_SIZE;
2104         else
2105                 dev->iram_size = CODA7_IRAM_SIZE;
2106         dev->iram_vaddr = gen_pool_alloc(dev->iram_pool, dev->iram_size);
2107         if (!dev->iram_vaddr) {
2108                 dev_err(&pdev->dev, "unable to alloc iram\n");
2109                 return -ENOMEM;
2110         }
2111         dev->iram_paddr = gen_pool_virt_to_phys(dev->iram_pool,
2112                                                 dev->iram_vaddr);
2113
2114         platform_set_drvdata(pdev, dev);
2115
2116         return coda_firmware_request(dev);
2117 }
2118
2119 static int coda_remove(struct platform_device *pdev)
2120 {
2121         struct coda_dev *dev = platform_get_drvdata(pdev);
2122
2123         video_unregister_device(&dev->vfd);
2124         if (dev->m2m_dev)
2125                 v4l2_m2m_release(dev->m2m_dev);
2126         if (dev->alloc_ctx)
2127                 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
2128         v4l2_device_unregister(&dev->v4l2_dev);
2129         if (dev->iram_vaddr)
2130                 gen_pool_free(dev->iram_pool, dev->iram_vaddr, dev->iram_size);
2131         if (dev->codebuf.vaddr)
2132                 dma_free_coherent(&pdev->dev, dev->codebuf.size,
2133                                   &dev->codebuf.vaddr, dev->codebuf.paddr);
2134         if (dev->workbuf.vaddr)
2135                 dma_free_coherent(&pdev->dev, dev->workbuf.size, &dev->workbuf.vaddr,
2136                           dev->workbuf.paddr);
2137         return 0;
2138 }
2139
2140 static struct platform_driver coda_driver = {
2141         .probe  = coda_probe,
2142         .remove = coda_remove,
2143         .driver = {
2144                 .name   = CODA_NAME,
2145                 .owner  = THIS_MODULE,
2146                 .of_match_table = of_match_ptr(coda_dt_ids),
2147         },
2148         .id_table = coda_platform_ids,
2149 };
2150
2151 module_platform_driver(coda_driver);
2152
2153 MODULE_LICENSE("GPL");
2154 MODULE_AUTHOR("Javier Martin <[email protected]>");
2155 MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");