drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h

   1 /*
   2  * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #ifndef __DAL_HUBP_H__
  27 #define __DAL_HUBP_H__
  28
  29 /**
  30  * DOC: overview
  31  *
  32  * Display Controller Hub (DCHUB) is the gateway between the Scalable Data Port
  33  * (SDP) and DCN. This component has multiple features, such as memory
  34  * arbitration, rotation, and cursor manipulation.
  35  *
  36  * There is one HUBP allocated per pipe, which fetches data and converts
  37  * different pixel formats (i.e. ARGB8888, NV12, etc) into linear, interleaved
  38  * and fixed-depth streams of pixel data.
  39  */
  40
  41 #include "mem_input.h"
  42 #include "cursor_reg_cache.h"
  43
  44 #include "dml2/dml21/inc/dml_top_dchub_registers.h"
  45 #include "dml2/dml21/inc/dml_top_types.h"
  46
  47 #define OPP_ID_INVALID 0xf
  48 #define MAX_TTU 0xffffff
  49
  50 enum cursor_pitch {
  51         CURSOR_PITCH_64_PIXELS = 0,
  52         CURSOR_PITCH_128_PIXELS,
  53         CURSOR_PITCH_256_PIXELS
  54 };
  55
  56 enum cursor_lines_per_chunk {
  57         CURSOR_LINE_PER_CHUNK_1 = 0, /* new for DCN2 */
  58         CURSOR_LINE_PER_CHUNK_2 = 1,
  59         CURSOR_LINE_PER_CHUNK_4,
  60         CURSOR_LINE_PER_CHUNK_8,
  61         CURSOR_LINE_PER_CHUNK_16
  62 };
  63
  64 enum hubp_ind_block_size {
  65         hubp_ind_block_unconstrained = 0,
  66         hubp_ind_block_64b,
  67         hubp_ind_block_128b,
  68         hubp_ind_block_64b_no_128bcl,
  69 };
  70
  71 enum hubp_3dlut_fl_mode {
  72         hubp_3dlut_fl_mode_disable = 0,
  73         hubp_3dlut_fl_mode_native_1 = 1,
  74         hubp_3dlut_fl_mode_native_2 = 2,
  75         hubp_3dlut_fl_mode_transform = 3
  76 };
  77
  78 enum hubp_3dlut_fl_format {
  79         hubp_3dlut_fl_format_unorm_12msb_bitslice = 0,
  80         hubp_3dlut_fl_format_unorm_12lsb_bitslice = 1,
  81         hubp_3dlut_fl_format_float_fp1_5_10 = 2
  82 };
  83
  84 enum hubp_3dlut_fl_addressing_mode {
  85         hubp_3dlut_fl_addressing_mode_sw_linear = 0,
  86         hubp_3dlut_fl_addressing_mode_simple_linear = 1
  87 };
  88
  89 enum hubp_3dlut_fl_width {
  90         hubp_3dlut_fl_width_17 = 17,
  91         hubp_3dlut_fl_width_33 = 33,
  92         hubp_3dlut_fl_width_transformed = 4916
  93 };
  94
  95 enum hubp_3dlut_fl_crossbar_bit_slice {
  96         hubp_3dlut_fl_crossbar_bit_slice_0_15 = 0,
  97         hubp_3dlut_fl_crossbar_bit_slice_16_31 = 1,
  98         hubp_3dlut_fl_crossbar_bit_slice_32_47 = 2,
  99         hubp_3dlut_fl_crossbar_bit_slice_48_63 = 3
 100 };
 101
 102 struct hubp {
 103         const struct hubp_funcs *funcs;
 104         struct dc_context *ctx;
 105         struct dc_plane_address request_address;
 106         int inst;
 107
 108         /* run time states */
 109         int opp_id;
 110         int mpcc_id;
 111         struct dc_cursor_attributes curs_attr;
 112         struct dc_cursor_position curs_pos;
 113         bool power_gated;
 114
 115         struct cursor_position_cache_hubp  pos;
 116         struct cursor_attribute_cache_hubp att;
 117         struct cursor_rect cur_rect;
 118 };
 119
 120 struct surface_flip_registers {
 121         uint32_t DCSURF_SURFACE_CONTROL;
 122         uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH;
 123         uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS;
 124         uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH;
 125         uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS;
 126         uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C;
 127         uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_C;
 128         uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C;
 129         uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_C;
 130         uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH;
 131         uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS;
 132         uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH;
 133         uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS;
 134         bool tmz_surface;
 135         bool immediate;
 136         uint8_t vmid;
 137         bool grph_stereo;
 138 };
 139
 140 struct hubp_funcs {
 141         void (*hubp_setup)(
 142                         struct hubp *hubp,
 143                         struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
 144                         struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
 145                         struct _vcs_dpi_display_rq_regs_st *rq_regs,
 146                         struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest);
 147
 148         void (*hubp_setup2)(
 149                 struct hubp *hubp,
 150                 struct dml2_dchub_per_pipe_register_set *pipe_regs,
 151                 union dml2_global_sync_programming *pipe_global_sync,
 152                 struct dc_crtc_timing *timing);
 153
 154         void (*hubp_setup_interdependent)(
 155                         struct hubp *hubp,
 156                         struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
 157                         struct _vcs_dpi_display_ttu_regs_st *ttu_regs);
 158
 159         void (*hubp_setup_interdependent2)(
 160                 struct hubp *hubp,
 161                 struct dml2_dchub_per_pipe_register_set *pipe_regs);
 162
 163         void (*dcc_control)(struct hubp *hubp, bool enable,
 164                         enum hubp_ind_block_size blk_size);
 165
 166         void (*mem_program_viewport)(
 167                         struct hubp *hubp,
 168                         const struct rect *viewport,
 169                         const struct rect *viewport_c);
 170
 171         bool (*hubp_program_surface_flip_and_addr)(
 172                 struct hubp *hubp,
 173                 const struct dc_plane_address *address,
 174                 bool flip_immediate);
 175
 176         void (*hubp_program_pte_vm)(
 177                 struct hubp *hubp,
 178                 enum surface_pixel_format format,
 179                 struct dc_tiling_info *tiling_info,
 180                 enum dc_rotation_angle rotation);
 181
 182         void (*hubp_set_vm_system_aperture_settings)(
 183                         struct hubp *hubp,
 184                         struct vm_system_aperture_param *apt);
 185
 186         void (*hubp_set_vm_context0_settings)(
 187                         struct hubp *hubp,
 188                         const struct vm_context0_param *vm0);
 189
 190         void (*hubp_program_surface_config)(
 191                 struct hubp *hubp,
 192                 enum surface_pixel_format format,
 193                 struct dc_tiling_info *tiling_info,
 194                 struct plane_size *plane_size,
 195                 enum dc_rotation_angle rotation,
 196                 struct dc_plane_dcc_param *dcc,
 197                 bool horizontal_mirror,
 198                 unsigned int compa_level);
 199
 200         bool (*hubp_is_flip_pending)(struct hubp *hubp);
 201
 202         void (*set_blank)(struct hubp *hubp, bool blank);
 203         void (*set_blank_regs)(struct hubp *hubp, bool blank);
 204         void (*phantom_hubp_post_enable)(struct hubp *hubp);
 205         void (*set_hubp_blank_en)(struct hubp *hubp, bool blank);
 206
 207         void (*set_cursor_attributes)(
 208                         struct hubp *hubp,
 209                         const struct dc_cursor_attributes *attr);
 210
 211         void (*set_cursor_position)(
 212                         struct hubp *hubp,
 213                         const struct dc_cursor_position *pos,
 214                         const struct dc_cursor_mi_param *param);
 215
 216         void (*hubp_disconnect)(struct hubp *hubp);
 217
 218         void (*hubp_clk_cntl)(struct hubp *hubp, bool enable);
 219         void (*hubp_vtg_sel)(struct hubp *hubp, uint32_t otg_inst);
 220         void (*hubp_read_state)(struct hubp *hubp);
 221         void (*hubp_clear_underflow)(struct hubp *hubp);
 222         void (*hubp_disable_control)(struct hubp *hubp, bool disable_hubp);
 223         unsigned int (*hubp_get_underflow_status)(struct hubp *hubp);
 224         void (*hubp_init)(struct hubp *hubp);
 225
 226         void (*dmdata_set_attributes)(
 227                         struct hubp *hubp,
 228                         const struct dc_dmdata_attributes *attr);
 229
 230         void (*dmdata_load)(
 231                         struct hubp *hubp,
 232                         uint32_t dmdata_sw_size,
 233                         const uint32_t *dmdata_sw_data);
 234         bool (*dmdata_status_done)(struct hubp *hubp);
 235         void (*hubp_enable_tripleBuffer)(
 236                 struct hubp *hubp,
 237                 bool enable);
 238
 239         bool (*hubp_is_triplebuffer_enabled)(
 240                 struct hubp *hubp);
 241
 242         void (*hubp_set_flip_control_surface_gsl)(
 243                 struct hubp *hubp,
 244                 bool enable);
 245
 246         void (*validate_dml_output)(
 247                         struct hubp *hubp,
 248                         struct dc_context *ctx,
 249                         struct _vcs_dpi_display_rq_regs_st *dml_rq_regs,
 250                         struct _vcs_dpi_display_dlg_regs_st *dml_dlg_attr,
 251                         struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr);
 252         void (*set_unbounded_requesting)(
 253                 struct hubp *hubp,
 254                 bool enable);
 255         bool (*hubp_in_blank)(struct hubp *hubp);
 256         void (*hubp_soft_reset)(struct hubp *hubp, bool reset);
 257
 258         void (*hubp_set_flip_int)(struct hubp *hubp);
 259
 260         void (*hubp_update_force_pstate_disallow)(struct hubp *hubp, bool allow);
 261         void (*hubp_update_force_cursor_pstate_disallow)(struct hubp *hubp, bool allow);
 262         void (*hubp_update_mall_sel)(struct hubp *hubp, uint32_t mall_sel, bool c_cursor);
 263         void (*hubp_prepare_subvp_buffering)(struct hubp *hubp, bool enable);
 264         void (*hubp_surface_update_lock)(struct hubp *hubp,
 265                         bool lock);
 266
 267         void (*program_extended_blank)(struct hubp *hubp,
 268                         unsigned int min_dst_y_next_start_optimized);
 269
 270         void (*hubp_wait_pipe_read_start)(struct hubp *hubp);
 271         void (*hubp_program_mcache_id_and_split_coordinate)(struct hubp *hubp, struct dml2_hubp_pipe_mcache_regs *mcache_regs);
 272         void (*hubp_update_3dlut_fl_bias_scale)(struct hubp *hubp, uint16_t bias, uint16_t scale);
 273         void (*hubp_program_3dlut_fl_mode)(struct hubp *hubp,
 274                         enum hubp_3dlut_fl_mode mode);
 275         void (*hubp_program_3dlut_fl_format)(struct hubp *hubp,
 276                         enum hubp_3dlut_fl_format format);
 277         void (*hubp_program_3dlut_fl_addr)(struct hubp *hubp,
 278                 const struct dc_plane_address address);
 279         void (*hubp_program_3dlut_fl_dlg_param)(struct hubp *hubp, int refcyc_per_3dlut_group);
 280         void (*hubp_enable_3dlut_fl)(struct hubp *hubp, bool enable);
 281         void (*hubp_program_3dlut_fl_addressing_mode)(struct hubp *hubp, enum hubp_3dlut_fl_addressing_mode addr_mode);
 282         void (*hubp_program_3dlut_fl_width)(struct hubp *hubp, enum hubp_3dlut_fl_width width);
 283         void (*hubp_program_3dlut_fl_tmz_protected)(struct hubp *hubp, bool protection_enabled);
 284         void (*hubp_program_3dlut_fl_crossbar)(struct hubp *hubp,
 285                         enum hubp_3dlut_fl_crossbar_bit_slice bit_slice_y_g,
 286                         enum hubp_3dlut_fl_crossbar_bit_slice bit_slice_cb_b,
 287                         enum hubp_3dlut_fl_crossbar_bit_slice bit_slice_cr_r);
 288         int (*hubp_get_3dlut_fl_done)(struct hubp *hubp);
 289         void (*hubp_clear_tiling)(struct hubp *hubp);
 290 };
 291
 292 #endif