drivers/gpu/drm/amd/amdkfd/kfd_chardev.c

   1 // SPDX-License-Identifier: GPL-2.0 OR MIT
   2 /*
   3  * Copyright 2014-2022 Advanced Micro Devices, Inc.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be included in
  13  * all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  21  * OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #include <linux/device.h>
  25 #include <linux/export.h>
  26 #include <linux/err.h>
  27 #include <linux/fs.h>
  28 #include <linux/file.h>
  29 #include <linux/sched.h>
  30 #include <linux/slab.h>
  31 #include <linux/uaccess.h>
  32 #include <linux/compat.h>
  33 #include <uapi/linux/kfd_ioctl.h>
  34 #include <linux/time.h>
  35 #include <linux/mm.h>
  36 #include <linux/mman.h>
  37 #include <linux/ptrace.h>
  38 #include <linux/dma-buf.h>
  39 #include <linux/fdtable.h>
  40 #include <linux/processor.h>
  41 #include "kfd_priv.h"
  42 #include "kfd_device_queue_manager.h"
  43 #include "kfd_svm.h"
  44 #include "amdgpu_amdkfd.h"
  45 #include "kfd_smi_events.h"
  46 #include "amdgpu_dma_buf.h"
  47 #include "kfd_debug.h"
  48
  49 static long kfd_ioctl(struct file *, unsigned int, unsigned long);
  50 static int kfd_open(struct inode *, struct file *);
  51 static int kfd_release(struct inode *, struct file *);
  52 static int kfd_mmap(struct file *, struct vm_area_struct *);
  53
  54 static const char kfd_dev_name[] = "kfd";
  55
  56 static const struct file_operations kfd_fops = {
  57         .owner = THIS_MODULE,
  58         .unlocked_ioctl = kfd_ioctl,
  59         .compat_ioctl = compat_ptr_ioctl,
  60         .open = kfd_open,
  61         .release = kfd_release,
  62         .mmap = kfd_mmap,
  63 };
  64
  65 static int kfd_char_dev_major = -1;
  66 static struct class *kfd_class;
  67 struct device *kfd_device;
  68
  69 static inline struct kfd_process_device *kfd_lock_pdd_by_id(struct kfd_process *p, __u32 gpu_id)
  70 {
  71         struct kfd_process_device *pdd;
  72
  73         mutex_lock(&p->mutex);
  74         pdd = kfd_process_device_data_by_id(p, gpu_id);
  75
  76         if (pdd)
  77                 return pdd;
  78
  79         mutex_unlock(&p->mutex);
  80         return NULL;
  81 }
  82
  83 static inline void kfd_unlock_pdd(struct kfd_process_device *pdd)
  84 {
  85         mutex_unlock(&pdd->process->mutex);
  86 }
  87
  88 int kfd_chardev_init(void)
  89 {
  90         int err = 0;
  91
  92         kfd_char_dev_major = register_chrdev(0, kfd_dev_name, &kfd_fops);
  93         err = kfd_char_dev_major;
  94         if (err < 0)
  95                 goto err_register_chrdev;
  96
  97         kfd_class = class_create(kfd_dev_name);
  98         err = PTR_ERR(kfd_class);
  99         if (IS_ERR(kfd_class))
 100                 goto err_class_create;
 101
 102         kfd_device = device_create(kfd_class, NULL,
 103                                         MKDEV(kfd_char_dev_major, 0),
 104                                         NULL, kfd_dev_name);
 105         err = PTR_ERR(kfd_device);
 106         if (IS_ERR(kfd_device))
 107                 goto err_device_create;
 108
 109         return 0;
 110
 111 err_device_create:
 112         class_destroy(kfd_class);
 113 err_class_create:
 114         unregister_chrdev(kfd_char_dev_major, kfd_dev_name);
 115 err_register_chrdev:
 116         return err;
 117 }
 118
 119 void kfd_chardev_exit(void)
 120 {
 121         device_destroy(kfd_class, MKDEV(kfd_char_dev_major, 0));
 122         class_destroy(kfd_class);
 123         unregister_chrdev(kfd_char_dev_major, kfd_dev_name);
 124         kfd_device = NULL;
 125 }
 126
 127
 128 static int kfd_open(struct inode *inode, struct file *filep)
 129 {
 130         struct kfd_process *process;
 131         bool is_32bit_user_mode;
 132
 133         if (iminor(inode) != 0)
 134                 return -ENODEV;
 135
 136         is_32bit_user_mode = in_compat_syscall();
 137
 138         if (is_32bit_user_mode) {
 139                 dev_warn(kfd_device,
 140                         "Process %d (32-bit) failed to open /dev/kfd\n"
 141                         "32-bit processes are not supported by amdkfd\n",
 142                         current->pid);
 143                 return -EPERM;
 144         }
 145
 146         process = kfd_create_process(current);
 147         if (IS_ERR(process))
 148                 return PTR_ERR(process);
 149
 150         if (kfd_process_init_cwsr_apu(process, filep)) {
 151                 kfd_unref_process(process);
 152                 return -EFAULT;
 153         }
 154
 155         /* filep now owns the reference returned by kfd_create_process */
 156         filep->private_data = process;
 157
 158         dev_dbg(kfd_device, "process %d opened, compat mode (32 bit) - %d\n",
 159                 process->pasid, process->is_32bit_user_mode);
 160
 161         return 0;
 162 }
 163
 164 static int kfd_release(struct inode *inode, struct file *filep)
 165 {
 166         struct kfd_process *process = filep->private_data;
 167
 168         if (process)
 169                 kfd_unref_process(process);
 170
 171         return 0;
 172 }
 173
 174 static int kfd_ioctl_get_version(struct file *filep, struct kfd_process *p,
 175                                         void *data)
 176 {
 177         struct kfd_ioctl_get_version_args *args = data;
 178
 179         args->major_version = KFD_IOCTL_MAJOR_VERSION;
 180         args->minor_version = KFD_IOCTL_MINOR_VERSION;
 181
 182         return 0;
 183 }
 184
 185 static int set_queue_properties_from_user(struct queue_properties *q_properties,
 186                                 struct kfd_ioctl_create_queue_args *args)
 187 {
 188         /*
 189          * Repurpose queue percentage to accommodate new features:
 190          * bit 0-7: queue percentage
 191          * bit 8-15: pm4_target_xcc
 192          */
 193         if ((args->queue_percentage & 0xFF) > KFD_MAX_QUEUE_PERCENTAGE) {
 194                 pr_err("Queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n");
 195                 return -EINVAL;
 196         }
 197
 198         if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) {
 199                 pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n");
 200                 return -EINVAL;
 201         }
 202
 203         if ((args->ring_base_address) &&
 204                 (!access_ok((const void __user *) args->ring_base_address,
 205                         sizeof(uint64_t)))) {
 206                 pr_err("Can't access ring base address\n");
 207                 return -EFAULT;
 208         }
 209
 210         if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) {
 211                 pr_err("Ring size must be a power of 2 or 0\n");
 212                 return -EINVAL;
 213         }
 214
 215         if (!access_ok((const void __user *) args->read_pointer_address,
 216                         sizeof(uint32_t))) {
 217                 pr_err("Can't access read pointer\n");
 218                 return -EFAULT;
 219         }
 220
 221         if (!access_ok((const void __user *) args->write_pointer_address,
 222                         sizeof(uint32_t))) {
 223                 pr_err("Can't access write pointer\n");
 224                 return -EFAULT;
 225         }
 226
 227         if (args->eop_buffer_address &&
 228                 !access_ok((const void __user *) args->eop_buffer_address,
 229                         sizeof(uint32_t))) {
 230                 pr_debug("Can't access eop buffer");
 231                 return -EFAULT;
 232         }
 233
 234         if (args->ctx_save_restore_address &&
 235                 !access_ok((const void __user *) args->ctx_save_restore_address,
 236                         sizeof(uint32_t))) {
 237                 pr_debug("Can't access ctx save restore buffer");
 238                 return -EFAULT;
 239         }
 240
 241         q_properties->is_interop = false;
 242         q_properties->is_gws = false;
 243         q_properties->queue_percent = args->queue_percentage & 0xFF;
 244         /* bit 8-15 are repurposed to be PM4 target XCC */
 245         q_properties->pm4_target_xcc = (args->queue_percentage >> 8) & 0xFF;
 246         q_properties->priority = args->queue_priority;
 247         q_properties->queue_address = args->ring_base_address;
 248         q_properties->queue_size = args->ring_size;
 249         q_properties->read_ptr = (uint32_t *) args->read_pointer_address;
 250         q_properties->write_ptr = (uint32_t *) args->write_pointer_address;
 251         q_properties->eop_ring_buffer_address = args->eop_buffer_address;
 252         q_properties->eop_ring_buffer_size = args->eop_buffer_size;
 253         q_properties->ctx_save_restore_area_address =
 254                         args->ctx_save_restore_address;
 255         q_properties->ctx_save_restore_area_size = args->ctx_save_restore_size;
 256         q_properties->ctl_stack_size = args->ctl_stack_size;
 257         if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE ||
 258                 args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL)
 259                 q_properties->type = KFD_QUEUE_TYPE_COMPUTE;
 260         else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA)
 261                 q_properties->type = KFD_QUEUE_TYPE_SDMA;
 262         else if (args->queue_type == KFD_IOC_QUEUE_TYPE_SDMA_XGMI)
 263                 q_properties->type = KFD_QUEUE_TYPE_SDMA_XGMI;
 264         else
 265                 return -ENOTSUPP;
 266
 267         if (args->queue_type == KFD_IOC_QUEUE_TYPE_COMPUTE_AQL)
 268                 q_properties->format = KFD_QUEUE_FORMAT_AQL;
 269         else
 270                 q_properties->format = KFD_QUEUE_FORMAT_PM4;
 271
 272         pr_debug("Queue Percentage: %d, %d\n",
 273                         q_properties->queue_percent, args->queue_percentage);
 274
 275         pr_debug("Queue Priority: %d, %d\n",
 276                         q_properties->priority, args->queue_priority);
 277
 278         pr_debug("Queue Address: 0x%llX, 0x%llX\n",
 279                         q_properties->queue_address, args->ring_base_address);
 280
 281         pr_debug("Queue Size: 0x%llX, %u\n",
 282                         q_properties->queue_size, args->ring_size);
 283
 284         pr_debug("Queue r/w Pointers: %px, %px\n",
 285                         q_properties->read_ptr,
 286                         q_properties->write_ptr);
 287
 288         pr_debug("Queue Format: %d\n", q_properties->format);
 289
 290         pr_debug("Queue EOP: 0x%llX\n", q_properties->eop_ring_buffer_address);
 291
 292         pr_debug("Queue CTX save area: 0x%llX\n",
 293                         q_properties->ctx_save_restore_area_address);
 294
 295         return 0;
 296 }
 297
 298 static int kfd_ioctl_create_queue(struct file *filep, struct kfd_process *p,
 299                                         void *data)
 300 {
 301         struct kfd_ioctl_create_queue_args *args = data;
 302         struct kfd_node *dev;
 303         int err = 0;
 304         unsigned int queue_id;
 305         struct kfd_process_device *pdd;
 306         struct queue_properties q_properties;
 307         uint32_t doorbell_offset_in_process = 0;
 308         struct amdgpu_bo *wptr_bo = NULL;
 309
 310         memset(&q_properties, 0, sizeof(struct queue_properties));
 311
 312         pr_debug("Creating queue ioctl\n");
 313
 314         err = set_queue_properties_from_user(&q_properties, args);
 315         if (err)
 316                 return err;
 317
 318         pr_debug("Looking for gpu id 0x%x\n", args->gpu_id);
 319
 320         mutex_lock(&p->mutex);
 321
 322         pdd = kfd_process_device_data_by_id(p, args->gpu_id);
 323         if (!pdd) {
 324                 pr_debug("Could not find gpu id 0x%x\n", args->gpu_id);
 325                 err = -EINVAL;
 326                 goto err_pdd;
 327         }
 328         dev = pdd->dev;
 329
 330         pdd = kfd_bind_process_to_device(dev, p);
 331         if (IS_ERR(pdd)) {
 332                 err = -ESRCH;
 333                 goto err_bind_process;
 334         }
 335
 336         if (!pdd->qpd.proc_doorbells) {
 337                 err = kfd_alloc_process_doorbells(dev->kfd, pdd);
 338                 if (err) {
 339                         pr_debug("failed to allocate process doorbells\n");
 340                         goto err_bind_process;
 341                 }
 342         }
 343
 344         /* Starting with GFX11, wptr BOs must be mapped to GART for MES to determine work
 345          * on unmapped queues for usermode queue oversubscription (no aggregated doorbell)
 346          */
 347         if (dev->kfd->shared_resources.enable_mes &&
 348                         ((dev->adev->mes.sched_version & AMDGPU_MES_API_VERSION_MASK)
 349                         >> AMDGPU_MES_API_VERSION_SHIFT) >= 2) {
 350                 struct amdgpu_bo_va_mapping *wptr_mapping;
 351                 struct amdgpu_vm *wptr_vm;
 352
 353                 wptr_vm = drm_priv_to_vm(pdd->drm_priv);
 354                 err = amdgpu_bo_reserve(wptr_vm->root.bo, false);
 355                 if (err)
 356                         goto err_wptr_map_gart;
 357
 358                 wptr_mapping = amdgpu_vm_bo_lookup_mapping(
 359                                 wptr_vm, args->write_pointer_address >> PAGE_SHIFT);
 360                 amdgpu_bo_unreserve(wptr_vm->root.bo);
 361                 if (!wptr_mapping) {
 362                         pr_err("Failed to lookup wptr bo\n");
 363                         err = -EINVAL;
 364                         goto err_wptr_map_gart;
 365                 }
 366
 367                 wptr_bo = wptr_mapping->bo_va->base.bo;
 368                 if (wptr_bo->tbo.base.size > PAGE_SIZE) {
 369                         pr_err("Requested GART mapping for wptr bo larger than one page\n");
 370                         err = -EINVAL;
 371                         goto err_wptr_map_gart;
 372                 }
 373
 374                 err = amdgpu_amdkfd_map_gtt_bo_to_gart(dev->adev, wptr_bo);
 375                 if (err) {
 376                         pr_err("Failed to map wptr bo to GART\n");
 377                         goto err_wptr_map_gart;
 378                 }
 379         }
 380
 381         pr_debug("Creating queue for PASID 0x%x on gpu 0x%x\n",
 382                         p->pasid,
 383                         dev->id);
 384
 385         err = pqm_create_queue(&p->pqm, dev, filep, &q_properties, &queue_id, wptr_bo,
 386                         NULL, NULL, NULL, &doorbell_offset_in_process);
 387         if (err != 0)
 388                 goto err_create_queue;
 389
 390         args->queue_id = queue_id;
 391
 392
 393         /* Return gpu_id as doorbell offset for mmap usage */
 394         args->doorbell_offset = KFD_MMAP_TYPE_DOORBELL;
 395         args->doorbell_offset |= KFD_MMAP_GPU_ID(args->gpu_id);
 396         if (KFD_IS_SOC15(dev))
 397                 /* On SOC15 ASICs, include the doorbell offset within the
 398                  * process doorbell frame, which is 2 pages.
 399                  */
 400                 args->doorbell_offset |= doorbell_offset_in_process;
 401
 402         mutex_unlock(&p->mutex);
 403
 404         pr_debug("Queue id %d was created successfully\n", args->queue_id);
 405
 406         pr_debug("Ring buffer address == 0x%016llX\n",
 407                         args->ring_base_address);
 408
 409         pr_debug("Read ptr address    == 0x%016llX\n",
 410                         args->read_pointer_address);
 411
 412         pr_debug("Write ptr address   == 0x%016llX\n",
 413                         args->write_pointer_address);
 414
 415         kfd_dbg_ev_raise(KFD_EC_MASK(EC_QUEUE_NEW), p, dev, queue_id, false, NULL, 0);
 416         return 0;
 417
 418 err_create_queue:
 419         if (wptr_bo)
 420                 amdgpu_amdkfd_free_gtt_mem(dev->adev, wptr_bo);
 421 err_wptr_map_gart:
 422 err_bind_process:
 423 err_pdd:
 424         mutex_unlock(&p->mutex);
 425         return err;
 426 }
 427
 428 static int kfd_ioctl_destroy_queue(struct file *filp, struct kfd_process *p,
 429                                         void *data)
 430 {
 431         int retval;
 432         struct kfd_ioctl_destroy_queue_args *args = data;
 433
 434         pr_debug("Destroying queue id %d for pasid 0x%x\n",
 435                                 args->queue_id,
 436                                 p->pasid);
 437
 438         mutex_lock(&p->mutex);
 439
 440         retval = pqm_destroy_queue(&p->pqm, args->queue_id);
 441
 442         mutex_unlock(&p->mutex);
 443         return retval;
 444 }
 445
 446 static int kfd_ioctl_update_queue(struct file *filp, struct kfd_process *p,
 447                                         void *data)
 448 {
 449         int retval;
 450         struct kfd_ioctl_update_queue_args *args = data;
 451         struct queue_properties properties;
 452
 453         /*
 454          * Repurpose queue percentage to accommodate new features:
 455          * bit 0-7: queue percentage
 456          * bit 8-15: pm4_target_xcc
 457          */
 458         if ((args->queue_percentage & 0xFF) > KFD_MAX_QUEUE_PERCENTAGE) {
 459                 pr_err("Queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n");
 460                 return -EINVAL;
 461         }
 462
 463         if (args->queue_priority > KFD_MAX_QUEUE_PRIORITY) {
 464                 pr_err("Queue priority must be between 0 to KFD_MAX_QUEUE_PRIORITY\n");
 465                 return -EINVAL;
 466         }
 467
 468         if ((args->ring_base_address) &&
 469                 (!access_ok((const void __user *) args->ring_base_address,
 470                         sizeof(uint64_t)))) {
 471                 pr_err("Can't access ring base address\n");
 472                 return -EFAULT;
 473         }
 474
 475         if (!is_power_of_2(args->ring_size) && (args->ring_size != 0)) {
 476                 pr_err("Ring size must be a power of 2 or 0\n");
 477                 return -EINVAL;
 478         }
 479
 480         properties.queue_address = args->ring_base_address;
 481         properties.queue_size = args->ring_size;
 482         properties.queue_percent = args->queue_percentage & 0xFF;
 483         /* bit 8-15 are repurposed to be PM4 target XCC */
 484         properties.pm4_target_xcc = (args->queue_percentage >> 8) & 0xFF;
 485         properties.priority = args->queue_priority;
 486
 487         pr_debug("Updating queue id %d for pasid 0x%x\n",
 488                         args->queue_id, p->pasid);
 489
 490         mutex_lock(&p->mutex);
 491
 492         retval = pqm_update_queue_properties(&p->pqm, args->queue_id, &properties);
 493
 494         mutex_unlock(&p->mutex);
 495
 496         return retval;
 497 }
 498
 499 static int kfd_ioctl_set_cu_mask(struct file *filp, struct kfd_process *p,
 500                                         void *data)
 501 {
 502         int retval;
 503         const int max_num_cus = 1024;
 504         struct kfd_ioctl_set_cu_mask_args *args = data;
 505         struct mqd_update_info minfo = {0};
 506         uint32_t __user *cu_mask_ptr = (uint32_t __user *)args->cu_mask_ptr;
 507         size_t cu_mask_size = sizeof(uint32_t) * (args->num_cu_mask / 32);
 508
 509         if ((args->num_cu_mask % 32) != 0) {
 510                 pr_debug("num_cu_mask 0x%x must be a multiple of 32",
 511                                 args->num_cu_mask);
 512                 return -EINVAL;
 513         }
 514
 515         minfo.cu_mask.count = args->num_cu_mask;
 516         if (minfo.cu_mask.count == 0) {
 517                 pr_debug("CU mask cannot be 0");
 518                 return -EINVAL;
 519         }
 520
 521         /* To prevent an unreasonably large CU mask size, set an arbitrary
 522          * limit of max_num_cus bits.  We can then just drop any CU mask bits
 523          * past max_num_cus bits and just use the first max_num_cus bits.
 524          */
 525         if (minfo.cu_mask.count > max_num_cus) {
 526                 pr_debug("CU mask cannot be greater than 1024 bits");
 527                 minfo.cu_mask.count = max_num_cus;
 528                 cu_mask_size = sizeof(uint32_t) * (max_num_cus/32);
 529         }
 530
 531         minfo.cu_mask.ptr = kzalloc(cu_mask_size, GFP_KERNEL);
 532         if (!minfo.cu_mask.ptr)
 533                 return -ENOMEM;
 534
 535         retval = copy_from_user(minfo.cu_mask.ptr, cu_mask_ptr, cu_mask_size);
 536         if (retval) {
 537                 pr_debug("Could not copy CU mask from userspace");
 538                 retval = -EFAULT;
 539                 goto out;
 540         }
 541
 542         mutex_lock(&p->mutex);
 543
 544         retval = pqm_update_mqd(&p->pqm, args->queue_id, &minfo);
 545
 546         mutex_unlock(&p->mutex);
 547
 548 out:
 549         kfree(minfo.cu_mask.ptr);
 550         return retval;
 551 }
 552
 553 static int kfd_ioctl_get_queue_wave_state(struct file *filep,
 554                                           struct kfd_process *p, void *data)
 555 {
 556         struct kfd_ioctl_get_queue_wave_state_args *args = data;
 557         int r;
 558
 559         mutex_lock(&p->mutex);
 560
 561         r = pqm_get_wave_state(&p->pqm, args->queue_id,
 562                                (void __user *)args->ctl_stack_address,
 563                                &args->ctl_stack_used_size,
 564                                &args->save_area_used_size);
 565
 566         mutex_unlock(&p->mutex);
 567
 568         return r;
 569 }
 570
 571 static int kfd_ioctl_set_memory_policy(struct file *filep,
 572                                         struct kfd_process *p, void *data)
 573 {
 574         struct kfd_ioctl_set_memory_policy_args *args = data;
 575         int err = 0;
 576         struct kfd_process_device *pdd;
 577         enum cache_policy default_policy, alternate_policy;
 578
 579         if (args->default_policy != KFD_IOC_CACHE_POLICY_COHERENT
 580             && args->default_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) {
 581                 return -EINVAL;
 582         }
 583
 584         if (args->alternate_policy != KFD_IOC_CACHE_POLICY_COHERENT
 585             && args->alternate_policy != KFD_IOC_CACHE_POLICY_NONCOHERENT) {
 586                 return -EINVAL;
 587         }
 588
 589         mutex_lock(&p->mutex);
 590         pdd = kfd_process_device_data_by_id(p, args->gpu_id);
 591         if (!pdd) {
 592                 pr_debug("Could not find gpu id 0x%x\n", args->gpu_id);
 593                 err = -EINVAL;
 594                 goto err_pdd;
 595         }
 596
 597         pdd = kfd_bind_process_to_device(pdd->dev, p);
 598         if (IS_ERR(pdd)) {
 599                 err = -ESRCH;
 600                 goto out;
 601         }
 602
 603         default_policy = (args->default_policy == KFD_IOC_CACHE_POLICY_COHERENT)
 604                          ? cache_policy_coherent : cache_policy_noncoherent;
 605
 606         alternate_policy =
 607                 (args->alternate_policy == KFD_IOC_CACHE_POLICY_COHERENT)
 608                    ? cache_policy_coherent : cache_policy_noncoherent;
 609
 610         if (!pdd->dev->dqm->ops.set_cache_memory_policy(pdd->dev->dqm,
 611                                 &pdd->qpd,
 612                                 default_policy,
 613                                 alternate_policy,
 614                                 (void __user *)args->alternate_aperture_base,
 615                                 args->alternate_aperture_size))
 616                 err = -EINVAL;
 617
 618 out:
 619 err_pdd:
 620         mutex_unlock(&p->mutex);
 621
 622         return err;
 623 }
 624
 625 static int kfd_ioctl_set_trap_handler(struct file *filep,
 626                                         struct kfd_process *p, void *data)
 627 {
 628         struct kfd_ioctl_set_trap_handler_args *args = data;
 629         int err = 0;
 630         struct kfd_process_device *pdd;
 631
 632         mutex_lock(&p->mutex);
 633
 634         pdd = kfd_process_device_data_by_id(p, args->gpu_id);
 635         if (!pdd) {
 636                 err = -EINVAL;
 637                 goto err_pdd;
 638         }
 639
 640         pdd = kfd_bind_process_to_device(pdd->dev, p);
 641         if (IS_ERR(pdd)) {
 642                 err = -ESRCH;
 643                 goto out;
 644         }
 645
 646         kfd_process_set_trap_handler(&pdd->qpd, args->tba_addr, args->tma_addr);
 647
 648 out:
 649 err_pdd:
 650         mutex_unlock(&p->mutex);
 651
 652         return err;
 653 }
 654
 655 static int kfd_ioctl_dbg_register(struct file *filep,
 656                                 struct kfd_process *p, void *data)
 657 {
 658         return -EPERM;
 659 }
 660
 661 static int kfd_ioctl_dbg_unregister(struct file *filep,
 662                                 struct kfd_process *p, void *data)
 663 {
 664         return -EPERM;
 665 }
 666
 667 static int kfd_ioctl_dbg_address_watch(struct file *filep,
 668                                         struct kfd_process *p, void *data)
 669 {
 670         return -EPERM;
 671 }
 672
 673 /* Parse and generate fixed size data structure for wave control */
 674 static int kfd_ioctl_dbg_wave_control(struct file *filep,
 675                                         struct kfd_process *p, void *data)
 676 {
 677         return -EPERM;
 678 }
 679
 680 static int kfd_ioctl_get_clock_counters(struct file *filep,
 681                                 struct kfd_process *p, void *data)
 682 {
 683         struct kfd_ioctl_get_clock_counters_args *args = data;
 684         struct kfd_process_device *pdd;
 685
 686         mutex_lock(&p->mutex);
 687         pdd = kfd_process_device_data_by_id(p, args->gpu_id);
 688         mutex_unlock(&p->mutex);
 689         if (pdd)
 690                 /* Reading GPU clock counter from KGD */
 691                 args->gpu_clock_counter = amdgpu_amdkfd_get_gpu_clock_counter(pdd->dev->adev);
 692         else
 693                 /* Node without GPU resource */
 694                 args->gpu_clock_counter = 0;
 695
 696         /* No access to rdtsc. Using raw monotonic time */
 697         args->cpu_clock_counter = ktime_get_raw_ns();
 698         args->system_clock_counter = ktime_get_boottime_ns();
 699
 700         /* Since the counter is in nano-seconds we use 1GHz frequency */
 701         args->system_clock_freq = 1000000000;
 702
 703         return 0;
 704 }
 705
 706
 707 static int kfd_ioctl_get_process_apertures(struct file *filp,
 708                                 struct kfd_process *p, void *data)
 709 {
 710         struct kfd_ioctl_get_process_apertures_args *args = data;
 711         struct kfd_process_device_apertures *pAperture;
 712         int i;
 713
 714         dev_dbg(kfd_device, "get apertures for PASID 0x%x", p->pasid);
 715
 716         args->num_of_nodes = 0;
 717
 718         mutex_lock(&p->mutex);
 719         /* Run over all pdd of the process */
 720         for (i = 0; i < p->n_pdds; i++) {
 721                 struct kfd_process_device *pdd = p->pdds[i];
 722
 723                 pAperture =
 724                         &args->process_apertures[args->num_of_nodes];
 725                 pAperture->gpu_id = pdd->dev->id;
 726                 pAperture->lds_base = pdd->lds_base;
 727                 pAperture->lds_limit = pdd->lds_limit;
 728                 pAperture->gpuvm_base = pdd->gpuvm_base;
 729                 pAperture->gpuvm_limit = pdd->gpuvm_limit;
 730                 pAperture->scratch_base = pdd->scratch_base;
 731                 pAperture->scratch_limit = pdd->scratch_limit;
 732
 733                 dev_dbg(kfd_device,
 734                         "node id %u\n", args->num_of_nodes);
 735                 dev_dbg(kfd_device,
 736                         "gpu id %u\n", pdd->dev->id);
 737                 dev_dbg(kfd_device,
 738                         "lds_base %llX\n", pdd->lds_base);
 739                 dev_dbg(kfd_device,
 740                         "lds_limit %llX\n", pdd->lds_limit);
 741                 dev_dbg(kfd_device,
 742                         "gpuvm_base %llX\n", pdd->gpuvm_base);
 743                 dev_dbg(kfd_device,
 744                         "gpuvm_limit %llX\n", pdd->gpuvm_limit);
 745                 dev_dbg(kfd_device,
 746                         "scratch_base %llX\n", pdd->scratch_base);
 747                 dev_dbg(kfd_device,
 748                         "scratch_limit %llX\n", pdd->scratch_limit);
 749
 750                 if (++args->num_of_nodes >= NUM_OF_SUPPORTED_GPUS)
 751                         break;
 752         }
 753         mutex_unlock(&p->mutex);
 754
 755         return 0;
 756 }
 757
 758 static int kfd_ioctl_get_process_apertures_new(struct file *filp,
 759                                 struct kfd_process *p, void *data)
 760 {
 761         struct kfd_ioctl_get_process_apertures_new_args *args = data;
 762         struct kfd_process_device_apertures *pa;
 763         int ret;
 764         int i;
 765
 766         dev_dbg(kfd_device, "get apertures for PASID 0x%x", p->pasid);
 767
 768         if (args->num_of_nodes == 0) {
 769                 /* Return number of nodes, so that user space can alloacate
 770                  * sufficient memory
 771                  */
 772                 mutex_lock(&p->mutex);
 773                 args->num_of_nodes = p->n_pdds;
 774                 goto out_unlock;
 775         }
 776
 777         /* Fill in process-aperture information for all available
 778          * nodes, but not more than args->num_of_nodes as that is
 779          * the amount of memory allocated by user
 780          */
 781         pa = kzalloc((sizeof(struct kfd_process_device_apertures) *
 782                                 args->num_of_nodes), GFP_KERNEL);
 783         if (!pa)
 784                 return -ENOMEM;
 785
 786         mutex_lock(&p->mutex);
 787
 788         if (!p->n_pdds) {
 789                 args->num_of_nodes = 0;
 790                 kfree(pa);
 791                 goto out_unlock;
 792         }
 793
 794         /* Run over all pdd of the process */
 795         for (i = 0; i < min(p->n_pdds, args->num_of_nodes); i++) {
 796                 struct kfd_process_device *pdd = p->pdds[i];
 797
 798                 pa[i].gpu_id = pdd->dev->id;
 799                 pa[i].lds_base = pdd->lds_base;
 800                 pa[i].lds_limit = pdd->lds_limit;
 801                 pa[i].gpuvm_base = pdd->gpuvm_base;
 802                 pa[i].gpuvm_limit = pdd->gpuvm_limit;
 803                 pa[i].scratch_base = pdd->scratch_base;
 804                 pa[i].scratch_limit = pdd->scratch_limit;
 805
 806                 dev_dbg(kfd_device,
 807                         "gpu id %u\n", pdd->dev->id);
 808                 dev_dbg(kfd_device,
 809                         "lds_base %llX\n", pdd->lds_base);
 810                 dev_dbg(kfd_device,
 811                         "lds_limit %llX\n", pdd->lds_limit);
 812                 dev_dbg(kfd_device,
 813                         "gpuvm_base %llX\n", pdd->gpuvm_base);
 814                 dev_dbg(kfd_device,
 815                         "gpuvm_limit %llX\n", pdd->gpuvm_limit);
 816                 dev_dbg(kfd_device,
 817                         "scratch_base %llX\n", pdd->scratch_base);
 818                 dev_dbg(kfd_device,
 819                         "scratch_limit %llX\n", pdd->scratch_limit);
 820         }
 821         mutex_unlock(&p->mutex);
 822
 823         args->num_of_nodes = i;
 824         ret = copy_to_user(
 825                         (void __user *)args->kfd_process_device_apertures_ptr,
 826                         pa,
 827                         (i * sizeof(struct kfd_process_device_apertures)));
 828         kfree(pa);
 829         return ret ? -EFAULT : 0;
 830
 831 out_unlock:
 832         mutex_unlock(&p->mutex);
 833         return 0;
 834 }
 835
 836 static int kfd_ioctl_create_event(struct file *filp, struct kfd_process *p,
 837                                         void *data)
 838 {
 839         struct kfd_ioctl_create_event_args *args = data;
 840         int err;
 841
 842         /* For dGPUs the event page is allocated in user mode. The
 843          * handle is passed to KFD with the first call to this IOCTL
 844          * through the event_page_offset field.
 845          */
 846         if (args->event_page_offset) {
 847                 mutex_lock(&p->mutex);
 848                 err = kfd_kmap_event_page(p, args->event_page_offset);
 849                 mutex_unlock(&p->mutex);
 850                 if (err)
 851                         return err;
 852         }
 853
 854         err = kfd_event_create(filp, p, args->event_type,
 855                                 args->auto_reset != 0, args->node_id,
 856                                 &args->event_id, &args->event_trigger_data,
 857                                 &args->event_page_offset,
 858                                 &args->event_slot_index);
 859
 860         pr_debug("Created event (id:0x%08x) (%s)\n", args->event_id, __func__);
 861         return err;
 862 }
 863
 864 static int kfd_ioctl_destroy_event(struct file *filp, struct kfd_process *p,
 865                                         void *data)
 866 {
 867         struct kfd_ioctl_destroy_event_args *args = data;
 868
 869         return kfd_event_destroy(p, args->event_id);
 870 }
 871
 872 static int kfd_ioctl_set_event(struct file *filp, struct kfd_process *p,
 873                                 void *data)
 874 {
 875         struct kfd_ioctl_set_event_args *args = data;
 876
 877         return kfd_set_event(p, args->event_id);
 878 }
 879
 880 static int kfd_ioctl_reset_event(struct file *filp, struct kfd_process *p,
 881                                 void *data)
 882 {
 883         struct kfd_ioctl_reset_event_args *args = data;
 884
 885         return kfd_reset_event(p, args->event_id);
 886 }
 887
 888 static int kfd_ioctl_wait_events(struct file *filp, struct kfd_process *p,
 889                                 void *data)
 890 {
 891         struct kfd_ioctl_wait_events_args *args = data;
 892
 893         return kfd_wait_on_events(p, args->num_events,
 894                         (void __user *)args->events_ptr,
 895                         (args->wait_for_all != 0),
 896                         &args->timeout, &args->wait_result);
 897 }
 898 static int kfd_ioctl_set_scratch_backing_va(struct file *filep,
 899                                         struct kfd_process *p, void *data)
 900 {
 901         struct kfd_ioctl_set_scratch_backing_va_args *args = data;
 902         struct kfd_process_device *pdd;
 903         struct kfd_node *dev;
 904         long err;
 905
 906         mutex_lock(&p->mutex);
 907         pdd = kfd_process_device_data_by_id(p, args->gpu_id);
 908         if (!pdd) {
 909                 err = -EINVAL;
 910                 goto err_pdd;
 911         }
 912         dev = pdd->dev;
 913
 914         pdd = kfd_bind_process_to_device(dev, p);
 915         if (IS_ERR(pdd)) {
 916                 err = PTR_ERR(pdd);
 917                 goto bind_process_to_device_fail;
 918         }
 919
 920         pdd->qpd.sh_hidden_private_base = args->va_addr;
 921
 922         mutex_unlock(&p->mutex);
 923
 924         if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS &&
 925             pdd->qpd.vmid != 0 && dev->kfd2kgd->set_scratch_backing_va)
 926                 dev->kfd2kgd->set_scratch_backing_va(
 927                         dev->adev, args->va_addr, pdd->qpd.vmid);
 928
 929         return 0;
 930
 931 bind_process_to_device_fail:
 932 err_pdd:
 933         mutex_unlock(&p->mutex);
 934         return err;
 935 }
 936
 937 static int kfd_ioctl_get_tile_config(struct file *filep,
 938                 struct kfd_process *p, void *data)
 939 {
 940         struct kfd_ioctl_get_tile_config_args *args = data;
 941         struct kfd_process_device *pdd;
 942         struct tile_config config;
 943         int err = 0;
 944
 945         mutex_lock(&p->mutex);
 946         pdd = kfd_process_device_data_by_id(p, args->gpu_id);
 947         mutex_unlock(&p->mutex);
 948         if (!pdd)
 949                 return -EINVAL;
 950
 951         amdgpu_amdkfd_get_tile_config(pdd->dev->adev, &config);
 952
 953         args->gb_addr_config = config.gb_addr_config;
 954         args->num_banks = config.num_banks;
 955         args->num_ranks = config.num_ranks;
 956
 957         if (args->num_tile_configs > config.num_tile_configs)
 958                 args->num_tile_configs = config.num_tile_configs;
 959         err = copy_to_user((void __user *)args->tile_config_ptr,
 960                         config.tile_config_ptr,
 961                         args->num_tile_configs * sizeof(uint32_t));
 962         if (err) {
 963                 args->num_tile_configs = 0;
 964                 return -EFAULT;
 965         }
 966
 967         if (args->num_macro_tile_configs > config.num_macro_tile_configs)
 968                 args->num_macro_tile_configs =
 969                                 config.num_macro_tile_configs;
 970         err = copy_to_user((void __user *)args->macro_tile_config_ptr,
 971                         config.macro_tile_config_ptr,
 972                         args->num_macro_tile_configs * sizeof(uint32_t));
 973         if (err) {
 974                 args->num_macro_tile_configs = 0;
 975                 return -EFAULT;
 976         }
 977
 978         return 0;
 979 }
 980
 981 static int kfd_ioctl_acquire_vm(struct file *filep, struct kfd_process *p,
 982                                 void *data)
 983 {
 984         struct kfd_ioctl_acquire_vm_args *args = data;
 985         struct kfd_process_device *pdd;
 986         struct file *drm_file;
 987         int ret;
 988
 989         drm_file = fget(args->drm_fd);
 990         if (!drm_file)
 991                 return -EINVAL;
 992
 993         mutex_lock(&p->mutex);
 994         pdd = kfd_process_device_data_by_id(p, args->gpu_id);
 995         if (!pdd) {
 996                 ret = -EINVAL;
 997                 goto err_pdd;
 998         }
 999
1000         if (pdd->drm_file) {
1001                 ret = pdd->drm_file == drm_file ? 0 : -EBUSY;
1002                 goto err_drm_file;
1003         }
1004
1005         ret = kfd_process_device_init_vm(pdd, drm_file);
1006         if (ret)
1007                 goto err_unlock;
1008
1009         /* On success, the PDD keeps the drm_file reference */
1010         mutex_unlock(&p->mutex);
1011
1012         return 0;
1013
1014 err_unlock:
1015 err_pdd:
1016 err_drm_file:
1017         mutex_unlock(&p->mutex);
1018         fput(drm_file);
1019         return ret;
1020 }
1021
1022 bool kfd_dev_is_large_bar(struct kfd_node *dev)
1023 {
1024         if (dev->kfd->adev->debug_largebar) {
1025                 pr_debug("Simulate large-bar allocation on non large-bar machine\n");
1026                 return true;
1027         }
1028
1029         if (dev->local_mem_info.local_mem_size_private == 0 &&
1030             dev->local_mem_info.local_mem_size_public > 0)
1031                 return true;
1032
1033         if (dev->local_mem_info.local_mem_size_public == 0 &&
1034             dev->kfd->adev->gmc.is_app_apu) {
1035                 pr_debug("APP APU, Consider like a large bar system\n");
1036                 return true;
1037         }
1038
1039         return false;
1040 }
1041
1042 static int kfd_ioctl_get_available_memory(struct file *filep,
1043                                           struct kfd_process *p, void *data)
1044 {
1045         struct kfd_ioctl_get_available_memory_args *args = data;
1046         struct kfd_process_device *pdd = kfd_lock_pdd_by_id(p, args->gpu_id);
1047
1048         if (!pdd)
1049                 return -EINVAL;
1050         args->available = amdgpu_amdkfd_get_available_memory(pdd->dev->adev,
1051                                                         pdd->dev->node_id);
1052         kfd_unlock_pdd(pdd);
1053         return 0;
1054 }
1055
1056 static int kfd_ioctl_alloc_memory_of_gpu(struct file *filep,
1057                                         struct kfd_process *p, void *data)
1058 {
1059         struct kfd_ioctl_alloc_memory_of_gpu_args *args = data;
1060         struct kfd_process_device *pdd;
1061         void *mem;
1062         struct kfd_node *dev;
1063         int idr_handle;
1064         long err;
1065         uint64_t offset = args->mmap_offset;
1066         uint32_t flags = args->flags;
1067
1068         if (args->size == 0)
1069                 return -EINVAL;
1070
1071 #if IS_ENABLED(CONFIG_HSA_AMD_SVM)
1072         /* Flush pending deferred work to avoid racing with deferred actions
1073          * from previous memory map changes (e.g. munmap).
1074          */
1075         svm_range_list_lock_and_flush_work(&p->svms, current->mm);
1076         mutex_lock(&p->svms.lock);
1077         mmap_write_unlock(current->mm);
1078         if (interval_tree_iter_first(&p->svms.objects,
1079                                      args->va_addr >> PAGE_SHIFT,
1080                                      (args->va_addr + args->size - 1) >> PAGE_SHIFT)) {
1081                 pr_err("Address: 0x%llx already allocated by SVM\n",
1082                         args->va_addr);
1083                 mutex_unlock(&p->svms.lock);
1084                 return -EADDRINUSE;
1085         }
1086
1087         /* When register user buffer check if it has been registered by svm by
1088          * buffer cpu virtual address.
1089          */
1090         if ((flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) &&
1091             interval_tree_iter_first(&p->svms.objects,
1092                                      args->mmap_offset >> PAGE_SHIFT,
1093                                      (args->mmap_offset  + args->size - 1) >> PAGE_SHIFT)) {
1094                 pr_err("User Buffer Address: 0x%llx already allocated by SVM\n",
1095                         args->mmap_offset);
1096                 mutex_unlock(&p->svms.lock);
1097                 return -EADDRINUSE;
1098         }
1099
1100         mutex_unlock(&p->svms.lock);
1101 #endif
1102         mutex_lock(&p->mutex);
1103         pdd = kfd_process_device_data_by_id(p, args->gpu_id);
1104         if (!pdd) {
1105                 err = -EINVAL;
1106                 goto err_pdd;
1107         }
1108
1109         dev = pdd->dev;
1110
1111         if ((flags & KFD_IOC_ALLOC_MEM_FLAGS_PUBLIC) &&
1112                 (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) &&
1113                 !kfd_dev_is_large_bar(dev)) {
1114                 pr_err("Alloc host visible vram on small bar is not allowed\n");
1115                 err = -EINVAL;
1116                 goto err_large_bar;
1117         }
1118
1119         pdd = kfd_bind_process_to_device(dev, p);
1120         if (IS_ERR(pdd)) {
1121                 err = PTR_ERR(pdd);
1122                 goto err_unlock;
1123         }
1124
1125         if (flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) {
1126                 if (args->size != kfd_doorbell_process_slice(dev->kfd)) {
1127                         err = -EINVAL;
1128                         goto err_unlock;
1129                 }
1130                 offset = kfd_get_process_doorbells(pdd);
1131                 if (!offset) {
1132                         err = -ENOMEM;
1133                         goto err_unlock;
1134                 }
1135         } else if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) {
1136                 if (args->size != PAGE_SIZE) {
1137                         err = -EINVAL;
1138                         goto err_unlock;
1139                 }
1140                 offset = dev->adev->rmmio_remap.bus_addr;
1141                 if (!offset) {
1142                         err = -ENOMEM;
1143                         goto err_unlock;
1144                 }
1145         }
1146
1147         err = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(
1148                 dev->adev, args->va_addr, args->size,
1149                 pdd->drm_priv, (struct kgd_mem **) &mem, &offset,
1150                 flags, false);
1151
1152         if (err)
1153                 goto err_unlock;
1154
1155         idr_handle = kfd_process_device_create_obj_handle(pdd, mem);
1156         if (idr_handle < 0) {
1157                 err = -EFAULT;
1158                 goto err_free;
1159         }
1160
1161         /* Update the VRAM usage count */
1162         if (flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) {
1163                 uint64_t size = args->size;
1164
1165                 if (flags & KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM)
1166                         size >>= 1;
1167                 WRITE_ONCE(pdd->vram_usage, pdd->vram_usage + PAGE_ALIGN(size));
1168         }
1169
1170         mutex_unlock(&p->mutex);
1171
1172         args->handle = MAKE_HANDLE(args->gpu_id, idr_handle);
1173         args->mmap_offset = offset;
1174
1175         /* MMIO is mapped through kfd device
1176          * Generate a kfd mmap offset
1177          */
1178         if (flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP)
1179                 args->mmap_offset = KFD_MMAP_TYPE_MMIO
1180                                         | KFD_MMAP_GPU_ID(args->gpu_id);
1181
1182         return 0;
1183
1184 err_free:
1185         amdgpu_amdkfd_gpuvm_free_memory_of_gpu(dev->adev, (struct kgd_mem *)mem,
1186                                                pdd->drm_priv, NULL);
1187 err_unlock:
1188 err_pdd:
1189 err_large_bar:
1190         mutex_unlock(&p->mutex);
1191         return err;
1192 }
1193
1194 static int kfd_ioctl_free_memory_of_gpu(struct file *filep,
1195                                         struct kfd_process *p, void *data)
1196 {
1197         struct kfd_ioctl_free_memory_of_gpu_args *args = data;
1198         struct kfd_process_device *pdd;
1199         void *mem;
1200         int ret;
1201         uint64_t size = 0;
1202
1203         mutex_lock(&p->mutex);
1204         /*
1205          * Safeguard to prevent user space from freeing signal BO.
1206          * It will be freed at process termination.
1207          */
1208         if (p->signal_handle && (p->signal_handle == args->handle)) {
1209                 pr_err("Free signal BO is not allowed\n");
1210                 ret = -EPERM;
1211                 goto err_unlock;
1212         }
1213
1214         pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle));
1215         if (!pdd) {
1216                 pr_err("Process device data doesn't exist\n");
1217                 ret = -EINVAL;
1218                 goto err_pdd;
1219         }
1220
1221         mem = kfd_process_device_translate_handle(
1222                 pdd, GET_IDR_HANDLE(args->handle));
1223         if (!mem) {
1224                 ret = -EINVAL;
1225                 goto err_unlock;
1226         }
1227
1228         ret = amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev,
1229                                 (struct kgd_mem *)mem, pdd->drm_priv, &size);
1230
1231         /* If freeing the buffer failed, leave the handle in place for
1232          * clean-up during process tear-down.
1233          */
1234         if (!ret)
1235                 kfd_process_device_remove_obj_handle(
1236                         pdd, GET_IDR_HANDLE(args->handle));
1237
1238         WRITE_ONCE(pdd->vram_usage, pdd->vram_usage - size);
1239
1240 err_unlock:
1241 err_pdd:
1242         mutex_unlock(&p->mutex);
1243         return ret;
1244 }
1245
1246 static int kfd_ioctl_map_memory_to_gpu(struct file *filep,
1247                                         struct kfd_process *p, void *data)
1248 {
1249         struct kfd_ioctl_map_memory_to_gpu_args *args = data;
1250         struct kfd_process_device *pdd, *peer_pdd;
1251         void *mem;
1252         struct kfd_node *dev;
1253         long err = 0;
1254         int i;
1255         uint32_t *devices_arr = NULL;
1256
1257         if (!args->n_devices) {
1258                 pr_debug("Device IDs array empty\n");
1259                 return -EINVAL;
1260         }
1261         if (args->n_success > args->n_devices) {
1262                 pr_debug("n_success exceeds n_devices\n");
1263                 return -EINVAL;
1264         }
1265
1266         devices_arr = kmalloc_array(args->n_devices, sizeof(*devices_arr),
1267                                     GFP_KERNEL);
1268         if (!devices_arr)
1269                 return -ENOMEM;
1270
1271         err = copy_from_user(devices_arr,
1272                              (void __user *)args->device_ids_array_ptr,
1273                              args->n_devices * sizeof(*devices_arr));
1274         if (err != 0) {
1275                 err = -EFAULT;
1276                 goto copy_from_user_failed;
1277         }
1278
1279         mutex_lock(&p->mutex);
1280         pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle));
1281         if (!pdd) {
1282                 err = -EINVAL;
1283                 goto get_process_device_data_failed;
1284         }
1285         dev = pdd->dev;
1286
1287         pdd = kfd_bind_process_to_device(dev, p);
1288         if (IS_ERR(pdd)) {
1289                 err = PTR_ERR(pdd);
1290                 goto bind_process_to_device_failed;
1291         }
1292
1293         mem = kfd_process_device_translate_handle(pdd,
1294                                                 GET_IDR_HANDLE(args->handle));
1295         if (!mem) {
1296                 err = -ENOMEM;
1297                 goto get_mem_obj_from_handle_failed;
1298         }
1299
1300         for (i = args->n_success; i < args->n_devices; i++) {
1301                 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]);
1302                 if (!peer_pdd) {
1303                         pr_debug("Getting device by id failed for 0x%x\n",
1304                                  devices_arr[i]);
1305                         err = -EINVAL;
1306                         goto get_mem_obj_from_handle_failed;
1307                 }
1308
1309                 peer_pdd = kfd_bind_process_to_device(peer_pdd->dev, p);
1310                 if (IS_ERR(peer_pdd)) {
1311                         err = PTR_ERR(peer_pdd);
1312                         goto get_mem_obj_from_handle_failed;
1313                 }
1314
1315                 err = amdgpu_amdkfd_gpuvm_map_memory_to_gpu(
1316                         peer_pdd->dev->adev, (struct kgd_mem *)mem,
1317                         peer_pdd->drm_priv);
1318                 if (err) {
1319                         struct pci_dev *pdev = peer_pdd->dev->adev->pdev;
1320
1321                         dev_err(dev->adev->dev,
1322                                "Failed to map peer:%04x:%02x:%02x.%d mem_domain:%d\n",
1323                                pci_domain_nr(pdev->bus),
1324                                pdev->bus->number,
1325                                PCI_SLOT(pdev->devfn),
1326                                PCI_FUNC(pdev->devfn),
1327                                ((struct kgd_mem *)mem)->domain);
1328                         goto map_memory_to_gpu_failed;
1329                 }
1330                 args->n_success = i+1;
1331         }
1332
1333         err = amdgpu_amdkfd_gpuvm_sync_memory(dev->adev, (struct kgd_mem *) mem, true);
1334         if (err) {
1335                 pr_debug("Sync memory failed, wait interrupted by user signal\n");
1336                 goto sync_memory_failed;
1337         }
1338
1339         mutex_unlock(&p->mutex);
1340
1341         /* Flush TLBs after waiting for the page table updates to complete */
1342         for (i = 0; i < args->n_devices; i++) {
1343                 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]);
1344                 if (WARN_ON_ONCE(!peer_pdd))
1345                         continue;
1346                 kfd_flush_tlb(peer_pdd, TLB_FLUSH_LEGACY);
1347         }
1348         kfree(devices_arr);
1349
1350         return err;
1351
1352 get_process_device_data_failed:
1353 bind_process_to_device_failed:
1354 get_mem_obj_from_handle_failed:
1355 map_memory_to_gpu_failed:
1356 sync_memory_failed:
1357         mutex_unlock(&p->mutex);
1358 copy_from_user_failed:
1359         kfree(devices_arr);
1360
1361         return err;
1362 }
1363
1364 static int kfd_ioctl_unmap_memory_from_gpu(struct file *filep,
1365                                         struct kfd_process *p, void *data)
1366 {
1367         struct kfd_ioctl_unmap_memory_from_gpu_args *args = data;
1368         struct kfd_process_device *pdd, *peer_pdd;
1369         void *mem;
1370         long err = 0;
1371         uint32_t *devices_arr = NULL, i;
1372         bool flush_tlb;
1373
1374         if (!args->n_devices) {
1375                 pr_debug("Device IDs array empty\n");
1376                 return -EINVAL;
1377         }
1378         if (args->n_success > args->n_devices) {
1379                 pr_debug("n_success exceeds n_devices\n");
1380                 return -EINVAL;
1381         }
1382
1383         devices_arr = kmalloc_array(args->n_devices, sizeof(*devices_arr),
1384                                     GFP_KERNEL);
1385         if (!devices_arr)
1386                 return -ENOMEM;
1387
1388         err = copy_from_user(devices_arr,
1389                              (void __user *)args->device_ids_array_ptr,
1390                              args->n_devices * sizeof(*devices_arr));
1391         if (err != 0) {
1392                 err = -EFAULT;
1393                 goto copy_from_user_failed;
1394         }
1395
1396         mutex_lock(&p->mutex);
1397         pdd = kfd_process_device_data_by_id(p, GET_GPU_ID(args->handle));
1398         if (!pdd) {
1399                 err = -EINVAL;
1400                 goto bind_process_to_device_failed;
1401         }
1402
1403         mem = kfd_process_device_translate_handle(pdd,
1404                                                 GET_IDR_HANDLE(args->handle));
1405         if (!mem) {
1406                 err = -ENOMEM;
1407                 goto get_mem_obj_from_handle_failed;
1408         }
1409
1410         for (i = args->n_success; i < args->n_devices; i++) {
1411                 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]);
1412                 if (!peer_pdd) {
1413                         err = -EINVAL;
1414                         goto get_mem_obj_from_handle_failed;
1415                 }
1416                 err = amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu(
1417                         peer_pdd->dev->adev, (struct kgd_mem *)mem, peer_pdd->drm_priv);
1418                 if (err) {
1419                         pr_err("Failed to unmap from gpu %d/%d\n",
1420                                i, args->n_devices);
1421                         goto unmap_memory_from_gpu_failed;
1422                 }
1423                 args->n_success = i+1;
1424         }
1425
1426         flush_tlb = kfd_flush_tlb_after_unmap(pdd->dev->kfd);
1427         if (flush_tlb) {
1428                 err = amdgpu_amdkfd_gpuvm_sync_memory(pdd->dev->adev,
1429                                 (struct kgd_mem *) mem, true);
1430                 if (err) {
1431                         pr_debug("Sync memory failed, wait interrupted by user signal\n");
1432                         goto sync_memory_failed;
1433                 }
1434         }
1435
1436         /* Flush TLBs after waiting for the page table updates to complete */
1437         for (i = 0; i < args->n_devices; i++) {
1438                 peer_pdd = kfd_process_device_data_by_id(p, devices_arr[i]);
1439                 if (WARN_ON_ONCE(!peer_pdd))
1440                         continue;
1441                 if (flush_tlb)
1442                         kfd_flush_tlb(peer_pdd, TLB_FLUSH_HEAVYWEIGHT);
1443
1444                 /* Remove dma mapping after tlb flush to avoid IO_PAGE_FAULT */
1445                 amdgpu_amdkfd_gpuvm_dmaunmap_mem(mem, peer_pdd->drm_priv);
1446         }
1447
1448         mutex_unlock(&p->mutex);
1449
1450         kfree(devices_arr);
1451
1452         return 0;
1453
1454 bind_process_to_device_failed:
1455 get_mem_obj_from_handle_failed:
1456 unmap_memory_from_gpu_failed:
1457 sync_memory_failed:
1458         mutex_unlock(&p->mutex);
1459 copy_from_user_failed:
1460         kfree(devices_arr);
1461         return err;
1462 }
1463
1464 static int kfd_ioctl_alloc_queue_gws(struct file *filep,
1465                 struct kfd_process *p, void *data)
1466 {
1467         int retval;
1468         struct kfd_ioctl_alloc_queue_gws_args *args = data;
1469         struct queue *q;
1470         struct kfd_node *dev;
1471
1472         mutex_lock(&p->mutex);
1473         q = pqm_get_user_queue(&p->pqm, args->queue_id);
1474
1475         if (q) {
1476                 dev = q->device;
1477         } else {
1478                 retval = -EINVAL;
1479                 goto out_unlock;
1480         }
1481
1482         if (!dev->gws) {
1483                 retval = -ENODEV;
1484                 goto out_unlock;
1485         }
1486
1487         if (dev->dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) {
1488                 retval = -ENODEV;
1489                 goto out_unlock;
1490         }
1491
1492         if (p->debug_trap_enabled && (!kfd_dbg_has_gws_support(dev) ||
1493                                       kfd_dbg_has_cwsr_workaround(dev))) {
1494                 retval = -EBUSY;
1495                 goto out_unlock;
1496         }
1497
1498         retval = pqm_set_gws(&p->pqm, args->queue_id, args->num_gws ? dev->gws : NULL);
1499         mutex_unlock(&p->mutex);
1500
1501         args->first_gws = 0;
1502         return retval;
1503
1504 out_unlock:
1505         mutex_unlock(&p->mutex);
1506         return retval;
1507 }
1508
1509 static int kfd_ioctl_get_dmabuf_info(struct file *filep,
1510                 struct kfd_process *p, void *data)
1511 {
1512         struct kfd_ioctl_get_dmabuf_info_args *args = data;
1513         struct kfd_node *dev = NULL;
1514         struct amdgpu_device *dmabuf_adev;
1515         void *metadata_buffer = NULL;
1516         uint32_t flags;
1517         int8_t xcp_id;
1518         unsigned int i;
1519         int r;
1520
1521         /* Find a KFD GPU device that supports the get_dmabuf_info query */
1522         for (i = 0; kfd_topology_enum_kfd_devices(i, &dev) == 0; i++)
1523                 if (dev)
1524                         break;
1525         if (!dev)
1526                 return -EINVAL;
1527
1528         if (args->metadata_ptr) {
1529                 metadata_buffer = kzalloc(args->metadata_size, GFP_KERNEL);
1530                 if (!metadata_buffer)
1531                         return -ENOMEM;
1532         }
1533
1534         /* Get dmabuf info from KGD */
1535         r = amdgpu_amdkfd_get_dmabuf_info(dev->adev, args->dmabuf_fd,
1536                                           &dmabuf_adev, &args->size,
1537                                           metadata_buffer, args->metadata_size,
1538                                           &args->metadata_size, &flags, &xcp_id);
1539         if (r)
1540                 goto exit;
1541
1542         if (xcp_id >= 0)
1543                 args->gpu_id = dmabuf_adev->kfd.dev->nodes[xcp_id]->id;
1544         else
1545                 args->gpu_id = dmabuf_adev->kfd.dev->nodes[0]->id;
1546         args->flags = flags;
1547
1548         /* Copy metadata buffer to user mode */
1549         if (metadata_buffer) {
1550                 r = copy_to_user((void __user *)args->metadata_ptr,
1551                                  metadata_buffer, args->metadata_size);
1552                 if (r != 0)
1553                         r = -EFAULT;
1554         }
1555
1556 exit:
1557         kfree(metadata_buffer);
1558
1559         return r;
1560 }
1561
1562 static int kfd_ioctl_import_dmabuf(struct file *filep,
1563                                    struct kfd_process *p, void *data)
1564 {
1565         struct kfd_ioctl_import_dmabuf_args *args = data;
1566         struct kfd_process_device *pdd;
1567         int idr_handle;
1568         uint64_t size;
1569         void *mem;
1570         int r;
1571
1572         mutex_lock(&p->mutex);
1573         pdd = kfd_process_device_data_by_id(p, args->gpu_id);
1574         if (!pdd) {
1575                 r = -EINVAL;
1576                 goto err_unlock;
1577         }
1578
1579         pdd = kfd_bind_process_to_device(pdd->dev, p);
1580         if (IS_ERR(pdd)) {
1581                 r = PTR_ERR(pdd);
1582                 goto err_unlock;
1583         }
1584
1585         r = amdgpu_amdkfd_gpuvm_import_dmabuf_fd(pdd->dev->adev, args->dmabuf_fd,
1586                                                  args->va_addr, pdd->drm_priv,
1587                                                  (struct kgd_mem **)&mem, &size,
1588                                                  NULL);
1589         if (r)
1590                 goto err_unlock;
1591
1592         idr_handle = kfd_process_device_create_obj_handle(pdd, mem);
1593         if (idr_handle < 0) {
1594                 r = -EFAULT;
1595                 goto err_free;
1596         }
1597
1598         mutex_unlock(&p->mutex);
1599
1600         args->handle = MAKE_HANDLE(args->gpu_id, idr_handle);
1601
1602         return 0;
1603
1604 err_free:
1605         amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, (struct kgd_mem *)mem,
1606                                                pdd->drm_priv, NULL);
1607 err_unlock:
1608         mutex_unlock(&p->mutex);
1609         return r;
1610 }
1611
1612 static int kfd_ioctl_export_dmabuf(struct file *filep,
1613                                    struct kfd_process *p, void *data)
1614 {
1615         struct kfd_ioctl_export_dmabuf_args *args = data;
1616         struct kfd_process_device *pdd;
1617         struct dma_buf *dmabuf;
1618         struct kfd_node *dev;
1619         void *mem;
1620         int ret = 0;
1621
1622         dev = kfd_device_by_id(GET_GPU_ID(args->handle));
1623         if (!dev)
1624                 return -EINVAL;
1625
1626         mutex_lock(&p->mutex);
1627
1628         pdd = kfd_get_process_device_data(dev, p);
1629         if (!pdd) {
1630                 ret = -EINVAL;
1631                 goto err_unlock;
1632         }
1633
1634         mem = kfd_process_device_translate_handle(pdd,
1635                                                 GET_IDR_HANDLE(args->handle));
1636         if (!mem) {
1637                 ret = -EINVAL;
1638                 goto err_unlock;
1639         }
1640
1641         ret = amdgpu_amdkfd_gpuvm_export_dmabuf(mem, &dmabuf);
1642         mutex_unlock(&p->mutex);
1643         if (ret)
1644                 goto err_out;
1645
1646         ret = dma_buf_fd(dmabuf, args->flags);
1647         if (ret < 0) {
1648                 dma_buf_put(dmabuf);
1649                 goto err_out;
1650         }
1651         /* dma_buf_fd assigns the reference count to the fd, no need to
1652          * put the reference here.
1653          */
1654         args->dmabuf_fd = ret;
1655
1656         return 0;
1657
1658 err_unlock:
1659         mutex_unlock(&p->mutex);
1660 err_out:
1661         return ret;
1662 }
1663
1664 /* Handle requests for watching SMI events */
1665 static int kfd_ioctl_smi_events(struct file *filep,
1666                                 struct kfd_process *p, void *data)
1667 {
1668         struct kfd_ioctl_smi_events_args *args = data;
1669         struct kfd_process_device *pdd;
1670
1671         mutex_lock(&p->mutex);
1672
1673         pdd = kfd_process_device_data_by_id(p, args->gpuid);
1674         mutex_unlock(&p->mutex);
1675         if (!pdd)
1676                 return -EINVAL;
1677
1678         return kfd_smi_event_open(pdd->dev, &args->anon_fd);
1679 }
1680
1681 #if IS_ENABLED(CONFIG_HSA_AMD_SVM)
1682
1683 static int kfd_ioctl_set_xnack_mode(struct file *filep,
1684                                     struct kfd_process *p, void *data)
1685 {
1686         struct kfd_ioctl_set_xnack_mode_args *args = data;
1687         int r = 0;
1688
1689         mutex_lock(&p->mutex);
1690         if (args->xnack_enabled >= 0) {
1691                 if (!list_empty(&p->pqm.queues)) {
1692                         pr_debug("Process has user queues running\n");
1693                         r = -EBUSY;
1694                         goto out_unlock;
1695                 }
1696
1697                 if (p->xnack_enabled == args->xnack_enabled)
1698                         goto out_unlock;
1699
1700                 if (args->xnack_enabled && !kfd_process_xnack_mode(p, true)) {
1701                         r = -EPERM;
1702                         goto out_unlock;
1703                 }
1704
1705                 r = svm_range_switch_xnack_reserve_mem(p, args->xnack_enabled);
1706         } else {
1707                 args->xnack_enabled = p->xnack_enabled;
1708         }
1709
1710 out_unlock:
1711         mutex_unlock(&p->mutex);
1712
1713         return r;
1714 }
1715
1716 static int kfd_ioctl_svm(struct file *filep, struct kfd_process *p, void *data)
1717 {
1718         struct kfd_ioctl_svm_args *args = data;
1719         int r = 0;
1720
1721         pr_debug("start 0x%llx size 0x%llx op 0x%x nattr 0x%x\n",
1722                  args->start_addr, args->size, args->op, args->nattr);
1723
1724         if ((args->start_addr & ~PAGE_MASK) || (args->size & ~PAGE_MASK))
1725                 return -EINVAL;
1726         if (!args->start_addr || !args->size)
1727                 return -EINVAL;
1728
1729         r = svm_ioctl(p, args->op, args->start_addr, args->size, args->nattr,
1730                       args->attrs);
1731
1732         return r;
1733 }
1734 #else
1735 static int kfd_ioctl_set_xnack_mode(struct file *filep,
1736                                     struct kfd_process *p, void *data)
1737 {
1738         return -EPERM;
1739 }
1740 static int kfd_ioctl_svm(struct file *filep, struct kfd_process *p, void *data)
1741 {
1742         return -EPERM;
1743 }
1744 #endif
1745
1746 static int criu_checkpoint_process(struct kfd_process *p,
1747                              uint8_t __user *user_priv_data,
1748                              uint64_t *priv_offset)
1749 {
1750         struct kfd_criu_process_priv_data process_priv;
1751         int ret;
1752
1753         memset(&process_priv, 0, sizeof(process_priv));
1754
1755         process_priv.version = KFD_CRIU_PRIV_VERSION;
1756         /* For CR, we don't consider negative xnack mode which is used for
1757          * querying without changing it, here 0 simply means disabled and 1
1758          * means enabled so retry for finding a valid PTE.
1759          */
1760         process_priv.xnack_mode = p->xnack_enabled ? 1 : 0;
1761
1762         ret = copy_to_user(user_priv_data + *priv_offset,
1763                                 &process_priv, sizeof(process_priv));
1764
1765         if (ret) {
1766                 pr_err("Failed to copy process information to user\n");
1767                 ret = -EFAULT;
1768         }
1769
1770         *priv_offset += sizeof(process_priv);
1771         return ret;
1772 }
1773
1774 static int criu_checkpoint_devices(struct kfd_process *p,
1775                              uint32_t num_devices,
1776                              uint8_t __user *user_addr,
1777                              uint8_t __user *user_priv_data,
1778                              uint64_t *priv_offset)
1779 {
1780         struct kfd_criu_device_priv_data *device_priv = NULL;
1781         struct kfd_criu_device_bucket *device_buckets = NULL;
1782         int ret = 0, i;
1783
1784         device_buckets = kvzalloc(num_devices * sizeof(*device_buckets), GFP_KERNEL);
1785         if (!device_buckets) {
1786                 ret = -ENOMEM;
1787                 goto exit;
1788         }
1789
1790         device_priv = kvzalloc(num_devices * sizeof(*device_priv), GFP_KERNEL);
1791         if (!device_priv) {
1792                 ret = -ENOMEM;
1793                 goto exit;
1794         }
1795
1796         for (i = 0; i < num_devices; i++) {
1797                 struct kfd_process_device *pdd = p->pdds[i];
1798
1799                 device_buckets[i].user_gpu_id = pdd->user_gpu_id;
1800                 device_buckets[i].actual_gpu_id = pdd->dev->id;
1801
1802                 /*
1803                  * priv_data does not contain useful information for now and is reserved for
1804                  * future use, so we do not set its contents.
1805                  */
1806         }
1807
1808         ret = copy_to_user(user_addr, device_buckets, num_devices * sizeof(*device_buckets));
1809         if (ret) {
1810                 pr_err("Failed to copy device information to user\n");
1811                 ret = -EFAULT;
1812                 goto exit;
1813         }
1814
1815         ret = copy_to_user(user_priv_data + *priv_offset,
1816                            device_priv,
1817                            num_devices * sizeof(*device_priv));
1818         if (ret) {
1819                 pr_err("Failed to copy device information to user\n");
1820                 ret = -EFAULT;
1821         }
1822         *priv_offset += num_devices * sizeof(*device_priv);
1823
1824 exit:
1825         kvfree(device_buckets);
1826         kvfree(device_priv);
1827         return ret;
1828 }
1829
1830 static uint32_t get_process_num_bos(struct kfd_process *p)
1831 {
1832         uint32_t num_of_bos = 0;
1833         int i;
1834
1835         /* Run over all PDDs of the process */
1836         for (i = 0; i < p->n_pdds; i++) {
1837                 struct kfd_process_device *pdd = p->pdds[i];
1838                 void *mem;
1839                 int id;
1840
1841                 idr_for_each_entry(&pdd->alloc_idr, mem, id) {
1842                         struct kgd_mem *kgd_mem = (struct kgd_mem *)mem;
1843
1844                         if (!kgd_mem->va || kgd_mem->va > pdd->gpuvm_base)
1845                                 num_of_bos++;
1846                 }
1847         }
1848         return num_of_bos;
1849 }
1850
1851 static int criu_get_prime_handle(struct kgd_mem *mem,
1852                                  int flags, u32 *shared_fd)
1853 {
1854         struct dma_buf *dmabuf;
1855         int ret;
1856
1857         ret = amdgpu_amdkfd_gpuvm_export_dmabuf(mem, &dmabuf);
1858         if (ret) {
1859                 pr_err("dmabuf export failed for the BO\n");
1860                 return ret;
1861         }
1862
1863         ret = dma_buf_fd(dmabuf, flags);
1864         if (ret < 0) {
1865                 pr_err("dmabuf create fd failed, ret:%d\n", ret);
1866                 goto out_free_dmabuf;
1867         }
1868
1869         *shared_fd = ret;
1870         return 0;
1871
1872 out_free_dmabuf:
1873         dma_buf_put(dmabuf);
1874         return ret;
1875 }
1876
1877 static int criu_checkpoint_bos(struct kfd_process *p,
1878                                uint32_t num_bos,
1879                                uint8_t __user *user_bos,
1880                                uint8_t __user *user_priv_data,
1881                                uint64_t *priv_offset)
1882 {
1883         struct kfd_criu_bo_bucket *bo_buckets;
1884         struct kfd_criu_bo_priv_data *bo_privs;
1885         int ret = 0, pdd_index, bo_index = 0, id;
1886         void *mem;
1887
1888         bo_buckets = kvzalloc(num_bos * sizeof(*bo_buckets), GFP_KERNEL);
1889         if (!bo_buckets)
1890                 return -ENOMEM;
1891
1892         bo_privs = kvzalloc(num_bos * sizeof(*bo_privs), GFP_KERNEL);
1893         if (!bo_privs) {
1894                 ret = -ENOMEM;
1895                 goto exit;
1896         }
1897
1898         for (pdd_index = 0; pdd_index < p->n_pdds; pdd_index++) {
1899                 struct kfd_process_device *pdd = p->pdds[pdd_index];
1900                 struct amdgpu_bo *dumper_bo;
1901                 struct kgd_mem *kgd_mem;
1902
1903                 idr_for_each_entry(&pdd->alloc_idr, mem, id) {
1904                         struct kfd_criu_bo_bucket *bo_bucket;
1905                         struct kfd_criu_bo_priv_data *bo_priv;
1906                         int i, dev_idx = 0;
1907
1908                         if (!mem) {
1909                                 ret = -ENOMEM;
1910                                 goto exit;
1911                         }
1912
1913                         kgd_mem = (struct kgd_mem *)mem;
1914                         dumper_bo = kgd_mem->bo;
1915
1916                         /* Skip checkpointing BOs that are used for Trap handler
1917                          * code and state. Currently, these BOs have a VA that
1918                          * is less GPUVM Base
1919                          */
1920                         if (kgd_mem->va && kgd_mem->va <= pdd->gpuvm_base)
1921                                 continue;
1922
1923                         bo_bucket = &bo_buckets[bo_index];
1924                         bo_priv = &bo_privs[bo_index];
1925
1926                         bo_bucket->gpu_id = pdd->user_gpu_id;
1927                         bo_bucket->addr = (uint64_t)kgd_mem->va;
1928                         bo_bucket->size = amdgpu_bo_size(dumper_bo);
1929                         bo_bucket->alloc_flags = (uint32_t)kgd_mem->alloc_flags;
1930                         bo_priv->idr_handle = id;
1931
1932                         if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) {
1933                                 ret = amdgpu_ttm_tt_get_userptr(&dumper_bo->tbo,
1934                                                                 &bo_priv->user_addr);
1935                                 if (ret) {
1936                                         pr_err("Failed to obtain user address for user-pointer bo\n");
1937                                         goto exit;
1938                                 }
1939                         }
1940                         if (bo_bucket->alloc_flags
1941                             & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) {
1942                                 ret = criu_get_prime_handle(kgd_mem,
1943                                                 bo_bucket->alloc_flags &
1944                                                 KFD_IOC_ALLOC_MEM_FLAGS_WRITABLE ? DRM_RDWR : 0,
1945                                                 &bo_bucket->dmabuf_fd);
1946                                 if (ret)
1947                                         goto exit;
1948                         } else {
1949                                 bo_bucket->dmabuf_fd = KFD_INVALID_FD;
1950                         }
1951
1952                         if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL)
1953                                 bo_bucket->offset = KFD_MMAP_TYPE_DOORBELL |
1954                                         KFD_MMAP_GPU_ID(pdd->dev->id);
1955                         else if (bo_bucket->alloc_flags &
1956                                 KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP)
1957                                 bo_bucket->offset = KFD_MMAP_TYPE_MMIO |
1958                                         KFD_MMAP_GPU_ID(pdd->dev->id);
1959                         else
1960                                 bo_bucket->offset = amdgpu_bo_mmap_offset(dumper_bo);
1961
1962                         for (i = 0; i < p->n_pdds; i++) {
1963                                 if (amdgpu_amdkfd_bo_mapped_to_dev(p->pdds[i]->dev->adev, kgd_mem))
1964                                         bo_priv->mapped_gpuids[dev_idx++] = p->pdds[i]->user_gpu_id;
1965                         }
1966
1967                         pr_debug("bo_size = 0x%llx, bo_addr = 0x%llx bo_offset = 0x%llx\n"
1968                                         "gpu_id = 0x%x alloc_flags = 0x%x idr_handle = 0x%x",
1969                                         bo_bucket->size,
1970                                         bo_bucket->addr,
1971                                         bo_bucket->offset,
1972                                         bo_bucket->gpu_id,
1973                                         bo_bucket->alloc_flags,
1974                                         bo_priv->idr_handle);
1975                         bo_index++;
1976                 }
1977         }
1978
1979         ret = copy_to_user(user_bos, bo_buckets, num_bos * sizeof(*bo_buckets));
1980         if (ret) {
1981                 pr_err("Failed to copy BO information to user\n");
1982                 ret = -EFAULT;
1983                 goto exit;
1984         }
1985
1986         ret = copy_to_user(user_priv_data + *priv_offset, bo_privs, num_bos * sizeof(*bo_privs));
1987         if (ret) {
1988                 pr_err("Failed to copy BO priv information to user\n");
1989                 ret = -EFAULT;
1990                 goto exit;
1991         }
1992
1993         *priv_offset += num_bos * sizeof(*bo_privs);
1994
1995 exit:
1996         while (ret && bo_index--) {
1997                 if (bo_buckets[bo_index].alloc_flags
1998                     & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT))
1999                         close_fd(bo_buckets[bo_index].dmabuf_fd);
2000         }
2001
2002         kvfree(bo_buckets);
2003         kvfree(bo_privs);
2004         return ret;
2005 }
2006
2007 static int criu_get_process_object_info(struct kfd_process *p,
2008                                         uint32_t *num_devices,
2009                                         uint32_t *num_bos,
2010                                         uint32_t *num_objects,
2011                                         uint64_t *objs_priv_size)
2012 {
2013         uint64_t queues_priv_data_size, svm_priv_data_size, priv_size;
2014         uint32_t num_queues, num_events, num_svm_ranges;
2015         int ret;
2016
2017         *num_devices = p->n_pdds;
2018         *num_bos = get_process_num_bos(p);
2019
2020         ret = kfd_process_get_queue_info(p, &num_queues, &queues_priv_data_size);
2021         if (ret)
2022                 return ret;
2023
2024         num_events = kfd_get_num_events(p);
2025
2026         ret = svm_range_get_info(p, &num_svm_ranges, &svm_priv_data_size);
2027         if (ret)
2028                 return ret;
2029
2030         *num_objects = num_queues + num_events + num_svm_ranges;
2031
2032         if (objs_priv_size) {
2033                 priv_size = sizeof(struct kfd_criu_process_priv_data);
2034                 priv_size += *num_devices * sizeof(struct kfd_criu_device_priv_data);
2035                 priv_size += *num_bos * sizeof(struct kfd_criu_bo_priv_data);
2036                 priv_size += queues_priv_data_size;
2037                 priv_size += num_events * sizeof(struct kfd_criu_event_priv_data);
2038                 priv_size += svm_priv_data_size;
2039                 *objs_priv_size = priv_size;
2040         }
2041         return 0;
2042 }
2043
2044 static int criu_checkpoint(struct file *filep,
2045                            struct kfd_process *p,
2046                            struct kfd_ioctl_criu_args *args)
2047 {
2048         int ret;
2049         uint32_t num_devices, num_bos, num_objects;
2050         uint64_t priv_size, priv_offset = 0, bo_priv_offset;
2051
2052         if (!args->devices || !args->bos || !args->priv_data)
2053                 return -EINVAL;
2054
2055         mutex_lock(&p->mutex);
2056
2057         if (!p->n_pdds) {
2058                 pr_err("No pdd for given process\n");
2059                 ret = -ENODEV;
2060                 goto exit_unlock;
2061         }
2062
2063         /* Confirm all process queues are evicted */
2064         if (!p->queues_paused) {
2065                 pr_err("Cannot dump process when queues are not in evicted state\n");
2066                 /* CRIU plugin did not call op PROCESS_INFO before checkpointing */
2067                 ret = -EINVAL;
2068                 goto exit_unlock;
2069         }
2070
2071         ret = criu_get_process_object_info(p, &num_devices, &num_bos, &num_objects, &priv_size);
2072         if (ret)
2073                 goto exit_unlock;
2074
2075         if (num_devices != args->num_devices ||
2076             num_bos != args->num_bos ||
2077             num_objects != args->num_objects ||
2078             priv_size != args->priv_data_size) {
2079
2080                 ret = -EINVAL;
2081                 goto exit_unlock;
2082         }
2083
2084         /* each function will store private data inside priv_data and adjust priv_offset */
2085         ret = criu_checkpoint_process(p, (uint8_t __user *)args->priv_data, &priv_offset);
2086         if (ret)
2087                 goto exit_unlock;
2088
2089         ret = criu_checkpoint_devices(p, num_devices, (uint8_t __user *)args->devices,
2090                                 (uint8_t __user *)args->priv_data, &priv_offset);
2091         if (ret)
2092                 goto exit_unlock;
2093
2094         /* Leave room for BOs in the private data. They need to be restored
2095          * before events, but we checkpoint them last to simplify the error
2096          * handling.
2097          */
2098         bo_priv_offset = priv_offset;
2099         priv_offset += num_bos * sizeof(struct kfd_criu_bo_priv_data);
2100
2101         if (num_objects) {
2102                 ret = kfd_criu_checkpoint_queues(p, (uint8_t __user *)args->priv_data,
2103                                                  &priv_offset);
2104                 if (ret)
2105                         goto exit_unlock;
2106
2107                 ret = kfd_criu_checkpoint_events(p, (uint8_t __user *)args->priv_data,
2108                                                  &priv_offset);
2109                 if (ret)
2110                         goto exit_unlock;
2111
2112                 ret = kfd_criu_checkpoint_svm(p, (uint8_t __user *)args->priv_data, &priv_offset);
2113                 if (ret)
2114                         goto exit_unlock;
2115         }
2116
2117         /* This must be the last thing in this function that can fail.
2118          * Otherwise we leak dmabuf file descriptors.
2119          */
2120         ret = criu_checkpoint_bos(p, num_bos, (uint8_t __user *)args->bos,
2121                            (uint8_t __user *)args->priv_data, &bo_priv_offset);
2122
2123 exit_unlock:
2124         mutex_unlock(&p->mutex);
2125         if (ret)
2126                 pr_err("Failed to dump CRIU ret:%d\n", ret);
2127         else
2128                 pr_debug("CRIU dump ret:%d\n", ret);
2129
2130         return ret;
2131 }
2132
2133 static int criu_restore_process(struct kfd_process *p,
2134                                 struct kfd_ioctl_criu_args *args,
2135                                 uint64_t *priv_offset,
2136                                 uint64_t max_priv_data_size)
2137 {
2138         int ret = 0;
2139         struct kfd_criu_process_priv_data process_priv;
2140
2141         if (*priv_offset + sizeof(process_priv) > max_priv_data_size)
2142                 return -EINVAL;
2143
2144         ret = copy_from_user(&process_priv,
2145                                 (void __user *)(args->priv_data + *priv_offset),
2146                                 sizeof(process_priv));
2147         if (ret) {
2148                 pr_err("Failed to copy process private information from user\n");
2149                 ret = -EFAULT;
2150                 goto exit;
2151         }
2152         *priv_offset += sizeof(process_priv);
2153
2154         if (process_priv.version != KFD_CRIU_PRIV_VERSION) {
2155                 pr_err("Invalid CRIU API version (checkpointed:%d current:%d)\n",
2156                         process_priv.version, KFD_CRIU_PRIV_VERSION);
2157                 return -EINVAL;
2158         }
2159
2160         pr_debug("Setting XNACK mode\n");
2161         if (process_priv.xnack_mode && !kfd_process_xnack_mode(p, true)) {
2162                 pr_err("xnack mode cannot be set\n");
2163                 ret = -EPERM;
2164                 goto exit;
2165         } else {
2166                 pr_debug("set xnack mode: %d\n", process_priv.xnack_mode);
2167                 p->xnack_enabled = process_priv.xnack_mode;
2168         }
2169
2170 exit:
2171         return ret;
2172 }
2173
2174 static int criu_restore_devices(struct kfd_process *p,
2175                                 struct kfd_ioctl_criu_args *args,
2176                                 uint64_t *priv_offset,
2177                                 uint64_t max_priv_data_size)
2178 {
2179         struct kfd_criu_device_bucket *device_buckets;
2180         struct kfd_criu_device_priv_data *device_privs;
2181         int ret = 0;
2182         uint32_t i;
2183
2184         if (args->num_devices != p->n_pdds)
2185                 return -EINVAL;
2186
2187         if (*priv_offset + (args->num_devices * sizeof(*device_privs)) > max_priv_data_size)
2188                 return -EINVAL;
2189
2190         device_buckets = kmalloc_array(args->num_devices, sizeof(*device_buckets), GFP_KERNEL);
2191         if (!device_buckets)
2192                 return -ENOMEM;
2193
2194         ret = copy_from_user(device_buckets, (void __user *)args->devices,
2195                                 args->num_devices * sizeof(*device_buckets));
2196         if (ret) {
2197                 pr_err("Failed to copy devices buckets from user\n");
2198                 ret = -EFAULT;
2199                 goto exit;
2200         }
2201
2202         for (i = 0; i < args->num_devices; i++) {
2203                 struct kfd_node *dev;
2204                 struct kfd_process_device *pdd;
2205                 struct file *drm_file;
2206
2207                 /* device private data is not currently used */
2208
2209                 if (!device_buckets[i].user_gpu_id) {
2210                         pr_err("Invalid user gpu_id\n");
2211                         ret = -EINVAL;
2212                         goto exit;
2213                 }
2214
2215                 dev = kfd_device_by_id(device_buckets[i].actual_gpu_id);
2216                 if (!dev) {
2217                         pr_err("Failed to find device with gpu_id = %x\n",
2218                                 device_buckets[i].actual_gpu_id);
2219                         ret = -EINVAL;
2220                         goto exit;
2221                 }
2222
2223                 pdd = kfd_get_process_device_data(dev, p);
2224                 if (!pdd) {
2225                         pr_err("Failed to get pdd for gpu_id = %x\n",
2226                                         device_buckets[i].actual_gpu_id);
2227                         ret = -EINVAL;
2228                         goto exit;
2229                 }
2230                 pdd->user_gpu_id = device_buckets[i].user_gpu_id;
2231
2232                 drm_file = fget(device_buckets[i].drm_fd);
2233                 if (!drm_file) {
2234                         pr_err("Invalid render node file descriptor sent from plugin (%d)\n",
2235                                 device_buckets[i].drm_fd);
2236                         ret = -EINVAL;
2237                         goto exit;
2238                 }
2239
2240                 if (pdd->drm_file) {
2241                         ret = -EINVAL;
2242                         goto exit;
2243                 }
2244
2245                 /* create the vm using render nodes for kfd pdd */
2246                 if (kfd_process_device_init_vm(pdd, drm_file)) {
2247                         pr_err("could not init vm for given pdd\n");
2248                         /* On success, the PDD keeps the drm_file reference */
2249                         fput(drm_file);
2250                         ret = -EINVAL;
2251                         goto exit;
2252                 }
2253                 /*
2254                  * pdd now already has the vm bound to render node so below api won't create a new
2255                  * exclusive kfd mapping but use existing one with renderDXXX but is still needed
2256                  * for iommu v2 binding  and runtime pm.
2257                  */
2258                 pdd = kfd_bind_process_to_device(dev, p);
2259                 if (IS_ERR(pdd)) {
2260                         ret = PTR_ERR(pdd);
2261                         goto exit;
2262                 }
2263
2264                 if (!pdd->qpd.proc_doorbells) {
2265                         ret = kfd_alloc_process_doorbells(dev->kfd, pdd);
2266                         if (ret)
2267                                 goto exit;
2268                 }
2269         }
2270
2271         /*
2272          * We are not copying device private data from user as we are not using the data for now,
2273          * but we still adjust for its private data.
2274          */
2275         *priv_offset += args->num_devices * sizeof(*device_privs);
2276
2277 exit:
2278         kfree(device_buckets);
2279         return ret;
2280 }
2281
2282 static int criu_restore_memory_of_gpu(struct kfd_process_device *pdd,
2283                                       struct kfd_criu_bo_bucket *bo_bucket,
2284                                       struct kfd_criu_bo_priv_data *bo_priv,
2285                                       struct kgd_mem **kgd_mem)
2286 {
2287         int idr_handle;
2288         int ret;
2289         const bool criu_resume = true;
2290         u64 offset;
2291
2292         if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL) {
2293                 if (bo_bucket->size !=
2294                                 kfd_doorbell_process_slice(pdd->dev->kfd))
2295                         return -EINVAL;
2296
2297                 offset = kfd_get_process_doorbells(pdd);
2298                 if (!offset)
2299                         return -ENOMEM;
2300         } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) {
2301                 /* MMIO BOs need remapped bus address */
2302                 if (bo_bucket->size != PAGE_SIZE) {
2303                         pr_err("Invalid page size\n");
2304                         return -EINVAL;
2305                 }
2306                 offset = pdd->dev->adev->rmmio_remap.bus_addr;
2307                 if (!offset) {
2308                         pr_err("amdgpu_amdkfd_get_mmio_remap_phys_addr failed\n");
2309                         return -ENOMEM;
2310                 }
2311         } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_USERPTR) {
2312                 offset = bo_priv->user_addr;
2313         }
2314         /* Create the BO */
2315         ret = amdgpu_amdkfd_gpuvm_alloc_memory_of_gpu(pdd->dev->adev, bo_bucket->addr,
2316                                                       bo_bucket->size, pdd->drm_priv, kgd_mem,
2317                                                       &offset, bo_bucket->alloc_flags, criu_resume);
2318         if (ret) {
2319                 pr_err("Could not create the BO\n");
2320                 return ret;
2321         }
2322         pr_debug("New BO created: size:0x%llx addr:0x%llx offset:0x%llx\n",
2323                  bo_bucket->size, bo_bucket->addr, offset);
2324
2325         /* Restore previous IDR handle */
2326         pr_debug("Restoring old IDR handle for the BO");
2327         idr_handle = idr_alloc(&pdd->alloc_idr, *kgd_mem, bo_priv->idr_handle,
2328                                bo_priv->idr_handle + 1, GFP_KERNEL);
2329
2330         if (idr_handle < 0) {
2331                 pr_err("Could not allocate idr\n");
2332                 amdgpu_amdkfd_gpuvm_free_memory_of_gpu(pdd->dev->adev, *kgd_mem, pdd->drm_priv,
2333                                                        NULL);
2334                 return -ENOMEM;
2335         }
2336
2337         if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_DOORBELL)
2338                 bo_bucket->restored_offset = KFD_MMAP_TYPE_DOORBELL | KFD_MMAP_GPU_ID(pdd->dev->id);
2339         if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_MMIO_REMAP) {
2340                 bo_bucket->restored_offset = KFD_MMAP_TYPE_MMIO | KFD_MMAP_GPU_ID(pdd->dev->id);
2341         } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_GTT) {
2342                 bo_bucket->restored_offset = offset;
2343         } else if (bo_bucket->alloc_flags & KFD_IOC_ALLOC_MEM_FLAGS_VRAM) {
2344                 bo_bucket->restored_offset = offset;
2345                 /* Update the VRAM usage count */
2346                 WRITE_ONCE(pdd->vram_usage, pdd->vram_usage + bo_bucket->size);
2347         }
2348         return 0;
2349 }
2350
2351 static int criu_restore_bo(struct kfd_process *p,
2352                            struct kfd_criu_bo_bucket *bo_bucket,
2353                            struct kfd_criu_bo_priv_data *bo_priv)
2354 {
2355         struct kfd_process_device *pdd;
2356         struct kgd_mem *kgd_mem;
2357         int ret;
2358         int j;
2359
2360         pr_debug("Restoring BO size:0x%llx addr:0x%llx gpu_id:0x%x flags:0x%x idr_handle:0x%x\n",
2361                  bo_bucket->size, bo_bucket->addr, bo_bucket->gpu_id, bo_bucket->alloc_flags,
2362                  bo_priv->idr_handle);
2363
2364         pdd = kfd_process_device_data_by_id(p, bo_bucket->gpu_id);
2365         if (!pdd) {
2366                 pr_err("Failed to get pdd\n");
2367                 return -ENODEV;
2368         }
2369
2370         ret = criu_restore_memory_of_gpu(pdd, bo_bucket, bo_priv, &kgd_mem);
2371         if (ret)
2372                 return ret;
2373
2374         /* now map these BOs to GPU/s */
2375         for (j = 0; j < p->n_pdds; j++) {
2376                 struct kfd_node *peer;
2377                 struct kfd_process_device *peer_pdd;
2378
2379                 if (!bo_priv->mapped_gpuids[j])
2380                         break;
2381
2382                 peer_pdd = kfd_process_device_data_by_id(p, bo_priv->mapped_gpuids[j]);
2383                 if (!peer_pdd)
2384                         return -EINVAL;
2385
2386                 peer = peer_pdd->dev;
2387
2388                 peer_pdd = kfd_bind_process_to_device(peer, p);
2389                 if (IS_ERR(peer_pdd))
2390                         return PTR_ERR(peer_pdd);
2391
2392                 ret = amdgpu_amdkfd_gpuvm_map_memory_to_gpu(peer->adev, kgd_mem,
2393                                                             peer_pdd->drm_priv);
2394                 if (ret) {
2395                         pr_err("Failed to map to gpu %d/%d\n", j, p->n_pdds);
2396                         return ret;
2397                 }
2398         }
2399
2400         pr_debug("map memory was successful for the BO\n");
2401         /* create the dmabuf object and export the bo */
2402         if (bo_bucket->alloc_flags
2403             & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT)) {
2404                 ret = criu_get_prime_handle(kgd_mem, DRM_RDWR,
2405                                             &bo_bucket->dmabuf_fd);
2406                 if (ret)
2407                         return ret;
2408         } else {
2409                 bo_bucket->dmabuf_fd = KFD_INVALID_FD;
2410         }
2411
2412         return 0;
2413 }
2414
2415 static int criu_restore_bos(struct kfd_process *p,
2416                             struct kfd_ioctl_criu_args *args,
2417                             uint64_t *priv_offset,
2418                             uint64_t max_priv_data_size)
2419 {
2420         struct kfd_criu_bo_bucket *bo_buckets = NULL;
2421         struct kfd_criu_bo_priv_data *bo_privs = NULL;
2422         int ret = 0;
2423         uint32_t i = 0;
2424
2425         if (*priv_offset + (args->num_bos * sizeof(*bo_privs)) > max_priv_data_size)
2426                 return -EINVAL;
2427
2428         /* Prevent MMU notifications until stage-4 IOCTL (CRIU_RESUME) is received */
2429         amdgpu_amdkfd_block_mmu_notifications(p->kgd_process_info);
2430
2431         bo_buckets = kvmalloc_array(args->num_bos, sizeof(*bo_buckets), GFP_KERNEL);
2432         if (!bo_buckets)
2433                 return -ENOMEM;
2434
2435         ret = copy_from_user(bo_buckets, (void __user *)args->bos,
2436                              args->num_bos * sizeof(*bo_buckets));
2437         if (ret) {
2438                 pr_err("Failed to copy BOs information from user\n");
2439                 ret = -EFAULT;
2440                 goto exit;
2441         }
2442
2443         bo_privs = kvmalloc_array(args->num_bos, sizeof(*bo_privs), GFP_KERNEL);
2444         if (!bo_privs) {
2445                 ret = -ENOMEM;
2446                 goto exit;
2447         }
2448
2449         ret = copy_from_user(bo_privs, (void __user *)args->priv_data + *priv_offset,
2450                              args->num_bos * sizeof(*bo_privs));
2451         if (ret) {
2452                 pr_err("Failed to copy BOs information from user\n");
2453                 ret = -EFAULT;
2454                 goto exit;
2455         }
2456         *priv_offset += args->num_bos * sizeof(*bo_privs);
2457
2458         /* Create and map new BOs */
2459         for (; i < args->num_bos; i++) {
2460                 ret = criu_restore_bo(p, &bo_buckets[i], &bo_privs[i]);
2461                 if (ret) {
2462                         pr_debug("Failed to restore BO[%d] ret%d\n", i, ret);
2463                         goto exit;
2464                 }
2465         } /* done */
2466
2467         /* Copy only the buckets back so user can read bo_buckets[N].restored_offset */
2468         ret = copy_to_user((void __user *)args->bos,
2469                                 bo_buckets,
2470                                 (args->num_bos * sizeof(*bo_buckets)));
2471         if (ret)
2472                 ret = -EFAULT;
2473
2474 exit:
2475         while (ret && i--) {
2476                 if (bo_buckets[i].alloc_flags
2477                    & (KFD_IOC_ALLOC_MEM_FLAGS_VRAM | KFD_IOC_ALLOC_MEM_FLAGS_GTT))
2478                         close_fd(bo_buckets[i].dmabuf_fd);
2479         }
2480         kvfree(bo_buckets);
2481         kvfree(bo_privs);
2482         return ret;
2483 }
2484
2485 static int criu_restore_objects(struct file *filep,
2486                                 struct kfd_process *p,
2487                                 struct kfd_ioctl_criu_args *args,
2488                                 uint64_t *priv_offset,
2489                                 uint64_t max_priv_data_size)
2490 {
2491         int ret = 0;
2492         uint32_t i;
2493
2494         BUILD_BUG_ON(offsetof(struct kfd_criu_queue_priv_data, object_type));
2495         BUILD_BUG_ON(offsetof(struct kfd_criu_event_priv_data, object_type));
2496         BUILD_BUG_ON(offsetof(struct kfd_criu_svm_range_priv_data, object_type));
2497
2498         for (i = 0; i < args->num_objects; i++) {
2499                 uint32_t object_type;
2500
2501                 if (*priv_offset + sizeof(object_type) > max_priv_data_size) {
2502                         pr_err("Invalid private data size\n");
2503                         return -EINVAL;
2504                 }
2505
2506                 ret = get_user(object_type, (uint32_t __user *)(args->priv_data + *priv_offset));
2507                 if (ret) {
2508                         pr_err("Failed to copy private information from user\n");
2509                         goto exit;
2510                 }
2511
2512                 switch (object_type) {
2513                 case KFD_CRIU_OBJECT_TYPE_QUEUE:
2514                         ret = kfd_criu_restore_queue(p, (uint8_t __user *)args->priv_data,
2515                                                      priv_offset, max_priv_data_size);
2516                         if (ret)
2517                                 goto exit;
2518                         break;
2519                 case KFD_CRIU_OBJECT_TYPE_EVENT:
2520                         ret = kfd_criu_restore_event(filep, p, (uint8_t __user *)args->priv_data,
2521                                                      priv_offset, max_priv_data_size);
2522                         if (ret)
2523                                 goto exit;
2524                         break;
2525                 case KFD_CRIU_OBJECT_TYPE_SVM_RANGE:
2526                         ret = kfd_criu_restore_svm(p, (uint8_t __user *)args->priv_data,
2527                                                      priv_offset, max_priv_data_size);
2528                         if (ret)
2529                                 goto exit;
2530                         break;
2531                 default:
2532                         pr_err("Invalid object type:%u at index:%d\n", object_type, i);
2533                         ret = -EINVAL;
2534                         goto exit;
2535                 }
2536         }
2537 exit:
2538         return ret;
2539 }
2540
2541 static int criu_restore(struct file *filep,
2542                         struct kfd_process *p,
2543                         struct kfd_ioctl_criu_args *args)
2544 {
2545         uint64_t priv_offset = 0;
2546         int ret = 0;
2547
2548         pr_debug("CRIU restore (num_devices:%u num_bos:%u num_objects:%u priv_data_size:%llu)\n",
2549                  args->num_devices, args->num_bos, args->num_objects, args->priv_data_size);
2550
2551         if (!args->bos || !args->devices || !args->priv_data || !args->priv_data_size ||
2552             !args->num_devices || !args->num_bos)
2553                 return -EINVAL;
2554
2555         mutex_lock(&p->mutex);
2556
2557         /*
2558          * Set the process to evicted state to avoid running any new queues before all the memory
2559          * mappings are ready.
2560          */
2561         ret = kfd_process_evict_queues(p, KFD_QUEUE_EVICTION_CRIU_RESTORE);
2562         if (ret)
2563                 goto exit_unlock;
2564
2565         /* Each function will adjust priv_offset based on how many bytes they consumed */
2566         ret = criu_restore_process(p, args, &priv_offset, args->priv_data_size);
2567         if (ret)
2568                 goto exit_unlock;
2569
2570         ret = criu_restore_devices(p, args, &priv_offset, args->priv_data_size);
2571         if (ret)
2572                 goto exit_unlock;
2573
2574         ret = criu_restore_bos(p, args, &priv_offset, args->priv_data_size);
2575         if (ret)
2576                 goto exit_unlock;
2577
2578         ret = criu_restore_objects(filep, p, args, &priv_offset, args->priv_data_size);
2579         if (ret)
2580                 goto exit_unlock;
2581
2582         if (priv_offset != args->priv_data_size) {
2583                 pr_err("Invalid private data size\n");
2584                 ret = -EINVAL;
2585         }
2586
2587 exit_unlock:
2588         mutex_unlock(&p->mutex);
2589         if (ret)
2590                 pr_err("Failed to restore CRIU ret:%d\n", ret);
2591         else
2592                 pr_debug("CRIU restore successful\n");
2593
2594         return ret;
2595 }
2596
2597 static int criu_unpause(struct file *filep,
2598                         struct kfd_process *p,
2599                         struct kfd_ioctl_criu_args *args)
2600 {
2601         int ret;
2602
2603         mutex_lock(&p->mutex);
2604
2605         if (!p->queues_paused) {
2606                 mutex_unlock(&p->mutex);
2607                 return -EINVAL;
2608         }
2609
2610         ret = kfd_process_restore_queues(p);
2611         if (ret)
2612                 pr_err("Failed to unpause queues ret:%d\n", ret);
2613         else
2614                 p->queues_paused = false;
2615
2616         mutex_unlock(&p->mutex);
2617
2618         return ret;
2619 }
2620
2621 static int criu_resume(struct file *filep,
2622                         struct kfd_process *p,
2623                         struct kfd_ioctl_criu_args *args)
2624 {
2625         struct kfd_process *target = NULL;
2626         struct pid *pid = NULL;
2627         int ret = 0;
2628
2629         pr_debug("Inside %s, target pid for criu restore: %d\n", __func__,
2630                  args->pid);
2631
2632         pid = find_get_pid(args->pid);
2633         if (!pid) {
2634                 pr_err("Cannot find pid info for %i\n", args->pid);
2635                 return -ESRCH;
2636         }
2637
2638         pr_debug("calling kfd_lookup_process_by_pid\n");
2639         target = kfd_lookup_process_by_pid(pid);
2640
2641         put_pid(pid);
2642
2643         if (!target) {
2644                 pr_debug("Cannot find process info for %i\n", args->pid);
2645                 return -ESRCH;
2646         }
2647
2648         mutex_lock(&target->mutex);
2649         ret = kfd_criu_resume_svm(target);
2650         if (ret) {
2651                 pr_err("kfd_criu_resume_svm failed for %i\n", args->pid);
2652                 goto exit;
2653         }
2654
2655         ret =  amdgpu_amdkfd_criu_resume(target->kgd_process_info);
2656         if (ret)
2657                 pr_err("amdgpu_amdkfd_criu_resume failed for %i\n", args->pid);
2658
2659 exit:
2660         mutex_unlock(&target->mutex);
2661
2662         kfd_unref_process(target);
2663         return ret;
2664 }
2665
2666 static int criu_process_info(struct file *filep,
2667                                 struct kfd_process *p,
2668                                 struct kfd_ioctl_criu_args *args)
2669 {
2670         int ret = 0;
2671
2672         mutex_lock(&p->mutex);
2673
2674         if (!p->n_pdds) {
2675                 pr_err("No pdd for given process\n");
2676                 ret = -ENODEV;
2677                 goto err_unlock;
2678         }
2679
2680         ret = kfd_process_evict_queues(p, KFD_QUEUE_EVICTION_CRIU_CHECKPOINT);
2681         if (ret)
2682                 goto err_unlock;
2683
2684         p->queues_paused = true;
2685
2686         args->pid = task_pid_nr_ns(p->lead_thread,
2687                                         task_active_pid_ns(p->lead_thread));
2688
2689         ret = criu_get_process_object_info(p, &args->num_devices, &args->num_bos,
2690                                            &args->num_objects, &args->priv_data_size);
2691         if (ret)
2692                 goto err_unlock;
2693
2694         dev_dbg(kfd_device, "Num of devices:%u bos:%u objects:%u priv_data_size:%lld\n",
2695                                 args->num_devices, args->num_bos, args->num_objects,
2696                                 args->priv_data_size);
2697
2698 err_unlock:
2699         if (ret) {
2700                 kfd_process_restore_queues(p);
2701                 p->queues_paused = false;
2702         }
2703         mutex_unlock(&p->mutex);
2704         return ret;
2705 }
2706
2707 static int kfd_ioctl_criu(struct file *filep, struct kfd_process *p, void *data)
2708 {
2709         struct kfd_ioctl_criu_args *args = data;
2710         int ret;
2711
2712         dev_dbg(kfd_device, "CRIU operation: %d\n", args->op);
2713         switch (args->op) {
2714         case KFD_CRIU_OP_PROCESS_INFO:
2715                 ret = criu_process_info(filep, p, args);
2716                 break;
2717         case KFD_CRIU_OP_CHECKPOINT:
2718                 ret = criu_checkpoint(filep, p, args);
2719                 break;
2720         case KFD_CRIU_OP_UNPAUSE:
2721                 ret = criu_unpause(filep, p, args);
2722                 break;
2723         case KFD_CRIU_OP_RESTORE:
2724                 ret = criu_restore(filep, p, args);
2725                 break;
2726         case KFD_CRIU_OP_RESUME:
2727                 ret = criu_resume(filep, p, args);
2728                 break;
2729         default:
2730                 dev_dbg(kfd_device, "Unsupported CRIU operation:%d\n", args->op);
2731                 ret = -EINVAL;
2732                 break;
2733         }
2734
2735         if (ret)
2736                 dev_dbg(kfd_device, "CRIU operation:%d err:%d\n", args->op, ret);
2737
2738         return ret;
2739 }
2740
2741 static int runtime_enable(struct kfd_process *p, uint64_t r_debug,
2742                         bool enable_ttmp_setup)
2743 {
2744         int i = 0, ret = 0;
2745
2746         if (p->is_runtime_retry)
2747                 goto retry;
2748
2749         if (p->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_DISABLED)
2750                 return -EBUSY;
2751
2752         for (i = 0; i < p->n_pdds; i++) {
2753                 struct kfd_process_device *pdd = p->pdds[i];
2754
2755                 if (pdd->qpd.queue_count)
2756                         return -EEXIST;
2757
2758                 /*
2759                  * Setup TTMPs by default.
2760                  * Note that this call must remain here for MES ADD QUEUE to
2761                  * skip_process_ctx_clear unconditionally as the first call to
2762                  * SET_SHADER_DEBUGGER clears any stale process context data
2763                  * saved in MES.
2764                  */
2765                 if (pdd->dev->kfd->shared_resources.enable_mes)
2766                         kfd_dbg_set_mes_debug_mode(pdd, !kfd_dbg_has_cwsr_workaround(pdd->dev));
2767         }
2768
2769         p->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_ENABLED;
2770         p->runtime_info.r_debug = r_debug;
2771         p->runtime_info.ttmp_setup = enable_ttmp_setup;
2772
2773         if (p->runtime_info.ttmp_setup) {
2774                 for (i = 0; i < p->n_pdds; i++) {
2775                         struct kfd_process_device *pdd = p->pdds[i];
2776
2777                         if (!kfd_dbg_is_rlc_restore_supported(pdd->dev)) {
2778                                 amdgpu_gfx_off_ctrl(pdd->dev->adev, false);
2779                                 pdd->dev->kfd2kgd->enable_debug_trap(
2780                                                 pdd->dev->adev,
2781                                                 true,
2782                                                 pdd->dev->vm_info.last_vmid_kfd);
2783                         } else if (kfd_dbg_is_per_vmid_supported(pdd->dev)) {
2784                                 pdd->spi_dbg_override = pdd->dev->kfd2kgd->enable_debug_trap(
2785                                                 pdd->dev->adev,
2786                                                 false,
2787                                                 0);
2788                         }
2789                 }
2790         }
2791
2792 retry:
2793         if (p->debug_trap_enabled) {
2794                 if (!p->is_runtime_retry) {
2795                         kfd_dbg_trap_activate(p);
2796                         kfd_dbg_ev_raise(KFD_EC_MASK(EC_PROCESS_RUNTIME),
2797                                         p, NULL, 0, false, NULL, 0);
2798                 }
2799
2800                 mutex_unlock(&p->mutex);
2801                 ret = down_interruptible(&p->runtime_enable_sema);
2802                 mutex_lock(&p->mutex);
2803
2804                 p->is_runtime_retry = !!ret;
2805         }
2806
2807         return ret;
2808 }
2809
2810 static int runtime_disable(struct kfd_process *p)
2811 {
2812         int i = 0, ret;
2813         bool was_enabled = p->runtime_info.runtime_state == DEBUG_RUNTIME_STATE_ENABLED;
2814
2815         p->runtime_info.runtime_state = DEBUG_RUNTIME_STATE_DISABLED;
2816         p->runtime_info.r_debug = 0;
2817
2818         if (p->debug_trap_enabled) {
2819                 if (was_enabled)
2820                         kfd_dbg_trap_deactivate(p, false, 0);
2821
2822                 if (!p->is_runtime_retry)
2823                         kfd_dbg_ev_raise(KFD_EC_MASK(EC_PROCESS_RUNTIME),
2824                                         p, NULL, 0, false, NULL, 0);
2825
2826                 mutex_unlock(&p->mutex);
2827                 ret = down_interruptible(&p->runtime_enable_sema);
2828                 mutex_lock(&p->mutex);
2829
2830                 p->is_runtime_retry = !!ret;
2831                 if (ret)
2832                         return ret;
2833         }
2834
2835         if (was_enabled && p->runtime_info.ttmp_setup) {
2836                 for (i = 0; i < p->n_pdds; i++) {
2837                         struct kfd_process_device *pdd = p->pdds[i];
2838
2839                         if (!kfd_dbg_is_rlc_restore_supported(pdd->dev))
2840                                 amdgpu_gfx_off_ctrl(pdd->dev->adev, true);
2841                 }
2842         }
2843
2844         p->runtime_info.ttmp_setup = false;
2845
2846         /* disable ttmp setup */
2847         for (i = 0; i < p->n_pdds; i++) {
2848                 struct kfd_process_device *pdd = p->pdds[i];
2849
2850                 if (kfd_dbg_is_per_vmid_supported(pdd->dev)) {
2851                         pdd->spi_dbg_override =
2852                                         pdd->dev->kfd2kgd->disable_debug_trap(
2853                                         pdd->dev->adev,
2854                                         false,
2855                                         pdd->dev->vm_info.last_vmid_kfd);
2856
2857                         if (!pdd->dev->kfd->shared_resources.enable_mes)
2858                                 debug_refresh_runlist(pdd->dev->dqm);
2859                         else
2860                                 kfd_dbg_set_mes_debug_mode(pdd,
2861                                                            !kfd_dbg_has_cwsr_workaround(pdd->dev));
2862                 }
2863         }
2864
2865         return 0;
2866 }
2867
2868 static int kfd_ioctl_runtime_enable(struct file *filep, struct kfd_process *p, void *data)
2869 {
2870         struct kfd_ioctl_runtime_enable_args *args = data;
2871         int r;
2872
2873         mutex_lock(&p->mutex);
2874
2875         if (args->mode_mask & KFD_RUNTIME_ENABLE_MODE_ENABLE_MASK)
2876                 r = runtime_enable(p, args->r_debug,
2877                                 !!(args->mode_mask & KFD_RUNTIME_ENABLE_MODE_TTMP_SAVE_MASK));
2878         else
2879                 r = runtime_disable(p);
2880
2881         mutex_unlock(&p->mutex);
2882
2883         return r;
2884 }
2885
2886 static int kfd_ioctl_set_debug_trap(struct file *filep, struct kfd_process *p, void *data)
2887 {
2888         struct kfd_ioctl_dbg_trap_args *args = data;
2889         struct task_struct *thread = NULL;
2890         struct mm_struct *mm = NULL;
2891         struct pid *pid = NULL;
2892         struct kfd_process *target = NULL;
2893         struct kfd_process_device *pdd = NULL;
2894         int r = 0;
2895
2896         if (sched_policy == KFD_SCHED_POLICY_NO_HWS) {
2897                 pr_err("Debugging does not support sched_policy %i", sched_policy);
2898                 return -EINVAL;
2899         }
2900
2901         pid = find_get_pid(args->pid);
2902         if (!pid) {
2903                 pr_debug("Cannot find pid info for %i\n", args->pid);
2904                 r = -ESRCH;
2905                 goto out;
2906         }
2907
2908         thread = get_pid_task(pid, PIDTYPE_PID);
2909         if (!thread) {
2910                 r = -ESRCH;
2911                 goto out;
2912         }
2913
2914         mm = get_task_mm(thread);
2915         if (!mm) {
2916                 r = -ESRCH;
2917                 goto out;
2918         }
2919
2920         if (args->op == KFD_IOC_DBG_TRAP_ENABLE) {
2921                 bool create_process;
2922
2923                 rcu_read_lock();
2924                 create_process = thread && thread != current && ptrace_parent(thread) == current;
2925                 rcu_read_unlock();
2926
2927                 target = create_process ? kfd_create_process(thread) :
2928                                         kfd_lookup_process_by_pid(pid);
2929         } else {
2930                 target = kfd_lookup_process_by_pid(pid);
2931         }
2932
2933         if (IS_ERR_OR_NULL(target)) {
2934                 pr_debug("Cannot find process PID %i to debug\n", args->pid);
2935                 r = target ? PTR_ERR(target) : -ESRCH;
2936                 goto out;
2937         }
2938
2939         /* Check if target is still PTRACED. */
2940         rcu_read_lock();
2941         if (target != p && args->op != KFD_IOC_DBG_TRAP_DISABLE
2942                                 && ptrace_parent(target->lead_thread) != current) {
2943                 pr_err("PID %i is not PTRACED and cannot be debugged\n", args->pid);
2944                 r = -EPERM;
2945         }
2946         rcu_read_unlock();
2947
2948         if (r)
2949                 goto out;
2950
2951         mutex_lock(&target->mutex);
2952
2953         if (args->op != KFD_IOC_DBG_TRAP_ENABLE && !target->debug_trap_enabled) {
2954                 pr_err("PID %i not debug enabled for op %i\n", args->pid, args->op);
2955                 r = -EINVAL;
2956                 goto unlock_out;
2957         }
2958
2959         if (target->runtime_info.runtime_state != DEBUG_RUNTIME_STATE_ENABLED &&
2960                         (args->op == KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE ||
2961                          args->op == KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE ||
2962                          args->op == KFD_IOC_DBG_TRAP_SUSPEND_QUEUES ||
2963                          args->op == KFD_IOC_DBG_TRAP_RESUME_QUEUES ||
2964                          args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH ||
2965                          args->op == KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH ||
2966                          args->op == KFD_IOC_DBG_TRAP_SET_FLAGS)) {
2967                 r = -EPERM;
2968                 goto unlock_out;
2969         }
2970
2971         if (args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH ||
2972             args->op == KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH) {
2973                 int user_gpu_id = kfd_process_get_user_gpu_id(target,
2974                                 args->op == KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH ?
2975                                         args->set_node_address_watch.gpu_id :
2976                                         args->clear_node_address_watch.gpu_id);
2977
2978                 pdd = kfd_process_device_data_by_id(target, user_gpu_id);
2979                 if (user_gpu_id == -EINVAL || !pdd) {
2980                         r = -ENODEV;
2981                         goto unlock_out;
2982                 }
2983         }
2984
2985         switch (args->op) {
2986         case KFD_IOC_DBG_TRAP_ENABLE:
2987                 if (target != p)
2988                         target->debugger_process = p;
2989
2990                 r = kfd_dbg_trap_enable(target,
2991                                         args->enable.dbg_fd,
2992                                         (void __user *)args->enable.rinfo_ptr,
2993                                         &args->enable.rinfo_size);
2994                 if (!r)
2995                         target->exception_enable_mask = args->enable.exception_mask;
2996
2997                 break;
2998         case KFD_IOC_DBG_TRAP_DISABLE:
2999                 r = kfd_dbg_trap_disable(target);
3000                 break;
3001         case KFD_IOC_DBG_TRAP_SEND_RUNTIME_EVENT:
3002                 r = kfd_dbg_send_exception_to_runtime(target,
3003                                 args->send_runtime_event.gpu_id,
3004                                 args->send_runtime_event.queue_id,
3005                                 args->send_runtime_event.exception_mask);
3006                 break;
3007         case KFD_IOC_DBG_TRAP_SET_EXCEPTIONS_ENABLED:
3008                 kfd_dbg_set_enabled_debug_exception_mask(target,
3009                                 args->set_exceptions_enabled.exception_mask);
3010                 break;
3011         case KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_OVERRIDE:
3012                 r = kfd_dbg_trap_set_wave_launch_override(target,
3013                                 args->launch_override.override_mode,
3014                                 args->launch_override.enable_mask,
3015                                 args->launch_override.support_request_mask,
3016                                 &args->launch_override.enable_mask,
3017                                 &args->launch_override.support_request_mask);
3018                 break;
3019         case KFD_IOC_DBG_TRAP_SET_WAVE_LAUNCH_MODE:
3020                 r = kfd_dbg_trap_set_wave_launch_mode(target,
3021                                 args->launch_mode.launch_mode);
3022                 break;
3023         case KFD_IOC_DBG_TRAP_SUSPEND_QUEUES:
3024                 r = suspend_queues(target,
3025                                 args->suspend_queues.num_queues,
3026                                 args->suspend_queues.grace_period,
3027                                 args->suspend_queues.exception_mask,
3028                                 (uint32_t *)args->suspend_queues.queue_array_ptr);
3029
3030                 break;
3031         case KFD_IOC_DBG_TRAP_RESUME_QUEUES:
3032                 r = resume_queues(target, args->resume_queues.num_queues,
3033                                 (uint32_t *)args->resume_queues.queue_array_ptr);
3034                 break;
3035         case KFD_IOC_DBG_TRAP_SET_NODE_ADDRESS_WATCH:
3036                 r = kfd_dbg_trap_set_dev_address_watch(pdd,
3037                                 args->set_node_address_watch.address,
3038                                 args->set_node_address_watch.mask,
3039                                 &args->set_node_address_watch.id,
3040                                 args->set_node_address_watch.mode);
3041                 break;
3042         case KFD_IOC_DBG_TRAP_CLEAR_NODE_ADDRESS_WATCH:
3043                 r = kfd_dbg_trap_clear_dev_address_watch(pdd,
3044                                 args->clear_node_address_watch.id);
3045                 break;
3046         case KFD_IOC_DBG_TRAP_SET_FLAGS:
3047                 r = kfd_dbg_trap_set_flags(target, &args->set_flags.flags);
3048                 break;
3049         case KFD_IOC_DBG_TRAP_QUERY_DEBUG_EVENT:
3050                 r = kfd_dbg_ev_query_debug_event(target,
3051                                 &args->query_debug_event.queue_id,
3052                                 &args->query_debug_event.gpu_id,
3053                                 args->query_debug_event.exception_mask,
3054                                 &args->query_debug_event.exception_mask);
3055                 break;
3056         case KFD_IOC_DBG_TRAP_QUERY_EXCEPTION_INFO:
3057                 r = kfd_dbg_trap_query_exception_info(target,
3058                                 args->query_exception_info.source_id,
3059                                 args->query_exception_info.exception_code,
3060                                 args->query_exception_info.clear_exception,
3061                                 (void __user *)args->query_exception_info.info_ptr,
3062                                 &args->query_exception_info.info_size);
3063                 break;
3064         case KFD_IOC_DBG_TRAP_GET_QUEUE_SNAPSHOT:
3065                 r = pqm_get_queue_snapshot(&target->pqm,
3066                                 args->queue_snapshot.exception_mask,
3067                                 (void __user *)args->queue_snapshot.snapshot_buf_ptr,
3068                                 &args->queue_snapshot.num_queues,
3069                                 &args->queue_snapshot.entry_size);
3070                 break;
3071         case KFD_IOC_DBG_TRAP_GET_DEVICE_SNAPSHOT:
3072                 r = kfd_dbg_trap_device_snapshot(target,
3073                                 args->device_snapshot.exception_mask,
3074                                 (void __user *)args->device_snapshot.snapshot_buf_ptr,
3075                                 &args->device_snapshot.num_devices,
3076                                 &args->device_snapshot.entry_size);
3077                 break;
3078         default:
3079                 pr_err("Invalid option: %i\n", args->op);
3080                 r = -EINVAL;
3081         }
3082
3083 unlock_out:
3084         mutex_unlock(&target->mutex);
3085
3086 out:
3087         if (thread)
3088                 put_task_struct(thread);
3089
3090         if (mm)
3091                 mmput(mm);
3092
3093         if (pid)
3094                 put_pid(pid);
3095
3096         if (target)
3097                 kfd_unref_process(target);
3098
3099         return r;
3100 }
3101
3102 #define AMDKFD_IOCTL_DEF(ioctl, _func, _flags) \
3103         [_IOC_NR(ioctl)] = {.cmd = ioctl, .func = _func, .flags = _flags, \
3104                             .cmd_drv = 0, .name = #ioctl}
3105
3106 /** Ioctl table */
3107 static const struct amdkfd_ioctl_desc amdkfd_ioctls[] = {
3108         AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_VERSION,
3109                         kfd_ioctl_get_version, 0),
3110
3111         AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_QUEUE,
3112                         kfd_ioctl_create_queue, 0),
3113
3114         AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_QUEUE,
3115                         kfd_ioctl_destroy_queue, 0),
3116
3117         AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_MEMORY_POLICY,
3118                         kfd_ioctl_set_memory_policy, 0),
3119
3120         AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_CLOCK_COUNTERS,
3121                         kfd_ioctl_get_clock_counters, 0),
3122
3123         AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES,
3124                         kfd_ioctl_get_process_apertures, 0),
3125
3126         AMDKFD_IOCTL_DEF(AMDKFD_IOC_UPDATE_QUEUE,
3127                         kfd_ioctl_update_queue, 0),
3128
3129         AMDKFD_IOCTL_DEF(AMDKFD_IOC_CREATE_EVENT,
3130                         kfd_ioctl_create_event, 0),
3131
3132         AMDKFD_IOCTL_DEF(AMDKFD_IOC_DESTROY_EVENT,
3133                         kfd_ioctl_destroy_event, 0),
3134
3135         AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_EVENT,
3136                         kfd_ioctl_set_event, 0),
3137
3138         AMDKFD_IOCTL_DEF(AMDKFD_IOC_RESET_EVENT,
3139                         kfd_ioctl_reset_event, 0),
3140
3141         AMDKFD_IOCTL_DEF(AMDKFD_IOC_WAIT_EVENTS,
3142                         kfd_ioctl_wait_events, 0),
3143
3144         AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_REGISTER_DEPRECATED,
3145                         kfd_ioctl_dbg_register, 0),
3146
3147         AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_UNREGISTER_DEPRECATED,
3148                         kfd_ioctl_dbg_unregister, 0),
3149
3150         AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_ADDRESS_WATCH_DEPRECATED,
3151                         kfd_ioctl_dbg_address_watch, 0),
3152
3153         AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_WAVE_CONTROL_DEPRECATED,
3154                         kfd_ioctl_dbg_wave_control, 0),
3155
3156         AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_SCRATCH_BACKING_VA,
3157                         kfd_ioctl_set_scratch_backing_va, 0),
3158
3159         AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_TILE_CONFIG,
3160                         kfd_ioctl_get_tile_config, 0),
3161
3162         AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_TRAP_HANDLER,
3163                         kfd_ioctl_set_trap_handler, 0),
3164
3165         AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_PROCESS_APERTURES_NEW,
3166                         kfd_ioctl_get_process_apertures_new, 0),
3167
3168         AMDKFD_IOCTL_DEF(AMDKFD_IOC_ACQUIRE_VM,
3169                         kfd_ioctl_acquire_vm, 0),
3170
3171         AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_MEMORY_OF_GPU,
3172                         kfd_ioctl_alloc_memory_of_gpu, 0),
3173
3174         AMDKFD_IOCTL_DEF(AMDKFD_IOC_FREE_MEMORY_OF_GPU,
3175                         kfd_ioctl_free_memory_of_gpu, 0),
3176
3177         AMDKFD_IOCTL_DEF(AMDKFD_IOC_MAP_MEMORY_TO_GPU,
3178                         kfd_ioctl_map_memory_to_gpu, 0),
3179
3180         AMDKFD_IOCTL_DEF(AMDKFD_IOC_UNMAP_MEMORY_FROM_GPU,
3181                         kfd_ioctl_unmap_memory_from_gpu, 0),
3182
3183         AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_CU_MASK,
3184                         kfd_ioctl_set_cu_mask, 0),
3185
3186         AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_QUEUE_WAVE_STATE,
3187                         kfd_ioctl_get_queue_wave_state, 0),
3188
3189         AMDKFD_IOCTL_DEF(AMDKFD_IOC_GET_DMABUF_INFO,
3190                                 kfd_ioctl_get_dmabuf_info, 0),
3191
3192         AMDKFD_IOCTL_DEF(AMDKFD_IOC_IMPORT_DMABUF,
3193                                 kfd_ioctl_import_dmabuf, 0),
3194
3195         AMDKFD_IOCTL_DEF(AMDKFD_IOC_ALLOC_QUEUE_GWS,
3196                         kfd_ioctl_alloc_queue_gws, 0),
3197
3198         AMDKFD_IOCTL_DEF(AMDKFD_IOC_SMI_EVENTS,
3199                         kfd_ioctl_smi_events, 0),
3200
3201         AMDKFD_IOCTL_DEF(AMDKFD_IOC_SVM, kfd_ioctl_svm, 0),
3202
3203         AMDKFD_IOCTL_DEF(AMDKFD_IOC_SET_XNACK_MODE,
3204                         kfd_ioctl_set_xnack_mode, 0),
3205
3206         AMDKFD_IOCTL_DEF(AMDKFD_IOC_CRIU_OP,
3207                         kfd_ioctl_criu, KFD_IOC_FLAG_CHECKPOINT_RESTORE),
3208
3209         AMDKFD_IOCTL_DEF(AMDKFD_IOC_AVAILABLE_MEMORY,
3210                         kfd_ioctl_get_available_memory, 0),
3211
3212         AMDKFD_IOCTL_DEF(AMDKFD_IOC_EXPORT_DMABUF,
3213                                 kfd_ioctl_export_dmabuf, 0),
3214
3215         AMDKFD_IOCTL_DEF(AMDKFD_IOC_RUNTIME_ENABLE,
3216                         kfd_ioctl_runtime_enable, 0),
3217
3218         AMDKFD_IOCTL_DEF(AMDKFD_IOC_DBG_TRAP,
3219                         kfd_ioctl_set_debug_trap, 0),
3220 };
3221
3222 #define AMDKFD_CORE_IOCTL_COUNT ARRAY_SIZE(amdkfd_ioctls)
3223
3224 static long kfd_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
3225 {
3226         struct kfd_process *process;
3227         amdkfd_ioctl_t *func;
3228         const struct amdkfd_ioctl_desc *ioctl = NULL;
3229         unsigned int nr = _IOC_NR(cmd);
3230         char stack_kdata[128];
3231         char *kdata = NULL;
3232         unsigned int usize, asize;
3233         int retcode = -EINVAL;
3234         bool ptrace_attached = false;
3235
3236         if (nr >= AMDKFD_CORE_IOCTL_COUNT)
3237                 goto err_i1;
3238
3239         if ((nr >= AMDKFD_COMMAND_START) && (nr < AMDKFD_COMMAND_END)) {
3240                 u32 amdkfd_size;
3241
3242                 ioctl = &amdkfd_ioctls[nr];
3243
3244                 amdkfd_size = _IOC_SIZE(ioctl->cmd);
3245                 usize = asize = _IOC_SIZE(cmd);
3246                 if (amdkfd_size > asize)
3247                         asize = amdkfd_size;
3248
3249                 cmd = ioctl->cmd;
3250         } else
3251                 goto err_i1;
3252
3253         dev_dbg(kfd_device, "ioctl cmd 0x%x (#0x%x), arg 0x%lx\n", cmd, nr, arg);
3254
3255         /* Get the process struct from the filep. Only the process
3256          * that opened /dev/kfd can use the file descriptor. Child
3257          * processes need to create their own KFD device context.
3258          */
3259         process = filep->private_data;
3260
3261         rcu_read_lock();
3262         if ((ioctl->flags & KFD_IOC_FLAG_CHECKPOINT_RESTORE) &&
3263             ptrace_parent(process->lead_thread) == current)
3264                 ptrace_attached = true;
3265         rcu_read_unlock();
3266
3267         if (process->lead_thread != current->group_leader
3268             && !ptrace_attached) {
3269                 dev_dbg(kfd_device, "Using KFD FD in wrong process\n");
3270                 retcode = -EBADF;
3271                 goto err_i1;
3272         }
3273
3274         /* Do not trust userspace, use our own definition */
3275         func = ioctl->func;
3276
3277         if (unlikely(!func)) {
3278                 dev_dbg(kfd_device, "no function\n");
3279                 retcode = -EINVAL;
3280                 goto err_i1;
3281         }
3282
3283         /*
3284          * Versions of docker shipped in Ubuntu 18.xx and 20.xx do not support
3285          * CAP_CHECKPOINT_RESTORE, so we also allow access if CAP_SYS_ADMIN as CAP_SYS_ADMIN is a
3286          * more priviledged access.
3287          */
3288         if (unlikely(ioctl->flags & KFD_IOC_FLAG_CHECKPOINT_RESTORE)) {
3289                 if (!capable(CAP_CHECKPOINT_RESTORE) &&
3290                                                 !capable(CAP_SYS_ADMIN)) {
3291                         retcode = -EACCES;
3292                         goto err_i1;
3293                 }
3294         }
3295
3296         if (cmd & (IOC_IN | IOC_OUT)) {
3297                 if (asize <= sizeof(stack_kdata)) {
3298                         kdata = stack_kdata;
3299                 } else {
3300                         kdata = kmalloc(asize, GFP_KERNEL);
3301                         if (!kdata) {
3302                                 retcode = -ENOMEM;
3303                                 goto err_i1;
3304                         }
3305                 }
3306                 if (asize > usize)
3307                         memset(kdata + usize, 0, asize - usize);
3308         }
3309
3310         if (cmd & IOC_IN) {
3311                 if (copy_from_user(kdata, (void __user *)arg, usize) != 0) {
3312                         retcode = -EFAULT;
3313                         goto err_i1;
3314                 }
3315         } else if (cmd & IOC_OUT) {
3316                 memset(kdata, 0, usize);
3317         }
3318
3319         retcode = func(filep, process, kdata);
3320
3321         if (cmd & IOC_OUT)
3322                 if (copy_to_user((void __user *)arg, kdata, usize) != 0)
3323                         retcode = -EFAULT;
3324
3325 err_i1:
3326         if (!ioctl)
3327                 dev_dbg(kfd_device, "invalid ioctl: pid=%d, cmd=0x%02x, nr=0x%02x\n",
3328                           task_pid_nr(current), cmd, nr);
3329
3330         if (kdata != stack_kdata)
3331                 kfree(kdata);
3332
3333         if (retcode)
3334                 dev_dbg(kfd_device, "ioctl cmd (#0x%x), arg 0x%lx, ret = %d\n",
3335                                 nr, arg, retcode);
3336
3337         return retcode;
3338 }
3339
3340 static int kfd_mmio_mmap(struct kfd_node *dev, struct kfd_process *process,
3341                       struct vm_area_struct *vma)
3342 {
3343         phys_addr_t address;
3344
3345         if (vma->vm_end - vma->vm_start != PAGE_SIZE)
3346                 return -EINVAL;
3347
3348         address = dev->adev->rmmio_remap.bus_addr;
3349
3350         vm_flags_set(vma, VM_IO | VM_DONTCOPY | VM_DONTEXPAND | VM_NORESERVE |
3351                                 VM_DONTDUMP | VM_PFNMAP);
3352
3353         vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
3354
3355         pr_debug("pasid 0x%x mapping mmio page\n"
3356                  "     target user address == 0x%08llX\n"
3357                  "     physical address    == 0x%08llX\n"
3358                  "     vm_flags            == 0x%04lX\n"
3359                  "     size                == 0x%04lX\n",
3360                  process->pasid, (unsigned long long) vma->vm_start,
3361                  address, vma->vm_flags, PAGE_SIZE);
3362
3363         return io_remap_pfn_range(vma,
3364                                 vma->vm_start,
3365                                 address >> PAGE_SHIFT,
3366                                 PAGE_SIZE,
3367                                 vma->vm_page_prot);
3368 }
3369
3370
3371 static int kfd_mmap(struct file *filp, struct vm_area_struct *vma)
3372 {
3373         struct kfd_process *process;
3374         struct kfd_node *dev = NULL;
3375         unsigned long mmap_offset;
3376         unsigned int gpu_id;
3377
3378         process = kfd_get_process(current);
3379         if (IS_ERR(process))
3380                 return PTR_ERR(process);
3381
3382         mmap_offset = vma->vm_pgoff << PAGE_SHIFT;
3383         gpu_id = KFD_MMAP_GET_GPU_ID(mmap_offset);
3384         if (gpu_id)
3385                 dev = kfd_device_by_id(gpu_id);
3386
3387         switch (mmap_offset & KFD_MMAP_TYPE_MASK) {
3388         case KFD_MMAP_TYPE_DOORBELL:
3389                 if (!dev)
3390                         return -ENODEV;
3391                 return kfd_doorbell_mmap(dev, process, vma);
3392
3393         case KFD_MMAP_TYPE_EVENTS:
3394                 return kfd_event_mmap(process, vma);
3395
3396         case KFD_MMAP_TYPE_RESERVED_MEM:
3397                 if (!dev)
3398                         return -ENODEV;
3399                 return kfd_reserved_mem_mmap(dev, process, vma);
3400         case KFD_MMAP_TYPE_MMIO:
3401                 if (!dev)
3402                         return -ENODEV;
3403                 return kfd_mmio_mmap(dev, process, vma);
3404         }
3405
3406         return -EFAULT;
3407 }