1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for the TI TPS23881 PoE PSE Controller driver (I2C bus)
8 #include <linux/bitfield.h>
9 #include <linux/delay.h>
10 #include <linux/firmware.h>
11 #include <linux/i2c.h>
12 #include <linux/module.h>
14 #include <linux/platform_device.h>
15 #include <linux/pse-pd/pse.h>
17 #define TPS23881_MAX_CHANS 8
19 #define TPS23881_REG_PW_STATUS 0x10
20 #define TPS23881_REG_OP_MODE 0x12
21 #define TPS23881_OP_MODE_SEMIAUTO 0xaaaa
22 #define TPS23881_REG_DIS_EN 0x13
23 #define TPS23881_REG_DET_CLA_EN 0x14
24 #define TPS23881_REG_GEN_MASK 0x17
25 #define TPS23881_REG_NBITACC BIT(5)
26 #define TPS23881_REG_PW_EN 0x19
27 #define TPS23881_REG_PORT_MAP 0x26
28 #define TPS23881_REG_PORT_POWER 0x29
29 #define TPS23881_REG_POEPLUS 0x40
30 #define TPS23881_REG_TPON BIT(0)
31 #define TPS23881_REG_FWREV 0x41
32 #define TPS23881_REG_DEVID 0x43
33 #define TPS23881_REG_DEVID_MASK 0xF0
34 #define TPS23881_DEVICE_ID 0x02
35 #define TPS23881_REG_SRAM_CTRL 0x60
36 #define TPS23881_REG_SRAM_DATA 0x61
38 struct tps23881_port_desc {
43 struct tps23881_priv {
44 struct i2c_client *client;
45 struct pse_controller_dev pcdev;
46 struct device_node *np;
47 struct tps23881_port_desc port[TPS23881_MAX_CHANS];
50 static struct tps23881_priv *to_tps23881_priv(struct pse_controller_dev *pcdev)
52 return container_of(pcdev, struct tps23881_priv, pcdev);
55 static int tps23881_pi_enable(struct pse_controller_dev *pcdev, int id)
57 struct tps23881_priv *priv = to_tps23881_priv(pcdev);
58 struct i2c_client *client = priv->client;
63 if (id >= TPS23881_MAX_CHANS)
66 ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS);
70 chan = priv->port[id].chan[0];
72 val = (u16)(ret | BIT(chan));
74 val = (u16)(ret | BIT(chan + 4));
76 if (priv->port[id].is_4p) {
77 chan = priv->port[id].chan[1];
84 ret = i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val);
91 static int tps23881_pi_disable(struct pse_controller_dev *pcdev, int id)
93 struct tps23881_priv *priv = to_tps23881_priv(pcdev);
94 struct i2c_client *client = priv->client;
99 if (id >= TPS23881_MAX_CHANS)
102 ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS);
106 chan = priv->port[id].chan[0];
108 val = (u16)(ret | BIT(chan + 4));
110 val = (u16)(ret | BIT(chan + 8));
112 if (priv->port[id].is_4p) {
113 chan = priv->port[id].chan[1];
115 val |= BIT(chan + 4);
117 val |= BIT(chan + 8);
120 ret = i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val);
127 static int tps23881_pi_is_enabled(struct pse_controller_dev *pcdev, int id)
129 struct tps23881_priv *priv = to_tps23881_priv(pcdev);
130 struct i2c_client *client = priv->client;
135 ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS);
139 chan = priv->port[id].chan[0];
141 enabled = ret & BIT(chan);
143 enabled = ret & BIT(chan + 4);
145 if (priv->port[id].is_4p) {
146 chan = priv->port[id].chan[1];
148 enabled &= !!(ret & BIT(chan));
150 enabled &= !!(ret & BIT(chan + 4));
153 /* Return enabled status only if both channel are on this state */
157 static int tps23881_ethtool_get_status(struct pse_controller_dev *pcdev,
159 struct netlink_ext_ack *extack,
160 struct pse_control_status *status)
162 struct tps23881_priv *priv = to_tps23881_priv(pcdev);
163 struct i2c_client *client = priv->client;
164 bool enabled, delivering;
168 ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS);
172 chan = priv->port[id].chan[0];
174 enabled = ret & BIT(chan);
175 delivering = ret & BIT(chan + 4);
177 enabled = ret & BIT(chan + 4);
178 delivering = ret & BIT(chan + 8);
181 if (priv->port[id].is_4p) {
182 chan = priv->port[id].chan[1];
184 enabled &= !!(ret & BIT(chan));
185 delivering &= !!(ret & BIT(chan + 4));
187 enabled &= !!(ret & BIT(chan + 4));
188 delivering &= !!(ret & BIT(chan + 8));
192 /* Return delivering status only if both channel are on this state */
194 status->c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_DELIVERING;
196 status->c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_DISABLED;
198 /* Return enabled status only if both channel are on this state */
200 status->c33_admin_state = ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED;
202 status->c33_admin_state = ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED;
207 /* Parse managers subnode into a array of device node */
209 tps23881_get_of_channels(struct tps23881_priv *priv,
210 struct device_node *chan_node[TPS23881_MAX_CHANS])
212 struct device_node *channels_node, *node;
218 channels_node = of_find_node_by_name(priv->np, "channels");
222 for_each_child_of_node(channels_node, node) {
225 if (!of_node_name_eq(node, "channel"))
228 ret = of_property_read_u32(node, "reg", &chan_id);
234 if (chan_id >= TPS23881_MAX_CHANS || chan_node[chan_id]) {
235 dev_err(&priv->client->dev,
236 "wrong number of port (%d)\n", chan_id);
242 chan_node[chan_id] = node;
245 of_node_put(channels_node);
249 for (i = 0; i < TPS23881_MAX_CHANS; i++) {
250 of_node_put(chan_node[i]);
255 of_node_put(channels_node);
259 struct tps23881_port_matrix {
268 tps23881_match_channel(const struct pse_pi_pairset *pairset,
269 struct device_node *chan_node[TPS23881_MAX_CHANS])
273 /* Look on every channels */
274 for (i = 0; i < TPS23881_MAX_CHANS; i++) {
275 if (pairset->np == chan_node[i])
283 tps23881_is_chan_free(struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS],
288 for (i = 0; i < TPS23881_MAX_CHANS; i++) {
289 if (port_matrix[i].exist &&
290 (port_matrix[i].hw_chan[0] == chan ||
291 port_matrix[i].hw_chan[1] == chan))
298 /* Fill port matrix with the matching channels */
300 tps23881_match_port_matrix(struct pse_pi *pi, int pi_id,
301 struct device_node *chan_node[TPS23881_MAX_CHANS],
302 struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS])
306 if (!pi->pairset[0].np)
309 ret = tps23881_match_channel(&pi->pairset[0], chan_node);
313 if (!tps23881_is_chan_free(port_matrix, ret)) {
314 pr_err("tps23881: channel %d already used\n", ret);
318 port_matrix[pi_id].hw_chan[0] = ret;
319 port_matrix[pi_id].exist = true;
321 if (!pi->pairset[1].np)
324 ret = tps23881_match_channel(&pi->pairset[1], chan_node);
328 if (!tps23881_is_chan_free(port_matrix, ret)) {
329 pr_err("tps23881: channel %d already used\n", ret);
333 if (port_matrix[pi_id].hw_chan[0] / 4 != ret / 4) {
334 pr_err("tps23881: 4-pair PSE can only be set within the same 4 ports group");
338 port_matrix[pi_id].hw_chan[1] = ret;
339 port_matrix[pi_id].is_4p = true;
345 tps23881_get_unused_chan(struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS],
351 for (i = 0; i < TPS23881_MAX_CHANS; i++) {
354 for (j = 0; j < port_cnt; j++) {
355 if (port_matrix[j].hw_chan[0] == i) {
360 if (port_matrix[j].is_4p &&
361 port_matrix[j].hw_chan[1] == i) {
374 /* Sort the port matrix to following particular hardware ports matrix
375 * specification of the tps23881. The device has two 4-ports groups and
376 * each 4-pair powered device has to be configured to use two consecutive
377 * logical channel in each 4 ports group (1 and 2 or 3 and 4). Also the
378 * hardware matrix has to be fully configured even with unused chan to be
382 tps23881_sort_port_matrix(struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS])
384 struct tps23881_port_matrix tmp_port_matrix[TPS23881_MAX_CHANS] = {0};
385 int i, ret, port_cnt = 0, cnt_4ch_grp1 = 0, cnt_4ch_grp2 = 4;
387 /* Configure 4p port matrix */
388 for (i = 0; i < TPS23881_MAX_CHANS; i++) {
391 if (!port_matrix[i].exist || !port_matrix[i].is_4p)
394 if (port_matrix[i].hw_chan[0] < 4)
399 tmp_port_matrix[port_cnt].exist = true;
400 tmp_port_matrix[port_cnt].is_4p = true;
401 tmp_port_matrix[port_cnt].pi_id = i;
402 tmp_port_matrix[port_cnt].hw_chan[0] = port_matrix[i].hw_chan[0];
403 tmp_port_matrix[port_cnt].hw_chan[1] = port_matrix[i].hw_chan[1];
405 /* 4-pair ports have to be configured with consecutive
406 * logical channels 0 and 1, 2 and 3.
408 tmp_port_matrix[port_cnt].lgcl_chan[0] = (*cnt)++;
409 tmp_port_matrix[port_cnt].lgcl_chan[1] = (*cnt)++;
414 /* Configure 2p port matrix */
415 for (i = 0; i < TPS23881_MAX_CHANS; i++) {
418 if (!port_matrix[i].exist || port_matrix[i].is_4p)
421 if (port_matrix[i].hw_chan[0] < 4)
426 tmp_port_matrix[port_cnt].exist = true;
427 tmp_port_matrix[port_cnt].pi_id = i;
428 tmp_port_matrix[port_cnt].lgcl_chan[0] = (*cnt)++;
429 tmp_port_matrix[port_cnt].hw_chan[0] = port_matrix[i].hw_chan[0];
434 /* Complete the rest of the first 4 port group matrix even if
435 * channels are unused
437 while (cnt_4ch_grp1 < 4) {
438 ret = tps23881_get_unused_chan(tmp_port_matrix, port_cnt);
440 pr_err("tps23881: port matrix issue, no chan available\n");
444 if (port_cnt >= TPS23881_MAX_CHANS) {
445 pr_err("tps23881: wrong number of channels\n");
448 tmp_port_matrix[port_cnt].lgcl_chan[0] = cnt_4ch_grp1;
449 tmp_port_matrix[port_cnt].hw_chan[0] = ret;
454 /* Complete the rest of the second 4 port group matrix even if
455 * channels are unused
457 while (cnt_4ch_grp2 < 8) {
458 ret = tps23881_get_unused_chan(tmp_port_matrix, port_cnt);
460 pr_err("tps23881: port matrix issue, no chan available\n");
464 if (port_cnt >= TPS23881_MAX_CHANS) {
465 pr_err("tps23881: wrong number of channels\n");
468 tmp_port_matrix[port_cnt].lgcl_chan[0] = cnt_4ch_grp2;
469 tmp_port_matrix[port_cnt].hw_chan[0] = ret;
474 memcpy(port_matrix, tmp_port_matrix, sizeof(tmp_port_matrix));
479 /* Write port matrix to the hardware port matrix and the software port
483 tps23881_write_port_matrix(struct tps23881_priv *priv,
484 struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS],
487 struct i2c_client *client = priv->client;
488 u8 pi_id, lgcl_chan, hw_chan;
492 for (i = 0; i < port_cnt; i++) {
493 pi_id = port_matrix[i].pi_id;
494 lgcl_chan = port_matrix[i].lgcl_chan[0];
495 hw_chan = port_matrix[i].hw_chan[0] % 4;
497 /* Set software port matrix for existing ports */
498 if (port_matrix[i].exist)
499 priv->port[pi_id].chan[0] = lgcl_chan;
501 /* Set hardware port matrix for all ports */
502 val |= hw_chan << (lgcl_chan * 2);
504 if (!port_matrix[i].is_4p)
507 lgcl_chan = port_matrix[i].lgcl_chan[1];
508 hw_chan = port_matrix[i].hw_chan[1] % 4;
510 /* Set software port matrix for existing ports */
511 if (port_matrix[i].exist) {
512 priv->port[pi_id].is_4p = true;
513 priv->port[pi_id].chan[1] = lgcl_chan;
516 /* Set hardware port matrix for all ports */
517 val |= hw_chan << (lgcl_chan * 2);
520 /* Write hardware ports matrix */
521 ret = i2c_smbus_write_word_data(client, TPS23881_REG_PORT_MAP, val);
529 tps23881_set_ports_conf(struct tps23881_priv *priv,
530 struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS])
532 struct i2c_client *client = priv->client;
536 /* Set operating mode */
537 ret = i2c_smbus_write_word_data(client, TPS23881_REG_OP_MODE,
538 TPS23881_OP_MODE_SEMIAUTO);
542 /* Disable DC disconnect */
543 ret = i2c_smbus_write_word_data(client, TPS23881_REG_DIS_EN, 0x0);
547 /* Set port power allocation */
549 for (i = 0; i < TPS23881_MAX_CHANS; i++) {
550 if (!port_matrix[i].exist)
553 if (port_matrix[i].is_4p)
554 val |= 0xf << ((port_matrix[i].lgcl_chan[0] / 2) * 4);
556 val |= 0x3 << ((port_matrix[i].lgcl_chan[0] / 2) * 4);
558 ret = i2c_smbus_write_word_data(client, TPS23881_REG_PORT_POWER, val);
562 /* Enable detection and classification */
564 for (i = 0; i < TPS23881_MAX_CHANS; i++) {
565 if (!port_matrix[i].exist)
568 val |= BIT(port_matrix[i].lgcl_chan[0]) |
569 BIT(port_matrix[i].lgcl_chan[0] + 4);
570 if (port_matrix[i].is_4p)
571 val |= BIT(port_matrix[i].lgcl_chan[1]) |
572 BIT(port_matrix[i].lgcl_chan[1] + 4);
574 ret = i2c_smbus_write_word_data(client, TPS23881_REG_DET_CLA_EN, val);
582 tps23881_set_ports_matrix(struct tps23881_priv *priv,
583 struct device_node *chan_node[TPS23881_MAX_CHANS])
585 struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS] = {0};
588 /* Update with values for every PSE PIs */
589 for (i = 0; i < TPS23881_MAX_CHANS; i++) {
590 ret = tps23881_match_port_matrix(&priv->pcdev.pi[i], i,
591 chan_node, port_matrix);
596 ret = tps23881_sort_port_matrix(port_matrix);
600 ret = tps23881_write_port_matrix(priv, port_matrix, ret);
604 ret = tps23881_set_ports_conf(priv, port_matrix);
611 static int tps23881_setup_pi_matrix(struct pse_controller_dev *pcdev)
613 struct device_node *chan_node[TPS23881_MAX_CHANS] = {NULL};
614 struct tps23881_priv *priv = to_tps23881_priv(pcdev);
617 ret = tps23881_get_of_channels(priv, chan_node);
619 dev_warn(&priv->client->dev,
620 "Unable to parse port-matrix, default matrix will be used\n");
624 ret = tps23881_set_ports_matrix(priv, chan_node);
626 for (i = 0; i < TPS23881_MAX_CHANS; i++)
627 of_node_put(chan_node[i]);
632 static const struct pse_controller_ops tps23881_ops = {
633 .setup_pi_matrix = tps23881_setup_pi_matrix,
634 .pi_enable = tps23881_pi_enable,
635 .pi_disable = tps23881_pi_disable,
636 .pi_is_enabled = tps23881_pi_is_enabled,
637 .ethtool_get_status = tps23881_ethtool_get_status,
640 static const char fw_parity_name[] = "ti/tps23881/tps23881-parity-14.bin";
641 static const char fw_sram_name[] = "ti/tps23881/tps23881-sram-14.bin";
643 struct tps23881_fw_conf {
648 static const struct tps23881_fw_conf tps23881_fw_parity_conf[] = {
649 {.reg = 0x60, .val = 0x01},
650 {.reg = 0x62, .val = 0x00},
651 {.reg = 0x63, .val = 0x80},
652 {.reg = 0x60, .val = 0xC4},
653 {.reg = 0x1D, .val = 0xBC},
654 {.reg = 0xD7, .val = 0x02},
655 {.reg = 0x91, .val = 0x00},
656 {.reg = 0x90, .val = 0x00},
657 {.reg = 0xD7, .val = 0x00},
658 {.reg = 0x1D, .val = 0x00},
662 static const struct tps23881_fw_conf tps23881_fw_sram_conf[] = {
663 {.reg = 0x60, .val = 0xC5},
664 {.reg = 0x62, .val = 0x00},
665 {.reg = 0x63, .val = 0x80},
666 {.reg = 0x60, .val = 0xC0},
667 {.reg = 0x1D, .val = 0xBC},
668 {.reg = 0xD7, .val = 0x02},
669 {.reg = 0x91, .val = 0x00},
670 {.reg = 0x90, .val = 0x00},
671 {.reg = 0xD7, .val = 0x00},
672 {.reg = 0x1D, .val = 0x00},
676 static int tps23881_flash_sram_fw_part(struct i2c_client *client,
678 const struct tps23881_fw_conf *fw_conf)
680 const struct firmware *fw = NULL;
683 ret = request_firmware(&fw, fw_name, &client->dev);
687 dev_dbg(&client->dev, "Flashing %s\n", fw_name);
689 /* Prepare device for RAM download */
690 while (fw_conf->reg) {
691 ret = i2c_smbus_write_byte_data(client, fw_conf->reg,
699 /* Flash the firmware file */
700 for (i = 0; i < fw->size; i++) {
701 ret = i2c_smbus_write_byte_data(client,
702 TPS23881_REG_SRAM_DATA,
709 release_firmware(fw);
713 static int tps23881_flash_sram_fw(struct i2c_client *client)
717 ret = tps23881_flash_sram_fw_part(client, fw_parity_name,
718 tps23881_fw_parity_conf);
722 ret = tps23881_flash_sram_fw_part(client, fw_sram_name,
723 tps23881_fw_sram_conf);
727 ret = i2c_smbus_write_byte_data(client, TPS23881_REG_SRAM_CTRL, 0x18);
736 static int tps23881_i2c_probe(struct i2c_client *client)
738 struct device *dev = &client->dev;
739 struct tps23881_priv *priv;
743 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
744 dev_err(dev, "i2c check functionality failed\n");
748 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
752 ret = i2c_smbus_read_byte_data(client, TPS23881_REG_DEVID);
756 if (FIELD_GET(TPS23881_REG_DEVID_MASK, ret) != TPS23881_DEVICE_ID) {
757 dev_err(dev, "Wrong device ID\n");
761 ret = tps23881_flash_sram_fw(client);
765 ret = i2c_smbus_read_byte_data(client, TPS23881_REG_FWREV);
769 dev_info(&client->dev, "Firmware revision 0x%x\n", ret);
771 /* Set configuration B, 16 bit access on a single device address */
772 ret = i2c_smbus_read_byte_data(client, TPS23881_REG_GEN_MASK);
776 val = ret | TPS23881_REG_NBITACC;
777 ret = i2c_smbus_write_byte_data(client, TPS23881_REG_GEN_MASK, val);
781 priv->client = client;
782 i2c_set_clientdata(client, priv);
783 priv->np = dev->of_node;
785 priv->pcdev.owner = THIS_MODULE;
786 priv->pcdev.ops = &tps23881_ops;
787 priv->pcdev.dev = dev;
788 priv->pcdev.types = ETHTOOL_PSE_C33;
789 priv->pcdev.nr_lines = TPS23881_MAX_CHANS;
790 ret = devm_pse_controller_register(dev, &priv->pcdev);
792 return dev_err_probe(dev, ret,
793 "failed to register PSE controller\n");
799 static const struct i2c_device_id tps23881_id[] = {
803 MODULE_DEVICE_TABLE(i2c, tps23881_id);
805 static const struct of_device_id tps23881_of_match[] = {
806 { .compatible = "ti,tps23881", },
809 MODULE_DEVICE_TABLE(of, tps23881_of_match);
811 static struct i2c_driver tps23881_driver = {
812 .probe = tps23881_i2c_probe,
813 .id_table = tps23881_id,
816 .of_match_table = tps23881_of_match,
819 module_i2c_driver(tps23881_driver);
822 MODULE_DESCRIPTION("TI TPS23881 PoE PSE Controller driver");
823 MODULE_LICENSE("GPL");