1 // SPDX-License-Identifier: GPL-2.0-only
3 * Analog Devices ADV7511 HDMI Transmitter Device Driver
5 * Copyright 2013 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
9 * This file is named adv7511-v4l2.c so it doesn't conflict with the Analog
10 * Device ADV7511 (config fragment CONFIG_DRM_I2C_ADV7511).
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/slab.h>
17 #include <linux/i2c.h>
18 #include <linux/delay.h>
19 #include <linux/videodev2.h>
20 #include <linux/workqueue.h>
21 #include <linux/hdmi.h>
22 #include <linux/v4l2-dv-timings.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-common.h>
25 #include <media/v4l2-ctrls.h>
26 #include <media/v4l2-dv-timings.h>
27 #include <media/i2c/adv7511.h>
28 #include <media/cec.h>
31 module_param(debug, int, 0644);
32 MODULE_PARM_DESC(debug, "debug level (0-2)");
34 MODULE_DESCRIPTION("Analog Devices ADV7511 HDMI Transmitter Device Driver");
35 MODULE_AUTHOR("Hans Verkuil");
36 MODULE_LICENSE("GPL v2");
38 #define MASK_ADV7511_EDID_RDY_INT 0x04
39 #define MASK_ADV7511_MSEN_INT 0x40
40 #define MASK_ADV7511_HPD_INT 0x80
42 #define MASK_ADV7511_HPD_DETECT 0x40
43 #define MASK_ADV7511_MSEN_DETECT 0x20
44 #define MASK_ADV7511_EDID_RDY 0x10
46 #define EDID_MAX_RETRIES (8)
47 #define EDID_DELAY 250
48 #define EDID_MAX_SEGM 8
50 #define ADV7511_MAX_WIDTH 1920
51 #define ADV7511_MAX_HEIGHT 1200
52 #define ADV7511_MIN_PIXELCLOCK 20000000
53 #define ADV7511_MAX_PIXELCLOCK 225000000
55 #define ADV7511_MAX_ADDRS (3)
58 **********************************************************************
60 * Arrays with configuration parameters for the ADV7511
62 **********************************************************************
65 struct adv7511_state_edid {
66 /* total number of blocks */
68 /* Number of segments read */
70 u8 data[EDID_MAX_SEGM * 256];
71 /* Number of EDID read retries left */
72 unsigned read_retries;
76 struct adv7511_state {
77 struct adv7511_platform_data pdata;
78 struct v4l2_subdev sd;
80 struct v4l2_ctrl_handler hdl;
86 struct i2c_client *i2c_cec;
87 struct cec_adapter *cec_adap;
88 u8 cec_addr[ADV7511_MAX_ADDRS];
90 bool cec_enabled_adap;
92 /* Is the adv7511 powered on? */
94 /* Did we receive hotplug and rx-sense signals? */
97 /* timings from s_dv_timings */
98 struct v4l2_dv_timings dv_timings;
106 struct v4l2_ctrl *hdmi_mode_ctrl;
107 struct v4l2_ctrl *hotplug_ctrl;
108 struct v4l2_ctrl *rx_sense_ctrl;
109 struct v4l2_ctrl *have_edid0_ctrl;
110 struct v4l2_ctrl *rgb_quantization_range_ctrl;
111 struct v4l2_ctrl *content_type_ctrl;
112 struct i2c_client *i2c_edid;
113 struct i2c_client *i2c_pktmem;
114 struct adv7511_state_edid edid;
115 /* Running counter of the number of detected EDIDs (for debugging) */
116 unsigned edid_detect_counter;
117 struct workqueue_struct *work_queue;
118 struct delayed_work edid_handler; /* work entry */
121 static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd);
122 static bool adv7511_check_edid_status(struct v4l2_subdev *sd);
123 static void adv7511_setup(struct v4l2_subdev *sd);
124 static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq);
125 static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq);
128 static const struct v4l2_dv_timings_cap adv7511_timings_cap = {
129 .type = V4L2_DV_BT_656_1120,
130 /* keep this initialization for compatibility with GCC < 4.4.6 */
132 V4L2_INIT_BT_TIMINGS(640, ADV7511_MAX_WIDTH, 350, ADV7511_MAX_HEIGHT,
133 ADV7511_MIN_PIXELCLOCK, ADV7511_MAX_PIXELCLOCK,
134 V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
135 V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
136 V4L2_DV_BT_CAP_PROGRESSIVE | V4L2_DV_BT_CAP_REDUCED_BLANKING |
137 V4L2_DV_BT_CAP_CUSTOM)
140 static inline struct adv7511_state *get_adv7511_state(struct v4l2_subdev *sd)
142 return container_of(sd, struct adv7511_state, sd);
145 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
147 return &container_of(ctrl->handler, struct adv7511_state, hdl)->sd;
150 /* ------------------------ I2C ----------------------------------------------- */
152 static s32 adv_smbus_read_byte_data_check(struct i2c_client *client,
153 u8 command, bool check)
155 union i2c_smbus_data data;
157 if (!i2c_smbus_xfer(client->adapter, client->addr, client->flags,
158 I2C_SMBUS_READ, command,
159 I2C_SMBUS_BYTE_DATA, &data))
162 v4l_err(client, "error reading %02x, %02x\n",
163 client->addr, command);
167 static s32 adv_smbus_read_byte_data(struct i2c_client *client, u8 command)
170 for (i = 0; i < 3; i++) {
171 int ret = adv_smbus_read_byte_data_check(client, command, true);
174 v4l_err(client, "read ok after %d retries\n", i);
178 v4l_err(client, "read failed\n");
182 static int adv7511_rd(struct v4l2_subdev *sd, u8 reg)
184 struct i2c_client *client = v4l2_get_subdevdata(sd);
186 return adv_smbus_read_byte_data(client, reg);
189 static int adv7511_wr(struct v4l2_subdev *sd, u8 reg, u8 val)
191 struct i2c_client *client = v4l2_get_subdevdata(sd);
195 for (i = 0; i < 3; i++) {
196 ret = i2c_smbus_write_byte_data(client, reg, val);
200 v4l2_err(sd, "%s: i2c write error\n", __func__);
204 /* To set specific bits in the register, a clear-mask is given (to be AND-ed),
205 and then the value-mask (to be OR-ed). */
206 static inline void adv7511_wr_and_or(struct v4l2_subdev *sd, u8 reg, u8 clr_mask, u8 val_mask)
208 adv7511_wr(sd, reg, (adv7511_rd(sd, reg) & clr_mask) | val_mask);
211 static int adv7511_edid_rd(struct v4l2_subdev *sd, uint16_t len, uint8_t *buf)
213 struct adv7511_state *state = get_adv7511_state(sd);
216 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
218 for (i = 0; i < len; i += I2C_SMBUS_BLOCK_MAX) {
221 ret = i2c_smbus_read_i2c_block_data(state->i2c_edid, i,
222 I2C_SMBUS_BLOCK_MAX, buf + i);
224 v4l2_err(sd, "%s: i2c read error\n", __func__);
232 static inline int adv7511_cec_read(struct v4l2_subdev *sd, u8 reg)
234 struct adv7511_state *state = get_adv7511_state(sd);
236 return i2c_smbus_read_byte_data(state->i2c_cec, reg);
239 static int adv7511_cec_write(struct v4l2_subdev *sd, u8 reg, u8 val)
241 struct adv7511_state *state = get_adv7511_state(sd);
245 for (i = 0; i < 3; i++) {
246 ret = i2c_smbus_write_byte_data(state->i2c_cec, reg, val);
250 v4l2_err(sd, "%s: I2C Write Problem\n", __func__);
254 static inline int adv7511_cec_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask,
257 return adv7511_cec_write(sd, reg, (adv7511_cec_read(sd, reg) & mask) | val);
260 static int adv7511_pktmem_rd(struct v4l2_subdev *sd, u8 reg)
262 struct adv7511_state *state = get_adv7511_state(sd);
264 return adv_smbus_read_byte_data(state->i2c_pktmem, reg);
267 static inline bool adv7511_have_hotplug(struct v4l2_subdev *sd)
269 return adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT;
272 static inline bool adv7511_have_rx_sense(struct v4l2_subdev *sd)
274 return adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT;
277 static void adv7511_csc_conversion_mode(struct v4l2_subdev *sd, u8 mode)
279 adv7511_wr_and_or(sd, 0x18, 0x9f, (mode & 0x3)<<5);
282 static void adv7511_csc_coeff(struct v4l2_subdev *sd,
283 u16 A1, u16 A2, u16 A3, u16 A4,
284 u16 B1, u16 B2, u16 B3, u16 B4,
285 u16 C1, u16 C2, u16 C3, u16 C4)
288 adv7511_wr_and_or(sd, 0x18, 0xe0, A1>>8);
289 adv7511_wr(sd, 0x19, A1);
290 adv7511_wr_and_or(sd, 0x1A, 0xe0, A2>>8);
291 adv7511_wr(sd, 0x1B, A2);
292 adv7511_wr_and_or(sd, 0x1c, 0xe0, A3>>8);
293 adv7511_wr(sd, 0x1d, A3);
294 adv7511_wr_and_or(sd, 0x1e, 0xe0, A4>>8);
295 adv7511_wr(sd, 0x1f, A4);
298 adv7511_wr_and_or(sd, 0x20, 0xe0, B1>>8);
299 adv7511_wr(sd, 0x21, B1);
300 adv7511_wr_and_or(sd, 0x22, 0xe0, B2>>8);
301 adv7511_wr(sd, 0x23, B2);
302 adv7511_wr_and_or(sd, 0x24, 0xe0, B3>>8);
303 adv7511_wr(sd, 0x25, B3);
304 adv7511_wr_and_or(sd, 0x26, 0xe0, B4>>8);
305 adv7511_wr(sd, 0x27, B4);
308 adv7511_wr_and_or(sd, 0x28, 0xe0, C1>>8);
309 adv7511_wr(sd, 0x29, C1);
310 adv7511_wr_and_or(sd, 0x2A, 0xe0, C2>>8);
311 adv7511_wr(sd, 0x2B, C2);
312 adv7511_wr_and_or(sd, 0x2C, 0xe0, C3>>8);
313 adv7511_wr(sd, 0x2D, C3);
314 adv7511_wr_and_or(sd, 0x2E, 0xe0, C4>>8);
315 adv7511_wr(sd, 0x2F, C4);
318 static void adv7511_csc_rgb_full2limit(struct v4l2_subdev *sd, bool enable)
322 adv7511_csc_conversion_mode(sd, csc_mode);
323 adv7511_csc_coeff(sd,
326 0, 0, 4096-564, 256);
328 adv7511_wr_and_or(sd, 0x18, 0x7f, 0x80);
329 /* AVI infoframe: Limited range RGB (16-235) */
330 adv7511_wr_and_or(sd, 0x57, 0xf3, 0x04);
333 adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0);
334 /* AVI infoframe: Full range RGB (0-255) */
335 adv7511_wr_and_or(sd, 0x57, 0xf3, 0x08);
339 static void adv7511_set_rgb_quantization_mode(struct v4l2_subdev *sd, struct v4l2_ctrl *ctrl)
341 struct adv7511_state *state = get_adv7511_state(sd);
343 /* Only makes sense for RGB formats */
344 if (state->fmt_code != MEDIA_BUS_FMT_RGB888_1X24) {
345 /* so just keep quantization */
346 adv7511_csc_rgb_full2limit(sd, false);
351 case V4L2_DV_RGB_RANGE_AUTO:
353 if (state->dv_timings.bt.flags & V4L2_DV_FL_IS_CE_VIDEO) {
354 /* CE format, RGB limited range (16-235) */
355 adv7511_csc_rgb_full2limit(sd, true);
357 /* not CE format, RGB full range (0-255) */
358 adv7511_csc_rgb_full2limit(sd, false);
361 case V4L2_DV_RGB_RANGE_LIMITED:
362 /* RGB limited range (16-235) */
363 adv7511_csc_rgb_full2limit(sd, true);
365 case V4L2_DV_RGB_RANGE_FULL:
366 /* RGB full range (0-255) */
367 adv7511_csc_rgb_full2limit(sd, false);
372 /* ------------------------------ CTRL OPS ------------------------------ */
374 static int adv7511_s_ctrl(struct v4l2_ctrl *ctrl)
376 struct v4l2_subdev *sd = to_sd(ctrl);
377 struct adv7511_state *state = get_adv7511_state(sd);
379 v4l2_dbg(1, debug, sd, "%s: ctrl id: %d, ctrl->val %d\n", __func__, ctrl->id, ctrl->val);
381 if (state->hdmi_mode_ctrl == ctrl) {
382 /* Set HDMI or DVI-D */
383 adv7511_wr_and_or(sd, 0xaf, 0xfd, ctrl->val == V4L2_DV_TX_MODE_HDMI ? 0x02 : 0x00);
386 if (state->rgb_quantization_range_ctrl == ctrl) {
387 adv7511_set_rgb_quantization_mode(sd, ctrl);
390 if (state->content_type_ctrl == ctrl) {
393 state->content_type = ctrl->val;
394 itc = state->content_type != V4L2_DV_IT_CONTENT_TYPE_NO_ITC;
395 cn = itc ? state->content_type : V4L2_DV_IT_CONTENT_TYPE_GRAPHICS;
396 adv7511_wr_and_or(sd, 0x57, 0x7f, itc << 7);
397 adv7511_wr_and_or(sd, 0x59, 0xcf, cn << 4);
404 static const struct v4l2_ctrl_ops adv7511_ctrl_ops = {
405 .s_ctrl = adv7511_s_ctrl,
408 /* ---------------------------- CORE OPS ------------------------------------------- */
410 #ifdef CONFIG_VIDEO_ADV_DEBUG
411 static void adv7511_inv_register(struct v4l2_subdev *sd)
413 struct adv7511_state *state = get_adv7511_state(sd);
415 v4l2_info(sd, "0x000-0x0ff: Main Map\n");
417 v4l2_info(sd, "0x100-0x1ff: CEC Map\n");
420 static int adv7511_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
422 struct adv7511_state *state = get_adv7511_state(sd);
425 switch (reg->reg >> 8) {
427 reg->val = adv7511_rd(sd, reg->reg & 0xff);
430 if (state->i2c_cec) {
431 reg->val = adv7511_cec_read(sd, reg->reg & 0xff);
436 v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
437 adv7511_inv_register(sd);
443 static int adv7511_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
445 struct adv7511_state *state = get_adv7511_state(sd);
447 switch (reg->reg >> 8) {
449 adv7511_wr(sd, reg->reg & 0xff, reg->val & 0xff);
452 if (state->i2c_cec) {
453 adv7511_cec_write(sd, reg->reg & 0xff, reg->val & 0xff);
458 v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
459 adv7511_inv_register(sd);
466 struct adv7511_cfg_read_infoframe {
474 static u8 hdmi_infoframe_checksum(u8 *ptr, size_t size)
479 /* compute checksum */
480 for (i = 0; i < size; i++)
486 static void log_infoframe(struct v4l2_subdev *sd, const struct adv7511_cfg_read_infoframe *cri)
488 struct i2c_client *client = v4l2_get_subdevdata(sd);
489 struct device *dev = &client->dev;
490 union hdmi_infoframe frame;
495 if (!(adv7511_rd(sd, cri->present_reg) & cri->present_mask)) {
496 v4l2_info(sd, "%s infoframe not transmitted\n", cri->desc);
500 memcpy(buffer, cri->header, sizeof(cri->header));
504 if (len + 4 > sizeof(buffer)) {
505 v4l2_err(sd, "%s: invalid %s infoframe length %d\n", __func__, cri->desc, len);
509 if (cri->payload_addr >= 0x100) {
510 for (i = 0; i < len; i++)
511 buffer[i + 4] = adv7511_pktmem_rd(sd, cri->payload_addr + i - 0x100);
513 for (i = 0; i < len; i++)
514 buffer[i + 4] = adv7511_rd(sd, cri->payload_addr + i);
517 buffer[3] = hdmi_infoframe_checksum(buffer, len + 4);
519 if (hdmi_infoframe_unpack(&frame, buffer, len + 4) < 0) {
520 v4l2_err(sd, "%s: unpack of %s infoframe failed\n", __func__, cri->desc);
524 hdmi_infoframe_log(KERN_INFO, dev, &frame);
527 static void adv7511_log_infoframes(struct v4l2_subdev *sd)
529 static const struct adv7511_cfg_read_infoframe cri[] = {
530 { "AVI", 0x44, 0x10, { 0x82, 2, 13 }, 0x55 },
531 { "Audio", 0x44, 0x08, { 0x84, 1, 10 }, 0x73 },
532 { "SDP", 0x40, 0x40, { 0x83, 1, 25 }, 0x103 },
536 for (i = 0; i < ARRAY_SIZE(cri); i++)
537 log_infoframe(sd, &cri[i]);
540 static int adv7511_log_status(struct v4l2_subdev *sd)
542 struct adv7511_state *state = get_adv7511_state(sd);
543 struct adv7511_state_edid *edid = &state->edid;
546 static const char * const states[] = {
552 "initializing HDCP repeater",
553 "6", "7", "8", "9", "A", "B", "C", "D", "E", "F"
555 static const char * const errors[] = {
562 "max repeater cascade exceeded",
565 "9", "A", "B", "C", "D", "E", "F"
568 v4l2_info(sd, "power %s\n", state->power_on ? "on" : "off");
569 v4l2_info(sd, "%s hotplug, %s Rx Sense, %s EDID (%d block(s))\n",
570 (adv7511_rd(sd, 0x42) & MASK_ADV7511_HPD_DETECT) ? "detected" : "no",
571 (adv7511_rd(sd, 0x42) & MASK_ADV7511_MSEN_DETECT) ? "detected" : "no",
572 edid->segments ? "found" : "no",
574 v4l2_info(sd, "%s output %s\n",
575 (adv7511_rd(sd, 0xaf) & 0x02) ?
577 (adv7511_rd(sd, 0xa1) & 0x3c) ?
578 "disabled" : "enabled");
579 v4l2_info(sd, "state: %s, error: %s, detect count: %u, msk/irq: %02x/%02x\n",
580 states[adv7511_rd(sd, 0xc8) & 0xf],
581 errors[adv7511_rd(sd, 0xc8) >> 4], state->edid_detect_counter,
582 adv7511_rd(sd, 0x94), adv7511_rd(sd, 0x96));
583 v4l2_info(sd, "RGB quantization: %s range\n", adv7511_rd(sd, 0x18) & 0x80 ? "limited" : "full");
584 if (adv7511_rd(sd, 0xaf) & 0x02) {
586 u8 manual_cts = adv7511_rd(sd, 0x0a) & 0x80;
587 u32 N = (adv7511_rd(sd, 0x01) & 0xf) << 16 |
588 adv7511_rd(sd, 0x02) << 8 |
589 adv7511_rd(sd, 0x03);
590 u8 vic_detect = adv7511_rd(sd, 0x3e) >> 2;
591 u8 vic_sent = adv7511_rd(sd, 0x3d) & 0x3f;
595 CTS = (adv7511_rd(sd, 0x07) & 0xf) << 16 |
596 adv7511_rd(sd, 0x08) << 8 |
597 adv7511_rd(sd, 0x09);
599 CTS = (adv7511_rd(sd, 0x04) & 0xf) << 16 |
600 adv7511_rd(sd, 0x05) << 8 |
601 adv7511_rd(sd, 0x06);
602 v4l2_info(sd, "CTS %s mode: N %d, CTS %d\n",
603 manual_cts ? "manual" : "automatic", N, CTS);
604 v4l2_info(sd, "VIC: detected %d, sent %d\n",
605 vic_detect, vic_sent);
606 adv7511_log_infoframes(sd);
608 if (state->dv_timings.type == V4L2_DV_BT_656_1120)
609 v4l2_print_dv_timings(sd->name, "timings: ",
610 &state->dv_timings, false);
612 v4l2_info(sd, "no timings set\n");
613 v4l2_info(sd, "i2c edid addr: 0x%x\n", state->i2c_edid_addr);
615 if (state->i2c_cec == NULL)
618 v4l2_info(sd, "i2c cec addr: 0x%x\n", state->i2c_cec_addr);
620 v4l2_info(sd, "CEC: %s\n", state->cec_enabled_adap ?
621 "enabled" : "disabled");
622 if (state->cec_enabled_adap) {
623 for (i = 0; i < ADV7511_MAX_ADDRS; i++) {
624 bool is_valid = state->cec_valid_addrs & (1 << i);
627 v4l2_info(sd, "CEC Logical Address: 0x%x\n",
631 v4l2_info(sd, "i2c pktmem addr: 0x%x\n", state->i2c_pktmem_addr);
635 /* Power up/down adv7511 */
636 static int adv7511_s_power(struct v4l2_subdev *sd, int on)
638 struct adv7511_state *state = get_adv7511_state(sd);
639 const int retries = 20;
642 v4l2_dbg(1, debug, sd, "%s: power %s\n", __func__, on ? "on" : "off");
644 state->power_on = on;
648 adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40);
653 /* The adv7511 does not always come up immediately.
654 Retry multiple times. */
655 for (i = 0; i < retries; i++) {
656 adv7511_wr_and_or(sd, 0x41, 0xbf, 0x0);
657 if ((adv7511_rd(sd, 0x41) & 0x40) == 0)
659 adv7511_wr_and_or(sd, 0x41, 0xbf, 0x40);
663 v4l2_dbg(1, debug, sd, "%s: failed to powerup the adv7511!\n", __func__);
664 adv7511_s_power(sd, 0);
668 v4l2_dbg(1, debug, sd, "%s: needed %d retries to powerup the adv7511\n", __func__, i);
670 /* Reserved registers that must be set */
671 adv7511_wr(sd, 0x98, 0x03);
672 adv7511_wr_and_or(sd, 0x9a, 0xfe, 0x70);
673 adv7511_wr(sd, 0x9c, 0x30);
674 adv7511_wr_and_or(sd, 0x9d, 0xfc, 0x01);
675 adv7511_wr(sd, 0xa2, 0xa4);
676 adv7511_wr(sd, 0xa3, 0xa4);
677 adv7511_wr(sd, 0xe0, 0xd0);
678 adv7511_wr(sd, 0xf9, 0x00);
680 adv7511_wr(sd, 0x43, state->i2c_edid_addr);
681 adv7511_wr(sd, 0x45, state->i2c_pktmem_addr);
683 /* Set number of attempts to read the EDID */
684 adv7511_wr(sd, 0xc9, 0xf);
688 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC)
689 static int adv7511_cec_adap_enable(struct cec_adapter *adap, bool enable)
691 struct adv7511_state *state = cec_get_drvdata(adap);
692 struct v4l2_subdev *sd = &state->sd;
694 if (state->i2c_cec == NULL)
697 if (!state->cec_enabled_adap && enable) {
698 /* power up cec section */
699 adv7511_cec_write_and_or(sd, 0x4e, 0xfc, 0x01);
700 /* legacy mode and clear all rx buffers */
701 adv7511_cec_write(sd, 0x4a, 0x00);
702 adv7511_cec_write(sd, 0x4a, 0x07);
703 adv7511_cec_write_and_or(sd, 0x11, 0xfe, 0); /* initially disable tx */
706 /* tx: arbitration lost */
707 /* tx: retry timeout */
709 if (state->enabled_irq)
710 adv7511_wr_and_or(sd, 0x95, 0xc0, 0x39);
711 } else if (state->cec_enabled_adap && !enable) {
712 if (state->enabled_irq)
713 adv7511_wr_and_or(sd, 0x95, 0xc0, 0x00);
714 /* disable address mask 1-3 */
715 adv7511_cec_write_and_or(sd, 0x4b, 0x8f, 0x00);
716 /* power down cec section */
717 adv7511_cec_write_and_or(sd, 0x4e, 0xfc, 0x00);
718 state->cec_valid_addrs = 0;
720 state->cec_enabled_adap = enable;
724 static int adv7511_cec_adap_log_addr(struct cec_adapter *adap, u8 addr)
726 struct adv7511_state *state = cec_get_drvdata(adap);
727 struct v4l2_subdev *sd = &state->sd;
728 unsigned int i, free_idx = ADV7511_MAX_ADDRS;
730 if (!state->cec_enabled_adap)
731 return addr == CEC_LOG_ADDR_INVALID ? 0 : -EIO;
733 if (addr == CEC_LOG_ADDR_INVALID) {
734 adv7511_cec_write_and_or(sd, 0x4b, 0x8f, 0);
735 state->cec_valid_addrs = 0;
739 for (i = 0; i < ADV7511_MAX_ADDRS; i++) {
740 bool is_valid = state->cec_valid_addrs & (1 << i);
742 if (free_idx == ADV7511_MAX_ADDRS && !is_valid)
744 if (is_valid && state->cec_addr[i] == addr)
747 if (i == ADV7511_MAX_ADDRS) {
749 if (i == ADV7511_MAX_ADDRS)
752 state->cec_addr[i] = addr;
753 state->cec_valid_addrs |= 1 << i;
757 /* enable address mask 0 */
758 adv7511_cec_write_and_or(sd, 0x4b, 0xef, 0x10);
759 /* set address for mask 0 */
760 adv7511_cec_write_and_or(sd, 0x4c, 0xf0, addr);
763 /* enable address mask 1 */
764 adv7511_cec_write_and_or(sd, 0x4b, 0xdf, 0x20);
765 /* set address for mask 1 */
766 adv7511_cec_write_and_or(sd, 0x4c, 0x0f, addr << 4);
769 /* enable address mask 2 */
770 adv7511_cec_write_and_or(sd, 0x4b, 0xbf, 0x40);
771 /* set address for mask 1 */
772 adv7511_cec_write_and_or(sd, 0x4d, 0xf0, addr);
778 static int adv7511_cec_adap_transmit(struct cec_adapter *adap, u8 attempts,
779 u32 signal_free_time, struct cec_msg *msg)
781 struct adv7511_state *state = cec_get_drvdata(adap);
782 struct v4l2_subdev *sd = &state->sd;
786 v4l2_dbg(1, debug, sd, "%s: len %d\n", __func__, len);
789 v4l2_err(sd, "%s: len exceeded 16 (%d)\n", __func__, len);
794 * The number of retries is the number of attempts - 1, but retry
795 * at least once. It's not clear if a value of 0 is allowed, so
796 * let's do at least one retry.
798 adv7511_cec_write_and_or(sd, 0x12, ~0x70, max(1, attempts - 1) << 4);
800 /* clear cec tx irq status */
801 adv7511_wr(sd, 0x97, 0x38);
804 for (i = 0; i < len; i++)
805 adv7511_cec_write(sd, i, msg->msg[i]);
807 /* set length (data + header) */
808 adv7511_cec_write(sd, 0x10, len);
809 /* start transmit, enable tx */
810 adv7511_cec_write(sd, 0x11, 0x01);
814 static void adv_cec_tx_raw_status(struct v4l2_subdev *sd, u8 tx_raw_status)
816 struct adv7511_state *state = get_adv7511_state(sd);
818 if ((adv7511_cec_read(sd, 0x11) & 0x01) == 0) {
819 v4l2_dbg(1, debug, sd, "%s: tx raw: tx disabled\n", __func__);
823 if (tx_raw_status & 0x10) {
824 v4l2_dbg(1, debug, sd,
825 "%s: tx raw: arbitration lost\n", __func__);
826 cec_transmit_done(state->cec_adap, CEC_TX_STATUS_ARB_LOST,
830 if (tx_raw_status & 0x08) {
835 v4l2_dbg(1, debug, sd, "%s: tx raw: retry failed\n", __func__);
837 * We set this status bit since this hardware performs
840 status = CEC_TX_STATUS_MAX_RETRIES;
841 nack_cnt = adv7511_cec_read(sd, 0x14) & 0xf;
843 status |= CEC_TX_STATUS_NACK;
844 low_drive_cnt = adv7511_cec_read(sd, 0x14) >> 4;
846 status |= CEC_TX_STATUS_LOW_DRIVE;
847 cec_transmit_done(state->cec_adap, status,
848 0, nack_cnt, low_drive_cnt, 0);
851 if (tx_raw_status & 0x20) {
852 v4l2_dbg(1, debug, sd, "%s: tx raw: ready ok\n", __func__);
853 cec_transmit_done(state->cec_adap, CEC_TX_STATUS_OK, 0, 0, 0, 0);
858 static const struct cec_adap_ops adv7511_cec_adap_ops = {
859 .adap_enable = adv7511_cec_adap_enable,
860 .adap_log_addr = adv7511_cec_adap_log_addr,
861 .adap_transmit = adv7511_cec_adap_transmit,
865 /* Enable interrupts */
866 static void adv7511_set_isr(struct v4l2_subdev *sd, bool enable)
868 struct adv7511_state *state = get_adv7511_state(sd);
869 u8 irqs = MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT;
873 v4l2_dbg(2, debug, sd, "%s: %s\n", __func__, enable ? "enable" : "disable");
875 if (state->enabled_irq == enable)
877 state->enabled_irq = enable;
879 /* The datasheet says that the EDID ready interrupt should be
880 disabled if there is no hotplug. */
883 else if (adv7511_have_hotplug(sd))
884 irqs |= MASK_ADV7511_EDID_RDY_INT;
887 * This i2c write can fail (approx. 1 in 1000 writes). But it
888 * is essential that this register is correct, so retry it
891 * Note that the i2c write does not report an error, but the readback
892 * clearly shows the wrong value.
895 adv7511_wr(sd, 0x94, irqs);
896 irqs_rd = adv7511_rd(sd, 0x94);
897 } while (retries-- && irqs_rd != irqs);
900 v4l2_err(sd, "Could not set interrupts: hw failure?\n");
902 adv7511_wr_and_or(sd, 0x95, 0xc0,
903 (state->cec_enabled_adap && enable) ? 0x39 : 0x00);
906 /* Interrupt handler */
907 static int adv7511_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
912 /* disable interrupts to prevent a race condition */
913 adv7511_set_isr(sd, false);
914 irq_status = adv7511_rd(sd, 0x96);
915 cec_irq = adv7511_rd(sd, 0x97);
916 /* clear detected interrupts */
917 adv7511_wr(sd, 0x96, irq_status);
918 adv7511_wr(sd, 0x97, cec_irq);
920 v4l2_dbg(1, debug, sd, "%s: irq 0x%x, cec-irq 0x%x\n", __func__,
921 irq_status, cec_irq);
923 if (irq_status & (MASK_ADV7511_HPD_INT | MASK_ADV7511_MSEN_INT))
924 adv7511_check_monitor_present_status(sd);
925 if (irq_status & MASK_ADV7511_EDID_RDY_INT)
926 adv7511_check_edid_status(sd);
928 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC)
930 adv_cec_tx_raw_status(sd, cec_irq);
933 struct adv7511_state *state = get_adv7511_state(sd);
936 msg.len = adv7511_cec_read(sd, 0x25) & 0x1f;
938 v4l2_dbg(1, debug, sd, "%s: cec msg len %d\n", __func__,
941 if (msg.len > CEC_MAX_MSG_SIZE)
942 msg.len = CEC_MAX_MSG_SIZE;
947 for (i = 0; i < msg.len; i++)
948 msg.msg[i] = adv7511_cec_read(sd, i + 0x15);
950 adv7511_cec_write(sd, 0x4a, 0); /* toggle to re-enable rx 1 */
951 adv7511_cec_write(sd, 0x4a, 1);
952 cec_received_msg(state->cec_adap, &msg);
957 /* enable interrupts */
958 adv7511_set_isr(sd, true);
965 static const struct v4l2_subdev_core_ops adv7511_core_ops = {
966 .log_status = adv7511_log_status,
967 #ifdef CONFIG_VIDEO_ADV_DEBUG
968 .g_register = adv7511_g_register,
969 .s_register = adv7511_s_register,
971 .s_power = adv7511_s_power,
972 .interrupt_service_routine = adv7511_isr,
975 /* ------------------------------ VIDEO OPS ------------------------------ */
977 /* Enable/disable adv7511 output */
978 static int adv7511_s_stream(struct v4l2_subdev *sd, int enable)
980 struct adv7511_state *state = get_adv7511_state(sd);
982 v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis"));
983 adv7511_wr_and_or(sd, 0xa1, ~0x3c, (enable ? 0 : 0x3c));
985 adv7511_check_monitor_present_status(sd);
987 adv7511_s_power(sd, 0);
988 state->have_monitor = false;
993 static int adv7511_s_dv_timings(struct v4l2_subdev *sd, unsigned int pad,
994 struct v4l2_dv_timings *timings)
996 struct adv7511_state *state = get_adv7511_state(sd);
997 struct v4l2_bt_timings *bt = &timings->bt;
1000 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1005 /* quick sanity check */
1006 if (!v4l2_valid_dv_timings(timings, &adv7511_timings_cap, NULL, NULL))
1009 /* Fill the optional fields .standards and .flags in struct v4l2_dv_timings
1010 if the format is one of the CEA or DMT timings. */
1011 v4l2_find_dv_timings_cap(timings, &adv7511_timings_cap, 0, NULL, NULL);
1014 state->dv_timings = *timings;
1016 /* set h/vsync polarities */
1017 adv7511_wr_and_or(sd, 0x17, 0x9f,
1018 ((bt->polarities & V4L2_DV_VSYNC_POS_POL) ? 0 : 0x40) |
1019 ((bt->polarities & V4L2_DV_HSYNC_POS_POL) ? 0 : 0x20));
1021 fps = (u32)bt->pixelclock / (V4L2_DV_BT_FRAME_WIDTH(bt) * V4L2_DV_BT_FRAME_HEIGHT(bt));
1024 adv7511_wr_and_or(sd, 0xfb, 0xf9, 1 << 1);
1027 adv7511_wr_and_or(sd, 0xfb, 0xf9, 2 << 1);
1030 adv7511_wr_and_or(sd, 0xfb, 0xf9, 3 << 1);
1033 adv7511_wr_and_or(sd, 0xfb, 0xf9, 0);
1037 /* update quantization range based on new dv_timings */
1038 adv7511_set_rgb_quantization_mode(sd, state->rgb_quantization_range_ctrl);
1043 static int adv7511_g_dv_timings(struct v4l2_subdev *sd, unsigned int pad,
1044 struct v4l2_dv_timings *timings)
1046 struct adv7511_state *state = get_adv7511_state(sd);
1048 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1056 *timings = state->dv_timings;
1061 static int adv7511_enum_dv_timings(struct v4l2_subdev *sd,
1062 struct v4l2_enum_dv_timings *timings)
1064 if (timings->pad != 0)
1067 return v4l2_enum_dv_timings_cap(timings, &adv7511_timings_cap, NULL, NULL);
1070 static int adv7511_dv_timings_cap(struct v4l2_subdev *sd,
1071 struct v4l2_dv_timings_cap *cap)
1076 *cap = adv7511_timings_cap;
1080 static const struct v4l2_subdev_video_ops adv7511_video_ops = {
1081 .s_stream = adv7511_s_stream,
1084 /* ------------------------------ AUDIO OPS ------------------------------ */
1085 static int adv7511_s_audio_stream(struct v4l2_subdev *sd, int enable)
1087 v4l2_dbg(1, debug, sd, "%s: %sable\n", __func__, (enable ? "en" : "dis"));
1090 adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x80);
1092 adv7511_wr_and_or(sd, 0x4b, 0x3f, 0x40);
1097 static int adv7511_s_clock_freq(struct v4l2_subdev *sd, u32 freq)
1102 case 32000: N = 4096; break;
1103 case 44100: N = 6272; break;
1104 case 48000: N = 6144; break;
1105 case 88200: N = 12544; break;
1106 case 96000: N = 12288; break;
1107 case 176400: N = 25088; break;
1108 case 192000: N = 24576; break;
1113 /* Set N (used with CTS to regenerate the audio clock) */
1114 adv7511_wr(sd, 0x01, (N >> 16) & 0xf);
1115 adv7511_wr(sd, 0x02, (N >> 8) & 0xff);
1116 adv7511_wr(sd, 0x03, N & 0xff);
1121 static int adv7511_s_i2s_clock_freq(struct v4l2_subdev *sd, u32 freq)
1126 case 32000: i2s_sf = 0x30; break;
1127 case 44100: i2s_sf = 0x00; break;
1128 case 48000: i2s_sf = 0x20; break;
1129 case 88200: i2s_sf = 0x80; break;
1130 case 96000: i2s_sf = 0xa0; break;
1131 case 176400: i2s_sf = 0xc0; break;
1132 case 192000: i2s_sf = 0xe0; break;
1137 /* Set sampling frequency for I2S audio to 48 kHz */
1138 adv7511_wr_and_or(sd, 0x15, 0xf, i2s_sf);
1143 static int adv7511_s_routing(struct v4l2_subdev *sd, u32 input, u32 output, u32 config)
1145 /* Only 2 channels in use for application */
1146 adv7511_wr_and_or(sd, 0x73, 0xf8, 0x1);
1147 /* Speaker mapping */
1148 adv7511_wr(sd, 0x76, 0x00);
1150 /* 16 bit audio word length */
1151 adv7511_wr_and_or(sd, 0x14, 0xf0, 0x02);
1156 static const struct v4l2_subdev_audio_ops adv7511_audio_ops = {
1157 .s_stream = adv7511_s_audio_stream,
1158 .s_clock_freq = adv7511_s_clock_freq,
1159 .s_i2s_clock_freq = adv7511_s_i2s_clock_freq,
1160 .s_routing = adv7511_s_routing,
1163 /* ---------------------------- PAD OPS ------------------------------------- */
1165 static int adv7511_get_edid(struct v4l2_subdev *sd, struct v4l2_edid *edid)
1167 struct adv7511_state *state = get_adv7511_state(sd);
1169 memset(edid->reserved, 0, sizeof(edid->reserved));
1174 if (edid->start_block == 0 && edid->blocks == 0) {
1175 edid->blocks = state->edid.blocks;
1179 if (state->edid.blocks == 0)
1182 if (edid->start_block >= state->edid.blocks)
1185 if (edid->start_block + edid->blocks > state->edid.blocks)
1186 edid->blocks = state->edid.blocks - edid->start_block;
1188 memcpy(edid->edid, &state->edid.data[edid->start_block * 128],
1189 128 * edid->blocks);
1194 static int adv7511_enum_mbus_code(struct v4l2_subdev *sd,
1195 struct v4l2_subdev_state *sd_state,
1196 struct v4l2_subdev_mbus_code_enum *code)
1201 switch (code->index) {
1203 code->code = MEDIA_BUS_FMT_RGB888_1X24;
1206 code->code = MEDIA_BUS_FMT_YUYV8_1X16;
1209 code->code = MEDIA_BUS_FMT_UYVY8_1X16;
1217 static void adv7511_fill_format(struct adv7511_state *state,
1218 struct v4l2_mbus_framefmt *format)
1220 format->width = state->dv_timings.bt.width;
1221 format->height = state->dv_timings.bt.height;
1222 format->field = V4L2_FIELD_NONE;
1225 static int adv7511_get_fmt(struct v4l2_subdev *sd,
1226 struct v4l2_subdev_state *sd_state,
1227 struct v4l2_subdev_format *format)
1229 struct adv7511_state *state = get_adv7511_state(sd);
1231 if (format->pad != 0)
1234 memset(&format->format, 0, sizeof(format->format));
1235 adv7511_fill_format(state, &format->format);
1237 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
1238 struct v4l2_mbus_framefmt *fmt;
1240 fmt = v4l2_subdev_state_get_format(sd_state, format->pad);
1241 format->format.code = fmt->code;
1242 format->format.colorspace = fmt->colorspace;
1243 format->format.ycbcr_enc = fmt->ycbcr_enc;
1244 format->format.quantization = fmt->quantization;
1245 format->format.xfer_func = fmt->xfer_func;
1247 format->format.code = state->fmt_code;
1248 format->format.colorspace = state->colorspace;
1249 format->format.ycbcr_enc = state->ycbcr_enc;
1250 format->format.quantization = state->quantization;
1251 format->format.xfer_func = state->xfer_func;
1257 static int adv7511_set_fmt(struct v4l2_subdev *sd,
1258 struct v4l2_subdev_state *sd_state,
1259 struct v4l2_subdev_format *format)
1261 struct adv7511_state *state = get_adv7511_state(sd);
1263 * Bitfield namings come the CEA-861-F standard, table 8 "Auxiliary
1264 * Video Information (AVI) InfoFrame Format"
1267 * ec = Extended Colorimetry
1269 * q = RGB Quantization Range
1270 * yq = YCC Quantization Range
1272 u8 c = HDMI_COLORIMETRY_NONE;
1273 u8 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
1274 u8 y = HDMI_COLORSPACE_RGB;
1275 u8 q = HDMI_QUANTIZATION_RANGE_DEFAULT;
1276 u8 yq = HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
1277 u8 itc = state->content_type != V4L2_DV_IT_CONTENT_TYPE_NO_ITC;
1278 u8 cn = itc ? state->content_type : V4L2_DV_IT_CONTENT_TYPE_GRAPHICS;
1280 if (format->pad != 0)
1282 switch (format->format.code) {
1283 case MEDIA_BUS_FMT_UYVY8_1X16:
1284 case MEDIA_BUS_FMT_YUYV8_1X16:
1285 case MEDIA_BUS_FMT_RGB888_1X24:
1291 adv7511_fill_format(state, &format->format);
1292 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
1293 struct v4l2_mbus_framefmt *fmt;
1295 fmt = v4l2_subdev_state_get_format(sd_state, format->pad);
1296 fmt->code = format->format.code;
1297 fmt->colorspace = format->format.colorspace;
1298 fmt->ycbcr_enc = format->format.ycbcr_enc;
1299 fmt->quantization = format->format.quantization;
1300 fmt->xfer_func = format->format.xfer_func;
1304 switch (format->format.code) {
1305 case MEDIA_BUS_FMT_UYVY8_1X16:
1306 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01);
1307 adv7511_wr_and_or(sd, 0x16, 0x03, 0xb8);
1308 y = HDMI_COLORSPACE_YUV422;
1310 case MEDIA_BUS_FMT_YUYV8_1X16:
1311 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x01);
1312 adv7511_wr_and_or(sd, 0x16, 0x03, 0xbc);
1313 y = HDMI_COLORSPACE_YUV422;
1315 case MEDIA_BUS_FMT_RGB888_1X24:
1317 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x00);
1318 adv7511_wr_and_or(sd, 0x16, 0x03, 0x00);
1321 state->fmt_code = format->format.code;
1322 state->colorspace = format->format.colorspace;
1323 state->ycbcr_enc = format->format.ycbcr_enc;
1324 state->quantization = format->format.quantization;
1325 state->xfer_func = format->format.xfer_func;
1327 switch (format->format.colorspace) {
1328 case V4L2_COLORSPACE_OPRGB:
1329 c = HDMI_COLORIMETRY_EXTENDED;
1330 ec = y ? HDMI_EXTENDED_COLORIMETRY_OPYCC_601 :
1331 HDMI_EXTENDED_COLORIMETRY_OPRGB;
1333 case V4L2_COLORSPACE_SMPTE170M:
1334 c = y ? HDMI_COLORIMETRY_ITU_601 : HDMI_COLORIMETRY_NONE;
1335 if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_XV601) {
1336 c = HDMI_COLORIMETRY_EXTENDED;
1337 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
1340 case V4L2_COLORSPACE_REC709:
1341 c = y ? HDMI_COLORIMETRY_ITU_709 : HDMI_COLORIMETRY_NONE;
1342 if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_XV709) {
1343 c = HDMI_COLORIMETRY_EXTENDED;
1344 ec = HDMI_EXTENDED_COLORIMETRY_XV_YCC_709;
1347 case V4L2_COLORSPACE_SRGB:
1348 c = y ? HDMI_COLORIMETRY_EXTENDED : HDMI_COLORIMETRY_NONE;
1349 ec = y ? HDMI_EXTENDED_COLORIMETRY_S_YCC_601 :
1350 HDMI_EXTENDED_COLORIMETRY_XV_YCC_601;
1352 case V4L2_COLORSPACE_BT2020:
1353 c = HDMI_COLORIMETRY_EXTENDED;
1354 if (y && format->format.ycbcr_enc == V4L2_YCBCR_ENC_BT2020_CONST_LUM)
1355 ec = 5; /* Not yet available in hdmi.h */
1357 ec = 6; /* Not yet available in hdmi.h */
1364 * CEA-861-F says that for RGB formats the YCC range must match the
1365 * RGB range, although sources should ignore the YCC range.
1367 * The RGB quantization range shouldn't be non-zero if the EDID doesn't
1368 * have the Q bit set in the Video Capabilities Data Block, however this
1369 * isn't checked at the moment. The assumption is that the application
1370 * knows the EDID and can detect this.
1372 * The same is true for the YCC quantization range: non-standard YCC
1373 * quantization ranges should only be sent if the EDID has the YQ bit
1374 * set in the Video Capabilities Data Block.
1376 switch (format->format.quantization) {
1377 case V4L2_QUANTIZATION_FULL_RANGE:
1378 q = y ? HDMI_QUANTIZATION_RANGE_DEFAULT :
1379 HDMI_QUANTIZATION_RANGE_FULL;
1380 yq = q ? q - 1 : HDMI_YCC_QUANTIZATION_RANGE_FULL;
1382 case V4L2_QUANTIZATION_LIM_RANGE:
1383 q = y ? HDMI_QUANTIZATION_RANGE_DEFAULT :
1384 HDMI_QUANTIZATION_RANGE_LIMITED;
1385 yq = q ? q - 1 : HDMI_YCC_QUANTIZATION_RANGE_LIMITED;
1389 adv7511_wr_and_or(sd, 0x4a, 0xbf, 0);
1390 adv7511_wr_and_or(sd, 0x55, 0x9f, y << 5);
1391 adv7511_wr_and_or(sd, 0x56, 0x3f, c << 6);
1392 adv7511_wr_and_or(sd, 0x57, 0x83, (ec << 4) | (q << 2) | (itc << 7));
1393 adv7511_wr_and_or(sd, 0x59, 0x0f, (yq << 6) | (cn << 4));
1394 adv7511_wr_and_or(sd, 0x4a, 0xff, 1);
1395 adv7511_set_rgb_quantization_mode(sd, state->rgb_quantization_range_ctrl);
1400 static const struct v4l2_subdev_pad_ops adv7511_pad_ops = {
1401 .get_edid = adv7511_get_edid,
1402 .enum_mbus_code = adv7511_enum_mbus_code,
1403 .get_fmt = adv7511_get_fmt,
1404 .set_fmt = adv7511_set_fmt,
1405 .s_dv_timings = adv7511_s_dv_timings,
1406 .g_dv_timings = adv7511_g_dv_timings,
1407 .enum_dv_timings = adv7511_enum_dv_timings,
1408 .dv_timings_cap = adv7511_dv_timings_cap,
1411 /* --------------------- SUBDEV OPS --------------------------------------- */
1413 static const struct v4l2_subdev_ops adv7511_ops = {
1414 .core = &adv7511_core_ops,
1415 .pad = &adv7511_pad_ops,
1416 .video = &adv7511_video_ops,
1417 .audio = &adv7511_audio_ops,
1420 /* ----------------------------------------------------------------------- */
1421 static void adv7511_dbg_dump_edid(int lvl, int debug, struct v4l2_subdev *sd, int segment, u8 *buf)
1425 v4l2_dbg(lvl, debug, sd, "edid segment %d\n", segment);
1426 for (i = 0; i < 256; i += 16) {
1430 v4l2_dbg(lvl, debug, sd, "\n");
1431 for (j = i; j < i + 16; j++) {
1432 sprintf(bp, "0x%02x, ", buf[j]);
1436 v4l2_dbg(lvl, debug, sd, "%s\n", b);
1441 static void adv7511_notify_no_edid(struct v4l2_subdev *sd)
1443 struct adv7511_state *state = get_adv7511_state(sd);
1444 struct adv7511_edid_detect ed;
1446 /* We failed to read the EDID, so send an event for this. */
1448 ed.segment = adv7511_rd(sd, 0xc4);
1449 ed.phys_addr = CEC_PHYS_ADDR_INVALID;
1450 cec_s_phys_addr(state->cec_adap, ed.phys_addr, false);
1451 v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed);
1452 v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, 0x0);
1455 static void adv7511_edid_handler(struct work_struct *work)
1457 struct delayed_work *dwork = to_delayed_work(work);
1458 struct adv7511_state *state = container_of(dwork, struct adv7511_state, edid_handler);
1459 struct v4l2_subdev *sd = &state->sd;
1461 v4l2_dbg(1, debug, sd, "%s:\n", __func__);
1463 if (adv7511_check_edid_status(sd)) {
1464 /* Return if we received the EDID. */
1468 if (adv7511_have_hotplug(sd)) {
1469 /* We must retry reading the EDID several times, it is possible
1470 * that initially the EDID couldn't be read due to i2c errors
1471 * (DVI connectors are particularly prone to this problem). */
1472 if (state->edid.read_retries) {
1473 state->edid.read_retries--;
1474 v4l2_dbg(1, debug, sd, "%s: edid read failed\n", __func__);
1475 state->have_monitor = false;
1476 adv7511_s_power(sd, false);
1477 adv7511_s_power(sd, true);
1478 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1483 /* We failed to read the EDID, so send an event for this. */
1484 adv7511_notify_no_edid(sd);
1485 v4l2_dbg(1, debug, sd, "%s: no edid found\n", __func__);
1488 static void adv7511_audio_setup(struct v4l2_subdev *sd)
1490 v4l2_dbg(1, debug, sd, "%s\n", __func__);
1492 adv7511_s_i2s_clock_freq(sd, 48000);
1493 adv7511_s_clock_freq(sd, 48000);
1494 adv7511_s_routing(sd, 0, 0, 0);
1497 /* Configure hdmi transmitter. */
1498 static void adv7511_setup(struct v4l2_subdev *sd)
1500 struct adv7511_state *state = get_adv7511_state(sd);
1501 v4l2_dbg(1, debug, sd, "%s\n", __func__);
1503 /* Input format: RGB 4:4:4 */
1504 adv7511_wr_and_or(sd, 0x15, 0xf0, 0x0);
1505 /* Output format: RGB 4:4:4 */
1506 adv7511_wr_and_or(sd, 0x16, 0x7f, 0x0);
1507 /* 1st order interpolation 4:2:2 -> 4:4:4 up conversion, Aspect ratio: 16:9 */
1508 adv7511_wr_and_or(sd, 0x17, 0xf9, 0x06);
1509 /* Disable pixel repetition */
1510 adv7511_wr_and_or(sd, 0x3b, 0x9f, 0x0);
1512 adv7511_wr_and_or(sd, 0x18, 0x7f, 0x0);
1513 /* Output format: RGB 4:4:4, Active Format Information is valid,
1515 adv7511_wr_and_or(sd, 0x55, 0x9c, 0x12);
1516 /* AVI Info frame packet enable, Audio Info frame disable */
1517 adv7511_wr_and_or(sd, 0x44, 0xe7, 0x10);
1518 /* Colorimetry, Active format aspect ratio: same as picure. */
1519 adv7511_wr(sd, 0x56, 0xa8);
1521 adv7511_wr_and_or(sd, 0xaf, 0xed, 0x0);
1523 /* Positive clk edge capture for input video clock */
1524 adv7511_wr_and_or(sd, 0xba, 0x1f, 0x60);
1526 adv7511_audio_setup(sd);
1528 v4l2_ctrl_handler_setup(&state->hdl);
1531 static void adv7511_notify_monitor_detect(struct v4l2_subdev *sd)
1533 struct adv7511_monitor_detect mdt;
1534 struct adv7511_state *state = get_adv7511_state(sd);
1536 mdt.present = state->have_monitor;
1537 v4l2_subdev_notify(sd, ADV7511_MONITOR_DETECT, (void *)&mdt);
1540 static void adv7511_check_monitor_present_status(struct v4l2_subdev *sd)
1542 struct adv7511_state *state = get_adv7511_state(sd);
1543 /* read hotplug and rx-sense state */
1544 u8 status = adv7511_rd(sd, 0x42);
1546 v4l2_dbg(1, debug, sd, "%s: status: 0x%x%s%s\n",
1549 status & MASK_ADV7511_HPD_DETECT ? ", hotplug" : "",
1550 status & MASK_ADV7511_MSEN_DETECT ? ", rx-sense" : "");
1552 /* update read only ctrls */
1553 v4l2_ctrl_s_ctrl(state->hotplug_ctrl, adv7511_have_hotplug(sd) ? 0x1 : 0x0);
1554 v4l2_ctrl_s_ctrl(state->rx_sense_ctrl, adv7511_have_rx_sense(sd) ? 0x1 : 0x0);
1556 if ((status & MASK_ADV7511_HPD_DETECT) && ((status & MASK_ADV7511_MSEN_DETECT) || state->edid.segments)) {
1557 v4l2_dbg(1, debug, sd, "%s: hotplug and (rx-sense or edid)\n", __func__);
1558 if (!state->have_monitor) {
1559 v4l2_dbg(1, debug, sd, "%s: monitor detected\n", __func__);
1560 state->have_monitor = true;
1561 adv7511_set_isr(sd, true);
1562 if (!adv7511_s_power(sd, true)) {
1563 v4l2_dbg(1, debug, sd, "%s: monitor detected, powerup failed\n", __func__);
1567 adv7511_notify_monitor_detect(sd);
1568 state->edid.read_retries = EDID_MAX_RETRIES;
1569 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1571 } else if (status & MASK_ADV7511_HPD_DETECT) {
1572 v4l2_dbg(1, debug, sd, "%s: hotplug detected\n", __func__);
1573 state->edid.read_retries = EDID_MAX_RETRIES;
1574 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1575 } else if (!(status & MASK_ADV7511_HPD_DETECT)) {
1576 v4l2_dbg(1, debug, sd, "%s: hotplug not detected\n", __func__);
1577 if (state->have_monitor) {
1578 v4l2_dbg(1, debug, sd, "%s: monitor not detected\n", __func__);
1579 state->have_monitor = false;
1580 adv7511_notify_monitor_detect(sd);
1582 adv7511_s_power(sd, false);
1583 memset(&state->edid, 0, sizeof(struct adv7511_state_edid));
1584 adv7511_notify_no_edid(sd);
1588 static bool edid_block_verify_crc(u8 *edid_block)
1593 for (i = 0; i < 128; i++)
1594 sum += edid_block[i];
1598 static bool edid_verify_crc(struct v4l2_subdev *sd, u32 segment)
1600 struct adv7511_state *state = get_adv7511_state(sd);
1601 u32 blocks = state->edid.blocks;
1602 u8 *data = state->edid.data;
1604 if (!edid_block_verify_crc(&data[segment * 256]))
1606 if ((segment + 1) * 2 <= blocks)
1607 return edid_block_verify_crc(&data[segment * 256 + 128]);
1611 static bool edid_verify_header(struct v4l2_subdev *sd, u32 segment)
1613 static const u8 hdmi_header[] = {
1614 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1616 struct adv7511_state *state = get_adv7511_state(sd);
1617 u8 *data = state->edid.data;
1621 return !memcmp(data, hdmi_header, sizeof(hdmi_header));
1624 static bool adv7511_check_edid_status(struct v4l2_subdev *sd)
1626 struct adv7511_state *state = get_adv7511_state(sd);
1627 u8 edidRdy = adv7511_rd(sd, 0xc5);
1629 v4l2_dbg(1, debug, sd, "%s: edid ready (retries: %d)\n",
1630 __func__, EDID_MAX_RETRIES - state->edid.read_retries);
1632 if (state->edid.complete)
1635 if (edidRdy & MASK_ADV7511_EDID_RDY) {
1636 int segment = adv7511_rd(sd, 0xc4);
1637 struct adv7511_edid_detect ed;
1640 if (segment >= EDID_MAX_SEGM) {
1641 v4l2_err(sd, "edid segment number too big\n");
1644 v4l2_dbg(1, debug, sd, "%s: got segment %d\n", __func__, segment);
1645 err = adv7511_edid_rd(sd, 256, &state->edid.data[segment * 256]);
1647 adv7511_dbg_dump_edid(2, debug, sd, segment, &state->edid.data[segment * 256]);
1649 state->edid.blocks = state->edid.data[0x7e] + 1;
1650 v4l2_dbg(1, debug, sd, "%s: %d blocks in total\n",
1651 __func__, state->edid.blocks);
1655 if (err || !edid_verify_crc(sd, segment) || !edid_verify_header(sd, segment)) {
1656 /* Couldn't read EDID or EDID is invalid. Force retry! */
1658 v4l2_err(sd, "%s: edid crc or header error\n", __func__);
1659 state->have_monitor = false;
1660 adv7511_s_power(sd, false);
1661 adv7511_s_power(sd, true);
1664 /* one more segment read ok */
1665 state->edid.segments = segment + 1;
1666 v4l2_ctrl_s_ctrl(state->have_edid0_ctrl, 0x1);
1667 if (((state->edid.data[0x7e] >> 1) + 1) > state->edid.segments) {
1668 /* Request next EDID segment */
1669 v4l2_dbg(1, debug, sd, "%s: request segment %d\n", __func__, state->edid.segments);
1670 adv7511_wr(sd, 0xc9, 0xf);
1671 adv7511_wr(sd, 0xc4, state->edid.segments);
1672 state->edid.read_retries = EDID_MAX_RETRIES;
1673 queue_delayed_work(state->work_queue, &state->edid_handler, EDID_DELAY);
1677 v4l2_dbg(1, debug, sd, "%s: edid complete with %d segment(s)\n", __func__, state->edid.segments);
1678 state->edid.complete = true;
1679 ed.phys_addr = cec_get_edid_phys_addr(state->edid.data,
1680 state->edid.segments * 256,
1682 /* report when we have all segments
1683 but report only for segment 0
1687 state->edid_detect_counter++;
1688 cec_s_phys_addr(state->cec_adap, ed.phys_addr, false);
1689 v4l2_subdev_notify(sd, ADV7511_EDID_DETECT, (void *)&ed);
1696 static int adv7511_registered(struct v4l2_subdev *sd)
1698 struct adv7511_state *state = get_adv7511_state(sd);
1699 struct i2c_client *client = v4l2_get_subdevdata(sd);
1702 err = cec_register_adapter(state->cec_adap, &client->dev);
1704 cec_delete_adapter(state->cec_adap);
1708 static void adv7511_unregistered(struct v4l2_subdev *sd)
1710 struct adv7511_state *state = get_adv7511_state(sd);
1712 cec_unregister_adapter(state->cec_adap);
1715 static const struct v4l2_subdev_internal_ops adv7511_int_ops = {
1716 .registered = adv7511_registered,
1717 .unregistered = adv7511_unregistered,
1720 /* ----------------------------------------------------------------------- */
1722 static void adv7511_init_setup(struct v4l2_subdev *sd)
1724 struct adv7511_state *state = get_adv7511_state(sd);
1725 struct adv7511_state_edid *edid = &state->edid;
1726 u32 cec_clk = state->pdata.cec_clk;
1729 v4l2_dbg(1, debug, sd, "%s\n", __func__);
1731 /* clear all interrupts */
1732 adv7511_wr(sd, 0x96, 0xff);
1733 adv7511_wr(sd, 0x97, 0xff);
1735 * Stop HPD from resetting a lot of registers.
1736 * It might leave the chip in a partly un-initialized state,
1737 * in particular with regards to hotplug bounces.
1739 adv7511_wr_and_or(sd, 0xd6, 0x3f, 0xc0);
1740 memset(edid, 0, sizeof(struct adv7511_state_edid));
1741 state->have_monitor = false;
1742 adv7511_set_isr(sd, false);
1743 adv7511_s_stream(sd, false);
1744 adv7511_s_audio_stream(sd, false);
1746 if (state->i2c_cec == NULL)
1749 v4l2_dbg(1, debug, sd, "%s: cec_clk %d\n", __func__, cec_clk);
1751 /* cec soft reset */
1752 adv7511_cec_write(sd, 0x50, 0x01);
1753 adv7511_cec_write(sd, 0x50, 0x00);
1756 adv7511_cec_write(sd, 0x4a, 0x00);
1757 adv7511_cec_write(sd, 0x4a, 0x07);
1759 if (cec_clk % 750000 != 0)
1760 v4l2_err(sd, "%s: cec_clk %d, not multiple of 750 Khz\n",
1763 ratio = (cec_clk / 750000) - 1;
1764 adv7511_cec_write(sd, 0x4e, ratio << 2);
1767 static int adv7511_probe(struct i2c_client *client)
1769 struct adv7511_state *state;
1770 struct adv7511_platform_data *pdata = client->dev.platform_data;
1771 struct v4l2_ctrl_handler *hdl;
1772 struct v4l2_subdev *sd;
1776 /* Check if the adapter supports the needed features */
1777 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1780 state = devm_kzalloc(&client->dev, sizeof(struct adv7511_state), GFP_KERNEL);
1786 v4l_err(client, "No platform data!\n");
1789 memcpy(&state->pdata, pdata, sizeof(state->pdata));
1790 state->fmt_code = MEDIA_BUS_FMT_RGB888_1X24;
1791 state->colorspace = V4L2_COLORSPACE_SRGB;
1795 v4l2_dbg(1, debug, sd, "detecting adv7511 client on address 0x%x\n",
1798 v4l2_i2c_subdev_init(sd, client, &adv7511_ops);
1799 sd->internal_ops = &adv7511_int_ops;
1802 v4l2_ctrl_handler_init(hdl, 10);
1803 /* add in ascending ID order */
1804 state->hdmi_mode_ctrl = v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
1805 V4L2_CID_DV_TX_MODE, V4L2_DV_TX_MODE_HDMI,
1806 0, V4L2_DV_TX_MODE_DVI_D);
1807 state->hotplug_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1808 V4L2_CID_DV_TX_HOTPLUG, 0, 1, 0, 0);
1809 state->rx_sense_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1810 V4L2_CID_DV_TX_RXSENSE, 0, 1, 0, 0);
1811 state->have_edid0_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1812 V4L2_CID_DV_TX_EDID_PRESENT, 0, 1, 0, 0);
1813 state->rgb_quantization_range_ctrl =
1814 v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
1815 V4L2_CID_DV_TX_RGB_RANGE, V4L2_DV_RGB_RANGE_FULL,
1816 0, V4L2_DV_RGB_RANGE_AUTO);
1817 state->content_type_ctrl =
1818 v4l2_ctrl_new_std_menu(hdl, &adv7511_ctrl_ops,
1819 V4L2_CID_DV_TX_IT_CONTENT_TYPE, V4L2_DV_IT_CONTENT_TYPE_NO_ITC,
1820 0, V4L2_DV_IT_CONTENT_TYPE_NO_ITC);
1821 sd->ctrl_handler = hdl;
1826 state->pad.flags = MEDIA_PAD_FL_SINK;
1827 sd->entity.function = MEDIA_ENT_F_DV_ENCODER;
1828 err = media_entity_pads_init(&sd->entity, 1, &state->pad);
1832 /* EDID and CEC i2c addr */
1833 state->i2c_edid_addr = state->pdata.i2c_edid << 1;
1834 state->i2c_cec_addr = state->pdata.i2c_cec << 1;
1835 state->i2c_pktmem_addr = state->pdata.i2c_pktmem << 1;
1837 state->chip_revision = adv7511_rd(sd, 0x0);
1838 chip_id[0] = adv7511_rd(sd, 0xf5);
1839 chip_id[1] = adv7511_rd(sd, 0xf6);
1840 if (chip_id[0] != 0x75 || chip_id[1] != 0x11) {
1841 v4l2_err(sd, "chip_id != 0x7511, read 0x%02x%02x\n", chip_id[0],
1847 state->i2c_edid = i2c_new_dummy_device(client->adapter,
1848 state->i2c_edid_addr >> 1);
1849 if (IS_ERR(state->i2c_edid)) {
1850 v4l2_err(sd, "failed to register edid i2c client\n");
1851 err = PTR_ERR(state->i2c_edid);
1855 adv7511_wr(sd, 0xe1, state->i2c_cec_addr);
1856 if (state->pdata.cec_clk < 3000000 ||
1857 state->pdata.cec_clk > 100000000) {
1858 v4l2_err(sd, "%s: cec_clk %u outside range, disabling cec\n",
1859 __func__, state->pdata.cec_clk);
1860 state->pdata.cec_clk = 0;
1863 if (state->pdata.cec_clk) {
1864 state->i2c_cec = i2c_new_dummy_device(client->adapter,
1865 state->i2c_cec_addr >> 1);
1866 if (IS_ERR(state->i2c_cec)) {
1867 v4l2_err(sd, "failed to register cec i2c client\n");
1868 err = PTR_ERR(state->i2c_cec);
1869 goto err_unreg_edid;
1871 adv7511_wr(sd, 0xe2, 0x00); /* power up cec section */
1873 adv7511_wr(sd, 0xe2, 0x01); /* power down cec section */
1876 state->i2c_pktmem = i2c_new_dummy_device(client->adapter, state->i2c_pktmem_addr >> 1);
1877 if (IS_ERR(state->i2c_pktmem)) {
1878 v4l2_err(sd, "failed to register pktmem i2c client\n");
1879 err = PTR_ERR(state->i2c_pktmem);
1883 state->work_queue = create_singlethread_workqueue(sd->name);
1884 if (state->work_queue == NULL) {
1885 v4l2_err(sd, "could not create workqueue\n");
1887 goto err_unreg_pktmem;
1890 INIT_DELAYED_WORK(&state->edid_handler, adv7511_edid_handler);
1892 adv7511_init_setup(sd);
1894 #if IS_ENABLED(CONFIG_VIDEO_ADV7511_CEC)
1895 state->cec_adap = cec_allocate_adapter(&adv7511_cec_adap_ops,
1896 state, dev_name(&client->dev), CEC_CAP_DEFAULTS,
1898 err = PTR_ERR_OR_ZERO(state->cec_adap);
1900 destroy_workqueue(state->work_queue);
1901 goto err_unreg_pktmem;
1905 adv7511_set_isr(sd, true);
1906 adv7511_check_monitor_present_status(sd);
1908 v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
1909 client->addr << 1, client->adapter->name);
1913 i2c_unregister_device(state->i2c_pktmem);
1915 i2c_unregister_device(state->i2c_cec);
1917 i2c_unregister_device(state->i2c_edid);
1919 media_entity_cleanup(&sd->entity);
1921 v4l2_ctrl_handler_free(&state->hdl);
1925 /* ----------------------------------------------------------------------- */
1927 static void adv7511_remove(struct i2c_client *client)
1929 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1930 struct adv7511_state *state = get_adv7511_state(sd);
1932 state->chip_revision = -1;
1934 v4l2_dbg(1, debug, sd, "%s removed @ 0x%x (%s)\n", client->name,
1935 client->addr << 1, client->adapter->name);
1937 adv7511_set_isr(sd, false);
1938 adv7511_init_setup(sd);
1939 cancel_delayed_work_sync(&state->edid_handler);
1940 i2c_unregister_device(state->i2c_edid);
1941 i2c_unregister_device(state->i2c_cec);
1942 i2c_unregister_device(state->i2c_pktmem);
1943 destroy_workqueue(state->work_queue);
1944 v4l2_device_unregister_subdev(sd);
1945 media_entity_cleanup(&sd->entity);
1946 v4l2_ctrl_handler_free(sd->ctrl_handler);
1949 /* ----------------------------------------------------------------------- */
1951 static const struct i2c_device_id adv7511_id[] = {
1952 { "adv7511-v4l2", 0 },
1955 MODULE_DEVICE_TABLE(i2c, adv7511_id);
1957 static struct i2c_driver adv7511_driver = {
1959 .name = "adv7511-v4l2",
1961 .probe = adv7511_probe,
1962 .remove = adv7511_remove,
1963 .id_table = adv7511_id,
1966 module_i2c_driver(adv7511_driver);