drivers/gpu/drm/ingenic/ingenic-ipu.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 //
   3 // Ingenic JZ47xx IPU driver
   4 //
   5 // Copyright (C) 2020, Paul Cercueil <[email protected]>
   6 // Copyright (C) 2020, Daniel Silsby <[email protected]>
   7
   8 #include "ingenic-drm.h"
   9 #include "ingenic-ipu.h"
  10
  11 #include <linux/clk.h>
  12 #include <linux/component.h>
  13 #include <linux/gcd.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/module.h>
  16 #include <linux/of.h>
  17 #include <linux/of_device.h>
  18 #include <linux/regmap.h>
  19 #include <linux/time.h>
  20
  21 #include <drm/drm_atomic.h>
  22 #include <drm/drm_atomic_helper.h>
  23 #include <drm/drm_damage_helper.h>
  24 #include <drm/drm_drv.h>
  25 #include <drm/drm_fb_cma_helper.h>
  26 #include <drm/drm_fourcc.h>
  27 #include <drm/drm_gem_atomic_helper.h>
  28 #include <drm/drm_gem_cma_helper.h>
  29 #include <drm/drm_gem_framebuffer_helper.h>
  30 #include <drm/drm_plane.h>
  31 #include <drm/drm_plane_helper.h>
  32 #include <drm/drm_property.h>
  33 #include <drm/drm_vblank.h>
  34
  35 struct ingenic_ipu;
  36
  37 struct soc_info {
  38         const u32 *formats;
  39         size_t num_formats;
  40         bool has_bicubic;
  41         bool manual_restart;
  42
  43         void (*set_coefs)(struct ingenic_ipu *ipu, unsigned int reg,
  44                           unsigned int sharpness, bool downscale,
  45                           unsigned int weight, unsigned int offset);
  46 };
  47
  48 struct ingenic_ipu {
  49         struct drm_plane plane;
  50         struct drm_device *drm;
  51         struct device *dev, *master;
  52         struct regmap *map;
  53         struct clk *clk;
  54         const struct soc_info *soc_info;
  55         bool clk_enabled;
  56
  57         unsigned int num_w, num_h, denom_w, denom_h;
  58
  59         dma_addr_t addr_y, addr_u, addr_v;
  60
  61         struct drm_property *sharpness_prop;
  62         unsigned int sharpness;
  63 };
  64
  65 /* Signed 15.16 fixed-point math (for bicubic scaling coefficients) */
  66 #define I2F(i) ((s32)(i) * 65536)
  67 #define F2I(f) ((f) / 65536)
  68 #define FMUL(fa, fb) ((s32)(((s64)(fa) * (s64)(fb)) / 65536))
  69 #define SHARPNESS_INCR (I2F(-1) / 8)
  70
  71 static inline struct ingenic_ipu *plane_to_ingenic_ipu(struct drm_plane *plane)
  72 {
  73         return container_of(plane, struct ingenic_ipu, plane);
  74 }
  75
  76 /*
  77  * Apply conventional cubic convolution kernel. Both parameters
  78  *  and return value are 15.16 signed fixed-point.
  79  *
  80  *  @f_a: Sharpness factor, typically in range [-4.0, -0.25].
  81  *        A larger magnitude increases perceived sharpness, but going past
  82  *        -2.0 might cause ringing artifacts to outweigh any improvement.
  83  *        Nice values on a 320x240 LCD are between -0.75 and -2.0.
  84  *
  85  *  @f_x: Absolute distance in pixels from 'pixel 0' sample position
  86  *        along horizontal (or vertical) source axis. Range is [0, +2.0].
  87  *
  88  *  returns: Weight of this pixel within 4-pixel sample group. Range is
  89  *           [-2.0, +2.0]. For moderate (i.e. > -3.0) sharpness factors,
  90  *           range is within [-1.0, +1.0].
  91  */
  92 static inline s32 cubic_conv(s32 f_a, s32 f_x)
  93 {
  94         const s32 f_1 = I2F(1);
  95         const s32 f_2 = I2F(2);
  96         const s32 f_3 = I2F(3);
  97         const s32 f_4 = I2F(4);
  98         const s32 f_x2 = FMUL(f_x, f_x);
  99         const s32 f_x3 = FMUL(f_x, f_x2);
 100
 101         if (f_x <= f_1)
 102                 return FMUL((f_a + f_2), f_x3) - FMUL((f_a + f_3), f_x2) + f_1;
 103         else if (f_x <= f_2)
 104                 return FMUL(f_a, (f_x3 - 5 * f_x2 + 8 * f_x - f_4));
 105         else
 106                 return 0;
 107 }
 108
 109 /*
 110  * On entry, "weight" is a coefficient suitable for bilinear mode,
 111  *  which is converted to a set of four suitable for bicubic mode.
 112  *
 113  * "weight 512" means all of pixel 0;
 114  * "weight 256" means half of pixel 0 and half of pixel 1;
 115  * "weight 0" means all of pixel 1;
 116  *
 117  * "offset" is increment to next source pixel sample location.
 118  */
 119 static void jz4760_set_coefs(struct ingenic_ipu *ipu, unsigned int reg,
 120                              unsigned int sharpness, bool downscale,
 121                              unsigned int weight, unsigned int offset)
 122 {
 123         u32 val;
 124         s32 w0, w1, w2, w3; /* Pixel weights at X (or Y) offsets -1,0,1,2 */
 125
 126         weight = clamp_val(weight, 0, 512);
 127
 128         if (sharpness < 2) {
 129                 /*
 130                  *  When sharpness setting is 0, emulate nearest-neighbor.
 131                  *  When sharpness setting is 1, emulate bilinear.
 132                  */
 133
 134                 if (sharpness == 0)
 135                         weight = weight >= 256 ? 512 : 0;
 136                 w0 = 0;
 137                 w1 = weight;
 138                 w2 = 512 - weight;
 139                 w3 = 0;
 140         } else {
 141                 const s32 f_a = SHARPNESS_INCR * sharpness;
 142                 const s32 f_h = I2F(1) / 2; /* Round up 0.5 */
 143
 144                 /*
 145                  * Note that always rounding towards +infinity here is intended.
 146                  * The resulting coefficients match a round-to-nearest-int
 147                  * double floating-point implementation.
 148                  */
 149
 150                 weight = 512 - weight;
 151                 w0 = F2I(f_h + 512 * cubic_conv(f_a, I2F(512  + weight) / 512));
 152                 w1 = F2I(f_h + 512 * cubic_conv(f_a, I2F(0    + weight) / 512));
 153                 w2 = F2I(f_h + 512 * cubic_conv(f_a, I2F(512  - weight) / 512));
 154                 w3 = F2I(f_h + 512 * cubic_conv(f_a, I2F(1024 - weight) / 512));
 155                 w0 = clamp_val(w0, -1024, 1023);
 156                 w1 = clamp_val(w1, -1024, 1023);
 157                 w2 = clamp_val(w2, -1024, 1023);
 158                 w3 = clamp_val(w3, -1024, 1023);
 159         }
 160
 161         val = ((w1 & JZ4760_IPU_RSZ_COEF_MASK) << JZ4760_IPU_RSZ_COEF31_LSB) |
 162                 ((w0 & JZ4760_IPU_RSZ_COEF_MASK) << JZ4760_IPU_RSZ_COEF20_LSB);
 163         regmap_write(ipu->map, reg, val);
 164
 165         val = ((w3 & JZ4760_IPU_RSZ_COEF_MASK) << JZ4760_IPU_RSZ_COEF31_LSB) |
 166                 ((w2 & JZ4760_IPU_RSZ_COEF_MASK) << JZ4760_IPU_RSZ_COEF20_LSB) |
 167                 ((offset & JZ4760_IPU_RSZ_OFFSET_MASK) << JZ4760_IPU_RSZ_OFFSET_LSB);
 168         regmap_write(ipu->map, reg, val);
 169 }
 170
 171 static void jz4725b_set_coefs(struct ingenic_ipu *ipu, unsigned int reg,
 172                               unsigned int sharpness, bool downscale,
 173                               unsigned int weight, unsigned int offset)
 174 {
 175         u32 val = JZ4725B_IPU_RSZ_LUT_OUT_EN;
 176         unsigned int i;
 177
 178         weight = clamp_val(weight, 0, 512);
 179
 180         if (sharpness == 0)
 181                 weight = weight >= 256 ? 512 : 0;
 182
 183         val |= (weight & JZ4725B_IPU_RSZ_LUT_COEF_MASK) << JZ4725B_IPU_RSZ_LUT_COEF_LSB;
 184         if (downscale || !!offset)
 185                 val |= JZ4725B_IPU_RSZ_LUT_IN_EN;
 186
 187         regmap_write(ipu->map, reg, val);
 188
 189         if (downscale) {
 190                 for (i = 1; i < offset; i++)
 191                         regmap_write(ipu->map, reg, JZ4725B_IPU_RSZ_LUT_IN_EN);
 192         }
 193 }
 194
 195 static void ingenic_ipu_set_downscale_coefs(struct ingenic_ipu *ipu,
 196                                             unsigned int reg,
 197                                             unsigned int num,
 198                                             unsigned int denom)
 199 {
 200         unsigned int i, offset, weight, weight_num = denom;
 201
 202         for (i = 0; i < num; i++) {
 203                 weight_num = num + (weight_num - num) % (num * 2);
 204                 weight = 512 - 512 * (weight_num - num) / (num * 2);
 205                 weight_num += denom * 2;
 206                 offset = (weight_num - num) / (num * 2);
 207
 208                 ipu->soc_info->set_coefs(ipu, reg, ipu->sharpness,
 209                                          true, weight, offset);
 210         }
 211 }
 212
 213 static void ingenic_ipu_set_integer_upscale_coefs(struct ingenic_ipu *ipu,
 214                                                   unsigned int reg,
 215                                                   unsigned int num)
 216 {
 217         /*
 218          * Force nearest-neighbor scaling and use simple math when upscaling
 219          * by an integer ratio. It looks better, and fixes a few problem cases.
 220          */
 221         unsigned int i;
 222
 223         for (i = 0; i < num; i++)
 224                 ipu->soc_info->set_coefs(ipu, reg, 0, false, 512, i == num - 1);
 225 }
 226
 227 static void ingenic_ipu_set_upscale_coefs(struct ingenic_ipu *ipu,
 228                                           unsigned int reg,
 229                                           unsigned int num,
 230                                           unsigned int denom)
 231 {
 232         unsigned int i, offset, weight, weight_num = 0;
 233
 234         for (i = 0; i < num; i++) {
 235                 weight = 512 - 512 * weight_num / num;
 236                 weight_num += denom;
 237                 offset = weight_num >= num;
 238
 239                 if (offset)
 240                         weight_num -= num;
 241
 242                 ipu->soc_info->set_coefs(ipu, reg, ipu->sharpness,
 243                                          false, weight, offset);
 244         }
 245 }
 246
 247 static void ingenic_ipu_set_coefs(struct ingenic_ipu *ipu, unsigned int reg,
 248                                   unsigned int num, unsigned int denom)
 249 {
 250         /* Begin programming the LUT */
 251         regmap_write(ipu->map, reg, -1);
 252
 253         if (denom > num)
 254                 ingenic_ipu_set_downscale_coefs(ipu, reg, num, denom);
 255         else if (denom == 1)
 256                 ingenic_ipu_set_integer_upscale_coefs(ipu, reg, num);
 257         else
 258                 ingenic_ipu_set_upscale_coefs(ipu, reg, num, denom);
 259 }
 260
 261 static int reduce_fraction(unsigned int *num, unsigned int *denom)
 262 {
 263         unsigned long d = gcd(*num, *denom);
 264
 265         /* The scaling table has only 31 entries */
 266         if (*num > 31 * d)
 267                 return -EINVAL;
 268
 269         *num /= d;
 270         *denom /= d;
 271         return 0;
 272 }
 273
 274 static inline bool osd_changed(struct drm_plane_state *state,
 275                                struct drm_plane_state *oldstate)
 276 {
 277         return state->src_x != oldstate->src_x ||
 278                 state->src_y != oldstate->src_y ||
 279                 state->src_w != oldstate->src_w ||
 280                 state->src_h != oldstate->src_h ||
 281                 state->crtc_x != oldstate->crtc_x ||
 282                 state->crtc_y != oldstate->crtc_y ||
 283                 state->crtc_w != oldstate->crtc_w ||
 284                 state->crtc_h != oldstate->crtc_h;
 285 }
 286
 287 static void ingenic_ipu_plane_atomic_update(struct drm_plane *plane,
 288                                             struct drm_atomic_state *state)
 289 {
 290         struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);
 291         struct drm_plane_state *newstate = drm_atomic_get_new_plane_state(state, plane);
 292         struct drm_plane_state *oldstate = drm_atomic_get_old_plane_state(state, plane);
 293         const struct drm_format_info *finfo;
 294         u32 ctrl, stride = 0, coef_index = 0, format = 0;
 295         bool needs_modeset, upscaling_w, upscaling_h;
 296         int err;
 297
 298         if (!newstate || !newstate->fb)
 299                 return;
 300
 301         finfo = drm_format_info(newstate->fb->format->format);
 302
 303         if (!ipu->clk_enabled) {
 304                 err = clk_enable(ipu->clk);
 305                 if (err) {
 306                         dev_err(ipu->dev, "Unable to enable clock: %d\n", err);
 307                         return;
 308                 }
 309
 310                 ipu->clk_enabled = true;
 311         }
 312
 313         /* Reset all the registers if needed */
 314         needs_modeset = drm_atomic_crtc_needs_modeset(newstate->crtc->state);
 315         if (needs_modeset) {
 316                 regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_RST);
 317
 318                 /* Enable the chip */
 319                 regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL,
 320                                 JZ_IPU_CTRL_CHIP_EN | JZ_IPU_CTRL_LCDC_SEL);
 321         }
 322
 323         if (ingenic_drm_map_noncoherent(ipu->master))
 324                 drm_fb_cma_sync_non_coherent(ipu->drm, oldstate, newstate);
 325
 326         /* New addresses will be committed in vblank handler... */
 327         ipu->addr_y = drm_fb_cma_get_gem_addr(newstate->fb, newstate, 0);
 328         if (finfo->num_planes > 1)
 329                 ipu->addr_u = drm_fb_cma_get_gem_addr(newstate->fb, newstate,
 330                                                       1);
 331         if (finfo->num_planes > 2)
 332                 ipu->addr_v = drm_fb_cma_get_gem_addr(newstate->fb, newstate,
 333                                                       2);
 334
 335         if (!needs_modeset)
 336                 return;
 337
 338         /* Or right here if we're doing a full modeset. */
 339         regmap_write(ipu->map, JZ_REG_IPU_Y_ADDR, ipu->addr_y);
 340         regmap_write(ipu->map, JZ_REG_IPU_U_ADDR, ipu->addr_u);
 341         regmap_write(ipu->map, JZ_REG_IPU_V_ADDR, ipu->addr_v);
 342
 343         if (finfo->num_planes == 1)
 344                 regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_SPKG_SEL);
 345
 346         ingenic_drm_plane_config(ipu->master, plane, DRM_FORMAT_XRGB8888);
 347
 348         /* Set the input height/width/strides */
 349         if (finfo->num_planes > 2)
 350                 stride = ((newstate->src_w >> 16) * finfo->cpp[2] / finfo->hsub)
 351                         << JZ_IPU_UV_STRIDE_V_LSB;
 352
 353         if (finfo->num_planes > 1)
 354                 stride |= ((newstate->src_w >> 16) * finfo->cpp[1] / finfo->hsub)
 355                         << JZ_IPU_UV_STRIDE_U_LSB;
 356
 357         regmap_write(ipu->map, JZ_REG_IPU_UV_STRIDE, stride);
 358
 359         stride = ((newstate->src_w >> 16) * finfo->cpp[0]) << JZ_IPU_Y_STRIDE_Y_LSB;
 360         regmap_write(ipu->map, JZ_REG_IPU_Y_STRIDE, stride);
 361
 362         regmap_write(ipu->map, JZ_REG_IPU_IN_GS,
 363                      (stride << JZ_IPU_IN_GS_W_LSB) |
 364                      ((newstate->src_h >> 16) << JZ_IPU_IN_GS_H_LSB));
 365
 366         switch (finfo->format) {
 367         case DRM_FORMAT_XRGB1555:
 368                 format = JZ_IPU_D_FMT_IN_FMT_RGB555 |
 369                         JZ_IPU_D_FMT_RGB_OUT_OFT_RGB;
 370                 break;
 371         case DRM_FORMAT_XBGR1555:
 372                 format = JZ_IPU_D_FMT_IN_FMT_RGB555 |
 373                         JZ_IPU_D_FMT_RGB_OUT_OFT_BGR;
 374                 break;
 375         case DRM_FORMAT_RGB565:
 376                 format = JZ_IPU_D_FMT_IN_FMT_RGB565 |
 377                         JZ_IPU_D_FMT_RGB_OUT_OFT_RGB;
 378                 break;
 379         case DRM_FORMAT_BGR565:
 380                 format = JZ_IPU_D_FMT_IN_FMT_RGB565 |
 381                         JZ_IPU_D_FMT_RGB_OUT_OFT_BGR;
 382                 break;
 383         case DRM_FORMAT_XRGB8888:
 384         case DRM_FORMAT_XYUV8888:
 385                 format = JZ_IPU_D_FMT_IN_FMT_RGB888 |
 386                         JZ_IPU_D_FMT_RGB_OUT_OFT_RGB;
 387                 break;
 388         case DRM_FORMAT_XBGR8888:
 389                 format = JZ_IPU_D_FMT_IN_FMT_RGB888 |
 390                         JZ_IPU_D_FMT_RGB_OUT_OFT_BGR;
 391                 break;
 392         case DRM_FORMAT_YUYV:
 393                 format = JZ_IPU_D_FMT_IN_FMT_YUV422 |
 394                         JZ_IPU_D_FMT_YUV_VY1UY0;
 395                 break;
 396         case DRM_FORMAT_YVYU:
 397                 format = JZ_IPU_D_FMT_IN_FMT_YUV422 |
 398                         JZ_IPU_D_FMT_YUV_UY1VY0;
 399                 break;
 400         case DRM_FORMAT_UYVY:
 401                 format = JZ_IPU_D_FMT_IN_FMT_YUV422 |
 402                         JZ_IPU_D_FMT_YUV_Y1VY0U;
 403                 break;
 404         case DRM_FORMAT_VYUY:
 405                 format = JZ_IPU_D_FMT_IN_FMT_YUV422 |
 406                         JZ_IPU_D_FMT_YUV_Y1UY0V;
 407                 break;
 408         case DRM_FORMAT_YUV411:
 409                 format = JZ_IPU_D_FMT_IN_FMT_YUV411;
 410                 break;
 411         case DRM_FORMAT_YUV420:
 412                 format = JZ_IPU_D_FMT_IN_FMT_YUV420;
 413                 break;
 414         case DRM_FORMAT_YUV422:
 415                 format = JZ_IPU_D_FMT_IN_FMT_YUV422;
 416                 break;
 417         case DRM_FORMAT_YUV444:
 418                 format = JZ_IPU_D_FMT_IN_FMT_YUV444;
 419                 break;
 420         default:
 421                 WARN_ONCE(1, "Unsupported format");
 422                 break;
 423         }
 424
 425         /* Fix output to RGB888 */
 426         format |= JZ_IPU_D_FMT_OUT_FMT_RGB888;
 427
 428         /* Set pixel format */
 429         regmap_write(ipu->map, JZ_REG_IPU_D_FMT, format);
 430
 431         /* Set the output height/width/stride */
 432         regmap_write(ipu->map, JZ_REG_IPU_OUT_GS,
 433                      ((newstate->crtc_w * 4) << JZ_IPU_OUT_GS_W_LSB)
 434                      | newstate->crtc_h << JZ_IPU_OUT_GS_H_LSB);
 435         regmap_write(ipu->map, JZ_REG_IPU_OUT_STRIDE, newstate->crtc_w * 4);
 436
 437         if (finfo->is_yuv) {
 438                 regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_CSC_EN);
 439
 440                 /*
 441                  * Offsets for Chroma/Luma.
 442                  * y = source Y - LUMA,
 443                  * u = source Cb - CHROMA,
 444                  * v = source Cr - CHROMA
 445                  */
 446                 regmap_write(ipu->map, JZ_REG_IPU_CSC_OFFSET,
 447                              128 << JZ_IPU_CSC_OFFSET_CHROMA_LSB |
 448                              0 << JZ_IPU_CSC_OFFSET_LUMA_LSB);
 449
 450                 /*
 451                  * YUV422 to RGB conversion table.
 452                  * R = C0 / 0x400 * y + C1 / 0x400 * v
 453                  * G = C0 / 0x400 * y - C2 / 0x400 * u - C3 / 0x400 * v
 454                  * B = C0 / 0x400 * y + C4 / 0x400 * u
 455                  */
 456                 regmap_write(ipu->map, JZ_REG_IPU_CSC_C0_COEF, 0x4a8);
 457                 regmap_write(ipu->map, JZ_REG_IPU_CSC_C1_COEF, 0x662);
 458                 regmap_write(ipu->map, JZ_REG_IPU_CSC_C2_COEF, 0x191);
 459                 regmap_write(ipu->map, JZ_REG_IPU_CSC_C3_COEF, 0x341);
 460                 regmap_write(ipu->map, JZ_REG_IPU_CSC_C4_COEF, 0x811);
 461         }
 462
 463         ctrl = 0;
 464
 465         /*
 466          * Must set ZOOM_SEL before programming bicubic LUTs.
 467          * If the IPU supports bicubic, we enable it unconditionally, since it
 468          * can do anything bilinear can and more.
 469          */
 470         if (ipu->soc_info->has_bicubic)
 471                 ctrl |= JZ_IPU_CTRL_ZOOM_SEL;
 472
 473         upscaling_w = ipu->num_w > ipu->denom_w;
 474         if (upscaling_w)
 475                 ctrl |= JZ_IPU_CTRL_HSCALE;
 476
 477         if (ipu->num_w != 1 || ipu->denom_w != 1) {
 478                 if (!ipu->soc_info->has_bicubic && !upscaling_w)
 479                         coef_index |= (ipu->denom_w - 1) << 16;
 480                 else
 481                         coef_index |= (ipu->num_w - 1) << 16;
 482                 ctrl |= JZ_IPU_CTRL_HRSZ_EN;
 483         }
 484
 485         upscaling_h = ipu->num_h > ipu->denom_h;
 486         if (upscaling_h)
 487                 ctrl |= JZ_IPU_CTRL_VSCALE;
 488
 489         if (ipu->num_h != 1 || ipu->denom_h != 1) {
 490                 if (!ipu->soc_info->has_bicubic && !upscaling_h)
 491                         coef_index |= ipu->denom_h - 1;
 492                 else
 493                         coef_index |= ipu->num_h - 1;
 494                 ctrl |= JZ_IPU_CTRL_VRSZ_EN;
 495         }
 496
 497         regmap_update_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_ZOOM_SEL |
 498                            JZ_IPU_CTRL_HRSZ_EN | JZ_IPU_CTRL_VRSZ_EN |
 499                            JZ_IPU_CTRL_HSCALE | JZ_IPU_CTRL_VSCALE, ctrl);
 500
 501         /* Set the LUT index register */
 502         regmap_write(ipu->map, JZ_REG_IPU_RSZ_COEF_INDEX, coef_index);
 503
 504         if (ipu->num_w != 1 || ipu->denom_w != 1)
 505                 ingenic_ipu_set_coefs(ipu, JZ_REG_IPU_HRSZ_COEF_LUT,
 506                                       ipu->num_w, ipu->denom_w);
 507
 508         if (ipu->num_h != 1 || ipu->denom_h != 1)
 509                 ingenic_ipu_set_coefs(ipu, JZ_REG_IPU_VRSZ_COEF_LUT,
 510                                       ipu->num_h, ipu->denom_h);
 511
 512         /* Clear STATUS register */
 513         regmap_write(ipu->map, JZ_REG_IPU_STATUS, 0);
 514
 515         /* Start IPU */
 516         regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL,
 517                         JZ_IPU_CTRL_RUN | JZ_IPU_CTRL_FM_IRQ_EN);
 518
 519         dev_dbg(ipu->dev, "Scaling %ux%u to %ux%u (%u:%u horiz, %u:%u vert)\n",
 520                 newstate->src_w >> 16, newstate->src_h >> 16,
 521                 newstate->crtc_w, newstate->crtc_h,
 522                 ipu->num_w, ipu->denom_w, ipu->num_h, ipu->denom_h);
 523 }
 524
 525 static int ingenic_ipu_plane_atomic_check(struct drm_plane *plane,
 526                                           struct drm_atomic_state *state)
 527 {
 528         struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state,
 529                                                                                  plane);
 530         struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
 531                                                                                  plane);
 532         unsigned int num_w, denom_w, num_h, denom_h, xres, yres, max_w, max_h;
 533         struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);
 534         struct drm_crtc *crtc = new_plane_state->crtc ?: old_plane_state->crtc;
 535         struct drm_crtc_state *crtc_state;
 536
 537         if (!crtc)
 538                 return 0;
 539
 540         crtc_state = drm_atomic_get_existing_crtc_state(state, crtc);
 541         if (WARN_ON(!crtc_state))
 542                 return -EINVAL;
 543
 544         /* Request a full modeset if we are enabling or disabling the IPU. */
 545         if (!old_plane_state->crtc ^ !new_plane_state->crtc)
 546                 crtc_state->mode_changed = true;
 547
 548         if (!new_plane_state->crtc ||
 549             !crtc_state->mode.hdisplay || !crtc_state->mode.vdisplay)
 550                 goto out_check_damage;
 551
 552         /* Plane must be fully visible */
 553         if (new_plane_state->crtc_x < 0 || new_plane_state->crtc_y < 0 ||
 554             new_plane_state->crtc_x + new_plane_state->crtc_w > crtc_state->mode.hdisplay ||
 555             new_plane_state->crtc_y + new_plane_state->crtc_h > crtc_state->mode.vdisplay)
 556                 return -EINVAL;
 557
 558         /* Minimum size is 4x4 */
 559         if ((new_plane_state->src_w >> 16) < 4 || (new_plane_state->src_h >> 16) < 4)
 560                 return -EINVAL;
 561
 562         /* Input and output lines must have an even number of pixels. */
 563         if (((new_plane_state->src_w >> 16) & 1) || (new_plane_state->crtc_w & 1))
 564                 return -EINVAL;
 565
 566         if (!osd_changed(new_plane_state, old_plane_state))
 567                 goto out_check_damage;
 568
 569         crtc_state->mode_changed = true;
 570
 571         xres = new_plane_state->src_w >> 16;
 572         yres = new_plane_state->src_h >> 16;
 573
 574         /*
 575          * Increase the scaled image's theorical width/height until we find a
 576          * configuration that has valid scaling coefficients, up to 102% of the
 577          * screen's resolution. This makes sure that we can scale from almost
 578          * every resolution possible at the cost of a very small distorsion.
 579          * The CRTC_W / CRTC_H are not modified.
 580          */
 581         max_w = crtc_state->mode.hdisplay * 102 / 100;
 582         max_h = crtc_state->mode.vdisplay * 102 / 100;
 583
 584         for (denom_w = xres, num_w = new_plane_state->crtc_w; num_w <= max_w; num_w++)
 585                 if (!reduce_fraction(&num_w, &denom_w))
 586                         break;
 587         if (num_w > max_w)
 588                 return -EINVAL;
 589
 590         for (denom_h = yres, num_h = new_plane_state->crtc_h; num_h <= max_h; num_h++)
 591                 if (!reduce_fraction(&num_h, &denom_h))
 592                         break;
 593         if (num_h > max_h)
 594                 return -EINVAL;
 595
 596         ipu->num_w = num_w;
 597         ipu->num_h = num_h;
 598         ipu->denom_w = denom_w;
 599         ipu->denom_h = denom_h;
 600
 601 out_check_damage:
 602         if (ingenic_drm_map_noncoherent(ipu->master))
 603                 drm_atomic_helper_check_plane_damage(state, new_plane_state);
 604
 605         return 0;
 606 }
 607
 608 static void ingenic_ipu_plane_atomic_disable(struct drm_plane *plane,
 609                                              struct drm_atomic_state *state)
 610 {
 611         struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);
 612
 613         regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_STOP);
 614         regmap_clear_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_CHIP_EN);
 615
 616         ingenic_drm_plane_disable(ipu->master, plane);
 617
 618         if (ipu->clk_enabled) {
 619                 clk_disable(ipu->clk);
 620                 ipu->clk_enabled = false;
 621         }
 622 }
 623
 624 static const struct drm_plane_helper_funcs ingenic_ipu_plane_helper_funcs = {
 625         .atomic_update          = ingenic_ipu_plane_atomic_update,
 626         .atomic_check           = ingenic_ipu_plane_atomic_check,
 627         .atomic_disable         = ingenic_ipu_plane_atomic_disable,
 628         .prepare_fb             = drm_gem_plane_helper_prepare_fb,
 629 };
 630
 631 static int
 632 ingenic_ipu_plane_atomic_get_property(struct drm_plane *plane,
 633                                       const struct drm_plane_state *state,
 634                                       struct drm_property *property, u64 *val)
 635 {
 636         struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);
 637
 638         if (property != ipu->sharpness_prop)
 639                 return -EINVAL;
 640
 641         *val = ipu->sharpness;
 642
 643         return 0;
 644 }
 645
 646 static int
 647 ingenic_ipu_plane_atomic_set_property(struct drm_plane *plane,
 648                                       struct drm_plane_state *state,
 649                                       struct drm_property *property, u64 val)
 650 {
 651         struct ingenic_ipu *ipu = plane_to_ingenic_ipu(plane);
 652         struct drm_crtc_state *crtc_state;
 653
 654         if (property != ipu->sharpness_prop)
 655                 return -EINVAL;
 656
 657         ipu->sharpness = val;
 658
 659         if (state->crtc) {
 660                 crtc_state = drm_atomic_get_existing_crtc_state(state->state, state->crtc);
 661                 if (WARN_ON(!crtc_state))
 662                         return -EINVAL;
 663
 664                 crtc_state->mode_changed = true;
 665         }
 666
 667         return 0;
 668 }
 669
 670 static const struct drm_plane_funcs ingenic_ipu_plane_funcs = {
 671         .update_plane           = drm_atomic_helper_update_plane,
 672         .disable_plane          = drm_atomic_helper_disable_plane,
 673         .reset                  = drm_atomic_helper_plane_reset,
 674         .destroy                = drm_plane_cleanup,
 675
 676         .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
 677         .atomic_destroy_state   = drm_atomic_helper_plane_destroy_state,
 678
 679         .atomic_get_property    = ingenic_ipu_plane_atomic_get_property,
 680         .atomic_set_property    = ingenic_ipu_plane_atomic_set_property,
 681 };
 682
 683 static irqreturn_t ingenic_ipu_irq_handler(int irq, void *arg)
 684 {
 685         struct ingenic_ipu *ipu = arg;
 686         struct drm_crtc *crtc = drm_crtc_from_index(ipu->drm, 0);
 687         unsigned int dummy;
 688
 689         /* dummy read allows CPU to reconfigure IPU */
 690         if (ipu->soc_info->manual_restart)
 691                 regmap_read(ipu->map, JZ_REG_IPU_STATUS, &dummy);
 692
 693         /* ACK interrupt */
 694         regmap_write(ipu->map, JZ_REG_IPU_STATUS, 0);
 695
 696         /* Set previously cached addresses */
 697         regmap_write(ipu->map, JZ_REG_IPU_Y_ADDR, ipu->addr_y);
 698         regmap_write(ipu->map, JZ_REG_IPU_U_ADDR, ipu->addr_u);
 699         regmap_write(ipu->map, JZ_REG_IPU_V_ADDR, ipu->addr_v);
 700
 701         /* Run IPU for the new frame */
 702         if (ipu->soc_info->manual_restart)
 703                 regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_RUN);
 704
 705         drm_crtc_handle_vblank(crtc);
 706
 707         return IRQ_HANDLED;
 708 }
 709
 710 static const struct regmap_config ingenic_ipu_regmap_config = {
 711         .reg_bits = 32,
 712         .val_bits = 32,
 713         .reg_stride = 4,
 714
 715         .max_register = JZ_REG_IPU_OUT_PHY_T_ADDR,
 716 };
 717
 718 static int ingenic_ipu_bind(struct device *dev, struct device *master, void *d)
 719 {
 720         struct platform_device *pdev = to_platform_device(dev);
 721         const struct soc_info *soc_info;
 722         struct drm_device *drm = d;
 723         struct drm_plane *plane;
 724         struct ingenic_ipu *ipu;
 725         void __iomem *base;
 726         unsigned int sharpness_max;
 727         int err, irq;
 728
 729         ipu = devm_kzalloc(dev, sizeof(*ipu), GFP_KERNEL);
 730         if (!ipu)
 731                 return -ENOMEM;
 732
 733         soc_info = of_device_get_match_data(dev);
 734         if (!soc_info) {
 735                 dev_err(dev, "Missing platform data\n");
 736                 return -EINVAL;
 737         }
 738
 739         ipu->dev = dev;
 740         ipu->drm = drm;
 741         ipu->master = master;
 742         ipu->soc_info = soc_info;
 743
 744         base = devm_platform_ioremap_resource(pdev, 0);
 745         if (IS_ERR(base)) {
 746                 dev_err(dev, "Failed to get memory resource\n");
 747                 return PTR_ERR(base);
 748         }
 749
 750         ipu->map = devm_regmap_init_mmio(dev, base, &ingenic_ipu_regmap_config);
 751         if (IS_ERR(ipu->map)) {
 752                 dev_err(dev, "Failed to create regmap\n");
 753                 return PTR_ERR(ipu->map);
 754         }
 755
 756         irq = platform_get_irq(pdev, 0);
 757         if (irq < 0)
 758                 return irq;
 759
 760         ipu->clk = devm_clk_get(dev, "ipu");
 761         if (IS_ERR(ipu->clk)) {
 762                 dev_err(dev, "Failed to get pixel clock\n");
 763                 return PTR_ERR(ipu->clk);
 764         }
 765
 766         err = devm_request_irq(dev, irq, ingenic_ipu_irq_handler, 0,
 767                                dev_name(dev), ipu);
 768         if (err) {
 769                 dev_err(dev, "Unable to request IRQ\n");
 770                 return err;
 771         }
 772
 773         plane = &ipu->plane;
 774         dev_set_drvdata(dev, plane);
 775
 776         drm_plane_helper_add(plane, &ingenic_ipu_plane_helper_funcs);
 777
 778         err = drm_universal_plane_init(drm, plane, 1, &ingenic_ipu_plane_funcs,
 779                                        soc_info->formats, soc_info->num_formats,
 780                                        NULL, DRM_PLANE_TYPE_OVERLAY, NULL);
 781         if (err) {
 782                 dev_err(dev, "Failed to init plane: %i\n", err);
 783                 return err;
 784         }
 785
 786         if (ingenic_drm_map_noncoherent(master))
 787                 drm_plane_enable_fb_damage_clips(plane);
 788
 789         /*
 790          * Sharpness settings range is [0,32]
 791          * 0       : nearest-neighbor
 792          * 1       : bilinear
 793          * 2 .. 32 : bicubic (translated to sharpness factor -0.25 .. -4.0)
 794          */
 795         sharpness_max = soc_info->has_bicubic ? 32 : 1;
 796         ipu->sharpness_prop = drm_property_create_range(drm, 0, "sharpness",
 797                                                         0, sharpness_max);
 798         if (!ipu->sharpness_prop) {
 799                 dev_err(dev, "Unable to create sharpness property\n");
 800                 return -ENOMEM;
 801         }
 802
 803         /* Default sharpness factor: -0.125 * 8 = -1.0 */
 804         ipu->sharpness = soc_info->has_bicubic ? 8 : 1;
 805         drm_object_attach_property(&plane->base, ipu->sharpness_prop,
 806                                    ipu->sharpness);
 807
 808         err = clk_prepare(ipu->clk);
 809         if (err) {
 810                 dev_err(dev, "Unable to prepare clock\n");
 811                 return err;
 812         }
 813
 814         return 0;
 815 }
 816
 817 static void ingenic_ipu_unbind(struct device *dev,
 818                                struct device *master, void *d)
 819 {
 820         struct ingenic_ipu *ipu = dev_get_drvdata(dev);
 821
 822         clk_unprepare(ipu->clk);
 823 }
 824
 825 static const struct component_ops ingenic_ipu_ops = {
 826         .bind = ingenic_ipu_bind,
 827         .unbind = ingenic_ipu_unbind,
 828 };
 829
 830 static int ingenic_ipu_probe(struct platform_device *pdev)
 831 {
 832         return component_add(&pdev->dev, &ingenic_ipu_ops);
 833 }
 834
 835 static int ingenic_ipu_remove(struct platform_device *pdev)
 836 {
 837         component_del(&pdev->dev, &ingenic_ipu_ops);
 838         return 0;
 839 }
 840
 841 static const u32 jz4725b_ipu_formats[] = {
 842         /*
 843          * While officially supported, packed YUV 4:2:2 formats can cause
 844          * random hardware crashes on JZ4725B under certain circumstances.
 845          * It seems to happen with some specific resize ratios.
 846          * Until a proper workaround or fix is found, disable these formats.
 847         DRM_FORMAT_YUYV,
 848         DRM_FORMAT_YVYU,
 849         DRM_FORMAT_UYVY,
 850         DRM_FORMAT_VYUY,
 851         */
 852         DRM_FORMAT_YUV411,
 853         DRM_FORMAT_YUV420,
 854         DRM_FORMAT_YUV422,
 855         DRM_FORMAT_YUV444,
 856 };
 857
 858 static const struct soc_info jz4725b_soc_info = {
 859         .formats        = jz4725b_ipu_formats,
 860         .num_formats    = ARRAY_SIZE(jz4725b_ipu_formats),
 861         .has_bicubic    = false,
 862         .manual_restart = true,
 863         .set_coefs      = jz4725b_set_coefs,
 864 };
 865
 866 static const u32 jz4760_ipu_formats[] = {
 867         DRM_FORMAT_XRGB1555,
 868         DRM_FORMAT_XBGR1555,
 869         DRM_FORMAT_RGB565,
 870         DRM_FORMAT_BGR565,
 871         DRM_FORMAT_XRGB8888,
 872         DRM_FORMAT_XBGR8888,
 873         DRM_FORMAT_YUYV,
 874         DRM_FORMAT_YVYU,
 875         DRM_FORMAT_UYVY,
 876         DRM_FORMAT_VYUY,
 877         DRM_FORMAT_YUV411,
 878         DRM_FORMAT_YUV420,
 879         DRM_FORMAT_YUV422,
 880         DRM_FORMAT_YUV444,
 881         DRM_FORMAT_XYUV8888,
 882 };
 883
 884 static const struct soc_info jz4760_soc_info = {
 885         .formats        = jz4760_ipu_formats,
 886         .num_formats    = ARRAY_SIZE(jz4760_ipu_formats),
 887         .has_bicubic    = true,
 888         .manual_restart = false,
 889         .set_coefs      = jz4760_set_coefs,
 890 };
 891
 892 static const struct of_device_id ingenic_ipu_of_match[] = {
 893         { .compatible = "ingenic,jz4725b-ipu", .data = &jz4725b_soc_info },
 894         { .compatible = "ingenic,jz4760-ipu", .data = &jz4760_soc_info },
 895         { /* sentinel */ },
 896 };
 897 MODULE_DEVICE_TABLE(of, ingenic_ipu_of_match);
 898
 899 static struct platform_driver ingenic_ipu_driver = {
 900         .driver = {
 901                 .name = "ingenic-ipu",
 902                 .of_match_table = ingenic_ipu_of_match,
 903         },
 904         .probe = ingenic_ipu_probe,
 905         .remove = ingenic_ipu_remove,
 906 };
 907
 908 struct platform_driver *ingenic_ipu_driver_ptr = &ingenic_ipu_driver;