1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright (C) 2014-2018 Broadcom */
5 * DOC: Broadcom V3D Graphics Driver
7 * This driver supports the Broadcom V3D 3.3 and 4.1 OpenGL ES GPUs.
8 * For V3D 2.x support, see the VC4 driver.
10 * Currently only single-core rendering using the binner and renderer
11 * is supported. The TFU (texture formatting unit) and V3D 4.x's CSD
12 * (compute shader dispatch) are not yet supported.
15 #include <linux/clk.h>
16 #include <linux/device.h>
18 #include <linux/module.h>
19 #include <linux/of_platform.h>
20 #include <linux/platform_device.h>
21 #include <linux/pm_runtime.h>
22 #include <drm/drm_fb_cma_helper.h>
23 #include <drm/drm_fb_helper.h>
25 #include "uapi/drm/v3d_drm.h"
29 #define DRIVER_NAME "v3d"
30 #define DRIVER_DESC "Broadcom V3D graphics"
31 #define DRIVER_DATE "20180419"
32 #define DRIVER_MAJOR 1
33 #define DRIVER_MINOR 0
34 #define DRIVER_PATCHLEVEL 0
37 static int v3d_runtime_suspend(struct device *dev)
39 struct drm_device *drm = dev_get_drvdata(dev);
40 struct v3d_dev *v3d = to_v3d_dev(drm);
44 clk_disable_unprepare(v3d->clk);
49 static int v3d_runtime_resume(struct device *dev)
51 struct drm_device *drm = dev_get_drvdata(dev);
52 struct v3d_dev *v3d = to_v3d_dev(drm);
55 ret = clk_prepare_enable(v3d->clk);
61 v3d_mmu_set_page_table(v3d);
68 static const struct dev_pm_ops v3d_v3d_pm_ops = {
69 SET_RUNTIME_PM_OPS(v3d_runtime_suspend, v3d_runtime_resume, NULL)
72 static int v3d_get_param_ioctl(struct drm_device *dev, void *data,
73 struct drm_file *file_priv)
75 struct v3d_dev *v3d = to_v3d_dev(dev);
76 struct drm_v3d_get_param *args = data;
78 static const u32 reg_map[] = {
79 [DRM_V3D_PARAM_V3D_UIFCFG] = V3D_HUB_UIFCFG,
80 [DRM_V3D_PARAM_V3D_HUB_IDENT1] = V3D_HUB_IDENT1,
81 [DRM_V3D_PARAM_V3D_HUB_IDENT2] = V3D_HUB_IDENT2,
82 [DRM_V3D_PARAM_V3D_HUB_IDENT3] = V3D_HUB_IDENT3,
83 [DRM_V3D_PARAM_V3D_CORE0_IDENT0] = V3D_CTL_IDENT0,
84 [DRM_V3D_PARAM_V3D_CORE0_IDENT1] = V3D_CTL_IDENT1,
85 [DRM_V3D_PARAM_V3D_CORE0_IDENT2] = V3D_CTL_IDENT2,
91 /* Note that DRM_V3D_PARAM_V3D_CORE0_IDENT0 is 0, so we need
92 * to explicitly allow it in the "the register in our
93 * parameter map" check.
95 if (args->param < ARRAY_SIZE(reg_map) &&
96 (reg_map[args->param] ||
97 args->param == DRM_V3D_PARAM_V3D_CORE0_IDENT0)) {
98 u32 offset = reg_map[args->param];
100 if (args->value != 0)
103 ret = pm_runtime_get_sync(v3d->dev);
104 if (args->param >= DRM_V3D_PARAM_V3D_CORE0_IDENT0 &&
105 args->param <= DRM_V3D_PARAM_V3D_CORE0_IDENT2) {
106 args->value = V3D_CORE_READ(0, offset);
108 args->value = V3D_READ(offset);
110 pm_runtime_mark_last_busy(v3d->dev);
111 pm_runtime_put_autosuspend(v3d->dev);
115 /* Any params that aren't just register reads would go here. */
117 DRM_DEBUG("Unknown parameter %d\n", args->param);
122 v3d_open(struct drm_device *dev, struct drm_file *file)
124 struct v3d_dev *v3d = to_v3d_dev(dev);
125 struct v3d_file_priv *v3d_priv;
128 v3d_priv = kzalloc(sizeof(*v3d_priv), GFP_KERNEL);
134 for (i = 0; i < V3D_MAX_QUEUES; i++) {
135 drm_sched_entity_init(&v3d->queue[i].sched,
136 &v3d_priv->sched_entity[i],
137 &v3d->queue[i].sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL],
141 file->driver_priv = v3d_priv;
147 v3d_postclose(struct drm_device *dev, struct drm_file *file)
149 struct v3d_dev *v3d = to_v3d_dev(dev);
150 struct v3d_file_priv *v3d_priv = file->driver_priv;
153 for (q = 0; q < V3D_MAX_QUEUES; q++) {
154 drm_sched_entity_fini(&v3d->queue[q].sched,
155 &v3d_priv->sched_entity[q]);
161 static const struct file_operations v3d_drm_fops = {
162 .owner = THIS_MODULE,
164 .release = drm_release,
165 .unlocked_ioctl = drm_ioctl,
169 .compat_ioctl = drm_compat_ioctl,
170 .llseek = noop_llseek,
173 /* DRM_AUTH is required on SUBMIT_CL for now, while we don't have GMP
174 * protection between clients. Note that render nodes would be be
175 * able to submit CLs that could access BOs from clients authenticated
176 * with the master node.
178 static const struct drm_ioctl_desc v3d_drm_ioctls[] = {
179 DRM_IOCTL_DEF_DRV(V3D_SUBMIT_CL, v3d_submit_cl_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
180 DRM_IOCTL_DEF_DRV(V3D_WAIT_BO, v3d_wait_bo_ioctl, DRM_RENDER_ALLOW),
181 DRM_IOCTL_DEF_DRV(V3D_CREATE_BO, v3d_create_bo_ioctl, DRM_RENDER_ALLOW),
182 DRM_IOCTL_DEF_DRV(V3D_MMAP_BO, v3d_mmap_bo_ioctl, DRM_RENDER_ALLOW),
183 DRM_IOCTL_DEF_DRV(V3D_GET_PARAM, v3d_get_param_ioctl, DRM_RENDER_ALLOW),
184 DRM_IOCTL_DEF_DRV(V3D_GET_BO_OFFSET, v3d_get_bo_offset_ioctl, DRM_RENDER_ALLOW),
187 static const struct vm_operations_struct v3d_vm_ops = {
188 .fault = v3d_gem_fault,
189 .open = drm_gem_vm_open,
190 .close = drm_gem_vm_close,
193 static struct drm_driver v3d_drm_driver = {
194 .driver_features = (DRIVER_GEM |
200 .postclose = v3d_postclose,
202 #if defined(CONFIG_DEBUG_FS)
203 .debugfs_init = v3d_debugfs_init,
206 .gem_free_object_unlocked = v3d_free_object,
207 .gem_vm_ops = &v3d_vm_ops,
209 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
210 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
211 .gem_prime_import = drm_gem_prime_import,
212 .gem_prime_export = drm_gem_prime_export,
213 .gem_prime_res_obj = v3d_prime_res_obj,
214 .gem_prime_get_sg_table = v3d_prime_get_sg_table,
215 .gem_prime_import_sg_table = v3d_prime_import_sg_table,
216 .gem_prime_mmap = v3d_prime_mmap,
218 .ioctls = v3d_drm_ioctls,
219 .num_ioctls = ARRAY_SIZE(v3d_drm_ioctls),
220 .fops = &v3d_drm_fops,
225 .major = DRIVER_MAJOR,
226 .minor = DRIVER_MINOR,
227 .patchlevel = DRIVER_PATCHLEVEL,
230 static const struct of_device_id v3d_of_match[] = {
231 { .compatible = "brcm,7268-v3d" },
232 { .compatible = "brcm,7278-v3d" },
235 MODULE_DEVICE_TABLE(of, v3d_of_match);
238 map_regs(struct v3d_dev *v3d, void __iomem **regs, const char *name)
240 struct resource *res =
241 platform_get_resource_byname(v3d->pdev, IORESOURCE_MEM, name);
243 *regs = devm_ioremap_resource(v3d->dev, res);
244 return PTR_ERR_OR_ZERO(*regs);
247 static int v3d_platform_drm_probe(struct platform_device *pdev)
249 struct device *dev = &pdev->dev;
250 struct drm_device *drm;
255 dev->coherent_dma_mask = DMA_BIT_MASK(36);
257 v3d = kzalloc(sizeof(*v3d), GFP_KERNEL);
264 ret = map_regs(v3d, &v3d->bridge_regs, "bridge");
268 ret = map_regs(v3d, &v3d->hub_regs, "hub");
272 ret = map_regs(v3d, &v3d->core_regs[0], "core0");
276 ident1 = V3D_READ(V3D_HUB_IDENT1);
277 v3d->ver = (V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_TVER) * 10 +
278 V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_REV));
279 v3d->cores = V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_NCORES);
280 WARN_ON(v3d->cores > 1); /* multicore not yet implemented */
283 ret = map_regs(v3d, &v3d->gca_regs, "gca");
288 v3d->mmu_scratch = dma_alloc_wc(dev, 4096, &v3d->mmu_scratch_paddr,
289 GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO);
290 if (!v3d->mmu_scratch) {
291 dev_err(dev, "Failed to allocate MMU scratch page\n");
296 pm_runtime_use_autosuspend(dev);
297 pm_runtime_set_autosuspend_delay(dev, 50);
298 pm_runtime_enable(dev);
300 ret = drm_dev_init(&v3d->drm, &v3d_drm_driver, dev);
304 platform_set_drvdata(pdev, drm);
305 drm->dev_private = v3d;
307 ret = v3d_gem_init(drm);
313 ret = drm_dev_register(drm, 0);
320 v3d_gem_destroy(drm);
324 dma_free_wc(dev, 4096, v3d->mmu_scratch, v3d->mmu_scratch_paddr);
330 static int v3d_platform_drm_remove(struct platform_device *pdev)
332 struct drm_device *drm = platform_get_drvdata(pdev);
333 struct v3d_dev *v3d = to_v3d_dev(drm);
335 drm_dev_unregister(drm);
337 v3d_gem_destroy(drm);
341 dma_free_wc(v3d->dev, 4096, v3d->mmu_scratch, v3d->mmu_scratch_paddr);
346 static struct platform_driver v3d_platform_driver = {
347 .probe = v3d_platform_drm_probe,
348 .remove = v3d_platform_drm_remove,
351 .of_match_table = v3d_of_match,
355 static int __init v3d_drm_register(void)
357 return platform_driver_register(&v3d_platform_driver);
360 static void __exit v3d_drm_unregister(void)
362 platform_driver_unregister(&v3d_platform_driver);
365 module_init(v3d_drm_register);
366 module_exit(v3d_drm_unregister);
368 MODULE_ALIAS("platform:v3d-drm");
369 MODULE_DESCRIPTION("Broadcom V3D DRM Driver");
371 MODULE_LICENSE("GPL v2");