1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2005, 2006 IBM Corporation
4 * Copyright (C) 2014, 2015 Intel Corporation
12 * Device driver for TCG/TCPA TPM (trusted platform module).
13 * Specifications at www.trustedcomputinggroup.org
15 * This device driver implements the TPM interface as defined in
16 * the TCG TPM Interface Spec version 1.2, revision 1.0.
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/moduleparam.h>
21 #include <linux/pnp.h>
22 #include <linux/slab.h>
23 #include <linux/interrupt.h>
24 #include <linux/wait.h>
25 #include <linux/acpi.h>
26 #include <linux/freezer.h>
28 #include "tpm_tis_core.h"
30 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value);
32 static bool wait_for_tpm_stat_cond(struct tpm_chip *chip, u8 mask,
33 bool check_cancel, bool *canceled)
35 u8 status = chip->ops->status(chip);
38 if ((status & mask) == mask)
40 if (check_cancel && chip->ops->req_canceled(chip, status)) {
47 static int wait_for_tpm_stat(struct tpm_chip *chip, u8 mask,
48 unsigned long timeout, wait_queue_head_t *queue,
54 bool canceled = false;
56 /* check current status */
57 status = chip->ops->status(chip);
58 if ((status & mask) == mask)
61 stop = jiffies + timeout;
63 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
65 timeout = stop - jiffies;
66 if ((long)timeout <= 0)
68 rc = wait_event_interruptible_timeout(*queue,
69 wait_for_tpm_stat_cond(chip, mask, check_cancel,
77 if (rc == -ERESTARTSYS && freezing(current)) {
78 clear_thread_flag(TIF_SIGPENDING);
83 usleep_range(TPM_TIMEOUT_USECS_MIN,
84 TPM_TIMEOUT_USECS_MAX);
85 status = chip->ops->status(chip);
86 if ((status & mask) == mask)
88 } while (time_before(jiffies, stop));
93 /* Before we attempt to access the TPM we must see that the valid bit is set.
94 * The specification says that this bit is 0 at reset and remains 0 until the
95 * 'TPM has gone through its self test and initialization and has established
96 * correct values in the other bits.'
98 static int wait_startup(struct tpm_chip *chip, int l)
100 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
101 unsigned long stop = jiffies + chip->timeout_a;
107 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
111 if (access & TPM_ACCESS_VALID)
113 tpm_msleep(TPM_TIMEOUT);
114 } while (time_before(jiffies, stop));
118 static bool check_locality(struct tpm_chip *chip, int l)
120 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
124 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
128 if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
129 (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) {
137 static bool locality_inactive(struct tpm_chip *chip, int l)
139 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
143 rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
147 if ((access & (TPM_ACCESS_VALID | TPM_ACCESS_ACTIVE_LOCALITY))
154 static int release_locality(struct tpm_chip *chip, int l)
156 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
157 unsigned long stop, timeout;
160 tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
162 stop = jiffies + chip->timeout_a;
164 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
166 timeout = stop - jiffies;
167 if ((long)timeout <= 0)
170 rc = wait_event_interruptible_timeout(priv->int_queue,
171 (locality_inactive(chip, l)),
177 if (rc == -ERESTARTSYS && freezing(current)) {
178 clear_thread_flag(TIF_SIGPENDING);
183 if (locality_inactive(chip, l))
185 tpm_msleep(TPM_TIMEOUT);
186 } while (time_before(jiffies, stop));
191 static int request_locality(struct tpm_chip *chip, int l)
193 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
194 unsigned long stop, timeout;
197 if (check_locality(chip, l))
200 rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
204 stop = jiffies + chip->timeout_a;
206 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
208 timeout = stop - jiffies;
209 if ((long)timeout <= 0)
211 rc = wait_event_interruptible_timeout(priv->int_queue,
217 if (rc == -ERESTARTSYS && freezing(current)) {
218 clear_thread_flag(TIF_SIGPENDING);
222 /* wait for burstcount */
224 if (check_locality(chip, l))
226 tpm_msleep(TPM_TIMEOUT);
227 } while (time_before(jiffies, stop));
232 static u8 tpm_tis_status(struct tpm_chip *chip)
234 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
238 rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
245 static void tpm_tis_ready(struct tpm_chip *chip)
247 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
249 /* this causes the current command to be aborted */
250 tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
253 static int get_burstcount(struct tpm_chip *chip)
255 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
260 /* wait for burstcount */
261 if (chip->flags & TPM_CHIP_FLAG_TPM2)
262 stop = jiffies + chip->timeout_a;
264 stop = jiffies + chip->timeout_d;
266 rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value);
270 burstcnt = (value >> 8) & 0xFFFF;
273 usleep_range(TPM_TIMEOUT_USECS_MIN, TPM_TIMEOUT_USECS_MAX);
274 } while (time_before(jiffies, stop));
278 static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
280 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
281 int size = 0, burstcnt, rc;
283 while (size < count) {
284 rc = wait_for_tpm_stat(chip,
285 TPM_STS_DATA_AVAIL | TPM_STS_VALID,
287 &priv->read_queue, true);
290 burstcnt = get_burstcount(chip);
292 dev_err(&chip->dev, "Unable to read burstcount\n");
295 burstcnt = min_t(int, burstcnt, count - size);
297 rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
298 burstcnt, buf + size);
307 static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
309 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
314 if (count < TPM_HEADER_SIZE) {
319 size = recv_data(chip, buf, TPM_HEADER_SIZE);
320 /* read first 10 bytes, including tag, paramsize, and result */
321 if (size < TPM_HEADER_SIZE) {
322 dev_err(&chip->dev, "Unable to read header\n");
326 expected = be32_to_cpu(*(__be32 *) (buf + 2));
327 if (expected > count || expected < TPM_HEADER_SIZE) {
332 size += recv_data(chip, &buf[TPM_HEADER_SIZE],
333 expected - TPM_HEADER_SIZE);
334 if (size < expected) {
335 dev_err(&chip->dev, "Unable to read remainder of result\n");
340 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
341 &priv->int_queue, false) < 0) {
345 status = tpm_tis_status(chip);
346 if (status & TPM_STS_DATA_AVAIL) { /* retry? */
347 dev_err(&chip->dev, "Error left over data\n");
358 * If interrupts are used (signaled by an irq set in the vendor structure)
359 * tpm.c can skip polling for the data to be available as the interrupt is
362 static int tpm_tis_send_data(struct tpm_chip *chip, const u8 *buf, size_t len)
364 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
365 int rc, status, burstcnt;
367 bool itpm = priv->flags & TPM_TIS_ITPM_WORKAROUND;
369 status = tpm_tis_status(chip);
370 if ((status & TPM_STS_COMMAND_READY) == 0) {
372 if (wait_for_tpm_stat
373 (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
374 &priv->int_queue, false) < 0) {
380 while (count < len - 1) {
381 burstcnt = get_burstcount(chip);
383 dev_err(&chip->dev, "Unable to read burstcount\n");
387 burstcnt = min_t(int, burstcnt, len - count - 1);
388 rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
389 burstcnt, buf + count);
395 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
396 &priv->int_queue, false) < 0) {
400 status = tpm_tis_status(chip);
401 if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
407 /* write last byte */
408 rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
412 if (wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
413 &priv->int_queue, false) < 0) {
417 status = tpm_tis_status(chip);
418 if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
430 static void disable_interrupts(struct tpm_chip *chip)
432 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
436 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
440 intmask &= ~TPM_GLOBAL_INT_ENABLE;
441 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
443 devm_free_irq(chip->dev.parent, priv->irq, chip);
445 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
449 * If interrupts are used (signaled by an irq set in the vendor structure)
450 * tpm.c can skip polling for the data to be available as the interrupt is
453 static int tpm_tis_send_main(struct tpm_chip *chip, const u8 *buf, size_t len)
455 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
460 rc = tpm_tis_send_data(chip, buf, len);
465 rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
469 if (chip->flags & TPM_CHIP_FLAG_IRQ) {
470 ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
472 dur = tpm_calc_ordinal_duration(chip, ordinal);
473 if (wait_for_tpm_stat
474 (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
475 &priv->read_queue, false) < 0) {
486 static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
489 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
491 if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
492 return tpm_tis_send_main(chip, buf, len);
494 /* Verify receipt of the expected IRQ */
497 chip->flags &= ~TPM_CHIP_FLAG_IRQ;
498 rc = tpm_tis_send_main(chip, buf, len);
500 chip->flags |= TPM_CHIP_FLAG_IRQ;
501 if (!priv->irq_tested)
503 if (!priv->irq_tested)
504 disable_interrupts(chip);
505 priv->irq_tested = true;
509 struct tis_vendor_timeout_override {
511 unsigned long timeout_us[4];
514 static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
516 { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
517 (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
520 static void tpm_tis_update_timeouts(struct tpm_chip *chip,
521 unsigned long *timeout_cap)
523 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
527 chip->timeout_adjusted = false;
529 if (chip->ops->clk_enable != NULL)
530 chip->ops->clk_enable(chip, true);
532 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
534 dev_warn(&chip->dev, "%s: failed to read did_vid: %d\n",
539 for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
540 if (vendor_timeout_overrides[i].did_vid != did_vid)
542 memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
543 sizeof(vendor_timeout_overrides[i].timeout_us));
544 chip->timeout_adjusted = true;
548 if (chip->ops->clk_enable != NULL)
549 chip->ops->clk_enable(chip, false);
555 * Early probing for iTPM with STS_DATA_EXPECT flaw.
556 * Try sending command without itpm flag set and if that
557 * fails, repeat with itpm flag set.
559 static int probe_itpm(struct tpm_chip *chip)
561 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
563 static const u8 cmd_getticks[] = {
564 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
565 0x00, 0x00, 0x00, 0xf1
567 size_t len = sizeof(cmd_getticks);
570 if (priv->flags & TPM_TIS_ITPM_WORKAROUND)
573 rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
577 /* probe only iTPMS */
578 if (vendor != TPM_VID_INTEL)
581 if (request_locality(chip, 0) != 0)
584 rc = tpm_tis_send_data(chip, cmd_getticks, len);
590 priv->flags |= TPM_TIS_ITPM_WORKAROUND;
592 rc = tpm_tis_send_data(chip, cmd_getticks, len);
594 dev_info(&chip->dev, "Detected an iTPM.\n");
596 priv->flags &= ~TPM_TIS_ITPM_WORKAROUND;
602 release_locality(chip, priv->locality);
607 static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
609 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
611 switch (priv->manufacturer_id) {
612 case TPM_VID_WINBOND:
613 return ((status == TPM_STS_VALID) ||
614 (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
616 return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
618 return (status == TPM_STS_COMMAND_READY);
622 static irqreturn_t tis_int_handler(int dummy, void *dev_id)
624 struct tpm_chip *chip = dev_id;
625 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
629 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
636 priv->irq_tested = true;
637 if (interrupt & TPM_INTF_DATA_AVAIL_INT)
638 wake_up_interruptible(&priv->read_queue);
639 if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
640 for (i = 0; i < 5; i++)
641 if (check_locality(chip, i))
644 (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
645 TPM_INTF_CMD_READY_INT))
646 wake_up_interruptible(&priv->int_queue);
648 /* Clear interrupts handled with TPM_EOI */
649 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
653 tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
657 static int tpm_tis_gen_interrupt(struct tpm_chip *chip)
659 const char *desc = "attempting to generate an interrupt";
663 if (chip->flags & TPM_CHIP_FLAG_TPM2)
664 return tpm2_get_tpm_pt(chip, 0x100, &cap2, desc);
666 return tpm1_getcap(chip, TPM_CAP_PROP_TIS_TIMEOUT, &cap, desc,
670 /* Register the IRQ and issue a command that will cause an interrupt. If an
671 * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
672 * everything and leave in polling mode. Returns 0 on success.
674 static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
677 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
682 if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags,
683 dev_name(&chip->dev), chip) != 0) {
684 dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
690 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
695 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
699 rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
703 /* Clear all existing */
704 rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
709 rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
710 intmask | TPM_GLOBAL_INT_ENABLE);
714 priv->irq_tested = false;
716 /* Generate an interrupt by having the core call through to
719 rc = tpm_tis_gen_interrupt(chip);
723 /* tpm_tis_send will either confirm the interrupt is working or it
724 * will call disable_irq which undoes all of the above.
726 if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
727 rc = tpm_tis_write8(priv, original_int_vec,
728 TPM_INT_VECTOR(priv->locality));
738 /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
739 * do not have ACPI/etc. We typically expect the interrupt to be declared if
742 static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
744 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
748 rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
753 if (!original_int_vec) {
754 if (IS_ENABLED(CONFIG_X86))
755 for (i = 3; i <= 15; i++)
756 if (!tpm_tis_probe_irq_single(chip, intmask, 0,
759 } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
764 void tpm_tis_remove(struct tpm_chip *chip)
766 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
767 u32 reg = TPM_INT_ENABLE(priv->locality);
771 tpm_tis_clkrun_enable(chip, true);
773 rc = tpm_tis_read32(priv, reg, &interrupt);
777 tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
779 tpm_tis_clkrun_enable(chip, false);
781 if (priv->ilb_base_addr)
782 iounmap(priv->ilb_base_addr);
784 EXPORT_SYMBOL_GPL(tpm_tis_remove);
787 * tpm_tis_clkrun_enable() - Keep clkrun protocol disabled for entire duration
788 * of a single TPM command
789 * @chip: TPM chip to use
790 * @value: 1 - Disable CLKRUN protocol, so that clocks are free running
791 * 0 - Enable CLKRUN protocol
792 * Call this function directly in tpm_tis_remove() in error or driver removal
793 * path, since the chip->ops is set to NULL in tpm_chip_unregister().
795 static void tpm_tis_clkrun_enable(struct tpm_chip *chip, bool value)
797 struct tpm_tis_data *data = dev_get_drvdata(&chip->dev);
800 if (!IS_ENABLED(CONFIG_X86) || !is_bsw() ||
801 !data->ilb_base_addr)
805 data->clkrun_enabled++;
806 if (data->clkrun_enabled > 1)
808 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
810 /* Disable LPC CLKRUN# */
811 clkrun_val &= ~LPC_CLKRUN_EN;
812 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
815 * Write any random value on port 0x80 which is on LPC, to make
816 * sure LPC clock is running before sending any TPM command.
820 data->clkrun_enabled--;
821 if (data->clkrun_enabled)
824 clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
826 /* Enable LPC CLKRUN# */
827 clkrun_val |= LPC_CLKRUN_EN;
828 iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
831 * Write any random value on port 0x80 which is on LPC, to make
832 * sure LPC clock is running before sending any TPM command.
838 static const struct tpm_class_ops tpm_tis = {
839 .flags = TPM_OPS_AUTO_STARTUP,
840 .status = tpm_tis_status,
841 .recv = tpm_tis_recv,
842 .send = tpm_tis_send,
843 .cancel = tpm_tis_ready,
844 .update_timeouts = tpm_tis_update_timeouts,
845 .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
846 .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
847 .req_canceled = tpm_tis_req_canceled,
848 .request_locality = request_locality,
849 .relinquish_locality = release_locality,
850 .clk_enable = tpm_tis_clkrun_enable,
853 int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
854 const struct tpm_tis_phy_ops *phy_ops,
855 acpi_handle acpi_dev_handle)
863 struct tpm_chip *chip;
865 chip = tpmm_chip_alloc(dev, &tpm_tis);
867 return PTR_ERR(chip);
870 chip->acpi_dev_handle = acpi_dev_handle;
873 chip->hwrng.quality = priv->rng_quality;
875 /* Maximum timeouts */
876 chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX);
877 chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX);
878 chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX);
879 chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX);
880 priv->phy_ops = phy_ops;
881 dev_set_drvdata(&chip->dev, priv);
884 priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
886 if (!priv->ilb_base_addr)
889 clkrun_val = ioread32(priv->ilb_base_addr + LPC_CNTRL_OFFSET);
890 /* Check if CLKRUN# is already not enabled in the LPC bus */
891 if (!(clkrun_val & LPC_CLKRUN_EN)) {
892 iounmap(priv->ilb_base_addr);
893 priv->ilb_base_addr = NULL;
897 if (chip->ops->clk_enable != NULL)
898 chip->ops->clk_enable(chip, true);
900 if (wait_startup(chip, 0) != 0) {
905 /* Take control of the TPM's interrupt hardware and shut it off */
906 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
910 intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
911 TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
912 intmask &= ~TPM_GLOBAL_INT_ENABLE;
913 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
915 rc = tpm_chip_start(chip);
918 rc = tpm2_probe(chip);
923 rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
927 priv->manufacturer_id = vendor;
929 rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
933 dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
934 (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
937 probe = probe_itpm(chip);
943 /* Figure out the capabilities */
944 rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
948 dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
950 if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
951 dev_dbg(dev, "\tBurst Count Static\n");
952 if (intfcaps & TPM_INTF_CMD_READY_INT)
953 dev_dbg(dev, "\tCommand Ready Int Support\n");
954 if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
955 dev_dbg(dev, "\tInterrupt Edge Falling\n");
956 if (intfcaps & TPM_INTF_INT_EDGE_RISING)
957 dev_dbg(dev, "\tInterrupt Edge Rising\n");
958 if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
959 dev_dbg(dev, "\tInterrupt Level Low\n");
960 if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
961 dev_dbg(dev, "\tInterrupt Level High\n");
962 if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
963 dev_dbg(dev, "\tLocality Change Int Support\n");
964 if (intfcaps & TPM_INTF_STS_VALID_INT)
965 dev_dbg(dev, "\tSts Valid Int Support\n");
966 if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
967 dev_dbg(dev, "\tData Avail Int Support\n");
969 /* INTERRUPT Setup */
970 init_waitqueue_head(&priv->read_queue);
971 init_waitqueue_head(&priv->int_queue);
973 /* Before doing irq testing issue a command to the TPM in polling mode
974 * to make sure it works. May as well use that command to set the
975 * proper timeouts for the driver.
977 if (tpm_get_timeouts(chip)) {
978 dev_err(dev, "Could not get TPM timeouts and durations\n");
983 tpm_chip_start(chip);
984 chip->flags |= TPM_CHIP_FLAG_IRQ;
986 tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
988 if (!(chip->flags & TPM_CHIP_FLAG_IRQ))
989 dev_err(&chip->dev, FW_BUG
990 "TPM interrupt not working, polling instead\n");
992 tpm_tis_probe_irq(chip, intmask);
997 rc = tpm_chip_register(chip);
1001 if (chip->ops->clk_enable != NULL)
1002 chip->ops->clk_enable(chip, false);
1006 if ((chip->ops != NULL) && (chip->ops->clk_enable != NULL))
1007 chip->ops->clk_enable(chip, false);
1009 tpm_tis_remove(chip);
1013 EXPORT_SYMBOL_GPL(tpm_tis_core_init);
1015 #ifdef CONFIG_PM_SLEEP
1016 static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
1018 struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
1022 if (chip->ops->clk_enable != NULL)
1023 chip->ops->clk_enable(chip, true);
1025 /* reenable interrupts that device may have lost or
1026 * BIOS/firmware may have disabled
1028 rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
1032 rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
1036 intmask |= TPM_INTF_CMD_READY_INT
1037 | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
1038 | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
1040 tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
1043 if (chip->ops->clk_enable != NULL)
1044 chip->ops->clk_enable(chip, false);
1049 int tpm_tis_resume(struct device *dev)
1051 struct tpm_chip *chip = dev_get_drvdata(dev);
1054 if (chip->flags & TPM_CHIP_FLAG_IRQ)
1055 tpm_tis_reenable_interrupts(chip);
1057 ret = tpm_pm_resume(dev);
1061 /* TPM 1.2 requires self-test on resume. This function actually returns
1062 * an error code but for unknown reason it isn't handled.
1064 if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
1065 tpm1_do_selftest(chip);
1069 EXPORT_SYMBOL_GPL(tpm_tis_resume);
1073 MODULE_DESCRIPTION("TPM Driver");
1074 MODULE_VERSION("2.0");
1075 MODULE_LICENSE("GPL");