arch/arm/boot/dts/exynos5.dtsi

   1 /*
   2  * Samsung's Exynos5 SoC series common device tree source
   3  *
   4  * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
   5  *              http://www.samsung.com
   6  *
   7  * Samsung's Exynos5 SoC series device nodes are listed in this file. Particular
   8  * SoCs from Exynos5 series can include this file and provide values for SoCs
   9  * specfic bindings.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include "skeleton.dtsi"
  17 #include "exynos-syscon-restart.dtsi"
  18
  19 / {
  20         interrupt-parent = <&gic>;
  21
  22         aliases {
  23                 i2c0 = &i2c_0;
  24                 i2c1 = &i2c_1;
  25                 i2c2 = &i2c_2;
  26                 i2c3 = &i2c_3;
  27                 serial0 = &serial_0;
  28                 serial1 = &serial_1;
  29                 serial2 = &serial_2;
  30                 serial3 = &serial_3;
  31         };
  32
  33         chipid@10000000 {
  34                 compatible = "samsung,exynos4210-chipid";
  35                 reg = <0x10000000 0x100>;
  36         };
  37
  38         sromc: memory-controller@12250000 {
  39                 compatible = "samsung,exynos4210-srom";
  40                 reg = <0x12250000 0x14>;
  41         };
  42
  43         combiner: interrupt-controller@10440000 {
  44                 compatible = "samsung,exynos4210-combiner";
  45                 #interrupt-cells = <2>;
  46                 interrupt-controller;
  47                 samsung,combiner-nr = <32>;
  48                 reg = <0x10440000 0x1000>;
  49                 interrupts =    <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
  50                                 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
  51                                 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
  52                                 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
  53                                 <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
  54                                 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
  55                                 <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
  56                                 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
  57         };
  58
  59         gic: interrupt-controller@10481000 {
  60                 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
  61                 #interrupt-cells = <3>;
  62                 interrupt-controller;
  63                 reg =   <0x10481000 0x1000>,
  64                         <0x10482000 0x1000>,
  65                         <0x10484000 0x2000>,
  66                         <0x10486000 0x2000>;
  67                 interrupts = <1 9 0xf04>;
  68         };
  69
  70         sysreg_system_controller: syscon@10050000 {
  71                 compatible = "samsung,exynos5-sysreg", "syscon";
  72                 reg = <0x10050000 0x5000>;
  73         };
  74
  75         serial_0: serial@12C00000 {
  76                 compatible = "samsung,exynos4210-uart";
  77                 reg = <0x12C00000 0x100>;
  78                 interrupts = <0 51 0>;
  79         };
  80
  81         serial_1: serial@12C10000 {
  82                 compatible = "samsung,exynos4210-uart";
  83                 reg = <0x12C10000 0x100>;
  84                 interrupts = <0 52 0>;
  85         };
  86
  87         serial_2: serial@12C20000 {
  88                 compatible = "samsung,exynos4210-uart";
  89                 reg = <0x12C20000 0x100>;
  90                 interrupts = <0 53 0>;
  91         };
  92
  93         serial_3: serial@12C30000 {
  94                 compatible = "samsung,exynos4210-uart";
  95                 reg = <0x12C30000 0x100>;
  96                 interrupts = <0 54 0>;
  97         };
  98
  99         i2c_0: i2c@12C60000 {
 100                 compatible = "samsung,s3c2440-i2c";
 101                 reg = <0x12C60000 0x100>;
 102                 interrupts = <0 56 0>;
 103                 #address-cells = <1>;
 104                 #size-cells = <0>;
 105                 samsung,sysreg-phandle = <&sysreg_system_controller>;
 106                 status = "disabled";
 107         };
 108
 109         i2c_1: i2c@12C70000 {
 110                 compatible = "samsung,s3c2440-i2c";
 111                 reg = <0x12C70000 0x100>;
 112                 interrupts = <0 57 0>;
 113                 #address-cells = <1>;
 114                 #size-cells = <0>;
 115                 samsung,sysreg-phandle = <&sysreg_system_controller>;
 116                 status = "disabled";
 117         };
 118
 119         i2c_2: i2c@12C80000 {
 120                 compatible = "samsung,s3c2440-i2c";
 121                 reg = <0x12C80000 0x100>;
 122                 interrupts = <0 58 0>;
 123                 #address-cells = <1>;
 124                 #size-cells = <0>;
 125                 samsung,sysreg-phandle = <&sysreg_system_controller>;
 126                 status = "disabled";
 127         };
 128
 129         i2c_3: i2c@12C90000 {
 130                 compatible = "samsung,s3c2440-i2c";
 131                 reg = <0x12C90000 0x100>;
 132                 interrupts = <0 59 0>;
 133                 #address-cells = <1>;
 134                 #size-cells = <0>;
 135                 samsung,sysreg-phandle = <&sysreg_system_controller>;
 136                 status = "disabled";
 137         };
 138
 139         pwm: pwm@12DD0000 {
 140                 compatible = "samsung,exynos4210-pwm";
 141                 reg = <0x12DD0000 0x100>;
 142                 samsung,pwm-outputs = <0>, <1>, <2>, <3>;
 143                 #pwm-cells = <3>;
 144         };
 145
 146         rtc: rtc@101E0000 {
 147                 compatible = "samsung,s3c6410-rtc";
 148                 reg = <0x101E0000 0x100>;
 149                 interrupts = <0 43 0>, <0 44 0>;
 150                 status = "disabled";
 151         };
 152
 153         fimd: fimd@14400000 {
 154                 compatible = "samsung,exynos5250-fimd";
 155                 interrupt-parent = <&combiner>;
 156                 reg = <0x14400000 0x40000>;
 157                 interrupt-names = "fifo", "vsync", "lcd_sys";
 158                 interrupts = <18 4>, <18 5>, <18 6>;
 159                 samsung,sysreg = <&sysreg_system_controller>;
 160                 status = "disabled";
 161         };
 162
 163         dp: dp-controller@145B0000 {
 164                 compatible = "samsung,exynos5-dp";
 165                 reg = <0x145B0000 0x1000>;
 166                 interrupts = <10 3>;
 167                 interrupt-parent = <&combiner>;
 168                 #address-cells = <1>;
 169                 #size-cells = <0>;
 170                 status = "disabled";
 171         };
 172 };