2 * pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $)
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or (at
12 * your option) any later version.
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
19 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/init.h>
25 #include <linux/types.h>
26 #include <linux/mutex.h>
28 #include <linux/pm_runtime.h>
29 #include <linux/pci.h>
30 #include <linux/pci-acpi.h>
31 #include <linux/pci-aspm.h>
32 #include <linux/dmar.h>
33 #include <linux/acpi.h>
34 #include <linux/slab.h>
35 #include <linux/dmi.h>
36 #include <linux/platform_data/x86/apple.h>
37 #include <acpi/apei.h> /* for acpi_hest_init() */
41 #define _COMPONENT ACPI_PCI_COMPONENT
42 ACPI_MODULE_NAME("pci_root");
43 #define ACPI_PCI_ROOT_CLASS "pci_bridge"
44 #define ACPI_PCI_ROOT_DEVICE_NAME "PCI Root Bridge"
45 static int acpi_pci_root_add(struct acpi_device *device,
46 const struct acpi_device_id *not_used);
47 static void acpi_pci_root_remove(struct acpi_device *device);
49 static int acpi_pci_root_scan_dependent(struct acpi_device *adev)
51 acpiphp_check_host_bridge(adev);
55 #define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \
56 | OSC_PCI_ASPM_SUPPORT \
57 | OSC_PCI_CLOCK_PM_SUPPORT \
58 | OSC_PCI_MSI_SUPPORT)
60 static const struct acpi_device_id root_device_ids[] = {
65 static struct acpi_scan_handler pci_root_handler = {
66 .ids = root_device_ids,
67 .attach = acpi_pci_root_add,
68 .detach = acpi_pci_root_remove,
71 .scan_dependent = acpi_pci_root_scan_dependent,
75 static DEFINE_MUTEX(osc_lock);
78 * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge
79 * @handle - the ACPI CA node in question.
81 * Note: we could make this API take a struct acpi_device * instead, but
82 * for now, it's more convenient to operate on an acpi_handle.
84 int acpi_is_root_bridge(acpi_handle handle)
87 struct acpi_device *device;
89 ret = acpi_bus_get_device(handle, &device);
93 ret = acpi_match_device_ids(device, root_device_ids);
99 EXPORT_SYMBOL_GPL(acpi_is_root_bridge);
102 get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data)
104 struct resource *res = data;
105 struct acpi_resource_address64 address;
108 status = acpi_resource_to_address64(resource, &address);
109 if (ACPI_FAILURE(status))
112 if ((address.address.address_length > 0) &&
113 (address.resource_type == ACPI_BUS_NUMBER_RANGE)) {
114 res->start = address.address.minimum;
115 res->end = address.address.minimum + address.address.address_length - 1;
121 static acpi_status try_get_root_bridge_busnr(acpi_handle handle,
122 struct resource *res)
128 acpi_walk_resources(handle, METHOD_NAME__CRS,
129 get_root_bridge_busnr_callback, res);
130 if (ACPI_FAILURE(status))
132 if (res->start == -1)
137 struct pci_osc_bit_struct {
142 static struct pci_osc_bit_struct pci_osc_support_bit[] = {
143 { OSC_PCI_EXT_CONFIG_SUPPORT, "ExtendedConfig" },
144 { OSC_PCI_ASPM_SUPPORT, "ASPM" },
145 { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" },
146 { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" },
147 { OSC_PCI_MSI_SUPPORT, "MSI" },
150 static struct pci_osc_bit_struct pci_osc_control_bit[] = {
151 { OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, "PCIeHotplug" },
152 { OSC_PCI_SHPC_NATIVE_HP_CONTROL, "SHPCHotplug" },
153 { OSC_PCI_EXPRESS_PME_CONTROL, "PME" },
154 { OSC_PCI_EXPRESS_AER_CONTROL, "AER" },
155 { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" },
156 { OSC_PCI_EXPRESS_LTR_CONTROL, "LTR" },
159 static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word,
160 struct pci_osc_bit_struct *table, int size)
164 struct pci_osc_bit_struct *entry;
167 for (i = 0, entry = table; i < size; i++, entry++)
168 if (word & entry->bit)
169 len += snprintf(buf + len, sizeof(buf) - len, "%s%s",
170 len ? " " : "", entry->desc);
172 dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf);
175 static void decode_osc_support(struct acpi_pci_root *root, char *msg, u32 word)
177 decode_osc_bits(root, msg, word, pci_osc_support_bit,
178 ARRAY_SIZE(pci_osc_support_bit));
181 static void decode_osc_control(struct acpi_pci_root *root, char *msg, u32 word)
183 decode_osc_bits(root, msg, word, pci_osc_control_bit,
184 ARRAY_SIZE(pci_osc_control_bit));
187 static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766";
189 static acpi_status acpi_pci_run_osc(acpi_handle handle,
190 const u32 *capbuf, u32 *retval)
192 struct acpi_osc_context context = {
193 .uuid_str = pci_osc_uuid_str,
196 .cap.pointer = (void *)capbuf,
200 status = acpi_run_osc(handle, &context);
201 if (ACPI_SUCCESS(status)) {
202 *retval = *((u32 *)(context.ret.pointer + 8));
203 kfree(context.ret.pointer);
208 static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root,
213 u32 result, capbuf[3];
215 support &= OSC_PCI_SUPPORT_MASKS;
216 support |= root->osc_support_set;
218 capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE;
219 capbuf[OSC_SUPPORT_DWORD] = support;
221 *control &= OSC_PCI_CONTROL_MASKS;
222 capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set;
224 /* Run _OSC query only with existing controls. */
225 capbuf[OSC_CONTROL_DWORD] = root->osc_control_set;
228 status = acpi_pci_run_osc(root->device->handle, capbuf, &result);
229 if (ACPI_SUCCESS(status)) {
230 root->osc_support_set = support;
237 static acpi_status acpi_pci_osc_support(struct acpi_pci_root *root, u32 flags)
241 mutex_lock(&osc_lock);
242 status = acpi_pci_query_osc(root, flags, NULL);
243 mutex_unlock(&osc_lock);
247 struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle)
249 struct acpi_pci_root *root;
250 struct acpi_device *device;
252 if (acpi_bus_get_device(handle, &device) ||
253 acpi_match_device_ids(device, root_device_ids))
256 root = acpi_driver_data(device);
260 EXPORT_SYMBOL_GPL(acpi_pci_find_root);
262 struct acpi_handle_node {
263 struct list_head node;
268 * acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev
269 * @handle: the handle in question
271 * Given an ACPI CA handle, the desired PCI device is located in the
272 * list of PCI devices.
274 * If the device is found, its reference count is increased and this
275 * function returns a pointer to its data structure. The caller must
276 * decrement the reference count by calling pci_dev_put().
277 * If no device is found, %NULL is returned.
279 struct pci_dev *acpi_get_pci_dev(acpi_handle handle)
282 unsigned long long adr;
285 struct pci_bus *pbus;
286 struct pci_dev *pdev = NULL;
287 struct acpi_handle_node *node, *tmp;
288 struct acpi_pci_root *root;
289 LIST_HEAD(device_list);
292 * Walk up the ACPI CA namespace until we reach a PCI root bridge.
295 while (!acpi_is_root_bridge(phandle)) {
296 node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL);
300 INIT_LIST_HEAD(&node->node);
301 node->handle = phandle;
302 list_add(&node->node, &device_list);
304 status = acpi_get_parent(phandle, &phandle);
305 if (ACPI_FAILURE(status))
309 root = acpi_pci_find_root(phandle);
316 * Now, walk back down the PCI device tree until we return to our
317 * original handle. Assumes that everything between the PCI root
318 * bridge and the device we're looking for must be a P2P bridge.
320 list_for_each_entry(node, &device_list, node) {
321 acpi_handle hnd = node->handle;
322 status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr);
323 if (ACPI_FAILURE(status))
325 dev = (adr >> 16) & 0xffff;
328 pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn));
329 if (!pdev || hnd == handle)
332 pbus = pdev->subordinate;
336 * This function may be called for a non-PCI device that has a
337 * PCI parent (eg. a disk under a PCI SATA controller). In that
338 * case pdev->subordinate will be NULL for the parent.
341 dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n");
347 list_for_each_entry_safe(node, tmp, &device_list, node)
352 EXPORT_SYMBOL_GPL(acpi_get_pci_dev);
355 * acpi_pci_osc_control_set - Request control of PCI root _OSC features.
356 * @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex).
357 * @mask: Mask of _OSC bits to request control of, place to store control mask.
358 * @req: Mask of _OSC bits the control of is essential to the caller.
360 * Run _OSC query for @mask and if that is successful, compare the returned
361 * mask of control bits with @req. If all of the @req bits are set in the
362 * returned mask, run _OSC request for it.
364 * The variable at the @mask address may be modified regardless of whether or
365 * not the function returns success. On success it will contain the mask of
366 * _OSC bits the BIOS has granted control of, but its contents are meaningless
369 acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 req)
371 struct acpi_pci_root *root;
372 acpi_status status = AE_OK;
376 return AE_BAD_PARAMETER;
378 ctrl = *mask & OSC_PCI_CONTROL_MASKS;
379 if ((ctrl & req) != req)
382 root = acpi_pci_find_root(handle);
386 mutex_lock(&osc_lock);
388 *mask = ctrl | root->osc_control_set;
389 /* No need to evaluate _OSC if the control was already granted. */
390 if ((root->osc_control_set & ctrl) == ctrl)
393 /* Need to check the available controls bits before requesting them. */
395 status = acpi_pci_query_osc(root, root->osc_support_set, mask);
396 if (ACPI_FAILURE(status))
400 decode_osc_control(root, "platform does not support",
405 if ((ctrl & req) != req) {
406 decode_osc_control(root, "not requesting control; platform does not support",
412 capbuf[OSC_QUERY_DWORD] = 0;
413 capbuf[OSC_SUPPORT_DWORD] = root->osc_support_set;
414 capbuf[OSC_CONTROL_DWORD] = ctrl;
415 status = acpi_pci_run_osc(handle, capbuf, mask);
416 if (ACPI_SUCCESS(status))
417 root->osc_control_set = *mask;
419 mutex_unlock(&osc_lock);
422 EXPORT_SYMBOL(acpi_pci_osc_control_set);
424 static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm)
426 u32 support, control, requested;
428 struct acpi_device *device = root->device;
429 acpi_handle handle = device->handle;
432 * Apple always return failure on _OSC calls when _OSI("Darwin") has
433 * been called successfully. We know the feature set supported by the
434 * platform, so avoid calling _OSC at all
436 if (x86_apple_machine) {
437 root->osc_control_set = ~OSC_PCI_EXPRESS_PME_CONTROL;
438 decode_osc_control(root, "OS assumes control of",
439 root->osc_control_set);
444 * All supported architectures that use ACPI have support for
445 * PCI domains, so we indicate this in _OSC support capabilities.
447 support = OSC_PCI_SEGMENT_GROUPS_SUPPORT;
448 if (pci_ext_cfg_avail())
449 support |= OSC_PCI_EXT_CONFIG_SUPPORT;
450 if (pcie_aspm_support_enabled())
451 support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT;
452 if (pci_msi_enabled())
453 support |= OSC_PCI_MSI_SUPPORT;
455 decode_osc_support(root, "OS supports", support);
456 status = acpi_pci_osc_support(root, support);
457 if (ACPI_FAILURE(status)) {
458 dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n",
459 acpi_format_exception(status));
464 if (pcie_ports_disabled) {
465 dev_info(&device->dev, "PCIe port services disabled; not requesting _OSC control\n");
469 if ((support & ACPI_PCIE_REQ_SUPPORT) != ACPI_PCIE_REQ_SUPPORT) {
470 decode_osc_support(root, "not requesting OS control; OS requires",
471 ACPI_PCIE_REQ_SUPPORT);
475 control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL
476 | OSC_PCI_EXPRESS_PME_CONTROL;
478 if (IS_ENABLED(CONFIG_PCIEASPM))
479 control |= OSC_PCI_EXPRESS_LTR_CONTROL;
481 if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
482 control |= OSC_PCI_EXPRESS_NATIVE_HP_CONTROL;
484 if (IS_ENABLED(CONFIG_HOTPLUG_PCI_SHPC))
485 control |= OSC_PCI_SHPC_NATIVE_HP_CONTROL;
487 if (pci_aer_available()) {
488 if (aer_acpi_firmware_first())
489 dev_info(&device->dev,
490 "PCIe AER handled by firmware\n");
492 control |= OSC_PCI_EXPRESS_AER_CONTROL;
496 status = acpi_pci_osc_control_set(handle, &control,
497 OSC_PCI_EXPRESS_CAPABILITY_CONTROL);
498 if (ACPI_SUCCESS(status)) {
499 decode_osc_control(root, "OS now controls", control);
500 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
502 * We have ASPM control, but the FADT indicates that
503 * it's unsupported. Leave existing configuration
504 * intact and prevent the OS from touching it.
506 dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n");
510 decode_osc_control(root, "OS requested", requested);
511 decode_osc_control(root, "platform willing to grant", control);
512 dev_info(&device->dev, "_OSC failed (%s); disabling ASPM\n",
513 acpi_format_exception(status));
516 * We want to disable ASPM here, but aspm_disabled
517 * needs to remain in its state from boot so that we
518 * properly handle PCIe 1.1 devices. So we set this
519 * flag here, to defer the action until after the ACPI
526 static int acpi_pci_root_add(struct acpi_device *device,
527 const struct acpi_device_id *not_used)
529 unsigned long long segment, bus;
532 struct acpi_pci_root *root;
533 acpi_handle handle = device->handle;
535 bool hotadd = system_state == SYSTEM_RUNNING;
537 root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
542 status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL,
544 if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
545 dev_err(&device->dev, "can't evaluate _SEG\n");
550 /* Check _CRS first, then _BBN. If no _BBN, default to zero. */
551 root->secondary.flags = IORESOURCE_BUS;
552 status = try_get_root_bridge_busnr(handle, &root->secondary);
553 if (ACPI_FAILURE(status)) {
555 * We need both the start and end of the downstream bus range
556 * to interpret _CBA (MMCONFIG base address), so it really is
557 * supposed to be in _CRS. If we don't find it there, all we
558 * can do is assume [_BBN-0xFF] or [0-0xFF].
560 root->secondary.end = 0xFF;
561 dev_warn(&device->dev,
562 FW_BUG "no secondary bus range in _CRS\n");
563 status = acpi_evaluate_integer(handle, METHOD_NAME__BBN,
565 if (ACPI_SUCCESS(status))
566 root->secondary.start = bus;
567 else if (status == AE_NOT_FOUND)
568 root->secondary.start = 0;
570 dev_err(&device->dev, "can't evaluate _BBN\n");
576 root->device = device;
577 root->segment = segment & 0xFFFF;
578 strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME);
579 strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS);
580 device->driver_data = root;
582 if (hotadd && dmar_device_add(handle)) {
587 pr_info(PREFIX "%s [%s] (domain %04x %pR)\n",
588 acpi_device_name(device), acpi_device_bid(device),
589 root->segment, &root->secondary);
591 root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle);
593 negotiate_os_control(root, &no_aspm);
596 * TBD: Need PCI interface for enumeration/configuration of roots.
600 * Scan the Root Bridge
601 * --------------------
602 * Must do this prior to any attempt to bind the root device, as the
603 * PCI namespace does not get created until this call is made (and
604 * thus the root bridge's pci_dev does not exist).
606 root->bus = pci_acpi_scan_root(root);
608 dev_err(&device->dev,
609 "Bus %04x:%02x not present in PCI namespace\n",
610 root->segment, (unsigned int)root->secondary.start);
611 device->driver_data = NULL;
619 pci_acpi_add_bus_pm_notifier(device);
620 device_set_wakeup_capable(root->bus->bridge, device->wakeup.flags.valid);
623 pcibios_resource_survey_bus(root->bus);
624 pci_assign_unassigned_root_bus_resources(root->bus);
626 * This is only called for the hotadd case. For the boot-time
627 * case, we need to wait until after PCI initialization in
628 * order to deal with IOAPICs mapped in on a PCI BAR.
630 * This is currently x86-specific, because acpi_ioapic_add()
631 * is an empty function without CONFIG_ACPI_HOTPLUG_IOAPIC.
632 * And CONFIG_ACPI_HOTPLUG_IOAPIC depends on CONFIG_X86_IO_APIC
633 * (see drivers/acpi/Kconfig).
635 acpi_ioapic_add(root->device->handle);
638 pci_lock_rescan_remove();
639 pci_bus_add_devices(root->bus);
640 pci_unlock_rescan_remove();
645 dmar_device_remove(handle);
651 static void acpi_pci_root_remove(struct acpi_device *device)
653 struct acpi_pci_root *root = acpi_driver_data(device);
655 pci_lock_rescan_remove();
657 pci_stop_root_bus(root->bus);
659 pci_ioapic_remove(root);
660 device_set_wakeup_capable(root->bus->bridge, false);
661 pci_acpi_remove_bus_pm_notifier(device);
663 pci_remove_root_bus(root->bus);
664 WARN_ON(acpi_ioapic_remove(root));
666 dmar_device_remove(device->handle);
668 pci_unlock_rescan_remove();
674 * Following code to support acpi_pci_root_create() is copied from
675 * arch/x86/pci/acpi.c and modified so it could be reused by x86, IA64
678 static void acpi_pci_root_validate_resources(struct device *dev,
679 struct list_head *resources,
683 struct resource *res1, *res2, *root = NULL;
684 struct resource_entry *tmp, *entry, *entry2;
686 BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0);
687 root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource;
689 list_splice_init(resources, &list);
690 resource_list_for_each_entry_safe(entry, tmp, &list) {
695 if (!(res1->flags & type))
698 /* Exclude non-addressable range or non-addressable portion */
699 end = min(res1->end, root->end);
700 if (end <= res1->start) {
701 dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n",
705 } else if (res1->end != end) {
706 dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n",
707 res1, (unsigned long long)end + 1,
708 (unsigned long long)res1->end);
712 resource_list_for_each_entry(entry2, resources) {
714 if (!(res2->flags & type))
718 * I don't like throwing away windows because then
719 * our resources no longer match the ACPI _CRS, but
720 * the kernel resource tree doesn't allow overlaps.
722 if (resource_overlaps(res1, res2)) {
723 res2->start = min(res1->start, res2->start);
724 res2->end = max(res1->end, res2->end);
725 dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n",
733 resource_list_del(entry);
735 resource_list_free_entry(entry);
737 resource_list_add_tail(entry, resources);
741 static void acpi_pci_root_remap_iospace(struct fwnode_handle *fwnode,
742 struct resource_entry *entry)
745 struct resource *res = entry->res;
746 resource_size_t cpu_addr = res->start;
747 resource_size_t pci_addr = cpu_addr - entry->offset;
748 resource_size_t length = resource_size(res);
751 if (pci_register_io_range(fwnode, cpu_addr, length))
754 port = pci_address_to_pio(cpu_addr);
755 if (port == (unsigned long)-1)
759 res->end = port + length - 1;
760 entry->offset = port - pci_addr;
762 if (pci_remap_iospace(res, cpu_addr) < 0)
765 pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res);
768 res->flags |= IORESOURCE_DISABLED;
772 int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info)
775 struct list_head *list = &info->resources;
776 struct acpi_device *device = info->bridge;
777 struct resource_entry *entry, *tmp;
780 flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT;
781 ret = acpi_dev_get_resources(device, list,
782 acpi_dev_filter_resource_type_cb,
785 dev_warn(&device->dev,
786 "failed to parse _CRS method, error code %d\n", ret);
788 dev_dbg(&device->dev,
789 "no IO and memory resources present in _CRS\n");
791 resource_list_for_each_entry_safe(entry, tmp, list) {
792 if (entry->res->flags & IORESOURCE_IO)
793 acpi_pci_root_remap_iospace(&device->fwnode,
796 if (entry->res->flags & IORESOURCE_DISABLED)
797 resource_list_destroy_entry(entry);
799 entry->res->name = info->name;
801 acpi_pci_root_validate_resources(&device->dev, list,
803 acpi_pci_root_validate_resources(&device->dev, list,
810 static void pci_acpi_root_add_resources(struct acpi_pci_root_info *info)
812 struct resource_entry *entry, *tmp;
813 struct resource *res, *conflict, *root = NULL;
815 resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
817 if (res->flags & IORESOURCE_MEM)
818 root = &iomem_resource;
819 else if (res->flags & IORESOURCE_IO)
820 root = &ioport_resource;
825 * Some legacy x86 host bridge drivers use iomem_resource and
826 * ioport_resource as default resource pool, skip it.
831 conflict = insert_resource_conflict(root, res);
833 dev_info(&info->bridge->dev,
834 "ignoring host bridge window %pR (conflicts with %s %pR)\n",
835 res, conflict->name, conflict);
836 resource_list_destroy_entry(entry);
841 static void __acpi_pci_root_release_info(struct acpi_pci_root_info *info)
843 struct resource *res;
844 struct resource_entry *entry, *tmp;
849 resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
852 (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
853 release_resource(res);
854 resource_list_destroy_entry(entry);
857 info->ops->release_info(info);
860 static void acpi_pci_root_release_info(struct pci_host_bridge *bridge)
862 struct resource *res;
863 struct resource_entry *entry;
865 resource_list_for_each_entry(entry, &bridge->windows) {
867 if (res->flags & IORESOURCE_IO)
868 pci_unmap_iospace(res);
870 (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
871 release_resource(res);
873 __acpi_pci_root_release_info(bridge->release_data);
876 struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
877 struct acpi_pci_root_ops *ops,
878 struct acpi_pci_root_info *info,
881 int ret, busnum = root->secondary.start;
882 struct acpi_device *device = root->device;
883 int node = acpi_get_node(device->handle);
885 struct pci_host_bridge *host_bridge;
888 info->bridge = device;
890 INIT_LIST_HEAD(&info->resources);
891 snprintf(info->name, sizeof(info->name), "PCI Bus %04x:%02x",
892 root->segment, busnum);
894 if (ops->init_info && ops->init_info(info))
895 goto out_release_info;
896 if (ops->prepare_resources)
897 ret = ops->prepare_resources(info);
899 ret = acpi_pci_probe_root_resources(info);
901 goto out_release_info;
903 pci_acpi_root_add_resources(info);
904 pci_add_resource(&info->resources, &root->secondary);
905 bus = pci_create_root_bus(NULL, busnum, ops->pci_ops,
906 sysdata, &info->resources);
908 goto out_release_info;
910 host_bridge = to_pci_host_bridge(bus->bridge);
911 if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
912 host_bridge->native_pcie_hotplug = 0;
913 if (!(root->osc_control_set & OSC_PCI_SHPC_NATIVE_HP_CONTROL))
914 host_bridge->native_shpc_hotplug = 0;
915 if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL))
916 host_bridge->native_aer = 0;
917 if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL))
918 host_bridge->native_pme = 0;
919 if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL))
920 host_bridge->native_ltr = 0;
922 pci_scan_child_bus(bus);
923 pci_set_host_bridge_release(host_bridge, acpi_pci_root_release_info,
925 if (node != NUMA_NO_NODE)
926 dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
930 __acpi_pci_root_release_info(info);
934 void __init acpi_pci_root_init(void)
937 if (acpi_pci_disabled)
940 pci_acpi_crs_quirks();
941 acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root");