drivers/hwmon/it87.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *  it87.c - Part of lm_sensors, Linux kernel modules for hardware
   4  *           monitoring.
   5  *
   6  *  The IT8705F is an LPC-based Super I/O part that contains UARTs, a
   7  *  parallel port, an IR port, a MIDI port, a floppy controller, etc., in
   8  *  addition to an Environment Controller (Enhanced Hardware Monitor and
   9  *  Fan Controller)
  10  *
  11  *  This driver supports only the Environment Controller in the IT8705F and
  12  *  similar parts.  The other devices are supported by different drivers.
  13  *
  14  *  Supports: IT8603E  Super I/O chip w/LPC interface
  15  *            IT8620E  Super I/O chip w/LPC interface
  16  *            IT8622E  Super I/O chip w/LPC interface
  17  *            IT8623E  Super I/O chip w/LPC interface
  18  *            IT8628E  Super I/O chip w/LPC interface
  19  *            IT8705F  Super I/O chip w/LPC interface
  20  *            IT8712F  Super I/O chip w/LPC interface
  21  *            IT8716F  Super I/O chip w/LPC interface
  22  *            IT8718F  Super I/O chip w/LPC interface
  23  *            IT8720F  Super I/O chip w/LPC interface
  24  *            IT8721F  Super I/O chip w/LPC interface
  25  *            IT8726F  Super I/O chip w/LPC interface
  26  *            IT8728F  Super I/O chip w/LPC interface
  27  *            IT8732F  Super I/O chip w/LPC interface
  28  *            IT8758E  Super I/O chip w/LPC interface
  29  *            IT8771E  Super I/O chip w/LPC interface
  30  *            IT8772E  Super I/O chip w/LPC interface
  31  *            IT8781F  Super I/O chip w/LPC interface
  32  *            IT8782F  Super I/O chip w/LPC interface
  33  *            IT8783E/F Super I/O chip w/LPC interface
  34  *            IT8786E  Super I/O chip w/LPC interface
  35  *            IT8790E  Super I/O chip w/LPC interface
  36  *            IT8792E  Super I/O chip w/LPC interface
  37  *            IT87952E  Super I/O chip w/LPC interface
  38  *            Sis950   A clone of the IT8705F
  39  *
  40  *  Copyright (C) 2001 Chris Gauthron
  41  *  Copyright (C) 2005-2010 Jean Delvare <[email protected]>
  42  */
  43
  44 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  45
  46 #include <linux/bitops.h>
  47 #include <linux/module.h>
  48 #include <linux/init.h>
  49 #include <linux/slab.h>
  50 #include <linux/jiffies.h>
  51 #include <linux/platform_device.h>
  52 #include <linux/hwmon.h>
  53 #include <linux/hwmon-sysfs.h>
  54 #include <linux/hwmon-vid.h>
  55 #include <linux/err.h>
  56 #include <linux/mutex.h>
  57 #include <linux/sysfs.h>
  58 #include <linux/string.h>
  59 #include <linux/dmi.h>
  60 #include <linux/acpi.h>
  61 #include <linux/io.h>
  62
  63 #define DRVNAME "it87"
  64
  65 enum chips { it87, it8712, it8716, it8718, it8720, it8721, it8728, it8732,
  66              it8771, it8772, it8781, it8782, it8783, it8786, it8790,
  67              it8792, it8603, it8620, it8622, it8628, it87952 };
  68
  69 static struct platform_device *it87_pdev[2];
  70
  71 #define REG_2E  0x2e    /* The register to read/write */
  72 #define REG_4E  0x4e    /* Secondary register to read/write */
  73
  74 #define DEV     0x07    /* Register: Logical device select */
  75 #define PME     0x04    /* The device with the fan registers in it */
  76
  77 /* The device with the IT8718F/IT8720F VID value in it */
  78 #define GPIO    0x07
  79
  80 #define DEVID   0x20    /* Register: Device ID */
  81 #define DEVREV  0x22    /* Register: Device Revision */
  82
  83 static inline void __superio_enter(int ioreg)
  84 {
  85         outb(0x87, ioreg);
  86         outb(0x01, ioreg);
  87         outb(0x55, ioreg);
  88         outb(ioreg == REG_4E ? 0xaa : 0x55, ioreg);
  89 }
  90
  91 static inline int superio_inb(int ioreg, int reg)
  92 {
  93         outb(reg, ioreg);
  94         return inb(ioreg + 1);
  95 }
  96
  97 static inline void superio_outb(int ioreg, int reg, int val)
  98 {
  99         outb(reg, ioreg);
 100         outb(val, ioreg + 1);
 101 }
 102
 103 static int superio_inw(int ioreg, int reg)
 104 {
 105         int val;
 106
 107         outb(reg++, ioreg);
 108         val = inb(ioreg + 1) << 8;
 109         outb(reg, ioreg);
 110         val |= inb(ioreg + 1);
 111         return val;
 112 }
 113
 114 static inline void superio_select(int ioreg, int ldn)
 115 {
 116         outb(DEV, ioreg);
 117         outb(ldn, ioreg + 1);
 118 }
 119
 120 static inline int superio_enter(int ioreg)
 121 {
 122         /*
 123          * Try to reserve ioreg and ioreg + 1 for exclusive access.
 124          */
 125         if (!request_muxed_region(ioreg, 2, DRVNAME))
 126                 return -EBUSY;
 127
 128         __superio_enter(ioreg);
 129         return 0;
 130 }
 131
 132 static inline void superio_exit(int ioreg, bool noexit)
 133 {
 134         if (!noexit) {
 135                 outb(0x02, ioreg);
 136                 outb(0x02, ioreg + 1);
 137         }
 138         release_region(ioreg, 2);
 139 }
 140
 141 /* Logical device 4 registers */
 142 #define IT8712F_DEVID 0x8712
 143 #define IT8705F_DEVID 0x8705
 144 #define IT8716F_DEVID 0x8716
 145 #define IT8718F_DEVID 0x8718
 146 #define IT8720F_DEVID 0x8720
 147 #define IT8721F_DEVID 0x8721
 148 #define IT8726F_DEVID 0x8726
 149 #define IT8728F_DEVID 0x8728
 150 #define IT8732F_DEVID 0x8732
 151 #define IT8792E_DEVID 0x8733
 152 #define IT8771E_DEVID 0x8771
 153 #define IT8772E_DEVID 0x8772
 154 #define IT8781F_DEVID 0x8781
 155 #define IT8782F_DEVID 0x8782
 156 #define IT8783E_DEVID 0x8783
 157 #define IT8786E_DEVID 0x8786
 158 #define IT8790E_DEVID 0x8790
 159 #define IT8603E_DEVID 0x8603
 160 #define IT8620E_DEVID 0x8620
 161 #define IT8622E_DEVID 0x8622
 162 #define IT8623E_DEVID 0x8623
 163 #define IT8628E_DEVID 0x8628
 164 #define IT87952E_DEVID 0x8695
 165
 166 /* Logical device 4 (Environmental Monitor) registers */
 167 #define IT87_ACT_REG    0x30
 168 #define IT87_BASE_REG   0x60
 169 #define IT87_SPECIAL_CFG_REG    0xf3    /* special configuration register */
 170
 171 /* Logical device 7 registers (IT8712F and later) */
 172 #define IT87_SIO_GPIO1_REG      0x25
 173 #define IT87_SIO_GPIO2_REG      0x26
 174 #define IT87_SIO_GPIO3_REG      0x27
 175 #define IT87_SIO_GPIO4_REG      0x28
 176 #define IT87_SIO_GPIO5_REG      0x29
 177 #define IT87_SIO_PINX1_REG      0x2a    /* Pin selection */
 178 #define IT87_SIO_PINX2_REG      0x2c    /* Pin selection */
 179 #define IT87_SIO_SPI_REG        0xef    /* SPI function pin select */
 180 #define IT87_SIO_VID_REG        0xfc    /* VID value */
 181 #define IT87_SIO_BEEP_PIN_REG   0xf6    /* Beep pin mapping */
 182
 183 /* Force chip IDs to specified values. Should only be used for testing */
 184 static unsigned short force_id[2];
 185 static unsigned int force_id_cnt;
 186
 187 /* ACPI resource conflicts are ignored if this parameter is set to 1 */
 188 static bool ignore_resource_conflict;
 189
 190 /* Update battery voltage after every reading if true */
 191 static bool update_vbat;
 192
 193 /* Not all BIOSes properly configure the PWM registers */
 194 static bool fix_pwm_polarity;
 195
 196 /* Many IT87 constants specified below */
 197
 198 /* Length of ISA address segment */
 199 #define IT87_EXTENT 8
 200
 201 /* Length of ISA address segment for Environmental Controller */
 202 #define IT87_EC_EXTENT 2
 203
 204 /* Offset of EC registers from ISA base address */
 205 #define IT87_EC_OFFSET 5
 206
 207 /* Where are the ISA address/data registers relative to the EC base address */
 208 #define IT87_ADDR_REG_OFFSET 0
 209 #define IT87_DATA_REG_OFFSET 1
 210
 211 /*----- The IT87 registers -----*/
 212
 213 #define IT87_REG_CONFIG        0x00
 214
 215 #define IT87_REG_ALARM1        0x01
 216 #define IT87_REG_ALARM2        0x02
 217 #define IT87_REG_ALARM3        0x03
 218
 219 /*
 220  * The IT8718F and IT8720F have the VID value in a different register, in
 221  * Super-I/O configuration space.
 222  */
 223 #define IT87_REG_VID           0x0a
 224 /*
 225  * The IT8705F and IT8712F earlier than revision 0x08 use register 0x0b
 226  * for fan divisors. Later IT8712F revisions must use 16-bit tachometer
 227  * mode.
 228  */
 229 #define IT87_REG_FAN_DIV       0x0b
 230 #define IT87_REG_FAN_16BIT     0x0c
 231
 232 /*
 233  * Monitors:
 234  * - up to 13 voltage (0 to 7, battery, avcc, 10 to 12)
 235  * - up to 6 temp (1 to 6)
 236  * - up to 6 fan (1 to 6)
 237  */
 238
 239 static const u8 IT87_REG_FAN[]         = { 0x0d, 0x0e, 0x0f, 0x80, 0x82, 0x4c };
 240 static const u8 IT87_REG_FAN_MIN[]     = { 0x10, 0x11, 0x12, 0x84, 0x86, 0x4e };
 241 static const u8 IT87_REG_FANX[]        = { 0x18, 0x19, 0x1a, 0x81, 0x83, 0x4d };
 242 static const u8 IT87_REG_FANX_MIN[]    = { 0x1b, 0x1c, 0x1d, 0x85, 0x87, 0x4f };
 243 static const u8 IT87_REG_TEMP_OFFSET[] = { 0x56, 0x57, 0x59 };
 244
 245 #define IT87_REG_FAN_MAIN_CTRL 0x13
 246 #define IT87_REG_FAN_CTL       0x14
 247 static const u8 IT87_REG_PWM[]         = { 0x15, 0x16, 0x17, 0x7f, 0xa7, 0xaf };
 248 static const u8 IT87_REG_PWM_DUTY[]    = { 0x63, 0x6b, 0x73, 0x7b, 0xa3, 0xab };
 249
 250 static const u8 IT87_REG_VIN[]  = { 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26,
 251                                     0x27, 0x28, 0x2f, 0x2c, 0x2d, 0x2e };
 252
 253 #define IT87_REG_TEMP(nr)      (0x29 + (nr))
 254
 255 #define IT87_REG_VIN_MAX(nr)   (0x30 + (nr) * 2)
 256 #define IT87_REG_VIN_MIN(nr)   (0x31 + (nr) * 2)
 257 #define IT87_REG_TEMP_HIGH(nr) (0x40 + (nr) * 2)
 258 #define IT87_REG_TEMP_LOW(nr)  (0x41 + (nr) * 2)
 259
 260 #define IT87_REG_VIN_ENABLE    0x50
 261 #define IT87_REG_TEMP_ENABLE   0x51
 262 #define IT87_REG_TEMP_EXTRA    0x55
 263 #define IT87_REG_BEEP_ENABLE   0x5c
 264
 265 #define IT87_REG_CHIPID        0x58
 266
 267 static const u8 IT87_REG_AUTO_BASE[] = { 0x60, 0x68, 0x70, 0x78, 0xa0, 0xa8 };
 268
 269 #define IT87_REG_AUTO_TEMP(nr, i) (IT87_REG_AUTO_BASE[nr] + (i))
 270 #define IT87_REG_AUTO_PWM(nr, i)  (IT87_REG_AUTO_BASE[nr] + 5 + (i))
 271
 272 #define IT87_REG_TEMP456_ENABLE 0x77
 273
 274 #define NUM_VIN                 ARRAY_SIZE(IT87_REG_VIN)
 275 #define NUM_VIN_LIMIT           8
 276 #define NUM_TEMP                6
 277 #define NUM_TEMP_OFFSET         ARRAY_SIZE(IT87_REG_TEMP_OFFSET)
 278 #define NUM_TEMP_LIMIT          3
 279 #define NUM_FAN                 ARRAY_SIZE(IT87_REG_FAN)
 280 #define NUM_FAN_DIV             3
 281 #define NUM_PWM                 ARRAY_SIZE(IT87_REG_PWM)
 282 #define NUM_AUTO_PWM            ARRAY_SIZE(IT87_REG_PWM)
 283
 284 struct it87_devices {
 285         const char *name;
 286         const char * const model;
 287         u32 features;
 288         u8 peci_mask;
 289         u8 old_peci_mask;
 290         u8 smbus_bitmap;        /* SMBus enable bits in extra config register */
 291         u8 ec_special_config;
 292 };
 293
 294 #define FEAT_12MV_ADC           BIT(0)
 295 #define FEAT_NEWER_AUTOPWM      BIT(1)
 296 #define FEAT_OLD_AUTOPWM        BIT(2)
 297 #define FEAT_16BIT_FANS         BIT(3)
 298 #define FEAT_TEMP_OFFSET        BIT(4)
 299 #define FEAT_TEMP_PECI          BIT(5)
 300 #define FEAT_TEMP_OLD_PECI      BIT(6)
 301 #define FEAT_FAN16_CONFIG       BIT(7)  /* Need to enable 16-bit fans */
 302 #define FEAT_FIVE_FANS          BIT(8)  /* Supports five fans */
 303 #define FEAT_VID                BIT(9)  /* Set if chip supports VID */
 304 #define FEAT_IN7_INTERNAL       BIT(10) /* Set if in7 is internal */
 305 #define FEAT_SIX_FANS           BIT(11) /* Supports six fans */
 306 #define FEAT_10_9MV_ADC         BIT(12)
 307 #define FEAT_AVCC3              BIT(13) /* Chip supports in9/AVCC3 */
 308 #define FEAT_FIVE_PWM           BIT(14) /* Chip supports 5 pwm chn */
 309 #define FEAT_SIX_PWM            BIT(15) /* Chip supports 6 pwm chn */
 310 #define FEAT_PWM_FREQ2          BIT(16) /* Separate pwm freq 2 */
 311 #define FEAT_SIX_TEMP           BIT(17) /* Up to 6 temp sensors */
 312 #define FEAT_VIN3_5V            BIT(18) /* VIN3 connected to +5V */
 313 /*
 314  * Disabling configuration mode on some chips can result in system
 315  * hang-ups and access failures to the Super-IO chip at the
 316  * second SIO address. Never exit configuration mode on these
 317  * chips to avoid the problem.
 318  */
 319 #define FEAT_CONF_NOEXIT        BIT(19) /* Chip should not exit conf mode */
 320
 321 static const struct it87_devices it87_devices[] = {
 322         [it87] = {
 323                 .name = "it87",
 324                 .model = "IT87F",
 325                 .features = FEAT_OLD_AUTOPWM,   /* may need to overwrite */
 326         },
 327         [it8712] = {
 328                 .name = "it8712",
 329                 .model = "IT8712F",
 330                 .features = FEAT_OLD_AUTOPWM | FEAT_VID,
 331                                                 /* may need to overwrite */
 332         },
 333         [it8716] = {
 334                 .name = "it8716",
 335                 .model = "IT8716F",
 336                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 337                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_PWM_FREQ2,
 338         },
 339         [it8718] = {
 340                 .name = "it8718",
 341                 .model = "IT8718F",
 342                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 343                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 344                   | FEAT_PWM_FREQ2,
 345                 .old_peci_mask = 0x4,
 346         },
 347         [it8720] = {
 348                 .name = "it8720",
 349                 .model = "IT8720F",
 350                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET | FEAT_VID
 351                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS
 352                   | FEAT_PWM_FREQ2,
 353                 .old_peci_mask = 0x4,
 354         },
 355         [it8721] = {
 356                 .name = "it8721",
 357                 .model = "IT8721F",
 358                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 359                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 360                   | FEAT_FAN16_CONFIG | FEAT_FIVE_FANS | FEAT_IN7_INTERNAL
 361                   | FEAT_PWM_FREQ2,
 362                 .peci_mask = 0x05,
 363                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 364         },
 365         [it8728] = {
 366                 .name = "it8728",
 367                 .model = "IT8728F",
 368                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 369                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 370                   | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2,
 371                 .peci_mask = 0x07,
 372         },
 373         [it8732] = {
 374                 .name = "it8732",
 375                 .model = "IT8732F",
 376                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 377                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 378                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL,
 379                 .peci_mask = 0x07,
 380                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 381         },
 382         [it8771] = {
 383                 .name = "it8771",
 384                 .model = "IT8771E",
 385                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 386                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 387                   | FEAT_PWM_FREQ2,
 388                                 /* PECI: guesswork */
 389                                 /* 12mV ADC (OHM) */
 390                                 /* 16 bit fans (OHM) */
 391                                 /* three fans, always 16 bit (guesswork) */
 392                 .peci_mask = 0x07,
 393         },
 394         [it8772] = {
 395                 .name = "it8772",
 396                 .model = "IT8772E",
 397                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 398                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 399                   | FEAT_PWM_FREQ2,
 400                                 /* PECI (coreboot) */
 401                                 /* 12mV ADC (HWSensors4, OHM) */
 402                                 /* 16 bit fans (HWSensors4, OHM) */
 403                                 /* three fans, always 16 bit (datasheet) */
 404                 .peci_mask = 0x07,
 405         },
 406         [it8781] = {
 407                 .name = "it8781",
 408                 .model = "IT8781F",
 409                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 410                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 411                 .old_peci_mask = 0x4,
 412         },
 413         [it8782] = {
 414                 .name = "it8782",
 415                 .model = "IT8782F",
 416                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 417                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 418                 .old_peci_mask = 0x4,
 419         },
 420         [it8783] = {
 421                 .name = "it8783",
 422                 .model = "IT8783E/F",
 423                 .features = FEAT_16BIT_FANS | FEAT_TEMP_OFFSET
 424                   | FEAT_TEMP_OLD_PECI | FEAT_FAN16_CONFIG | FEAT_PWM_FREQ2,
 425                 .old_peci_mask = 0x4,
 426         },
 427         [it8786] = {
 428                 .name = "it8786",
 429                 .model = "IT8786E",
 430                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 431                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 432                   | FEAT_PWM_FREQ2,
 433                 .peci_mask = 0x07,
 434         },
 435         [it8790] = {
 436                 .name = "it8790",
 437                 .model = "IT8790E",
 438                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 439                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 440                   | FEAT_PWM_FREQ2 | FEAT_CONF_NOEXIT,
 441                 .peci_mask = 0x07,
 442         },
 443         [it8792] = {
 444                 .name = "it8792",
 445                 .model = "IT8792E/IT8795E",
 446                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 447                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 448                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_CONF_NOEXIT,
 449                 .peci_mask = 0x07,
 450                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 451         },
 452         [it8603] = {
 453                 .name = "it8603",
 454                 .model = "IT8603E",
 455                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 456                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_IN7_INTERNAL
 457                   | FEAT_AVCC3 | FEAT_PWM_FREQ2,
 458                 .peci_mask = 0x07,
 459         },
 460         [it8620] = {
 461                 .name = "it8620",
 462                 .model = "IT8620E",
 463                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 464                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 465                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 466                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 467                 .peci_mask = 0x07,
 468         },
 469         [it8622] = {
 470                 .name = "it8622",
 471                 .model = "IT8622E",
 472                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 473                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_FIVE_FANS
 474                   | FEAT_FIVE_PWM | FEAT_IN7_INTERNAL | FEAT_PWM_FREQ2
 475                   | FEAT_AVCC3 | FEAT_VIN3_5V,
 476                 .peci_mask = 0x07,
 477                 .smbus_bitmap = BIT(1) | BIT(2),
 478         },
 479         [it8628] = {
 480                 .name = "it8628",
 481                 .model = "IT8628E",
 482                 .features = FEAT_NEWER_AUTOPWM | FEAT_12MV_ADC | FEAT_16BIT_FANS
 483                   | FEAT_TEMP_OFFSET | FEAT_TEMP_PECI | FEAT_SIX_FANS
 484                   | FEAT_IN7_INTERNAL | FEAT_SIX_PWM | FEAT_PWM_FREQ2
 485                   | FEAT_SIX_TEMP | FEAT_VIN3_5V,
 486                 .peci_mask = 0x07,
 487         },
 488         [it87952] = {
 489                 .name = "it87952",
 490                 .model = "IT87952E",
 491                 .features = FEAT_NEWER_AUTOPWM | FEAT_16BIT_FANS
 492                   | FEAT_TEMP_OFFSET | FEAT_TEMP_OLD_PECI | FEAT_TEMP_PECI
 493                   | FEAT_10_9MV_ADC | FEAT_IN7_INTERNAL | FEAT_CONF_NOEXIT,
 494                 .peci_mask = 0x07,
 495                 .old_peci_mask = 0x02,  /* Actually reports PCH */
 496         },
 497 };
 498
 499 #define has_16bit_fans(data)    ((data)->features & FEAT_16BIT_FANS)
 500 #define has_12mv_adc(data)      ((data)->features & FEAT_12MV_ADC)
 501 #define has_10_9mv_adc(data)    ((data)->features & FEAT_10_9MV_ADC)
 502 #define has_newer_autopwm(data) ((data)->features & FEAT_NEWER_AUTOPWM)
 503 #define has_old_autopwm(data)   ((data)->features & FEAT_OLD_AUTOPWM)
 504 #define has_temp_offset(data)   ((data)->features & FEAT_TEMP_OFFSET)
 505 #define has_temp_peci(data, nr) (((data)->features & FEAT_TEMP_PECI) && \
 506                                  ((data)->peci_mask & BIT(nr)))
 507 #define has_temp_old_peci(data, nr) \
 508                                 (((data)->features & FEAT_TEMP_OLD_PECI) && \
 509                                  ((data)->old_peci_mask & BIT(nr)))
 510 #define has_fan16_config(data)  ((data)->features & FEAT_FAN16_CONFIG)
 511 #define has_five_fans(data)     ((data)->features & (FEAT_FIVE_FANS | \
 512                                                      FEAT_SIX_FANS))
 513 #define has_vid(data)           ((data)->features & FEAT_VID)
 514 #define has_in7_internal(data)  ((data)->features & FEAT_IN7_INTERNAL)
 515 #define has_six_fans(data)      ((data)->features & FEAT_SIX_FANS)
 516 #define has_avcc3(data)         ((data)->features & FEAT_AVCC3)
 517 #define has_five_pwm(data)      ((data)->features & (FEAT_FIVE_PWM \
 518                                                      | FEAT_SIX_PWM))
 519 #define has_six_pwm(data)       ((data)->features & FEAT_SIX_PWM)
 520 #define has_pwm_freq2(data)     ((data)->features & FEAT_PWM_FREQ2)
 521 #define has_six_temp(data)      ((data)->features & FEAT_SIX_TEMP)
 522 #define has_vin3_5v(data)       ((data)->features & FEAT_VIN3_5V)
 523 #define has_conf_noexit(data)   ((data)->features & FEAT_CONF_NOEXIT)
 524 #define has_scaling(data)       ((data)->features & (FEAT_12MV_ADC | \
 525                                                      FEAT_10_9MV_ADC))
 526
 527 struct it87_sio_data {
 528         int sioaddr;
 529         enum chips type;
 530         /* Values read from Super-I/O config space */
 531         u8 revision;
 532         u8 vid_value;
 533         u8 beep_pin;
 534         u8 internal;    /* Internal sensors can be labeled */
 535         bool need_in7_reroute;
 536         /* Features skipped based on config or DMI */
 537         u16 skip_in;
 538         u8 skip_vid;
 539         u8 skip_fan;
 540         u8 skip_pwm;
 541         u8 skip_temp;
 542         u8 smbus_bitmap;
 543         u8 ec_special_config;
 544 };
 545
 546 /*
 547  * For each registered chip, we need to keep some data in memory.
 548  * The structure is dynamically allocated.
 549  */
 550 struct it87_data {
 551         const struct attribute_group *groups[7];
 552         int sioaddr;
 553         enum chips type;
 554         u32 features;
 555         u8 peci_mask;
 556         u8 old_peci_mask;
 557
 558         u8 smbus_bitmap;        /* !=0 if SMBus needs to be disabled */
 559         u8 ec_special_config;   /* EC special config register restore value */
 560
 561         unsigned short addr;
 562         const char *name;
 563         struct mutex update_lock;
 564         bool valid;             /* true if following fields are valid */
 565         unsigned long last_updated;     /* In jiffies */
 566
 567         u16 in_scaled;          /* Internal voltage sensors are scaled */
 568         u16 in_internal;        /* Bitfield, internal sensors (for labels) */
 569         u16 has_in;             /* Bitfield, voltage sensors enabled */
 570         u8 in[NUM_VIN][3];              /* [nr][0]=in, [1]=min, [2]=max */
 571         bool need_in7_reroute;
 572         u8 has_fan;             /* Bitfield, fans enabled */
 573         u16 fan[NUM_FAN][2];    /* Register values, [nr][0]=fan, [1]=min */
 574         u8 has_temp;            /* Bitfield, temp sensors enabled */
 575         s8 temp[NUM_TEMP][4];   /* [nr][0]=temp, [1]=min, [2]=max, [3]=offset */
 576         u8 sensor;              /* Register value (IT87_REG_TEMP_ENABLE) */
 577         u8 extra;               /* Register value (IT87_REG_TEMP_EXTRA) */
 578         u8 fan_div[NUM_FAN_DIV];/* Register encoding, shifted right */
 579         bool has_vid;           /* True if VID supported */
 580         u8 vid;                 /* Register encoding, combined */
 581         u8 vrm;
 582         u32 alarms;             /* Register encoding, combined */
 583         bool has_beep;          /* true if beep supported */
 584         u8 beeps;               /* Register encoding */
 585         u8 fan_main_ctrl;       /* Register value */
 586         u8 fan_ctl;             /* Register value */
 587
 588         /*
 589          * The following 3 arrays correspond to the same registers up to
 590          * the IT8720F. The meaning of bits 6-0 depends on the value of bit
 591          * 7, and we want to preserve settings on mode changes, so we have
 592          * to track all values separately.
 593          * Starting with the IT8721F, the manual PWM duty cycles are stored
 594          * in separate registers (8-bit values), so the separate tracking
 595          * is no longer needed, but it is still done to keep the driver
 596          * simple.
 597          */
 598         u8 has_pwm;             /* Bitfield, pwm control enabled */
 599         u8 pwm_ctrl[NUM_PWM];   /* Register value */
 600         u8 pwm_duty[NUM_PWM];   /* Manual PWM value set by user */
 601         u8 pwm_temp_map[NUM_PWM];/* PWM to temp. chan. mapping (bits 1-0) */
 602
 603         /* Automatic fan speed control registers */
 604         u8 auto_pwm[NUM_AUTO_PWM][4];   /* [nr][3] is hard-coded */
 605         s8 auto_temp[NUM_AUTO_PWM][5];  /* [nr][0] is point1_temp_hyst */
 606 };
 607
 608 /* Board specific settings from DMI matching */
 609 struct it87_dmi_data {
 610         u8 skip_pwm;            /* pwm channels to skip for this board  */
 611 };
 612
 613 /* Global for results from DMI matching, if needed */
 614 static struct it87_dmi_data *dmi_data;
 615
 616 static int adc_lsb(const struct it87_data *data, int nr)
 617 {
 618         int lsb;
 619
 620         if (has_12mv_adc(data))
 621                 lsb = 120;
 622         else if (has_10_9mv_adc(data))
 623                 lsb = 109;
 624         else
 625                 lsb = 160;
 626         if (data->in_scaled & BIT(nr))
 627                 lsb <<= 1;
 628         return lsb;
 629 }
 630
 631 static u8 in_to_reg(const struct it87_data *data, int nr, long val)
 632 {
 633         val = DIV_ROUND_CLOSEST(val * 10, adc_lsb(data, nr));
 634         return clamp_val(val, 0, 255);
 635 }
 636
 637 static int in_from_reg(const struct it87_data *data, int nr, int val)
 638 {
 639         return DIV_ROUND_CLOSEST(val * adc_lsb(data, nr), 10);
 640 }
 641
 642 static inline u8 FAN_TO_REG(long rpm, int div)
 643 {
 644         if (rpm == 0)
 645                 return 255;
 646         rpm = clamp_val(rpm, 1, 1000000);
 647         return clamp_val((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 648 }
 649
 650 static inline u16 FAN16_TO_REG(long rpm)
 651 {
 652         if (rpm == 0)
 653                 return 0xffff;
 654         return clamp_val((1350000 + rpm) / (rpm * 2), 1, 0xfffe);
 655 }
 656
 657 #define FAN_FROM_REG(val, div) ((val) == 0 ? -1 : (val) == 255 ? 0 : \
 658                                 1350000 / ((val) * (div)))
 659 /* The divider is fixed to 2 in 16-bit mode */
 660 #define FAN16_FROM_REG(val) ((val) == 0 ? -1 : (val) == 0xffff ? 0 : \
 661                              1350000 / ((val) * 2))
 662
 663 #define TEMP_TO_REG(val) (clamp_val(((val) < 0 ? (((val) - 500) / 1000) : \
 664                                     ((val) + 500) / 1000), -128, 127))
 665 #define TEMP_FROM_REG(val) ((val) * 1000)
 666
 667 static u8 pwm_to_reg(const struct it87_data *data, long val)
 668 {
 669         if (has_newer_autopwm(data))
 670                 return val;
 671         else
 672                 return val >> 1;
 673 }
 674
 675 static int pwm_from_reg(const struct it87_data *data, u8 reg)
 676 {
 677         if (has_newer_autopwm(data))
 678                 return reg;
 679         else
 680                 return (reg & 0x7f) << 1;
 681 }
 682
 683 static int DIV_TO_REG(int val)
 684 {
 685         int answer = 0;
 686
 687         while (answer < 7 && (val >>= 1))
 688                 answer++;
 689         return answer;
 690 }
 691
 692 #define DIV_FROM_REG(val) BIT(val)
 693
 694 /*
 695  * PWM base frequencies. The frequency has to be divided by either 128 or 256,
 696  * depending on the chip type, to calculate the actual PWM frequency.
 697  *
 698  * Some of the chip datasheets suggest a base frequency of 51 kHz instead
 699  * of 750 kHz for the slowest base frequency, resulting in a PWM frequency
 700  * of 200 Hz. Sometimes both PWM frequency select registers are affected,
 701  * sometimes just one. It is unknown if this is a datasheet error or real,
 702  * so this is ignored for now.
 703  */
 704 static const unsigned int pwm_freq[8] = {
 705         48000000,
 706         24000000,
 707         12000000,
 708         8000000,
 709         6000000,
 710         3000000,
 711         1500000,
 712         750000,
 713 };
 714
 715 static int smbus_disable(struct it87_data *data)
 716 {
 717         int err;
 718
 719         if (data->smbus_bitmap) {
 720                 err = superio_enter(data->sioaddr);
 721                 if (err)
 722                         return err;
 723                 superio_select(data->sioaddr, PME);
 724                 superio_outb(data->sioaddr, IT87_SPECIAL_CFG_REG,
 725                              data->ec_special_config & ~data->smbus_bitmap);
 726                 superio_exit(data->sioaddr, has_conf_noexit(data));
 727         }
 728         return 0;
 729 }
 730
 731 static int smbus_enable(struct it87_data *data)
 732 {
 733         int err;
 734
 735         if (data->smbus_bitmap) {
 736                 err = superio_enter(data->sioaddr);
 737                 if (err)
 738                         return err;
 739
 740                 superio_select(data->sioaddr, PME);
 741                 superio_outb(data->sioaddr, IT87_SPECIAL_CFG_REG,
 742                              data->ec_special_config);
 743                 superio_exit(data->sioaddr, has_conf_noexit(data));
 744         }
 745         return 0;
 746 }
 747
 748 /*
 749  * Must be called with data->update_lock held, except during initialization.
 750  * Must be called with SMBus accesses disabled.
 751  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 752  * would slow down the IT87 access and should not be necessary.
 753  */
 754 static int it87_read_value(struct it87_data *data, u8 reg)
 755 {
 756         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 757         return inb_p(data->addr + IT87_DATA_REG_OFFSET);
 758 }
 759
 760 /*
 761  * Must be called with data->update_lock held, except during initialization.
 762  * Must be called with SMBus accesses disabled.
 763  * We ignore the IT87 BUSY flag at this moment - it could lead to deadlocks,
 764  * would slow down the IT87 access and should not be necessary.
 765  */
 766 static void it87_write_value(struct it87_data *data, u8 reg, u8 value)
 767 {
 768         outb_p(reg, data->addr + IT87_ADDR_REG_OFFSET);
 769         outb_p(value, data->addr + IT87_DATA_REG_OFFSET);
 770 }
 771
 772 static void it87_update_pwm_ctrl(struct it87_data *data, int nr)
 773 {
 774         data->pwm_ctrl[nr] = it87_read_value(data, IT87_REG_PWM[nr]);
 775         if (has_newer_autopwm(data)) {
 776                 data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 777                 data->pwm_duty[nr] = it87_read_value(data,
 778                                                      IT87_REG_PWM_DUTY[nr]);
 779         } else {
 780                 if (data->pwm_ctrl[nr] & 0x80)  /* Automatic mode */
 781                         data->pwm_temp_map[nr] = data->pwm_ctrl[nr] & 0x03;
 782                 else                            /* Manual mode */
 783                         data->pwm_duty[nr] = data->pwm_ctrl[nr] & 0x7f;
 784         }
 785
 786         if (has_old_autopwm(data)) {
 787                 int i;
 788
 789                 for (i = 0; i < 5 ; i++)
 790                         data->auto_temp[nr][i] = it87_read_value(data,
 791                                                 IT87_REG_AUTO_TEMP(nr, i));
 792                 for (i = 0; i < 3 ; i++)
 793                         data->auto_pwm[nr][i] = it87_read_value(data,
 794                                                 IT87_REG_AUTO_PWM(nr, i));
 795         } else if (has_newer_autopwm(data)) {
 796                 int i;
 797
 798                 /*
 799                  * 0: temperature hysteresis (base + 5)
 800                  * 1: fan off temperature (base + 0)
 801                  * 2: fan start temperature (base + 1)
 802                  * 3: fan max temperature (base + 2)
 803                  */
 804                 data->auto_temp[nr][0] =
 805                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 5));
 806
 807                 for (i = 0; i < 3 ; i++)
 808                         data->auto_temp[nr][i + 1] =
 809                                 it87_read_value(data,
 810                                                 IT87_REG_AUTO_TEMP(nr, i));
 811                 /*
 812                  * 0: start pwm value (base + 3)
 813                  * 1: pwm slope (base + 4, 1/8th pwm)
 814                  */
 815                 data->auto_pwm[nr][0] =
 816                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 3));
 817                 data->auto_pwm[nr][1] =
 818                         it87_read_value(data, IT87_REG_AUTO_TEMP(nr, 4));
 819         }
 820 }
 821
 822 static int it87_lock(struct it87_data *data)
 823 {
 824         int err;
 825
 826         mutex_lock(&data->update_lock);
 827         err = smbus_disable(data);
 828         if (err)
 829                 mutex_unlock(&data->update_lock);
 830         return err;
 831 }
 832
 833 static void it87_unlock(struct it87_data *data)
 834 {
 835         smbus_enable(data);
 836         mutex_unlock(&data->update_lock);
 837 }
 838
 839 static struct it87_data *it87_update_device(struct device *dev)
 840 {
 841         struct it87_data *data = dev_get_drvdata(dev);
 842         struct it87_data *ret = data;
 843         int err;
 844         int i;
 845
 846         mutex_lock(&data->update_lock);
 847
 848         if (time_after(jiffies, data->last_updated + HZ + HZ / 2) ||
 849                        !data->valid) {
 850                 err = smbus_disable(data);
 851                 if (err) {
 852                         ret = ERR_PTR(err);
 853                         goto unlock;
 854                 }
 855                 if (update_vbat) {
 856                         /*
 857                          * Cleared after each update, so reenable.  Value
 858                          * returned by this read will be previous value
 859                          */
 860                         it87_write_value(data, IT87_REG_CONFIG,
 861                                 it87_read_value(data, IT87_REG_CONFIG) | 0x40);
 862                 }
 863                 for (i = 0; i < NUM_VIN; i++) {
 864                         if (!(data->has_in & BIT(i)))
 865                                 continue;
 866
 867                         data->in[i][0] =
 868                                 it87_read_value(data, IT87_REG_VIN[i]);
 869
 870                         /* VBAT and AVCC don't have limit registers */
 871                         if (i >= NUM_VIN_LIMIT)
 872                                 continue;
 873
 874                         data->in[i][1] =
 875                                 it87_read_value(data, IT87_REG_VIN_MIN(i));
 876                         data->in[i][2] =
 877                                 it87_read_value(data, IT87_REG_VIN_MAX(i));
 878                 }
 879
 880                 for (i = 0; i < NUM_FAN; i++) {
 881                         /* Skip disabled fans */
 882                         if (!(data->has_fan & BIT(i)))
 883                                 continue;
 884
 885                         data->fan[i][1] =
 886                                 it87_read_value(data, IT87_REG_FAN_MIN[i]);
 887                         data->fan[i][0] = it87_read_value(data,
 888                                        IT87_REG_FAN[i]);
 889                         /* Add high byte if in 16-bit mode */
 890                         if (has_16bit_fans(data)) {
 891                                 data->fan[i][0] |= it87_read_value(data,
 892                                                 IT87_REG_FANX[i]) << 8;
 893                                 data->fan[i][1] |= it87_read_value(data,
 894                                                 IT87_REG_FANX_MIN[i]) << 8;
 895                         }
 896                 }
 897                 for (i = 0; i < NUM_TEMP; i++) {
 898                         if (!(data->has_temp & BIT(i)))
 899                                 continue;
 900                         data->temp[i][0] =
 901                                 it87_read_value(data, IT87_REG_TEMP(i));
 902
 903                         if (has_temp_offset(data) && i < NUM_TEMP_OFFSET)
 904                                 data->temp[i][3] =
 905                                   it87_read_value(data,
 906                                                   IT87_REG_TEMP_OFFSET[i]);
 907
 908                         if (i >= NUM_TEMP_LIMIT)
 909                                 continue;
 910
 911                         data->temp[i][1] =
 912                                 it87_read_value(data, IT87_REG_TEMP_LOW(i));
 913                         data->temp[i][2] =
 914                                 it87_read_value(data, IT87_REG_TEMP_HIGH(i));
 915                 }
 916
 917                 /* Newer chips don't have clock dividers */
 918                 if ((data->has_fan & 0x07) && !has_16bit_fans(data)) {
 919                         i = it87_read_value(data, IT87_REG_FAN_DIV);
 920                         data->fan_div[0] = i & 0x07;
 921                         data->fan_div[1] = (i >> 3) & 0x07;
 922                         data->fan_div[2] = (i & 0x40) ? 3 : 1;
 923                 }
 924
 925                 data->alarms =
 926                         it87_read_value(data, IT87_REG_ALARM1) |
 927                         (it87_read_value(data, IT87_REG_ALARM2) << 8) |
 928                         (it87_read_value(data, IT87_REG_ALARM3) << 16);
 929                 data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
 930
 931                 data->fan_main_ctrl = it87_read_value(data,
 932                                 IT87_REG_FAN_MAIN_CTRL);
 933                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL);
 934                 for (i = 0; i < NUM_PWM; i++) {
 935                         if (!(data->has_pwm & BIT(i)))
 936                                 continue;
 937                         it87_update_pwm_ctrl(data, i);
 938                 }
 939
 940                 data->sensor = it87_read_value(data, IT87_REG_TEMP_ENABLE);
 941                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
 942                 /*
 943                  * The IT8705F does not have VID capability.
 944                  * The IT8718F and later don't use IT87_REG_VID for the
 945                  * same purpose.
 946                  */
 947                 if (data->type == it8712 || data->type == it8716) {
 948                         data->vid = it87_read_value(data, IT87_REG_VID);
 949                         /*
 950                          * The older IT8712F revisions had only 5 VID pins,
 951                          * but we assume it is always safe to read 6 bits.
 952                          */
 953                         data->vid &= 0x3f;
 954                 }
 955                 data->last_updated = jiffies;
 956                 data->valid = true;
 957                 smbus_enable(data);
 958         }
 959 unlock:
 960         mutex_unlock(&data->update_lock);
 961         return ret;
 962 }
 963
 964 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
 965                        char *buf)
 966 {
 967         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 968         struct it87_data *data = it87_update_device(dev);
 969         int index = sattr->index;
 970         int nr = sattr->nr;
 971
 972         if (IS_ERR(data))
 973                 return PTR_ERR(data);
 974
 975         return sprintf(buf, "%d\n", in_from_reg(data, nr, data->in[nr][index]));
 976 }
 977
 978 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
 979                       const char *buf, size_t count)
 980 {
 981         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
 982         struct it87_data *data = dev_get_drvdata(dev);
 983         int index = sattr->index;
 984         int nr = sattr->nr;
 985         unsigned long val;
 986         int err;
 987
 988         if (kstrtoul(buf, 10, &val) < 0)
 989                 return -EINVAL;
 990
 991         err = it87_lock(data);
 992         if (err)
 993                 return err;
 994
 995         data->in[nr][index] = in_to_reg(data, nr, val);
 996         it87_write_value(data,
 997                          index == 1 ? IT87_REG_VIN_MIN(nr)
 998                                     : IT87_REG_VIN_MAX(nr),
 999                          data->in[nr][index]);
1000         it87_unlock(data);
1001         return count;
1002 }
1003
1004 static SENSOR_DEVICE_ATTR_2(in0_input, S_IRUGO, show_in, NULL, 0, 0);
1005 static SENSOR_DEVICE_ATTR_2(in0_min, S_IRUGO | S_IWUSR, show_in, set_in,
1006                             0, 1);
1007 static SENSOR_DEVICE_ATTR_2(in0_max, S_IRUGO | S_IWUSR, show_in, set_in,
1008                             0, 2);
1009
1010 static SENSOR_DEVICE_ATTR_2(in1_input, S_IRUGO, show_in, NULL, 1, 0);
1011 static SENSOR_DEVICE_ATTR_2(in1_min, S_IRUGO | S_IWUSR, show_in, set_in,
1012                             1, 1);
1013 static SENSOR_DEVICE_ATTR_2(in1_max, S_IRUGO | S_IWUSR, show_in, set_in,
1014                             1, 2);
1015
1016 static SENSOR_DEVICE_ATTR_2(in2_input, S_IRUGO, show_in, NULL, 2, 0);
1017 static SENSOR_DEVICE_ATTR_2(in2_min, S_IRUGO | S_IWUSR, show_in, set_in,
1018                             2, 1);
1019 static SENSOR_DEVICE_ATTR_2(in2_max, S_IRUGO | S_IWUSR, show_in, set_in,
1020                             2, 2);
1021
1022 static SENSOR_DEVICE_ATTR_2(in3_input, S_IRUGO, show_in, NULL, 3, 0);
1023 static SENSOR_DEVICE_ATTR_2(in3_min, S_IRUGO | S_IWUSR, show_in, set_in,
1024                             3, 1);
1025 static SENSOR_DEVICE_ATTR_2(in3_max, S_IRUGO | S_IWUSR, show_in, set_in,
1026                             3, 2);
1027
1028 static SENSOR_DEVICE_ATTR_2(in4_input, S_IRUGO, show_in, NULL, 4, 0);
1029 static SENSOR_DEVICE_ATTR_2(in4_min, S_IRUGO | S_IWUSR, show_in, set_in,
1030                             4, 1);
1031 static SENSOR_DEVICE_ATTR_2(in4_max, S_IRUGO | S_IWUSR, show_in, set_in,
1032                             4, 2);
1033
1034 static SENSOR_DEVICE_ATTR_2(in5_input, S_IRUGO, show_in, NULL, 5, 0);
1035 static SENSOR_DEVICE_ATTR_2(in5_min, S_IRUGO | S_IWUSR, show_in, set_in,
1036                             5, 1);
1037 static SENSOR_DEVICE_ATTR_2(in5_max, S_IRUGO | S_IWUSR, show_in, set_in,
1038                             5, 2);
1039
1040 static SENSOR_DEVICE_ATTR_2(in6_input, S_IRUGO, show_in, NULL, 6, 0);
1041 static SENSOR_DEVICE_ATTR_2(in6_min, S_IRUGO | S_IWUSR, show_in, set_in,
1042                             6, 1);
1043 static SENSOR_DEVICE_ATTR_2(in6_max, S_IRUGO | S_IWUSR, show_in, set_in,
1044                             6, 2);
1045
1046 static SENSOR_DEVICE_ATTR_2(in7_input, S_IRUGO, show_in, NULL, 7, 0);
1047 static SENSOR_DEVICE_ATTR_2(in7_min, S_IRUGO | S_IWUSR, show_in, set_in,
1048                             7, 1);
1049 static SENSOR_DEVICE_ATTR_2(in7_max, S_IRUGO | S_IWUSR, show_in, set_in,
1050                             7, 2);
1051
1052 static SENSOR_DEVICE_ATTR_2(in8_input, S_IRUGO, show_in, NULL, 8, 0);
1053 static SENSOR_DEVICE_ATTR_2(in9_input, S_IRUGO, show_in, NULL, 9, 0);
1054 static SENSOR_DEVICE_ATTR_2(in10_input, S_IRUGO, show_in, NULL, 10, 0);
1055 static SENSOR_DEVICE_ATTR_2(in11_input, S_IRUGO, show_in, NULL, 11, 0);
1056 static SENSOR_DEVICE_ATTR_2(in12_input, S_IRUGO, show_in, NULL, 12, 0);
1057
1058 /* Up to 6 temperatures */
1059 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
1060                          char *buf)
1061 {
1062         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1063         int nr = sattr->nr;
1064         int index = sattr->index;
1065         struct it87_data *data = it87_update_device(dev);
1066
1067         if (IS_ERR(data))
1068                 return PTR_ERR(data);
1069
1070         return sprintf(buf, "%d\n", TEMP_FROM_REG(data->temp[nr][index]));
1071 }
1072
1073 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
1074                         const char *buf, size_t count)
1075 {
1076         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1077         int nr = sattr->nr;
1078         int index = sattr->index;
1079         struct it87_data *data = dev_get_drvdata(dev);
1080         long val;
1081         u8 reg, regval;
1082         int err;
1083
1084         if (kstrtol(buf, 10, &val) < 0)
1085                 return -EINVAL;
1086
1087         err = it87_lock(data);
1088         if (err)
1089                 return err;
1090
1091         switch (index) {
1092         default:
1093         case 1:
1094                 reg = IT87_REG_TEMP_LOW(nr);
1095                 break;
1096         case 2:
1097                 reg = IT87_REG_TEMP_HIGH(nr);
1098                 break;
1099         case 3:
1100                 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE);
1101                 if (!(regval & 0x80)) {
1102                         regval |= 0x80;
1103                         it87_write_value(data, IT87_REG_BEEP_ENABLE, regval);
1104                 }
1105                 data->valid = false;
1106                 reg = IT87_REG_TEMP_OFFSET[nr];
1107                 break;
1108         }
1109
1110         data->temp[nr][index] = TEMP_TO_REG(val);
1111         it87_write_value(data, reg, data->temp[nr][index]);
1112         it87_unlock(data);
1113         return count;
1114 }
1115
1116 static SENSOR_DEVICE_ATTR_2(temp1_input, S_IRUGO, show_temp, NULL, 0, 0);
1117 static SENSOR_DEVICE_ATTR_2(temp1_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1118                             0, 1);
1119 static SENSOR_DEVICE_ATTR_2(temp1_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1120                             0, 2);
1121 static SENSOR_DEVICE_ATTR_2(temp1_offset, S_IRUGO | S_IWUSR, show_temp,
1122                             set_temp, 0, 3);
1123 static SENSOR_DEVICE_ATTR_2(temp2_input, S_IRUGO, show_temp, NULL, 1, 0);
1124 static SENSOR_DEVICE_ATTR_2(temp2_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1125                             1, 1);
1126 static SENSOR_DEVICE_ATTR_2(temp2_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1127                             1, 2);
1128 static SENSOR_DEVICE_ATTR_2(temp2_offset, S_IRUGO | S_IWUSR, show_temp,
1129                             set_temp, 1, 3);
1130 static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 2, 0);
1131 static SENSOR_DEVICE_ATTR_2(temp3_min, S_IRUGO | S_IWUSR, show_temp, set_temp,
1132                             2, 1);
1133 static SENSOR_DEVICE_ATTR_2(temp3_max, S_IRUGO | S_IWUSR, show_temp, set_temp,
1134                             2, 2);
1135 static SENSOR_DEVICE_ATTR_2(temp3_offset, S_IRUGO | S_IWUSR, show_temp,
1136                             set_temp, 2, 3);
1137 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 3, 0);
1138 static SENSOR_DEVICE_ATTR_2(temp5_input, S_IRUGO, show_temp, NULL, 4, 0);
1139 static SENSOR_DEVICE_ATTR_2(temp6_input, S_IRUGO, show_temp, NULL, 5, 0);
1140
1141 static ssize_t show_temp_type(struct device *dev, struct device_attribute *attr,
1142                               char *buf)
1143 {
1144         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1145         int nr = sensor_attr->index;
1146         struct it87_data *data = it87_update_device(dev);
1147         u8 reg, extra;
1148
1149         if (IS_ERR(data))
1150                 return PTR_ERR(data);
1151
1152         reg = data->sensor;     /* In case value is updated while used */
1153         extra = data->extra;
1154
1155         if ((has_temp_peci(data, nr) && (reg >> 6 == nr + 1)) ||
1156             (has_temp_old_peci(data, nr) && (extra & 0x80)))
1157                 return sprintf(buf, "6\n");  /* Intel PECI */
1158         if (reg & (1 << nr))
1159                 return sprintf(buf, "3\n");  /* thermal diode */
1160         if (reg & (8 << nr))
1161                 return sprintf(buf, "4\n");  /* thermistor */
1162         return sprintf(buf, "0\n");      /* disabled */
1163 }
1164
1165 static ssize_t set_temp_type(struct device *dev, struct device_attribute *attr,
1166                              const char *buf, size_t count)
1167 {
1168         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1169         int nr = sensor_attr->index;
1170
1171         struct it87_data *data = dev_get_drvdata(dev);
1172         long val;
1173         u8 reg, extra;
1174         int err;
1175
1176         if (kstrtol(buf, 10, &val) < 0)
1177                 return -EINVAL;
1178
1179         err = it87_lock(data);
1180         if (err)
1181                 return err;
1182
1183         reg = it87_read_value(data, IT87_REG_TEMP_ENABLE);
1184         reg &= ~(1 << nr);
1185         reg &= ~(8 << nr);
1186         if (has_temp_peci(data, nr) && (reg >> 6 == nr + 1 || val == 6))
1187                 reg &= 0x3f;
1188         extra = it87_read_value(data, IT87_REG_TEMP_EXTRA);
1189         if (has_temp_old_peci(data, nr) && ((extra & 0x80) || val == 6))
1190                 extra &= 0x7f;
1191         if (val == 2) { /* backwards compatibility */
1192                 dev_warn(dev,
1193                          "Sensor type 2 is deprecated, please use 4 instead\n");
1194                 val = 4;
1195         }
1196         /* 3 = thermal diode; 4 = thermistor; 6 = Intel PECI; 0 = disabled */
1197         if (val == 3)
1198                 reg |= 1 << nr;
1199         else if (val == 4)
1200                 reg |= 8 << nr;
1201         else if (has_temp_peci(data, nr) && val == 6)
1202                 reg |= (nr + 1) << 6;
1203         else if (has_temp_old_peci(data, nr) && val == 6)
1204                 extra |= 0x80;
1205         else if (val != 0) {
1206                 count = -EINVAL;
1207                 goto unlock;
1208         }
1209
1210         data->sensor = reg;
1211         data->extra = extra;
1212         it87_write_value(data, IT87_REG_TEMP_ENABLE, data->sensor);
1213         if (has_temp_old_peci(data, nr))
1214                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1215         data->valid = false;    /* Force cache refresh */
1216 unlock:
1217         it87_unlock(data);
1218         return count;
1219 }
1220
1221 static SENSOR_DEVICE_ATTR(temp1_type, S_IRUGO | S_IWUSR, show_temp_type,
1222                           set_temp_type, 0);
1223 static SENSOR_DEVICE_ATTR(temp2_type, S_IRUGO | S_IWUSR, show_temp_type,
1224                           set_temp_type, 1);
1225 static SENSOR_DEVICE_ATTR(temp3_type, S_IRUGO | S_IWUSR, show_temp_type,
1226                           set_temp_type, 2);
1227
1228 /* 6 Fans */
1229
1230 static int pwm_mode(const struct it87_data *data, int nr)
1231 {
1232         if (data->type != it8603 && nr < 3 && !(data->fan_main_ctrl & BIT(nr)))
1233                 return 0;                               /* Full speed */
1234         if (data->pwm_ctrl[nr] & 0x80)
1235                 return 2;                               /* Automatic mode */
1236         if ((data->type == it8603 || nr >= 3) &&
1237             data->pwm_duty[nr] == pwm_to_reg(data, 0xff))
1238                 return 0;                       /* Full speed */
1239
1240         return 1;                               /* Manual mode */
1241 }
1242
1243 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
1244                         char *buf)
1245 {
1246         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1247         int nr = sattr->nr;
1248         int index = sattr->index;
1249         int speed;
1250         struct it87_data *data = it87_update_device(dev);
1251
1252         if (IS_ERR(data))
1253                 return PTR_ERR(data);
1254
1255         speed = has_16bit_fans(data) ?
1256                 FAN16_FROM_REG(data->fan[nr][index]) :
1257                 FAN_FROM_REG(data->fan[nr][index],
1258                              DIV_FROM_REG(data->fan_div[nr]));
1259         return sprintf(buf, "%d\n", speed);
1260 }
1261
1262 static ssize_t show_fan_div(struct device *dev, struct device_attribute *attr,
1263                             char *buf)
1264 {
1265         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1266         struct it87_data *data = it87_update_device(dev);
1267         int nr = sensor_attr->index;
1268
1269         if (IS_ERR(data))
1270                 return PTR_ERR(data);
1271
1272         return sprintf(buf, "%lu\n", DIV_FROM_REG(data->fan_div[nr]));
1273 }
1274
1275 static ssize_t show_pwm_enable(struct device *dev,
1276                                struct device_attribute *attr, char *buf)
1277 {
1278         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1279         struct it87_data *data = it87_update_device(dev);
1280         int nr = sensor_attr->index;
1281
1282         if (IS_ERR(data))
1283                 return PTR_ERR(data);
1284
1285         return sprintf(buf, "%d\n", pwm_mode(data, nr));
1286 }
1287
1288 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1289                         char *buf)
1290 {
1291         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1292         struct it87_data *data = it87_update_device(dev);
1293         int nr = sensor_attr->index;
1294
1295         if (IS_ERR(data))
1296                 return PTR_ERR(data);
1297
1298         return sprintf(buf, "%d\n",
1299                        pwm_from_reg(data, data->pwm_duty[nr]));
1300 }
1301
1302 static ssize_t show_pwm_freq(struct device *dev, struct device_attribute *attr,
1303                              char *buf)
1304 {
1305         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1306         struct it87_data *data = it87_update_device(dev);
1307         int nr = sensor_attr->index;
1308         unsigned int freq;
1309         int index;
1310
1311         if (IS_ERR(data))
1312                 return PTR_ERR(data);
1313
1314         if (has_pwm_freq2(data) && nr == 1)
1315                 index = (data->extra >> 4) & 0x07;
1316         else
1317                 index = (data->fan_ctl >> 4) & 0x07;
1318
1319         freq = pwm_freq[index] / (has_newer_autopwm(data) ? 256 : 128);
1320
1321         return sprintf(buf, "%u\n", freq);
1322 }
1323
1324 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1325                        const char *buf, size_t count)
1326 {
1327         struct sensor_device_attribute_2 *sattr = to_sensor_dev_attr_2(attr);
1328         int nr = sattr->nr;
1329         int index = sattr->index;
1330
1331         struct it87_data *data = dev_get_drvdata(dev);
1332         long val;
1333         int err;
1334         u8 reg;
1335
1336         if (kstrtol(buf, 10, &val) < 0)
1337                 return -EINVAL;
1338
1339         err = it87_lock(data);
1340         if (err)
1341                 return err;
1342
1343         if (has_16bit_fans(data)) {
1344                 data->fan[nr][index] = FAN16_TO_REG(val);
1345                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1346                                  data->fan[nr][index] & 0xff);
1347                 it87_write_value(data, IT87_REG_FANX_MIN[nr],
1348                                  data->fan[nr][index] >> 8);
1349         } else {
1350                 reg = it87_read_value(data, IT87_REG_FAN_DIV);
1351                 switch (nr) {
1352                 case 0:
1353                         data->fan_div[nr] = reg & 0x07;
1354                         break;
1355                 case 1:
1356                         data->fan_div[nr] = (reg >> 3) & 0x07;
1357                         break;
1358                 case 2:
1359                         data->fan_div[nr] = (reg & 0x40) ? 3 : 1;
1360                         break;
1361                 }
1362                 data->fan[nr][index] =
1363                   FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr]));
1364                 it87_write_value(data, IT87_REG_FAN_MIN[nr],
1365                                  data->fan[nr][index]);
1366         }
1367
1368         it87_unlock(data);
1369         return count;
1370 }
1371
1372 static ssize_t set_fan_div(struct device *dev, struct device_attribute *attr,
1373                            const char *buf, size_t count)
1374 {
1375         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1376         struct it87_data *data = dev_get_drvdata(dev);
1377         int nr = sensor_attr->index;
1378         unsigned long val;
1379         int min, err;
1380         u8 old;
1381
1382         if (kstrtoul(buf, 10, &val) < 0)
1383                 return -EINVAL;
1384
1385         err = it87_lock(data);
1386         if (err)
1387                 return err;
1388
1389         old = it87_read_value(data, IT87_REG_FAN_DIV);
1390
1391         /* Save fan min limit */
1392         min = FAN_FROM_REG(data->fan[nr][1], DIV_FROM_REG(data->fan_div[nr]));
1393
1394         switch (nr) {
1395         case 0:
1396         case 1:
1397                 data->fan_div[nr] = DIV_TO_REG(val);
1398                 break;
1399         case 2:
1400                 if (val < 8)
1401                         data->fan_div[nr] = 1;
1402                 else
1403                         data->fan_div[nr] = 3;
1404         }
1405         val = old & 0x80;
1406         val |= (data->fan_div[0] & 0x07);
1407         val |= (data->fan_div[1] & 0x07) << 3;
1408         if (data->fan_div[2] == 3)
1409                 val |= 0x1 << 6;
1410         it87_write_value(data, IT87_REG_FAN_DIV, val);
1411
1412         /* Restore fan min limit */
1413         data->fan[nr][1] = FAN_TO_REG(min, DIV_FROM_REG(data->fan_div[nr]));
1414         it87_write_value(data, IT87_REG_FAN_MIN[nr], data->fan[nr][1]);
1415
1416         it87_unlock(data);
1417         return count;
1418 }
1419
1420 /* Returns 0 if OK, -EINVAL otherwise */
1421 static int check_trip_points(struct device *dev, int nr)
1422 {
1423         const struct it87_data *data = dev_get_drvdata(dev);
1424         int i, err = 0;
1425
1426         if (has_old_autopwm(data)) {
1427                 for (i = 0; i < 3; i++) {
1428                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1429                                 err = -EINVAL;
1430                 }
1431                 for (i = 0; i < 2; i++) {
1432                         if (data->auto_pwm[nr][i] > data->auto_pwm[nr][i + 1])
1433                                 err = -EINVAL;
1434                 }
1435         } else if (has_newer_autopwm(data)) {
1436                 for (i = 1; i < 3; i++) {
1437                         if (data->auto_temp[nr][i] > data->auto_temp[nr][i + 1])
1438                                 err = -EINVAL;
1439                 }
1440         }
1441
1442         if (err) {
1443                 dev_err(dev,
1444                         "Inconsistent trip points, not switching to automatic mode\n");
1445                 dev_err(dev, "Adjust the trip points and try again\n");
1446         }
1447         return err;
1448 }
1449
1450 static ssize_t set_pwm_enable(struct device *dev, struct device_attribute *attr,
1451                               const char *buf, size_t count)
1452 {
1453         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1454         struct it87_data *data = dev_get_drvdata(dev);
1455         int nr = sensor_attr->index;
1456         long val;
1457         int err;
1458
1459         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 2)
1460                 return -EINVAL;
1461
1462         /* Check trip points before switching to automatic mode */
1463         if (val == 2) {
1464                 if (check_trip_points(dev, nr) < 0)
1465                         return -EINVAL;
1466         }
1467
1468         err = it87_lock(data);
1469         if (err)
1470                 return err;
1471
1472         if (val == 0) {
1473                 if (nr < 3 && data->type != it8603) {
1474                         int tmp;
1475                         /* make sure the fan is on when in on/off mode */
1476                         tmp = it87_read_value(data, IT87_REG_FAN_CTL);
1477                         it87_write_value(data, IT87_REG_FAN_CTL, tmp | BIT(nr));
1478                         /* set on/off mode */
1479                         data->fan_main_ctrl &= ~BIT(nr);
1480                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1481                                          data->fan_main_ctrl);
1482                 } else {
1483                         u8 ctrl;
1484
1485                         /* No on/off mode, set maximum pwm value */
1486                         data->pwm_duty[nr] = pwm_to_reg(data, 0xff);
1487                         it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1488                                          data->pwm_duty[nr]);
1489                         /* and set manual mode */
1490                         if (has_newer_autopwm(data)) {
1491                                 ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1492                                         data->pwm_temp_map[nr];
1493                         } else {
1494                                 ctrl = data->pwm_duty[nr];
1495                         }
1496                         data->pwm_ctrl[nr] = ctrl;
1497                         it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1498                 }
1499         } else {
1500                 u8 ctrl;
1501
1502                 if (has_newer_autopwm(data)) {
1503                         ctrl = (data->pwm_ctrl[nr] & 0x7c) |
1504                                 data->pwm_temp_map[nr];
1505                         if (val != 1)
1506                                 ctrl |= 0x80;
1507                 } else {
1508                         ctrl = (val == 1 ? data->pwm_duty[nr] : 0x80);
1509                 }
1510                 data->pwm_ctrl[nr] = ctrl;
1511                 it87_write_value(data, IT87_REG_PWM[nr], ctrl);
1512
1513                 if (data->type != it8603 && nr < 3) {
1514                         /* set SmartGuardian mode */
1515                         data->fan_main_ctrl |= BIT(nr);
1516                         it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
1517                                          data->fan_main_ctrl);
1518                 }
1519         }
1520
1521         it87_unlock(data);
1522         return count;
1523 }
1524
1525 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1526                        const char *buf, size_t count)
1527 {
1528         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1529         struct it87_data *data = dev_get_drvdata(dev);
1530         int nr = sensor_attr->index;
1531         long val;
1532         int err;
1533
1534         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1535                 return -EINVAL;
1536
1537         err = it87_lock(data);
1538         if (err)
1539                 return err;
1540
1541         it87_update_pwm_ctrl(data, nr);
1542         if (has_newer_autopwm(data)) {
1543                 /*
1544                  * If we are in automatic mode, the PWM duty cycle register
1545                  * is read-only so we can't write the value.
1546                  */
1547                 if (data->pwm_ctrl[nr] & 0x80) {
1548                         count = -EBUSY;
1549                         goto unlock;
1550                 }
1551                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1552                 it87_write_value(data, IT87_REG_PWM_DUTY[nr],
1553                                  data->pwm_duty[nr]);
1554         } else {
1555                 data->pwm_duty[nr] = pwm_to_reg(data, val);
1556                 /*
1557                  * If we are in manual mode, write the duty cycle immediately;
1558                  * otherwise, just store it for later use.
1559                  */
1560                 if (!(data->pwm_ctrl[nr] & 0x80)) {
1561                         data->pwm_ctrl[nr] = data->pwm_duty[nr];
1562                         it87_write_value(data, IT87_REG_PWM[nr],
1563                                          data->pwm_ctrl[nr]);
1564                 }
1565         }
1566 unlock:
1567         it87_unlock(data);
1568         return count;
1569 }
1570
1571 static ssize_t set_pwm_freq(struct device *dev, struct device_attribute *attr,
1572                             const char *buf, size_t count)
1573 {
1574         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1575         struct it87_data *data = dev_get_drvdata(dev);
1576         int nr = sensor_attr->index;
1577         unsigned long val;
1578         int err;
1579         int i;
1580
1581         if (kstrtoul(buf, 10, &val) < 0)
1582                 return -EINVAL;
1583
1584         val = clamp_val(val, 0, 1000000);
1585         val *= has_newer_autopwm(data) ? 256 : 128;
1586
1587         /* Search for the nearest available frequency */
1588         for (i = 0; i < 7; i++) {
1589                 if (val > (pwm_freq[i] + pwm_freq[i + 1]) / 2)
1590                         break;
1591         }
1592
1593         err = it87_lock(data);
1594         if (err)
1595                 return err;
1596
1597         if (nr == 0) {
1598                 data->fan_ctl = it87_read_value(data, IT87_REG_FAN_CTL) & 0x8f;
1599                 data->fan_ctl |= i << 4;
1600                 it87_write_value(data, IT87_REG_FAN_CTL, data->fan_ctl);
1601         } else {
1602                 data->extra = it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x8f;
1603                 data->extra |= i << 4;
1604                 it87_write_value(data, IT87_REG_TEMP_EXTRA, data->extra);
1605         }
1606         it87_unlock(data);
1607
1608         return count;
1609 }
1610
1611 static ssize_t show_pwm_temp_map(struct device *dev,
1612                                  struct device_attribute *attr, char *buf)
1613 {
1614         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1615         struct it87_data *data = it87_update_device(dev);
1616         int nr = sensor_attr->index;
1617         int map;
1618
1619         if (IS_ERR(data))
1620                 return PTR_ERR(data);
1621
1622         map = data->pwm_temp_map[nr];
1623         if (map >= 3)
1624                 map = 0;        /* Should never happen */
1625         if (nr >= 3)            /* pwm channels 3..6 map to temp4..6 */
1626                 map += 3;
1627
1628         return sprintf(buf, "%d\n", (int)BIT(map));
1629 }
1630
1631 static ssize_t set_pwm_temp_map(struct device *dev,
1632                                 struct device_attribute *attr, const char *buf,
1633                                 size_t count)
1634 {
1635         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1636         struct it87_data *data = dev_get_drvdata(dev);
1637         int nr = sensor_attr->index;
1638         long val;
1639         int err;
1640         u8 reg;
1641
1642         if (kstrtol(buf, 10, &val) < 0)
1643                 return -EINVAL;
1644
1645         if (nr >= 3)
1646                 val -= 3;
1647
1648         switch (val) {
1649         case BIT(0):
1650                 reg = 0x00;
1651                 break;
1652         case BIT(1):
1653                 reg = 0x01;
1654                 break;
1655         case BIT(2):
1656                 reg = 0x02;
1657                 break;
1658         default:
1659                 return -EINVAL;
1660         }
1661
1662         err = it87_lock(data);
1663         if (err)
1664                 return err;
1665
1666         it87_update_pwm_ctrl(data, nr);
1667         data->pwm_temp_map[nr] = reg;
1668         /*
1669          * If we are in automatic mode, write the temp mapping immediately;
1670          * otherwise, just store it for later use.
1671          */
1672         if (data->pwm_ctrl[nr] & 0x80) {
1673                 data->pwm_ctrl[nr] = (data->pwm_ctrl[nr] & 0xfc) |
1674                                                 data->pwm_temp_map[nr];
1675                 it87_write_value(data, IT87_REG_PWM[nr], data->pwm_ctrl[nr]);
1676         }
1677         it87_unlock(data);
1678         return count;
1679 }
1680
1681 static ssize_t show_auto_pwm(struct device *dev, struct device_attribute *attr,
1682                              char *buf)
1683 {
1684         struct it87_data *data = it87_update_device(dev);
1685         struct sensor_device_attribute_2 *sensor_attr =
1686                         to_sensor_dev_attr_2(attr);
1687         int nr = sensor_attr->nr;
1688         int point = sensor_attr->index;
1689
1690         if (IS_ERR(data))
1691                 return PTR_ERR(data);
1692
1693         return sprintf(buf, "%d\n",
1694                        pwm_from_reg(data, data->auto_pwm[nr][point]));
1695 }
1696
1697 static ssize_t set_auto_pwm(struct device *dev, struct device_attribute *attr,
1698                             const char *buf, size_t count)
1699 {
1700         struct it87_data *data = dev_get_drvdata(dev);
1701         struct sensor_device_attribute_2 *sensor_attr =
1702                         to_sensor_dev_attr_2(attr);
1703         int nr = sensor_attr->nr;
1704         int point = sensor_attr->index;
1705         int regaddr;
1706         long val;
1707         int err;
1708
1709         if (kstrtol(buf, 10, &val) < 0 || val < 0 || val > 255)
1710                 return -EINVAL;
1711
1712         err = it87_lock(data);
1713         if (err)
1714                 return err;
1715
1716         data->auto_pwm[nr][point] = pwm_to_reg(data, val);
1717         if (has_newer_autopwm(data))
1718                 regaddr = IT87_REG_AUTO_TEMP(nr, 3);
1719         else
1720                 regaddr = IT87_REG_AUTO_PWM(nr, point);
1721         it87_write_value(data, regaddr, data->auto_pwm[nr][point]);
1722         it87_unlock(data);
1723         return count;
1724 }
1725
1726 static ssize_t show_auto_pwm_slope(struct device *dev,
1727                                    struct device_attribute *attr, char *buf)
1728 {
1729         struct it87_data *data = it87_update_device(dev);
1730         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1731         int nr = sensor_attr->index;
1732
1733         if (IS_ERR(data))
1734                 return PTR_ERR(data);
1735
1736         return sprintf(buf, "%d\n", data->auto_pwm[nr][1] & 0x7f);
1737 }
1738
1739 static ssize_t set_auto_pwm_slope(struct device *dev,
1740                                   struct device_attribute *attr,
1741                                   const char *buf, size_t count)
1742 {
1743         struct it87_data *data = dev_get_drvdata(dev);
1744         struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
1745         int nr = sensor_attr->index;
1746         unsigned long val;
1747         int err;
1748
1749         if (kstrtoul(buf, 10, &val) < 0 || val > 127)
1750                 return -EINVAL;
1751
1752         err = it87_lock(data);
1753         if (err)
1754                 return err;
1755
1756         data->auto_pwm[nr][1] = (data->auto_pwm[nr][1] & 0x80) | val;
1757         it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 4),
1758                          data->auto_pwm[nr][1]);
1759         it87_unlock(data);
1760         return count;
1761 }
1762
1763 static ssize_t show_auto_temp(struct device *dev, struct device_attribute *attr,
1764                               char *buf)
1765 {
1766         struct it87_data *data = it87_update_device(dev);
1767         struct sensor_device_attribute_2 *sensor_attr =
1768                         to_sensor_dev_attr_2(attr);
1769         int nr = sensor_attr->nr;
1770         int point = sensor_attr->index;
1771         int reg;
1772
1773         if (IS_ERR(data))
1774                 return PTR_ERR(data);
1775
1776         if (has_old_autopwm(data) || point)
1777                 reg = data->auto_temp[nr][point];
1778         else
1779                 reg = data->auto_temp[nr][1] - (data->auto_temp[nr][0] & 0x1f);
1780
1781         return sprintf(buf, "%d\n", TEMP_FROM_REG(reg));
1782 }
1783
1784 static ssize_t set_auto_temp(struct device *dev, struct device_attribute *attr,
1785                              const char *buf, size_t count)
1786 {
1787         struct it87_data *data = dev_get_drvdata(dev);
1788         struct sensor_device_attribute_2 *sensor_attr =
1789                         to_sensor_dev_attr_2(attr);
1790         int nr = sensor_attr->nr;
1791         int point = sensor_attr->index;
1792         long val;
1793         int reg;
1794         int err;
1795
1796         if (kstrtol(buf, 10, &val) < 0 || val < -128000 || val > 127000)
1797                 return -EINVAL;
1798
1799         err = it87_lock(data);
1800         if (err)
1801                 return err;
1802
1803         if (has_newer_autopwm(data) && !point) {
1804                 reg = data->auto_temp[nr][1] - TEMP_TO_REG(val);
1805                 reg = clamp_val(reg, 0, 0x1f) | (data->auto_temp[nr][0] & 0xe0);
1806                 data->auto_temp[nr][0] = reg;
1807                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, 5), reg);
1808         } else {
1809                 reg = TEMP_TO_REG(val);
1810                 data->auto_temp[nr][point] = reg;
1811                 if (has_newer_autopwm(data))
1812                         point--;
1813                 it87_write_value(data, IT87_REG_AUTO_TEMP(nr, point), reg);
1814         }
1815         it87_unlock(data);
1816         return count;
1817 }
1818
1819 static SENSOR_DEVICE_ATTR_2(fan1_input, S_IRUGO, show_fan, NULL, 0, 0);
1820 static SENSOR_DEVICE_ATTR_2(fan1_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1821                             0, 1);
1822 static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR, show_fan_div,
1823                           set_fan_div, 0);
1824
1825 static SENSOR_DEVICE_ATTR_2(fan2_input, S_IRUGO, show_fan, NULL, 1, 0);
1826 static SENSOR_DEVICE_ATTR_2(fan2_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1827                             1, 1);
1828 static SENSOR_DEVICE_ATTR(fan2_div, S_IRUGO | S_IWUSR, show_fan_div,
1829                           set_fan_div, 1);
1830
1831 static SENSOR_DEVICE_ATTR_2(fan3_input, S_IRUGO, show_fan, NULL, 2, 0);
1832 static SENSOR_DEVICE_ATTR_2(fan3_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1833                             2, 1);
1834 static SENSOR_DEVICE_ATTR(fan3_div, S_IRUGO | S_IWUSR, show_fan_div,
1835                           set_fan_div, 2);
1836
1837 static SENSOR_DEVICE_ATTR_2(fan4_input, S_IRUGO, show_fan, NULL, 3, 0);
1838 static SENSOR_DEVICE_ATTR_2(fan4_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1839                             3, 1);
1840
1841 static SENSOR_DEVICE_ATTR_2(fan5_input, S_IRUGO, show_fan, NULL, 4, 0);
1842 static SENSOR_DEVICE_ATTR_2(fan5_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1843                             4, 1);
1844
1845 static SENSOR_DEVICE_ATTR_2(fan6_input, S_IRUGO, show_fan, NULL, 5, 0);
1846 static SENSOR_DEVICE_ATTR_2(fan6_min, S_IRUGO | S_IWUSR, show_fan, set_fan,
1847                             5, 1);
1848
1849 static SENSOR_DEVICE_ATTR(pwm1_enable, S_IRUGO | S_IWUSR,
1850                           show_pwm_enable, set_pwm_enable, 0);
1851 static SENSOR_DEVICE_ATTR(pwm1, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 0);
1852 static SENSOR_DEVICE_ATTR(pwm1_freq, S_IRUGO | S_IWUSR, show_pwm_freq,
1853                           set_pwm_freq, 0);
1854 static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
1855                           show_pwm_temp_map, set_pwm_temp_map, 0);
1856 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR,
1857                             show_auto_pwm, set_auto_pwm, 0, 0);
1858 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_pwm, S_IRUGO | S_IWUSR,
1859                             show_auto_pwm, set_auto_pwm, 0, 1);
1860 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_pwm, S_IRUGO | S_IWUSR,
1861                             show_auto_pwm, set_auto_pwm, 0, 2);
1862 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_pwm, S_IRUGO,
1863                             show_auto_pwm, NULL, 0, 3);
1864 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp, S_IRUGO | S_IWUSR,
1865                             show_auto_temp, set_auto_temp, 0, 1);
1866 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1867                             show_auto_temp, set_auto_temp, 0, 0);
1868 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point2_temp, S_IRUGO | S_IWUSR,
1869                             show_auto_temp, set_auto_temp, 0, 2);
1870 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point3_temp, S_IRUGO | S_IWUSR,
1871                             show_auto_temp, set_auto_temp, 0, 3);
1872 static SENSOR_DEVICE_ATTR_2(pwm1_auto_point4_temp, S_IRUGO | S_IWUSR,
1873                             show_auto_temp, set_auto_temp, 0, 4);
1874 static SENSOR_DEVICE_ATTR_2(pwm1_auto_start, S_IRUGO | S_IWUSR,
1875                             show_auto_pwm, set_auto_pwm, 0, 0);
1876 static SENSOR_DEVICE_ATTR(pwm1_auto_slope, S_IRUGO | S_IWUSR,
1877                           show_auto_pwm_slope, set_auto_pwm_slope, 0);
1878
1879 static SENSOR_DEVICE_ATTR(pwm2_enable, S_IRUGO | S_IWUSR,
1880                           show_pwm_enable, set_pwm_enable, 1);
1881 static SENSOR_DEVICE_ATTR(pwm2, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 1);
1882 static SENSOR_DEVICE_ATTR(pwm2_freq, S_IRUGO, show_pwm_freq, set_pwm_freq, 1);
1883 static SENSOR_DEVICE_ATTR(pwm2_auto_channels_temp, S_IRUGO,
1884                           show_pwm_temp_map, set_pwm_temp_map, 1);
1885 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR,
1886                             show_auto_pwm, set_auto_pwm, 1, 0);
1887 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_pwm, S_IRUGO | S_IWUSR,
1888                             show_auto_pwm, set_auto_pwm, 1, 1);
1889 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_pwm, S_IRUGO | S_IWUSR,
1890                             show_auto_pwm, set_auto_pwm, 1, 2);
1891 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_pwm, S_IRUGO,
1892                             show_auto_pwm, NULL, 1, 3);
1893 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp, S_IRUGO | S_IWUSR,
1894                             show_auto_temp, set_auto_temp, 1, 1);
1895 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1896                             show_auto_temp, set_auto_temp, 1, 0);
1897 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point2_temp, S_IRUGO | S_IWUSR,
1898                             show_auto_temp, set_auto_temp, 1, 2);
1899 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point3_temp, S_IRUGO | S_IWUSR,
1900                             show_auto_temp, set_auto_temp, 1, 3);
1901 static SENSOR_DEVICE_ATTR_2(pwm2_auto_point4_temp, S_IRUGO | S_IWUSR,
1902                             show_auto_temp, set_auto_temp, 1, 4);
1903 static SENSOR_DEVICE_ATTR_2(pwm2_auto_start, S_IRUGO | S_IWUSR,
1904                             show_auto_pwm, set_auto_pwm, 1, 0);
1905 static SENSOR_DEVICE_ATTR(pwm2_auto_slope, S_IRUGO | S_IWUSR,
1906                           show_auto_pwm_slope, set_auto_pwm_slope, 1);
1907
1908 static SENSOR_DEVICE_ATTR(pwm3_enable, S_IRUGO | S_IWUSR,
1909                           show_pwm_enable, set_pwm_enable, 2);
1910 static SENSOR_DEVICE_ATTR(pwm3, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 2);
1911 static SENSOR_DEVICE_ATTR(pwm3_freq, S_IRUGO, show_pwm_freq, NULL, 2);
1912 static SENSOR_DEVICE_ATTR(pwm3_auto_channels_temp, S_IRUGO,
1913                           show_pwm_temp_map, set_pwm_temp_map, 2);
1914 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR,
1915                             show_auto_pwm, set_auto_pwm, 2, 0);
1916 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_pwm, S_IRUGO | S_IWUSR,
1917                             show_auto_pwm, set_auto_pwm, 2, 1);
1918 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_pwm, S_IRUGO | S_IWUSR,
1919                             show_auto_pwm, set_auto_pwm, 2, 2);
1920 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_pwm, S_IRUGO,
1921                             show_auto_pwm, NULL, 2, 3);
1922 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp, S_IRUGO | S_IWUSR,
1923                             show_auto_temp, set_auto_temp, 2, 1);
1924 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1925                             show_auto_temp, set_auto_temp, 2, 0);
1926 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point2_temp, S_IRUGO | S_IWUSR,
1927                             show_auto_temp, set_auto_temp, 2, 2);
1928 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point3_temp, S_IRUGO | S_IWUSR,
1929                             show_auto_temp, set_auto_temp, 2, 3);
1930 static SENSOR_DEVICE_ATTR_2(pwm3_auto_point4_temp, S_IRUGO | S_IWUSR,
1931                             show_auto_temp, set_auto_temp, 2, 4);
1932 static SENSOR_DEVICE_ATTR_2(pwm3_auto_start, S_IRUGO | S_IWUSR,
1933                             show_auto_pwm, set_auto_pwm, 2, 0);
1934 static SENSOR_DEVICE_ATTR(pwm3_auto_slope, S_IRUGO | S_IWUSR,
1935                           show_auto_pwm_slope, set_auto_pwm_slope, 2);
1936
1937 static SENSOR_DEVICE_ATTR(pwm4_enable, S_IRUGO | S_IWUSR,
1938                           show_pwm_enable, set_pwm_enable, 3);
1939 static SENSOR_DEVICE_ATTR(pwm4, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 3);
1940 static SENSOR_DEVICE_ATTR(pwm4_freq, S_IRUGO, show_pwm_freq, NULL, 3);
1941 static SENSOR_DEVICE_ATTR(pwm4_auto_channels_temp, S_IRUGO,
1942                           show_pwm_temp_map, set_pwm_temp_map, 3);
1943 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp, S_IRUGO | S_IWUSR,
1944                             show_auto_temp, set_auto_temp, 2, 1);
1945 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1946                             show_auto_temp, set_auto_temp, 2, 0);
1947 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point2_temp, S_IRUGO | S_IWUSR,
1948                             show_auto_temp, set_auto_temp, 2, 2);
1949 static SENSOR_DEVICE_ATTR_2(pwm4_auto_point3_temp, S_IRUGO | S_IWUSR,
1950                             show_auto_temp, set_auto_temp, 2, 3);
1951 static SENSOR_DEVICE_ATTR_2(pwm4_auto_start, S_IRUGO | S_IWUSR,
1952                             show_auto_pwm, set_auto_pwm, 3, 0);
1953 static SENSOR_DEVICE_ATTR(pwm4_auto_slope, S_IRUGO | S_IWUSR,
1954                           show_auto_pwm_slope, set_auto_pwm_slope, 3);
1955
1956 static SENSOR_DEVICE_ATTR(pwm5_enable, S_IRUGO | S_IWUSR,
1957                           show_pwm_enable, set_pwm_enable, 4);
1958 static SENSOR_DEVICE_ATTR(pwm5, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 4);
1959 static SENSOR_DEVICE_ATTR(pwm5_freq, S_IRUGO, show_pwm_freq, NULL, 4);
1960 static SENSOR_DEVICE_ATTR(pwm5_auto_channels_temp, S_IRUGO,
1961                           show_pwm_temp_map, set_pwm_temp_map, 4);
1962 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp, S_IRUGO | S_IWUSR,
1963                             show_auto_temp, set_auto_temp, 2, 1);
1964 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1965                             show_auto_temp, set_auto_temp, 2, 0);
1966 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point2_temp, S_IRUGO | S_IWUSR,
1967                             show_auto_temp, set_auto_temp, 2, 2);
1968 static SENSOR_DEVICE_ATTR_2(pwm5_auto_point3_temp, S_IRUGO | S_IWUSR,
1969                             show_auto_temp, set_auto_temp, 2, 3);
1970 static SENSOR_DEVICE_ATTR_2(pwm5_auto_start, S_IRUGO | S_IWUSR,
1971                             show_auto_pwm, set_auto_pwm, 4, 0);
1972 static SENSOR_DEVICE_ATTR(pwm5_auto_slope, S_IRUGO | S_IWUSR,
1973                           show_auto_pwm_slope, set_auto_pwm_slope, 4);
1974
1975 static SENSOR_DEVICE_ATTR(pwm6_enable, S_IRUGO | S_IWUSR,
1976                           show_pwm_enable, set_pwm_enable, 5);
1977 static SENSOR_DEVICE_ATTR(pwm6, S_IRUGO | S_IWUSR, show_pwm, set_pwm, 5);
1978 static SENSOR_DEVICE_ATTR(pwm6_freq, S_IRUGO, show_pwm_freq, NULL, 5);
1979 static SENSOR_DEVICE_ATTR(pwm6_auto_channels_temp, S_IRUGO,
1980                           show_pwm_temp_map, set_pwm_temp_map, 5);
1981 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp, S_IRUGO | S_IWUSR,
1982                             show_auto_temp, set_auto_temp, 2, 1);
1983 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point1_temp_hyst, S_IRUGO | S_IWUSR,
1984                             show_auto_temp, set_auto_temp, 2, 0);
1985 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point2_temp, S_IRUGO | S_IWUSR,
1986                             show_auto_temp, set_auto_temp, 2, 2);
1987 static SENSOR_DEVICE_ATTR_2(pwm6_auto_point3_temp, S_IRUGO | S_IWUSR,
1988                             show_auto_temp, set_auto_temp, 2, 3);
1989 static SENSOR_DEVICE_ATTR_2(pwm6_auto_start, S_IRUGO | S_IWUSR,
1990                             show_auto_pwm, set_auto_pwm, 5, 0);
1991 static SENSOR_DEVICE_ATTR(pwm6_auto_slope, S_IRUGO | S_IWUSR,
1992                           show_auto_pwm_slope, set_auto_pwm_slope, 5);
1993
1994 /* Alarms */
1995 static ssize_t alarms_show(struct device *dev, struct device_attribute *attr,
1996                            char *buf)
1997 {
1998         struct it87_data *data = it87_update_device(dev);
1999
2000         if (IS_ERR(data))
2001                 return PTR_ERR(data);
2002
2003         return sprintf(buf, "%u\n", data->alarms);
2004 }
2005 static DEVICE_ATTR_RO(alarms);
2006
2007 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr,
2008                           char *buf)
2009 {
2010         struct it87_data *data = it87_update_device(dev);
2011         int bitnr = to_sensor_dev_attr(attr)->index;
2012
2013         if (IS_ERR(data))
2014                 return PTR_ERR(data);
2015
2016         return sprintf(buf, "%u\n", (data->alarms >> bitnr) & 1);
2017 }
2018
2019 static ssize_t clear_intrusion(struct device *dev,
2020                                struct device_attribute *attr, const char *buf,
2021                                size_t count)
2022 {
2023         struct it87_data *data = dev_get_drvdata(dev);
2024         int err, config;
2025         long val;
2026
2027         if (kstrtol(buf, 10, &val) < 0 || val != 0)
2028                 return -EINVAL;
2029
2030         err = it87_lock(data);
2031         if (err)
2032                 return err;
2033
2034         config = it87_read_value(data, IT87_REG_CONFIG);
2035         if (config < 0) {
2036                 count = config;
2037         } else {
2038                 config |= BIT(5);
2039                 it87_write_value(data, IT87_REG_CONFIG, config);
2040                 /* Invalidate cache to force re-read */
2041                 data->valid = false;
2042         }
2043         it87_unlock(data);
2044         return count;
2045 }
2046
2047 static SENSOR_DEVICE_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 8);
2048 static SENSOR_DEVICE_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 9);
2049 static SENSOR_DEVICE_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 10);
2050 static SENSOR_DEVICE_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 11);
2051 static SENSOR_DEVICE_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 12);
2052 static SENSOR_DEVICE_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 13);
2053 static SENSOR_DEVICE_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 14);
2054 static SENSOR_DEVICE_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 15);
2055 static SENSOR_DEVICE_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 0);
2056 static SENSOR_DEVICE_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 1);
2057 static SENSOR_DEVICE_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 2);
2058 static SENSOR_DEVICE_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 3);
2059 static SENSOR_DEVICE_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 6);
2060 static SENSOR_DEVICE_ATTR(fan6_alarm, S_IRUGO, show_alarm, NULL, 7);
2061 static SENSOR_DEVICE_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 16);
2062 static SENSOR_DEVICE_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 17);
2063 static SENSOR_DEVICE_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 18);
2064 static SENSOR_DEVICE_ATTR(intrusion0_alarm, S_IRUGO | S_IWUSR,
2065                           show_alarm, clear_intrusion, 4);
2066
2067 static ssize_t show_beep(struct device *dev, struct device_attribute *attr,
2068                          char *buf)
2069 {
2070         struct it87_data *data = it87_update_device(dev);
2071         int bitnr = to_sensor_dev_attr(attr)->index;
2072
2073         if (IS_ERR(data))
2074                 return PTR_ERR(data);
2075
2076         return sprintf(buf, "%u\n", (data->beeps >> bitnr) & 1);
2077 }
2078
2079 static ssize_t set_beep(struct device *dev, struct device_attribute *attr,
2080                         const char *buf, size_t count)
2081 {
2082         int bitnr = to_sensor_dev_attr(attr)->index;
2083         struct it87_data *data = dev_get_drvdata(dev);
2084         long val;
2085         int err;
2086
2087         if (kstrtol(buf, 10, &val) < 0 || (val != 0 && val != 1))
2088                 return -EINVAL;
2089
2090         err = it87_lock(data);
2091         if (err)
2092                 return err;
2093
2094         data->beeps = it87_read_value(data, IT87_REG_BEEP_ENABLE);
2095         if (val)
2096                 data->beeps |= BIT(bitnr);
2097         else
2098                 data->beeps &= ~BIT(bitnr);
2099         it87_write_value(data, IT87_REG_BEEP_ENABLE, data->beeps);
2100         it87_unlock(data);
2101         return count;
2102 }
2103
2104 static SENSOR_DEVICE_ATTR(in0_beep, S_IRUGO | S_IWUSR,
2105                           show_beep, set_beep, 1);
2106 static SENSOR_DEVICE_ATTR(in1_beep, S_IRUGO, show_beep, NULL, 1);
2107 static SENSOR_DEVICE_ATTR(in2_beep, S_IRUGO, show_beep, NULL, 1);
2108 static SENSOR_DEVICE_ATTR(in3_beep, S_IRUGO, show_beep, NULL, 1);
2109 static SENSOR_DEVICE_ATTR(in4_beep, S_IRUGO, show_beep, NULL, 1);
2110 static SENSOR_DEVICE_ATTR(in5_beep, S_IRUGO, show_beep, NULL, 1);
2111 static SENSOR_DEVICE_ATTR(in6_beep, S_IRUGO, show_beep, NULL, 1);
2112 static SENSOR_DEVICE_ATTR(in7_beep, S_IRUGO, show_beep, NULL, 1);
2113 /* fanX_beep writability is set later */
2114 static SENSOR_DEVICE_ATTR(fan1_beep, S_IRUGO, show_beep, set_beep, 0);
2115 static SENSOR_DEVICE_ATTR(fan2_beep, S_IRUGO, show_beep, set_beep, 0);
2116 static SENSOR_DEVICE_ATTR(fan3_beep, S_IRUGO, show_beep, set_beep, 0);
2117 static SENSOR_DEVICE_ATTR(fan4_beep, S_IRUGO, show_beep, set_beep, 0);
2118 static SENSOR_DEVICE_ATTR(fan5_beep, S_IRUGO, show_beep, set_beep, 0);
2119 static SENSOR_DEVICE_ATTR(fan6_beep, S_IRUGO, show_beep, set_beep, 0);
2120 static SENSOR_DEVICE_ATTR(temp1_beep, S_IRUGO | S_IWUSR,
2121                           show_beep, set_beep, 2);
2122 static SENSOR_DEVICE_ATTR(temp2_beep, S_IRUGO, show_beep, NULL, 2);
2123 static SENSOR_DEVICE_ATTR(temp3_beep, S_IRUGO, show_beep, NULL, 2);
2124
2125 static ssize_t vrm_show(struct device *dev, struct device_attribute *attr,
2126                         char *buf)
2127 {
2128         struct it87_data *data = dev_get_drvdata(dev);
2129
2130         return sprintf(buf, "%u\n", data->vrm);
2131 }
2132
2133 static ssize_t vrm_store(struct device *dev, struct device_attribute *attr,
2134                          const char *buf, size_t count)
2135 {
2136         struct it87_data *data = dev_get_drvdata(dev);
2137         unsigned long val;
2138
2139         if (kstrtoul(buf, 10, &val) < 0)
2140                 return -EINVAL;
2141
2142         data->vrm = val;
2143
2144         return count;
2145 }
2146 static DEVICE_ATTR_RW(vrm);
2147
2148 static ssize_t cpu0_vid_show(struct device *dev,
2149                              struct device_attribute *attr, char *buf)
2150 {
2151         struct it87_data *data = it87_update_device(dev);
2152
2153         if (IS_ERR(data))
2154                 return PTR_ERR(data);
2155
2156         return sprintf(buf, "%ld\n", (long)vid_from_reg(data->vid, data->vrm));
2157 }
2158 static DEVICE_ATTR_RO(cpu0_vid);
2159
2160 static ssize_t show_label(struct device *dev, struct device_attribute *attr,
2161                           char *buf)
2162 {
2163         static const char * const labels[] = {
2164                 "+5V",
2165                 "5VSB",
2166                 "Vbat",
2167                 "AVCC",
2168         };
2169         static const char * const labels_it8721[] = {
2170                 "+3.3V",
2171                 "3VSB",
2172                 "Vbat",
2173                 "+3.3V",
2174         };
2175         struct it87_data *data = dev_get_drvdata(dev);
2176         int nr = to_sensor_dev_attr(attr)->index;
2177         const char *label;
2178
2179         if (has_vin3_5v(data) && nr == 0)
2180                 label = labels[0];
2181         else if (has_scaling(data))
2182                 label = labels_it8721[nr];
2183         else
2184                 label = labels[nr];
2185
2186         return sprintf(buf, "%s\n", label);
2187 }
2188 static SENSOR_DEVICE_ATTR(in3_label, S_IRUGO, show_label, NULL, 0);
2189 static SENSOR_DEVICE_ATTR(in7_label, S_IRUGO, show_label, NULL, 1);
2190 static SENSOR_DEVICE_ATTR(in8_label, S_IRUGO, show_label, NULL, 2);
2191 /* AVCC3 */
2192 static SENSOR_DEVICE_ATTR(in9_label, S_IRUGO, show_label, NULL, 3);
2193
2194 static umode_t it87_in_is_visible(struct kobject *kobj,
2195                                   struct attribute *attr, int index)
2196 {
2197         struct device *dev = kobj_to_dev(kobj);
2198         struct it87_data *data = dev_get_drvdata(dev);
2199         int i = index / 5;      /* voltage index */
2200         int a = index % 5;      /* attribute index */
2201
2202         if (index >= 40) {      /* in8 and higher only have input attributes */
2203                 i = index - 40 + 8;
2204                 a = 0;
2205         }
2206
2207         if (!(data->has_in & BIT(i)))
2208                 return 0;
2209
2210         if (a == 4 && !data->has_beep)
2211                 return 0;
2212
2213         return attr->mode;
2214 }
2215
2216 static struct attribute *it87_attributes_in[] = {
2217         &sensor_dev_attr_in0_input.dev_attr.attr,
2218         &sensor_dev_attr_in0_min.dev_attr.attr,
2219         &sensor_dev_attr_in0_max.dev_attr.attr,
2220         &sensor_dev_attr_in0_alarm.dev_attr.attr,
2221         &sensor_dev_attr_in0_beep.dev_attr.attr,        /* 4 */
2222
2223         &sensor_dev_attr_in1_input.dev_attr.attr,
2224         &sensor_dev_attr_in1_min.dev_attr.attr,
2225         &sensor_dev_attr_in1_max.dev_attr.attr,
2226         &sensor_dev_attr_in1_alarm.dev_attr.attr,
2227         &sensor_dev_attr_in1_beep.dev_attr.attr,        /* 9 */
2228
2229         &sensor_dev_attr_in2_input.dev_attr.attr,
2230         &sensor_dev_attr_in2_min.dev_attr.attr,
2231         &sensor_dev_attr_in2_max.dev_attr.attr,
2232         &sensor_dev_attr_in2_alarm.dev_attr.attr,
2233         &sensor_dev_attr_in2_beep.dev_attr.attr,        /* 14 */
2234
2235         &sensor_dev_attr_in3_input.dev_attr.attr,
2236         &sensor_dev_attr_in3_min.dev_attr.attr,
2237         &sensor_dev_attr_in3_max.dev_attr.attr,
2238         &sensor_dev_attr_in3_alarm.dev_attr.attr,
2239         &sensor_dev_attr_in3_beep.dev_attr.attr,        /* 19 */
2240
2241         &sensor_dev_attr_in4_input.dev_attr.attr,
2242         &sensor_dev_attr_in4_min.dev_attr.attr,
2243         &sensor_dev_attr_in4_max.dev_attr.attr,
2244         &sensor_dev_attr_in4_alarm.dev_attr.attr,
2245         &sensor_dev_attr_in4_beep.dev_attr.attr,        /* 24 */
2246
2247         &sensor_dev_attr_in5_input.dev_attr.attr,
2248         &sensor_dev_attr_in5_min.dev_attr.attr,
2249         &sensor_dev_attr_in5_max.dev_attr.attr,
2250         &sensor_dev_attr_in5_alarm.dev_attr.attr,
2251         &sensor_dev_attr_in5_beep.dev_attr.attr,        /* 29 */
2252
2253         &sensor_dev_attr_in6_input.dev_attr.attr,
2254         &sensor_dev_attr_in6_min.dev_attr.attr,
2255         &sensor_dev_attr_in6_max.dev_attr.attr,
2256         &sensor_dev_attr_in6_alarm.dev_attr.attr,
2257         &sensor_dev_attr_in6_beep.dev_attr.attr,        /* 34 */
2258
2259         &sensor_dev_attr_in7_input.dev_attr.attr,
2260         &sensor_dev_attr_in7_min.dev_attr.attr,
2261         &sensor_dev_attr_in7_max.dev_attr.attr,
2262         &sensor_dev_attr_in7_alarm.dev_attr.attr,
2263         &sensor_dev_attr_in7_beep.dev_attr.attr,        /* 39 */
2264
2265         &sensor_dev_attr_in8_input.dev_attr.attr,       /* 40 */
2266         &sensor_dev_attr_in9_input.dev_attr.attr,
2267         &sensor_dev_attr_in10_input.dev_attr.attr,
2268         &sensor_dev_attr_in11_input.dev_attr.attr,
2269         &sensor_dev_attr_in12_input.dev_attr.attr,
2270         NULL
2271 };
2272
2273 static const struct attribute_group it87_group_in = {
2274         .attrs = it87_attributes_in,
2275         .is_visible = it87_in_is_visible,
2276 };
2277
2278 static umode_t it87_temp_is_visible(struct kobject *kobj,
2279                                     struct attribute *attr, int index)
2280 {
2281         struct device *dev = kobj_to_dev(kobj);
2282         struct it87_data *data = dev_get_drvdata(dev);
2283         int i = index / 7;      /* temperature index */
2284         int a = index % 7;      /* attribute index */
2285
2286         if (index >= 21) {
2287                 i = index - 21 + 3;
2288                 a = 0;
2289         }
2290
2291         if (!(data->has_temp & BIT(i)))
2292                 return 0;
2293
2294         if (a == 5 && !has_temp_offset(data))
2295                 return 0;
2296
2297         if (a == 6 && !data->has_beep)
2298                 return 0;
2299
2300         return attr->mode;
2301 }
2302
2303 static struct attribute *it87_attributes_temp[] = {
2304         &sensor_dev_attr_temp1_input.dev_attr.attr,
2305         &sensor_dev_attr_temp1_max.dev_attr.attr,
2306         &sensor_dev_attr_temp1_min.dev_attr.attr,
2307         &sensor_dev_attr_temp1_type.dev_attr.attr,
2308         &sensor_dev_attr_temp1_alarm.dev_attr.attr,
2309         &sensor_dev_attr_temp1_offset.dev_attr.attr,    /* 5 */
2310         &sensor_dev_attr_temp1_beep.dev_attr.attr,      /* 6 */
2311
2312         &sensor_dev_attr_temp2_input.dev_attr.attr,     /* 7 */
2313         &sensor_dev_attr_temp2_max.dev_attr.attr,
2314         &sensor_dev_attr_temp2_min.dev_attr.attr,
2315         &sensor_dev_attr_temp2_type.dev_attr.attr,
2316         &sensor_dev_attr_temp2_alarm.dev_attr.attr,
2317         &sensor_dev_attr_temp2_offset.dev_attr.attr,
2318         &sensor_dev_attr_temp2_beep.dev_attr.attr,
2319
2320         &sensor_dev_attr_temp3_input.dev_attr.attr,     /* 14 */
2321         &sensor_dev_attr_temp3_max.dev_attr.attr,
2322         &sensor_dev_attr_temp3_min.dev_attr.attr,
2323         &sensor_dev_attr_temp3_type.dev_attr.attr,
2324         &sensor_dev_attr_temp3_alarm.dev_attr.attr,
2325         &sensor_dev_attr_temp3_offset.dev_attr.attr,
2326         &sensor_dev_attr_temp3_beep.dev_attr.attr,
2327
2328         &sensor_dev_attr_temp4_input.dev_attr.attr,     /* 21 */
2329         &sensor_dev_attr_temp5_input.dev_attr.attr,
2330         &sensor_dev_attr_temp6_input.dev_attr.attr,
2331         NULL
2332 };
2333
2334 static const struct attribute_group it87_group_temp = {
2335         .attrs = it87_attributes_temp,
2336         .is_visible = it87_temp_is_visible,
2337 };
2338
2339 static umode_t it87_is_visible(struct kobject *kobj,
2340                                struct attribute *attr, int index)
2341 {
2342         struct device *dev = kobj_to_dev(kobj);
2343         struct it87_data *data = dev_get_drvdata(dev);
2344
2345         if ((index == 2 || index == 3) && !data->has_vid)
2346                 return 0;
2347
2348         if (index > 3 && !(data->in_internal & BIT(index - 4)))
2349                 return 0;
2350
2351         return attr->mode;
2352 }
2353
2354 static struct attribute *it87_attributes[] = {
2355         &dev_attr_alarms.attr,
2356         &sensor_dev_attr_intrusion0_alarm.dev_attr.attr,
2357         &dev_attr_vrm.attr,                             /* 2 */
2358         &dev_attr_cpu0_vid.attr,                        /* 3 */
2359         &sensor_dev_attr_in3_label.dev_attr.attr,       /* 4 .. 7 */
2360         &sensor_dev_attr_in7_label.dev_attr.attr,
2361         &sensor_dev_attr_in8_label.dev_attr.attr,
2362         &sensor_dev_attr_in9_label.dev_attr.attr,
2363         NULL
2364 };
2365
2366 static const struct attribute_group it87_group = {
2367         .attrs = it87_attributes,
2368         .is_visible = it87_is_visible,
2369 };
2370
2371 static umode_t it87_fan_is_visible(struct kobject *kobj,
2372                                    struct attribute *attr, int index)
2373 {
2374         struct device *dev = kobj_to_dev(kobj);
2375         struct it87_data *data = dev_get_drvdata(dev);
2376         int i = index / 5;      /* fan index */
2377         int a = index % 5;      /* attribute index */
2378
2379         if (index >= 15) {      /* fan 4..6 don't have divisor attributes */
2380                 i = (index - 15) / 4 + 3;
2381                 a = (index - 15) % 4;
2382         }
2383
2384         if (!(data->has_fan & BIT(i)))
2385                 return 0;
2386
2387         if (a == 3) {                           /* beep */
2388                 if (!data->has_beep)
2389                         return 0;
2390                 /* first fan beep attribute is writable */
2391                 if (i == __ffs(data->has_fan))
2392                         return attr->mode | S_IWUSR;
2393         }
2394
2395         if (a == 4 && has_16bit_fans(data))     /* divisor */
2396                 return 0;
2397
2398         return attr->mode;
2399 }
2400
2401 static struct attribute *it87_attributes_fan[] = {
2402         &sensor_dev_attr_fan1_input.dev_attr.attr,
2403         &sensor_dev_attr_fan1_min.dev_attr.attr,
2404         &sensor_dev_attr_fan1_alarm.dev_attr.attr,
2405         &sensor_dev_attr_fan1_beep.dev_attr.attr,       /* 3 */
2406         &sensor_dev_attr_fan1_div.dev_attr.attr,        /* 4 */
2407
2408         &sensor_dev_attr_fan2_input.dev_attr.attr,
2409         &sensor_dev_attr_fan2_min.dev_attr.attr,
2410         &sensor_dev_attr_fan2_alarm.dev_attr.attr,
2411         &sensor_dev_attr_fan2_beep.dev_attr.attr,
2412         &sensor_dev_attr_fan2_div.dev_attr.attr,        /* 9 */
2413
2414         &sensor_dev_attr_fan3_input.dev_attr.attr,
2415         &sensor_dev_attr_fan3_min.dev_attr.attr,
2416         &sensor_dev_attr_fan3_alarm.dev_attr.attr,
2417         &sensor_dev_attr_fan3_beep.dev_attr.attr,
2418         &sensor_dev_attr_fan3_div.dev_attr.attr,        /* 14 */
2419
2420         &sensor_dev_attr_fan4_input.dev_attr.attr,      /* 15 */
2421         &sensor_dev_attr_fan4_min.dev_attr.attr,
2422         &sensor_dev_attr_fan4_alarm.dev_attr.attr,
2423         &sensor_dev_attr_fan4_beep.dev_attr.attr,
2424
2425         &sensor_dev_attr_fan5_input.dev_attr.attr,      /* 19 */
2426         &sensor_dev_attr_fan5_min.dev_attr.attr,
2427         &sensor_dev_attr_fan5_alarm.dev_attr.attr,
2428         &sensor_dev_attr_fan5_beep.dev_attr.attr,
2429
2430         &sensor_dev_attr_fan6_input.dev_attr.attr,      /* 23 */
2431         &sensor_dev_attr_fan6_min.dev_attr.attr,
2432         &sensor_dev_attr_fan6_alarm.dev_attr.attr,
2433         &sensor_dev_attr_fan6_beep.dev_attr.attr,
2434         NULL
2435 };
2436
2437 static const struct attribute_group it87_group_fan = {
2438         .attrs = it87_attributes_fan,
2439         .is_visible = it87_fan_is_visible,
2440 };
2441
2442 static umode_t it87_pwm_is_visible(struct kobject *kobj,
2443                                    struct attribute *attr, int index)
2444 {
2445         struct device *dev = kobj_to_dev(kobj);
2446         struct it87_data *data = dev_get_drvdata(dev);
2447         int i = index / 4;      /* pwm index */
2448         int a = index % 4;      /* attribute index */
2449
2450         if (!(data->has_pwm & BIT(i)))
2451                 return 0;
2452
2453         /* pwmX_auto_channels_temp is only writable if auto pwm is supported */
2454         if (a == 3 && (has_old_autopwm(data) || has_newer_autopwm(data)))
2455                 return attr->mode | S_IWUSR;
2456
2457         /* pwm2_freq is writable if there are two pwm frequency selects */
2458         if (has_pwm_freq2(data) && i == 1 && a == 2)
2459                 return attr->mode | S_IWUSR;
2460
2461         return attr->mode;
2462 }
2463
2464 static struct attribute *it87_attributes_pwm[] = {
2465         &sensor_dev_attr_pwm1_enable.dev_attr.attr,
2466         &sensor_dev_attr_pwm1.dev_attr.attr,
2467         &sensor_dev_attr_pwm1_freq.dev_attr.attr,
2468         &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
2469
2470         &sensor_dev_attr_pwm2_enable.dev_attr.attr,
2471         &sensor_dev_attr_pwm2.dev_attr.attr,
2472         &sensor_dev_attr_pwm2_freq.dev_attr.attr,
2473         &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
2474
2475         &sensor_dev_attr_pwm3_enable.dev_attr.attr,
2476         &sensor_dev_attr_pwm3.dev_attr.attr,
2477         &sensor_dev_attr_pwm3_freq.dev_attr.attr,
2478         &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
2479
2480         &sensor_dev_attr_pwm4_enable.dev_attr.attr,
2481         &sensor_dev_attr_pwm4.dev_attr.attr,
2482         &sensor_dev_attr_pwm4_freq.dev_attr.attr,
2483         &sensor_dev_attr_pwm4_auto_channels_temp.dev_attr.attr,
2484
2485         &sensor_dev_attr_pwm5_enable.dev_attr.attr,
2486         &sensor_dev_attr_pwm5.dev_attr.attr,
2487         &sensor_dev_attr_pwm5_freq.dev_attr.attr,
2488         &sensor_dev_attr_pwm5_auto_channels_temp.dev_attr.attr,
2489
2490         &sensor_dev_attr_pwm6_enable.dev_attr.attr,
2491         &sensor_dev_attr_pwm6.dev_attr.attr,
2492         &sensor_dev_attr_pwm6_freq.dev_attr.attr,
2493         &sensor_dev_attr_pwm6_auto_channels_temp.dev_attr.attr,
2494
2495         NULL
2496 };
2497
2498 static const struct attribute_group it87_group_pwm = {
2499         .attrs = it87_attributes_pwm,
2500         .is_visible = it87_pwm_is_visible,
2501 };
2502
2503 static umode_t it87_auto_pwm_is_visible(struct kobject *kobj,
2504                                         struct attribute *attr, int index)
2505 {
2506         struct device *dev = kobj_to_dev(kobj);
2507         struct it87_data *data = dev_get_drvdata(dev);
2508         int i = index / 11;     /* pwm index */
2509         int a = index % 11;     /* attribute index */
2510
2511         if (index >= 33) {      /* pwm 4..6 */
2512                 i = (index - 33) / 6 + 3;
2513                 a = (index - 33) % 6 + 4;
2514         }
2515
2516         if (!(data->has_pwm & BIT(i)))
2517                 return 0;
2518
2519         if (has_newer_autopwm(data)) {
2520                 if (a < 4)      /* no auto point pwm */
2521                         return 0;
2522                 if (a == 8)     /* no auto_point4 */
2523                         return 0;
2524         }
2525         if (has_old_autopwm(data)) {
2526                 if (a >= 9)     /* no pwm_auto_start, pwm_auto_slope */
2527                         return 0;
2528         }
2529
2530         return attr->mode;
2531 }
2532
2533 static struct attribute *it87_attributes_auto_pwm[] = {
2534         &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
2535         &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
2536         &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
2537         &sensor_dev_attr_pwm1_auto_point4_pwm.dev_attr.attr,
2538         &sensor_dev_attr_pwm1_auto_point1_temp.dev_attr.attr,
2539         &sensor_dev_attr_pwm1_auto_point1_temp_hyst.dev_attr.attr,
2540         &sensor_dev_attr_pwm1_auto_point2_temp.dev_attr.attr,
2541         &sensor_dev_attr_pwm1_auto_point3_temp.dev_attr.attr,
2542         &sensor_dev_attr_pwm1_auto_point4_temp.dev_attr.attr,
2543         &sensor_dev_attr_pwm1_auto_start.dev_attr.attr,
2544         &sensor_dev_attr_pwm1_auto_slope.dev_attr.attr,
2545
2546         &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,    /* 11 */
2547         &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
2548         &sensor_dev_attr_pwm2_auto_point3_pwm.dev_attr.attr,
2549         &sensor_dev_attr_pwm2_auto_point4_pwm.dev_attr.attr,
2550         &sensor_dev_attr_pwm2_auto_point1_temp.dev_attr.attr,
2551         &sensor_dev_attr_pwm2_auto_point1_temp_hyst.dev_attr.attr,
2552         &sensor_dev_attr_pwm2_auto_point2_temp.dev_attr.attr,
2553         &sensor_dev_attr_pwm2_auto_point3_temp.dev_attr.attr,
2554         &sensor_dev_attr_pwm2_auto_point4_temp.dev_attr.attr,
2555         &sensor_dev_attr_pwm2_auto_start.dev_attr.attr,
2556         &sensor_dev_attr_pwm2_auto_slope.dev_attr.attr,
2557
2558         &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,    /* 22 */
2559         &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
2560         &sensor_dev_attr_pwm3_auto_point3_pwm.dev_attr.attr,
2561         &sensor_dev_attr_pwm3_auto_point4_pwm.dev_attr.attr,
2562         &sensor_dev_attr_pwm3_auto_point1_temp.dev_attr.attr,
2563         &sensor_dev_attr_pwm3_auto_point1_temp_hyst.dev_attr.attr,
2564         &sensor_dev_attr_pwm3_auto_point2_temp.dev_attr.attr,
2565         &sensor_dev_attr_pwm3_auto_point3_temp.dev_attr.attr,
2566         &sensor_dev_attr_pwm3_auto_point4_temp.dev_attr.attr,
2567         &sensor_dev_attr_pwm3_auto_start.dev_attr.attr,
2568         &sensor_dev_attr_pwm3_auto_slope.dev_attr.attr,
2569
2570         &sensor_dev_attr_pwm4_auto_point1_temp.dev_attr.attr,   /* 33 */
2571         &sensor_dev_attr_pwm4_auto_point1_temp_hyst.dev_attr.attr,
2572         &sensor_dev_attr_pwm4_auto_point2_temp.dev_attr.attr,
2573         &sensor_dev_attr_pwm4_auto_point3_temp.dev_attr.attr,
2574         &sensor_dev_attr_pwm4_auto_start.dev_attr.attr,
2575         &sensor_dev_attr_pwm4_auto_slope.dev_attr.attr,
2576
2577         &sensor_dev_attr_pwm5_auto_point1_temp.dev_attr.attr,
2578         &sensor_dev_attr_pwm5_auto_point1_temp_hyst.dev_attr.attr,
2579         &sensor_dev_attr_pwm5_auto_point2_temp.dev_attr.attr,
2580         &sensor_dev_attr_pwm5_auto_point3_temp.dev_attr.attr,
2581         &sensor_dev_attr_pwm5_auto_start.dev_attr.attr,
2582         &sensor_dev_attr_pwm5_auto_slope.dev_attr.attr,
2583
2584         &sensor_dev_attr_pwm6_auto_point1_temp.dev_attr.attr,
2585         &sensor_dev_attr_pwm6_auto_point1_temp_hyst.dev_attr.attr,
2586         &sensor_dev_attr_pwm6_auto_point2_temp.dev_attr.attr,
2587         &sensor_dev_attr_pwm6_auto_point3_temp.dev_attr.attr,
2588         &sensor_dev_attr_pwm6_auto_start.dev_attr.attr,
2589         &sensor_dev_attr_pwm6_auto_slope.dev_attr.attr,
2590
2591         NULL,
2592 };
2593
2594 static const struct attribute_group it87_group_auto_pwm = {
2595         .attrs = it87_attributes_auto_pwm,
2596         .is_visible = it87_auto_pwm_is_visible,
2597 };
2598
2599 /* SuperIO detection - will change isa_address if a chip is found */
2600 static int __init it87_find(int sioaddr, unsigned short *address,
2601                             struct it87_sio_data *sio_data, int chip_cnt)
2602 {
2603         int err;
2604         u16 chip_type;
2605         const struct it87_devices *config = NULL;
2606
2607         err = superio_enter(sioaddr);
2608         if (err)
2609                 return err;
2610
2611         err = -ENODEV;
2612         chip_type = superio_inw(sioaddr, DEVID);
2613         /* check first for a valid chip before forcing chip id */
2614         if (chip_type == 0xffff)
2615                 goto exit;
2616
2617         if (force_id_cnt == 1) {
2618                 /* If only one value given use for all chips */
2619                 if (force_id[0])
2620                         chip_type = force_id[0];
2621         } else if (force_id[chip_cnt])
2622                 chip_type = force_id[chip_cnt];
2623
2624         switch (chip_type) {
2625         case IT8705F_DEVID:
2626                 sio_data->type = it87;
2627                 break;
2628         case IT8712F_DEVID:
2629                 sio_data->type = it8712;
2630                 break;
2631         case IT8716F_DEVID:
2632         case IT8726F_DEVID:
2633                 sio_data->type = it8716;
2634                 break;
2635         case IT8718F_DEVID:
2636                 sio_data->type = it8718;
2637                 break;
2638         case IT8720F_DEVID:
2639                 sio_data->type = it8720;
2640                 break;
2641         case IT8721F_DEVID:
2642                 sio_data->type = it8721;
2643                 break;
2644         case IT8728F_DEVID:
2645                 sio_data->type = it8728;
2646                 break;
2647         case IT8732F_DEVID:
2648                 sio_data->type = it8732;
2649                 break;
2650         case IT8792E_DEVID:
2651                 sio_data->type = it8792;
2652                 break;
2653         case IT8771E_DEVID:
2654                 sio_data->type = it8771;
2655                 break;
2656         case IT8772E_DEVID:
2657                 sio_data->type = it8772;
2658                 break;
2659         case IT8781F_DEVID:
2660                 sio_data->type = it8781;
2661                 break;
2662         case IT8782F_DEVID:
2663                 sio_data->type = it8782;
2664                 break;
2665         case IT8783E_DEVID:
2666                 sio_data->type = it8783;
2667                 break;
2668         case IT8786E_DEVID:
2669                 sio_data->type = it8786;
2670                 break;
2671         case IT8790E_DEVID:
2672                 sio_data->type = it8790;
2673                 break;
2674         case IT8603E_DEVID:
2675         case IT8623E_DEVID:
2676                 sio_data->type = it8603;
2677                 break;
2678         case IT8620E_DEVID:
2679                 sio_data->type = it8620;
2680                 break;
2681         case IT8622E_DEVID:
2682                 sio_data->type = it8622;
2683                 break;
2684         case IT8628E_DEVID:
2685                 sio_data->type = it8628;
2686                 break;
2687         case IT87952E_DEVID:
2688                 sio_data->type = it87952;
2689                 break;
2690         case 0xffff:    /* No device at all */
2691                 goto exit;
2692         default:
2693                 pr_debug("Unsupported chip (DEVID=0x%x)\n", chip_type);
2694                 goto exit;
2695         }
2696
2697         config = &it87_devices[sio_data->type];
2698
2699         superio_select(sioaddr, PME);
2700         if (!(superio_inb(sioaddr, IT87_ACT_REG) & 0x01)) {
2701                 pr_info("Device (chip %s ioreg 0x%x) not activated, skipping\n",
2702                         config->model, sioaddr);
2703                 goto exit;
2704         }
2705
2706         *address = superio_inw(sioaddr, IT87_BASE_REG) & ~(IT87_EXTENT - 1);
2707         if (*address == 0) {
2708                 pr_info("Base address not set (chip %s ioreg 0x%x), skipping\n",
2709                         config->model, sioaddr);
2710                 goto exit;
2711         }
2712
2713         err = 0;
2714         sio_data->sioaddr = sioaddr;
2715         sio_data->revision = superio_inb(sioaddr, DEVREV) & 0x0f;
2716         pr_info("Found %s chip at 0x%x, revision %d\n",
2717                 it87_devices[sio_data->type].model,
2718                 *address, sio_data->revision);
2719
2720         /* in7 (VSB or VCCH5V) is always internal on some chips */
2721         if (has_in7_internal(config))
2722                 sio_data->internal |= BIT(1);
2723
2724         /* in8 (Vbat) is always internal */
2725         sio_data->internal |= BIT(2);
2726
2727         /* in9 (AVCC3), always internal if supported */
2728         if (has_avcc3(config))
2729                 sio_data->internal |= BIT(3); /* in9 is AVCC */
2730         else
2731                 sio_data->skip_in |= BIT(9);
2732
2733         if (!has_five_pwm(config))
2734                 sio_data->skip_pwm |= BIT(3) | BIT(4) | BIT(5);
2735         else if (!has_six_pwm(config))
2736                 sio_data->skip_pwm |= BIT(5);
2737
2738         if (!has_vid(config))
2739                 sio_data->skip_vid = 1;
2740
2741         /* Read GPIO config and VID value from LDN 7 (GPIO) */
2742         if (sio_data->type == it87) {
2743                 /* The IT8705F has a different LD number for GPIO */
2744                 superio_select(sioaddr, 5);
2745                 sio_data->beep_pin = superio_inb(sioaddr,
2746                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2747         } else if (sio_data->type == it8783) {
2748                 int reg25, reg27, reg2a, reg2c, regef;
2749
2750                 superio_select(sioaddr, GPIO);
2751
2752                 reg25 = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2753                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2754                 reg2a = superio_inb(sioaddr, IT87_SIO_PINX1_REG);
2755                 reg2c = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2756                 regef = superio_inb(sioaddr, IT87_SIO_SPI_REG);
2757
2758                 /* Check if fan3 is there or not */
2759                 if ((reg27 & BIT(0)) || !(reg2c & BIT(2)))
2760                         sio_data->skip_fan |= BIT(2);
2761                 if ((reg25 & BIT(4)) ||
2762                     (!(reg2a & BIT(1)) && (regef & BIT(0))))
2763                         sio_data->skip_pwm |= BIT(2);
2764
2765                 /* Check if fan2 is there or not */
2766                 if (reg27 & BIT(7))
2767                         sio_data->skip_fan |= BIT(1);
2768                 if (reg27 & BIT(3))
2769                         sio_data->skip_pwm |= BIT(1);
2770
2771                 /* VIN5 */
2772                 if ((reg27 & BIT(0)) || (reg2c & BIT(2)))
2773                         sio_data->skip_in |= BIT(5); /* No VIN5 */
2774
2775                 /* VIN6 */
2776                 if (reg27 & BIT(1))
2777                         sio_data->skip_in |= BIT(6); /* No VIN6 */
2778
2779                 /*
2780                  * VIN7
2781                  * Does not depend on bit 2 of Reg2C, contrary to datasheet.
2782                  */
2783                 if (reg27 & BIT(2)) {
2784                         /*
2785                          * The data sheet is a bit unclear regarding the
2786                          * internal voltage divider for VCCH5V. It says
2787                          * "This bit enables and switches VIN7 (pin 91) to the
2788                          * internal voltage divider for VCCH5V".
2789                          * This is different to other chips, where the internal
2790                          * voltage divider would connect VIN7 to an internal
2791                          * voltage source. Maybe that is the case here as well.
2792                          *
2793                          * Since we don't know for sure, re-route it if that is
2794                          * not the case, and ask the user to report if the
2795                          * resulting voltage is sane.
2796                          */
2797                         if (!(reg2c & BIT(1))) {
2798                                 reg2c |= BIT(1);
2799                                 superio_outb(sioaddr, IT87_SIO_PINX2_REG,
2800                                              reg2c);
2801                                 sio_data->need_in7_reroute = true;
2802                                 pr_notice("Routing internal VCCH5V to in7.\n");
2803                         }
2804                         pr_notice("in7 routed to internal voltage divider, with external pin disabled.\n");
2805                         pr_notice("Please report if it displays a reasonable voltage.\n");
2806                 }
2807
2808                 if (reg2c & BIT(0))
2809                         sio_data->internal |= BIT(0);
2810                 if (reg2c & BIT(1))
2811                         sio_data->internal |= BIT(1);
2812
2813                 sio_data->beep_pin = superio_inb(sioaddr,
2814                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2815         } else if (sio_data->type == it8603) {
2816                 int reg27, reg29;
2817
2818                 superio_select(sioaddr, GPIO);
2819
2820                 reg27 = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2821
2822                 /* Check if fan3 is there or not */
2823                 if (reg27 & BIT(6))
2824                         sio_data->skip_pwm |= BIT(2);
2825                 if (reg27 & BIT(7))
2826                         sio_data->skip_fan |= BIT(2);
2827
2828                 /* Check if fan2 is there or not */
2829                 reg29 = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2830                 if (reg29 & BIT(1))
2831                         sio_data->skip_pwm |= BIT(1);
2832                 if (reg29 & BIT(2))
2833                         sio_data->skip_fan |= BIT(1);
2834
2835                 sio_data->skip_in |= BIT(5); /* No VIN5 */
2836                 sio_data->skip_in |= BIT(6); /* No VIN6 */
2837
2838                 sio_data->beep_pin = superio_inb(sioaddr,
2839                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2840         } else if (sio_data->type == it8620 || sio_data->type == it8628) {
2841                 int reg;
2842
2843                 superio_select(sioaddr, GPIO);
2844
2845                 /* Check for pwm5 */
2846                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2847                 if (reg & BIT(6))
2848                         sio_data->skip_pwm |= BIT(4);
2849
2850                 /* Check for fan4, fan5 */
2851                 reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2852                 if (!(reg & BIT(5)))
2853                         sio_data->skip_fan |= BIT(3);
2854                 if (!(reg & BIT(4)))
2855                         sio_data->skip_fan |= BIT(4);
2856
2857                 /* Check for pwm3, fan3 */
2858                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2859                 if (reg & BIT(6))
2860                         sio_data->skip_pwm |= BIT(2);
2861                 if (reg & BIT(7))
2862                         sio_data->skip_fan |= BIT(2);
2863
2864                 /* Check for pwm4 */
2865                 reg = superio_inb(sioaddr, IT87_SIO_GPIO4_REG);
2866                 if (reg & BIT(2))
2867                         sio_data->skip_pwm |= BIT(3);
2868
2869                 /* Check for pwm2, fan2 */
2870                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2871                 if (reg & BIT(1))
2872                         sio_data->skip_pwm |= BIT(1);
2873                 if (reg & BIT(2))
2874                         sio_data->skip_fan |= BIT(1);
2875                 /* Check for pwm6, fan6 */
2876                 if (!(reg & BIT(7))) {
2877                         sio_data->skip_pwm |= BIT(5);
2878                         sio_data->skip_fan |= BIT(5);
2879                 }
2880
2881                 /* Check if AVCC is on VIN3 */
2882                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2883                 if (reg & BIT(0))
2884                         sio_data->internal |= BIT(0);
2885                 else
2886                         sio_data->skip_in |= BIT(9);
2887
2888                 sio_data->beep_pin = superio_inb(sioaddr,
2889                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2890         } else if (sio_data->type == it8622) {
2891                 int reg;
2892
2893                 superio_select(sioaddr, GPIO);
2894
2895                 /* Check for pwm4, fan4 */
2896                 reg = superio_inb(sioaddr, IT87_SIO_GPIO1_REG);
2897                 if (reg & BIT(6))
2898                         sio_data->skip_fan |= BIT(3);
2899                 if (reg & BIT(5))
2900                         sio_data->skip_pwm |= BIT(3);
2901
2902                 /* Check for pwm3, fan3, pwm5, fan5 */
2903                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2904                 if (reg & BIT(6))
2905                         sio_data->skip_pwm |= BIT(2);
2906                 if (reg & BIT(7))
2907                         sio_data->skip_fan |= BIT(2);
2908                 if (reg & BIT(3))
2909                         sio_data->skip_pwm |= BIT(4);
2910                 if (reg & BIT(1))
2911                         sio_data->skip_fan |= BIT(4);
2912
2913                 /* Check for pwm2, fan2 */
2914                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2915                 if (reg & BIT(1))
2916                         sio_data->skip_pwm |= BIT(1);
2917                 if (reg & BIT(2))
2918                         sio_data->skip_fan |= BIT(1);
2919
2920                 /* Check for AVCC */
2921                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2922                 if (!(reg & BIT(0)))
2923                         sio_data->skip_in |= BIT(9);
2924
2925                 sio_data->beep_pin = superio_inb(sioaddr,
2926                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
2927         } else {
2928                 int reg;
2929                 bool uart6;
2930
2931                 superio_select(sioaddr, GPIO);
2932
2933                 /* Check for fan4, fan5 */
2934                 if (has_five_fans(config)) {
2935                         reg = superio_inb(sioaddr, IT87_SIO_GPIO2_REG);
2936                         switch (sio_data->type) {
2937                         case it8718:
2938                                 if (reg & BIT(5))
2939                                         sio_data->skip_fan |= BIT(3);
2940                                 if (reg & BIT(4))
2941                                         sio_data->skip_fan |= BIT(4);
2942                                 break;
2943                         case it8720:
2944                         case it8721:
2945                         case it8728:
2946                                 if (!(reg & BIT(5)))
2947                                         sio_data->skip_fan |= BIT(3);
2948                                 if (!(reg & BIT(4)))
2949                                         sio_data->skip_fan |= BIT(4);
2950                                 break;
2951                         default:
2952                                 break;
2953                         }
2954                 }
2955
2956                 reg = superio_inb(sioaddr, IT87_SIO_GPIO3_REG);
2957                 if (!sio_data->skip_vid) {
2958                         /* We need at least 4 VID pins */
2959                         if (reg & 0x0f) {
2960                                 pr_info("VID is disabled (pins used for GPIO)\n");
2961                                 sio_data->skip_vid = 1;
2962                         }
2963                 }
2964
2965                 /* Check if fan3 is there or not */
2966                 if (reg & BIT(6))
2967                         sio_data->skip_pwm |= BIT(2);
2968                 if (reg & BIT(7))
2969                         sio_data->skip_fan |= BIT(2);
2970
2971                 /* Check if fan2 is there or not */
2972                 reg = superio_inb(sioaddr, IT87_SIO_GPIO5_REG);
2973                 if (reg & BIT(1))
2974                         sio_data->skip_pwm |= BIT(1);
2975                 if (reg & BIT(2))
2976                         sio_data->skip_fan |= BIT(1);
2977
2978                 if ((sio_data->type == it8718 || sio_data->type == it8720) &&
2979                     !(sio_data->skip_vid))
2980                         sio_data->vid_value = superio_inb(sioaddr,
2981                                                           IT87_SIO_VID_REG);
2982
2983                 reg = superio_inb(sioaddr, IT87_SIO_PINX2_REG);
2984
2985                 uart6 = sio_data->type == it8782 && (reg & BIT(2));
2986
2987                 /*
2988                  * The IT8720F has no VIN7 pin, so VCCH5V should always be
2989                  * routed internally to VIN7 with an internal divider.
2990                  * Curiously, there still is a configuration bit to control
2991                  * this, which means it can be set incorrectly. And even
2992                  * more curiously, many boards out there are improperly
2993                  * configured, even though the IT8720F datasheet claims
2994                  * that the internal routing of VCCH5V to VIN7 is the default
2995                  * setting. So we force the internal routing in this case.
2996                  *
2997                  * On IT8782F, VIN7 is multiplexed with one of the UART6 pins.
2998                  * If UART6 is enabled, re-route VIN7 to the internal divider
2999                  * if that is not already the case.
3000                  */
3001                 if ((sio_data->type == it8720 || uart6) && !(reg & BIT(1))) {
3002                         reg |= BIT(1);
3003                         superio_outb(sioaddr, IT87_SIO_PINX2_REG, reg);
3004                         sio_data->need_in7_reroute = true;
3005                         pr_notice("Routing internal VCCH5V to in7\n");
3006                 }
3007                 if (reg & BIT(0))
3008                         sio_data->internal |= BIT(0);
3009                 if (reg & BIT(1))
3010                         sio_data->internal |= BIT(1);
3011
3012                 /*
3013                  * On IT8782F, UART6 pins overlap with VIN5, VIN6, and VIN7.
3014                  * While VIN7 can be routed to the internal voltage divider,
3015                  * VIN5 and VIN6 are not available if UART6 is enabled.
3016                  *
3017                  * Also, temp3 is not available if UART6 is enabled and TEMPIN3
3018                  * is the temperature source. Since we can not read the
3019                  * temperature source here, skip_temp is preliminary.
3020                  */
3021                 if (uart6) {
3022                         sio_data->skip_in |= BIT(5) | BIT(6);
3023                         sio_data->skip_temp |= BIT(2);
3024                 }
3025
3026                 sio_data->beep_pin = superio_inb(sioaddr,
3027                                                  IT87_SIO_BEEP_PIN_REG) & 0x3f;
3028         }
3029         if (sio_data->beep_pin)
3030                 pr_info("Beeping is supported\n");
3031
3032         /* Set values based on DMI matches */
3033         if (dmi_data)
3034                 sio_data->skip_pwm |= dmi_data->skip_pwm;
3035
3036         if (config->smbus_bitmap) {
3037                 u8 reg;
3038
3039                 superio_select(sioaddr, PME);
3040                 reg = superio_inb(sioaddr, IT87_SPECIAL_CFG_REG);
3041                 sio_data->ec_special_config = reg;
3042                 sio_data->smbus_bitmap = reg & config->smbus_bitmap;
3043         }
3044
3045 exit:
3046         superio_exit(sioaddr, config ? has_conf_noexit(config) : false);
3047         return err;
3048 }
3049
3050 /*
3051  * Some chips seem to have default value 0xff for all limit
3052  * registers. For low voltage limits it makes no sense and triggers
3053  * alarms, so change to 0 instead. For high temperature limits, it
3054  * means -1 degree C, which surprisingly doesn't trigger an alarm,
3055  * but is still confusing, so change to 127 degrees C.
3056  */
3057 static void it87_check_limit_regs(struct it87_data *data)
3058 {
3059         int i, reg;
3060
3061         for (i = 0; i < NUM_VIN_LIMIT; i++) {
3062                 reg = it87_read_value(data, IT87_REG_VIN_MIN(i));
3063                 if (reg == 0xff)
3064                         it87_write_value(data, IT87_REG_VIN_MIN(i), 0);
3065         }
3066         for (i = 0; i < NUM_TEMP_LIMIT; i++) {
3067                 reg = it87_read_value(data, IT87_REG_TEMP_HIGH(i));
3068                 if (reg == 0xff)
3069                         it87_write_value(data, IT87_REG_TEMP_HIGH(i), 127);
3070         }
3071 }
3072
3073 /* Check if voltage monitors are reset manually or by some reason */
3074 static void it87_check_voltage_monitors_reset(struct it87_data *data)
3075 {
3076         int reg;
3077
3078         reg = it87_read_value(data, IT87_REG_VIN_ENABLE);
3079         if ((reg & 0xff) == 0) {
3080                 /* Enable all voltage monitors */
3081                 it87_write_value(data, IT87_REG_VIN_ENABLE, 0xff);
3082         }
3083 }
3084
3085 /* Check if tachometers are reset manually or by some reason */
3086 static void it87_check_tachometers_reset(struct platform_device *pdev)
3087 {
3088         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3089         struct it87_data *data = platform_get_drvdata(pdev);
3090         u8 mask, fan_main_ctrl;
3091
3092         mask = 0x70 & ~(sio_data->skip_fan << 4);
3093         fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
3094         if ((fan_main_ctrl & mask) == 0) {
3095                 /* Enable all fan tachometers */
3096                 fan_main_ctrl |= mask;
3097                 it87_write_value(data, IT87_REG_FAN_MAIN_CTRL,
3098                                  fan_main_ctrl);
3099         }
3100 }
3101
3102 /* Set tachometers to 16-bit mode if needed */
3103 static void it87_check_tachometers_16bit_mode(struct platform_device *pdev)
3104 {
3105         struct it87_data *data = platform_get_drvdata(pdev);
3106         int reg;
3107
3108         if (!has_fan16_config(data))
3109                 return;
3110
3111         reg = it87_read_value(data, IT87_REG_FAN_16BIT);
3112         if (~reg & 0x07 & data->has_fan) {
3113                 dev_dbg(&pdev->dev,
3114                         "Setting fan1-3 to 16-bit mode\n");
3115                 it87_write_value(data, IT87_REG_FAN_16BIT,
3116                                  reg | 0x07);
3117         }
3118 }
3119
3120 static void it87_start_monitoring(struct it87_data *data)
3121 {
3122         it87_write_value(data, IT87_REG_CONFIG,
3123                          (it87_read_value(data, IT87_REG_CONFIG) & 0x3e)
3124                          | (update_vbat ? 0x41 : 0x01));
3125 }
3126
3127 /* Called when we have found a new IT87. */
3128 static void it87_init_device(struct platform_device *pdev)
3129 {
3130         struct it87_sio_data *sio_data = dev_get_platdata(&pdev->dev);
3131         struct it87_data *data = platform_get_drvdata(pdev);
3132         int tmp, i;
3133
3134         /*
3135          * For each PWM channel:
3136          * - If it is in automatic mode, setting to manual mode should set
3137          *   the fan to full speed by default.
3138          * - If it is in manual mode, we need a mapping to temperature
3139          *   channels to use when later setting to automatic mode later.
3140          *   Use a 1:1 mapping by default (we are clueless.)
3141          * In both cases, the value can (and should) be changed by the user
3142          * prior to switching to a different mode.
3143          * Note that this is no longer needed for the IT8721F and later, as
3144          * these have separate registers for the temperature mapping and the
3145          * manual duty cycle.
3146          */
3147         for (i = 0; i < NUM_AUTO_PWM; i++) {
3148                 data->pwm_temp_map[i] = i;
3149                 data->pwm_duty[i] = 0x7f;       /* Full speed */
3150                 data->auto_pwm[i][3] = 0x7f;    /* Full speed, hard-coded */
3151         }
3152
3153         it87_check_limit_regs(data);
3154
3155         /*
3156          * Temperature channels are not forcibly enabled, as they can be
3157          * set to two different sensor types and we can't guess which one
3158          * is correct for a given system. These channels can be enabled at
3159          * run-time through the temp{1-3}_type sysfs accessors if needed.
3160          */
3161
3162         it87_check_voltage_monitors_reset(data);
3163
3164         it87_check_tachometers_reset(pdev);
3165
3166         data->fan_main_ctrl = it87_read_value(data, IT87_REG_FAN_MAIN_CTRL);
3167         data->has_fan = (data->fan_main_ctrl >> 4) & 0x07;
3168
3169         it87_check_tachometers_16bit_mode(pdev);
3170
3171         /* Check for additional fans */
3172         if (has_five_fans(data)) {
3173                 tmp = it87_read_value(data, IT87_REG_FAN_16BIT);
3174
3175                 if (tmp & BIT(4))
3176                         data->has_fan |= BIT(3); /* fan4 enabled */
3177                 if (tmp & BIT(5))
3178                         data->has_fan |= BIT(4); /* fan5 enabled */
3179                 if (has_six_fans(data) && (tmp & BIT(2)))
3180                         data->has_fan |= BIT(5); /* fan6 enabled */
3181         }
3182
3183         /* Fan input pins may be used for alternative functions */
3184         data->has_fan &= ~sio_data->skip_fan;
3185
3186         /* Check if pwm5, pwm6 are enabled */
3187         if (has_six_pwm(data)) {
3188                 /* The following code may be IT8620E specific */
3189                 tmp = it87_read_value(data, IT87_REG_FAN_DIV);
3190                 if ((tmp & 0xc0) == 0xc0)
3191                         sio_data->skip_pwm |= BIT(4);
3192                 if (!(tmp & BIT(3)))
3193                         sio_data->skip_pwm |= BIT(5);
3194         }
3195
3196         it87_start_monitoring(data);
3197 }
3198
3199 /* Return 1 if and only if the PWM interface is safe to use */
3200 static int it87_check_pwm(struct device *dev)
3201 {
3202         struct it87_data *data = dev_get_drvdata(dev);
3203         /*
3204          * Some BIOSes fail to correctly configure the IT87 fans. All fans off
3205          * and polarity set to active low is sign that this is the case so we
3206          * disable pwm control to protect the user.
3207          */
3208         int tmp = it87_read_value(data, IT87_REG_FAN_CTL);
3209
3210         if ((tmp & 0x87) == 0) {
3211                 if (fix_pwm_polarity) {
3212                         /*
3213                          * The user asks us to attempt a chip reconfiguration.
3214                          * This means switching to active high polarity and
3215                          * inverting all fan speed values.
3216                          */
3217                         int i;
3218                         u8 pwm[3];
3219
3220                         for (i = 0; i < ARRAY_SIZE(pwm); i++)
3221                                 pwm[i] = it87_read_value(data,
3222                                                          IT87_REG_PWM[i]);
3223
3224                         /*
3225                          * If any fan is in automatic pwm mode, the polarity
3226                          * might be correct, as suspicious as it seems, so we
3227                          * better don't change anything (but still disable the
3228                          * PWM interface).
3229                          */
3230                         if (!((pwm[0] | pwm[1] | pwm[2]) & 0x80)) {
3231                                 dev_info(dev,
3232                                          "Reconfiguring PWM to active high polarity\n");
3233                                 it87_write_value(data, IT87_REG_FAN_CTL,
3234                                                  tmp | 0x87);
3235                                 for (i = 0; i < 3; i++)
3236                                         it87_write_value(data,
3237                                                          IT87_REG_PWM[i],
3238                                                          0x7f & ~pwm[i]);
3239                                 return 1;
3240                         }
3241
3242                         dev_info(dev,
3243                                  "PWM configuration is too broken to be fixed\n");
3244                 }
3245
3246                 return 0;
3247         } else if (fix_pwm_polarity) {
3248                 dev_info(dev,
3249                          "PWM configuration looks sane, won't touch\n");
3250         }
3251
3252         return 1;
3253 }
3254
3255 static int it87_probe(struct platform_device *pdev)
3256 {
3257         struct it87_data *data;
3258         struct resource *res;
3259         struct device *dev = &pdev->dev;
3260         struct it87_sio_data *sio_data = dev_get_platdata(dev);
3261         int enable_pwm_interface;
3262         struct device *hwmon_dev;
3263         int err;
3264
3265         res = platform_get_resource(pdev, IORESOURCE_IO, 0);
3266         if (!devm_request_region(&pdev->dev, res->start, IT87_EC_EXTENT,
3267                                  DRVNAME)) {
3268                 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
3269                         (unsigned long)res->start,
3270                         (unsigned long)(res->start + IT87_EC_EXTENT - 1));
3271                 return -EBUSY;
3272         }
3273
3274         data = devm_kzalloc(&pdev->dev, sizeof(struct it87_data), GFP_KERNEL);
3275         if (!data)
3276                 return -ENOMEM;
3277
3278         data->addr = res->start;
3279         data->sioaddr = sio_data->sioaddr;
3280         data->type = sio_data->type;
3281         data->smbus_bitmap = sio_data->smbus_bitmap;
3282         data->ec_special_config = sio_data->ec_special_config;
3283         data->features = it87_devices[sio_data->type].features;
3284         data->peci_mask = it87_devices[sio_data->type].peci_mask;
3285         data->old_peci_mask = it87_devices[sio_data->type].old_peci_mask;
3286         /*
3287          * IT8705F Datasheet 0.4.1, 3h == Version G.
3288          * IT8712F Datasheet 0.9.1, section 8.3.5 indicates 8h == Version J.
3289          * These are the first revisions with 16-bit tachometer support.
3290          */
3291         switch (data->type) {
3292         case it87:
3293                 if (sio_data->revision >= 0x03) {
3294                         data->features &= ~FEAT_OLD_AUTOPWM;
3295                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS;
3296                 }
3297                 break;
3298         case it8712:
3299                 if (sio_data->revision >= 0x08) {
3300                         data->features &= ~FEAT_OLD_AUTOPWM;
3301                         data->features |= FEAT_FAN16_CONFIG | FEAT_16BIT_FANS |
3302                                           FEAT_FIVE_FANS;
3303                 }
3304                 break;
3305         default:
3306                 break;
3307         }
3308
3309         platform_set_drvdata(pdev, data);
3310
3311         mutex_init(&data->update_lock);
3312
3313         err = smbus_disable(data);
3314         if (err)
3315                 return err;
3316
3317         /* Now, we do the remaining detection. */
3318         if ((it87_read_value(data, IT87_REG_CONFIG) & 0x80) ||
3319             it87_read_value(data, IT87_REG_CHIPID) != 0x90) {
3320                 smbus_enable(data);
3321                 return -ENODEV;
3322         }
3323
3324         /* Check PWM configuration */
3325         enable_pwm_interface = it87_check_pwm(dev);
3326         if (!enable_pwm_interface)
3327                 dev_info(dev,
3328                          "Detected broken BIOS defaults, disabling PWM interface\n");
3329
3330         /* Starting with IT8721F, we handle scaling of internal voltages */
3331         if (has_scaling(data)) {
3332                 if (sio_data->internal & BIT(0))
3333                         data->in_scaled |= BIT(3);      /* in3 is AVCC */
3334                 if (sio_data->internal & BIT(1))
3335                         data->in_scaled |= BIT(7);      /* in7 is VSB */
3336                 if (sio_data->internal & BIT(2))
3337                         data->in_scaled |= BIT(8);      /* in8 is Vbat */
3338                 if (sio_data->internal & BIT(3))
3339                         data->in_scaled |= BIT(9);      /* in9 is AVCC */
3340         } else if (sio_data->type == it8781 || sio_data->type == it8782 ||
3341                    sio_data->type == it8783) {
3342                 if (sio_data->internal & BIT(0))
3343                         data->in_scaled |= BIT(3);      /* in3 is VCC5V */
3344                 if (sio_data->internal & BIT(1))
3345                         data->in_scaled |= BIT(7);      /* in7 is VCCH5V */
3346         }
3347
3348         data->has_temp = 0x07;
3349         if (sio_data->skip_temp & BIT(2)) {
3350                 if (sio_data->type == it8782 &&
3351                     !(it87_read_value(data, IT87_REG_TEMP_EXTRA) & 0x80))
3352                         data->has_temp &= ~BIT(2);
3353         }
3354
3355         data->in_internal = sio_data->internal;
3356         data->need_in7_reroute = sio_data->need_in7_reroute;
3357         data->has_in = 0x3ff & ~sio_data->skip_in;
3358
3359         if (has_six_temp(data)) {
3360                 u8 reg = it87_read_value(data, IT87_REG_TEMP456_ENABLE);
3361
3362                 /* Check for additional temperature sensors */
3363                 if ((reg & 0x03) >= 0x02)
3364                         data->has_temp |= BIT(3);
3365                 if (((reg >> 2) & 0x03) >= 0x02)
3366                         data->has_temp |= BIT(4);
3367                 if (((reg >> 4) & 0x03) >= 0x02)
3368                         data->has_temp |= BIT(5);
3369
3370                 /* Check for additional voltage sensors */
3371                 if ((reg & 0x03) == 0x01)
3372                         data->has_in |= BIT(10);
3373                 if (((reg >> 2) & 0x03) == 0x01)
3374                         data->has_in |= BIT(11);
3375                 if (((reg >> 4) & 0x03) == 0x01)
3376                         data->has_in |= BIT(12);
3377         }
3378
3379         data->has_beep = !!sio_data->beep_pin;
3380
3381         /* Initialize the IT87 chip */
3382         it87_init_device(pdev);
3383
3384         smbus_enable(data);
3385
3386         if (!sio_data->skip_vid) {
3387                 data->has_vid = true;
3388                 data->vrm = vid_which_vrm();
3389                 /* VID reading from Super-I/O config space if available */
3390                 data->vid = sio_data->vid_value;
3391         }
3392
3393         /* Prepare for sysfs hooks */
3394         data->groups[0] = &it87_group;
3395         data->groups[1] = &it87_group_in;
3396         data->groups[2] = &it87_group_temp;
3397         data->groups[3] = &it87_group_fan;
3398
3399         if (enable_pwm_interface) {
3400                 data->has_pwm = BIT(ARRAY_SIZE(IT87_REG_PWM)) - 1;
3401                 data->has_pwm &= ~sio_data->skip_pwm;
3402
3403                 data->groups[4] = &it87_group_pwm;
3404                 if (has_old_autopwm(data) || has_newer_autopwm(data))
3405                         data->groups[5] = &it87_group_auto_pwm;
3406         }
3407
3408         hwmon_dev = devm_hwmon_device_register_with_groups(dev,
3409                                         it87_devices[sio_data->type].name,
3410                                         data, data->groups);
3411         return PTR_ERR_OR_ZERO(hwmon_dev);
3412 }
3413
3414 static void it87_resume_sio(struct platform_device *pdev)
3415 {
3416         struct it87_data *data = dev_get_drvdata(&pdev->dev);
3417         int err;
3418         int reg2c;
3419
3420         if (!data->need_in7_reroute)
3421                 return;
3422
3423         err = superio_enter(data->sioaddr);
3424         if (err) {
3425                 dev_warn(&pdev->dev,
3426                          "Unable to enter Super I/O to reroute in7 (%d)",
3427                          err);
3428                 return;
3429         }
3430
3431         superio_select(data->sioaddr, GPIO);
3432
3433         reg2c = superio_inb(data->sioaddr, IT87_SIO_PINX2_REG);
3434         if (!(reg2c & BIT(1))) {
3435                 dev_dbg(&pdev->dev,
3436                         "Routing internal VCCH5V to in7 again");
3437
3438                 reg2c |= BIT(1);
3439                 superio_outb(data->sioaddr, IT87_SIO_PINX2_REG,
3440                              reg2c);
3441         }
3442
3443         superio_exit(data->sioaddr, has_conf_noexit(data));
3444 }
3445
3446 static int it87_resume(struct device *dev)
3447 {
3448         struct platform_device *pdev = to_platform_device(dev);
3449         struct it87_data *data = dev_get_drvdata(dev);
3450
3451         it87_resume_sio(pdev);
3452
3453         it87_lock(data);
3454
3455         it87_check_pwm(dev);
3456         it87_check_limit_regs(data);
3457         it87_check_voltage_monitors_reset(data);
3458         it87_check_tachometers_reset(pdev);
3459         it87_check_tachometers_16bit_mode(pdev);
3460
3461         it87_start_monitoring(data);
3462
3463         /* force update */
3464         data->valid = false;
3465
3466         it87_unlock(data);
3467
3468         it87_update_device(dev);
3469
3470         return 0;
3471 }
3472
3473 static DEFINE_SIMPLE_DEV_PM_OPS(it87_dev_pm_ops, NULL, it87_resume);
3474
3475 static struct platform_driver it87_driver = {
3476         .driver = {
3477                 .name   = DRVNAME,
3478                 .pm     = pm_sleep_ptr(&it87_dev_pm_ops),
3479         },
3480         .probe  = it87_probe,
3481 };
3482
3483 static int __init it87_device_add(int index, unsigned short address,
3484                                   const struct it87_sio_data *sio_data)
3485 {
3486         struct platform_device *pdev;
3487         struct resource res = {
3488                 .start  = address + IT87_EC_OFFSET,
3489                 .end    = address + IT87_EC_OFFSET + IT87_EC_EXTENT - 1,
3490                 .name   = DRVNAME,
3491                 .flags  = IORESOURCE_IO,
3492         };
3493         int err;
3494
3495         err = acpi_check_resource_conflict(&res);
3496         if (err) {
3497                 if (!ignore_resource_conflict)
3498                         return err;
3499         }
3500
3501         pdev = platform_device_alloc(DRVNAME, address);
3502         if (!pdev)
3503                 return -ENOMEM;
3504
3505         err = platform_device_add_resources(pdev, &res, 1);
3506         if (err) {
3507                 pr_err("Device resource addition failed (%d)\n", err);
3508                 goto exit_device_put;
3509         }
3510
3511         err = platform_device_add_data(pdev, sio_data,
3512                                        sizeof(struct it87_sio_data));
3513         if (err) {
3514                 pr_err("Platform data allocation failed\n");
3515                 goto exit_device_put;
3516         }
3517
3518         err = platform_device_add(pdev);
3519         if (err) {
3520                 pr_err("Device addition failed (%d)\n", err);
3521                 goto exit_device_put;
3522         }
3523
3524         it87_pdev[index] = pdev;
3525         return 0;
3526
3527 exit_device_put:
3528         platform_device_put(pdev);
3529         return err;
3530 }
3531
3532 /* callback function for DMI */
3533 static int it87_dmi_cb(const struct dmi_system_id *dmi_entry)
3534 {
3535         dmi_data = dmi_entry->driver_data;
3536
3537         if (dmi_data && dmi_data->skip_pwm)
3538                 pr_info("Disabling pwm2 due to hardware constraints\n");
3539
3540         return 1;
3541 }
3542
3543 /*
3544  * On various Gigabyte AM4 boards (AB350, AX370), the second Super-IO chip
3545  * (IT8792E) needs to be in configuration mode before accessing the first
3546  * due to a bug in IT8792E which otherwise results in LPC bus access errors.
3547  * This needs to be done before accessing the first Super-IO chip since
3548  * the second chip may have been accessed prior to loading this driver.
3549  *
3550  * The problem is also reported to affect IT8795E, which is used on X299 boards
3551  * and has the same chip ID as IT8792E (0x8733). It also appears to affect
3552  * systems with IT8790E, which is used on some Z97X-Gaming boards as well as
3553  * Z87X-OC.
3554  * DMI entries for those systems will be added as they become available and
3555  * as the problem is confirmed to affect those boards.
3556  */
3557 static int it87_sio_force(const struct dmi_system_id *dmi_entry)
3558 {
3559         __superio_enter(REG_4E);
3560
3561         return it87_dmi_cb(dmi_entry);
3562 };
3563
3564 /*
3565  * On the Shuttle SN68PT, FAN_CTL2 is apparently not
3566  * connected to a fan, but to something else. One user
3567  * has reported instant system power-off when changing
3568  * the PWM2 duty cycle, so we disable it.
3569  * I use the board name string as the trigger in case
3570  * the same board is ever used in other systems.
3571  */
3572 static struct it87_dmi_data nvidia_fn68pt = {
3573         .skip_pwm = BIT(1),
3574 };
3575
3576 #define IT87_DMI_MATCH_VND(vendor, name, cb, data) \
3577         { \
3578                 .callback = cb, \
3579                 .matches = { \
3580                         DMI_EXACT_MATCH(DMI_BOARD_VENDOR, vendor), \
3581                         DMI_EXACT_MATCH(DMI_BOARD_NAME, name), \
3582                 }, \
3583                 .driver_data = data, \
3584         }
3585
3586 #define IT87_DMI_MATCH_GBT(name, cb, data) \
3587         IT87_DMI_MATCH_VND("Gigabyte Technology Co., Ltd.", name, cb, data)
3588
3589 static const struct dmi_system_id it87_dmi_table[] __initconst = {
3590         IT87_DMI_MATCH_GBT("AB350", it87_sio_force, NULL),
3591                 /* ? + IT8792E/IT8795E */
3592         IT87_DMI_MATCH_GBT("AX370", it87_sio_force, NULL),
3593                 /* ? + IT8792E/IT8795E */
3594         IT87_DMI_MATCH_GBT("Z97X-Gaming G1", it87_sio_force, NULL),
3595                 /* ? + IT8790E */
3596         IT87_DMI_MATCH_GBT("TRX40 AORUS XTREME", it87_sio_force, NULL),
3597                 /* IT8688E + IT8792E/IT8795E */
3598         IT87_DMI_MATCH_GBT("Z390 AORUS ULTRA-CF", it87_sio_force, NULL),
3599                 /* IT8688E + IT8792E/IT8795E */
3600         IT87_DMI_MATCH_GBT("B550 AORUS PRO AC", it87_sio_force, NULL),
3601                 /* IT8688E + IT8792E/IT8795E */
3602         IT87_DMI_MATCH_GBT("X570 AORUS MASTER", it87_sio_force, NULL),
3603                 /* IT8688E + IT8792E/IT8795E */
3604         IT87_DMI_MATCH_GBT("X570 AORUS PRO", it87_sio_force, NULL),
3605                 /* IT8688E + IT8792E/IT8795E */
3606         IT87_DMI_MATCH_GBT("X570 AORUS PRO WIFI", it87_sio_force, NULL),
3607                 /* IT8688E + IT8792E/IT8795E */
3608         IT87_DMI_MATCH_GBT("X570S AERO G", it87_sio_force, NULL),
3609                 /* IT8689E + IT87952E */
3610         IT87_DMI_MATCH_GBT("Z690 AORUS PRO DDR4", it87_sio_force, NULL),
3611                 /* IT8689E + IT87952E */
3612         IT87_DMI_MATCH_GBT("Z690 AORUS PRO", it87_sio_force, NULL),
3613                 /* IT8689E + IT87952E */
3614         IT87_DMI_MATCH_VND("nVIDIA", "FN68PT", it87_dmi_cb, &nvidia_fn68pt),
3615         { }
3616
3617 };
3618 MODULE_DEVICE_TABLE(dmi, it87_dmi_table);
3619
3620 static int __init sm_it87_init(void)
3621 {
3622         int sioaddr[2] = { REG_2E, REG_4E };
3623         struct it87_sio_data sio_data;
3624         unsigned short isa_address[2];
3625         bool found = false;
3626         int i, err;
3627
3628         err = platform_driver_register(&it87_driver);
3629         if (err)
3630                 return err;
3631
3632         dmi_check_system(it87_dmi_table);
3633
3634         for (i = 0; i < ARRAY_SIZE(sioaddr); i++) {
3635                 memset(&sio_data, 0, sizeof(struct it87_sio_data));
3636                 isa_address[i] = 0;
3637                 err = it87_find(sioaddr[i], &isa_address[i], &sio_data, i);
3638                 if (err || isa_address[i] == 0)
3639                         continue;
3640                 /*
3641                  * Don't register second chip if its ISA address matches
3642                  * the first chip's ISA address.
3643                  */
3644                 if (i && isa_address[i] == isa_address[0])
3645                         break;
3646
3647                 err = it87_device_add(i, isa_address[i], &sio_data);
3648                 if (err)
3649                         goto exit_dev_unregister;
3650
3651                 found = true;
3652
3653                 /*
3654                  * IT8705F may respond on both SIO addresses.
3655                  * Stop probing after finding one.
3656                  */
3657                 if (sio_data.type == it87)
3658                         break;
3659         }
3660
3661         if (!found) {
3662                 err = -ENODEV;
3663                 goto exit_unregister;
3664         }
3665         return 0;
3666
3667 exit_dev_unregister:
3668         /* NULL check handled by platform_device_unregister */
3669         platform_device_unregister(it87_pdev[0]);
3670 exit_unregister:
3671         platform_driver_unregister(&it87_driver);
3672         return err;
3673 }
3674
3675 static void __exit sm_it87_exit(void)
3676 {
3677         /* NULL check handled by platform_device_unregister */
3678         platform_device_unregister(it87_pdev[1]);
3679         platform_device_unregister(it87_pdev[0]);
3680         platform_driver_unregister(&it87_driver);
3681 }
3682
3683 MODULE_AUTHOR("Chris Gauthron, Jean Delvare <[email protected]>");
3684 MODULE_DESCRIPTION("IT8705F/IT871xF/IT872xF hardware monitoring driver");
3685
3686 module_param_array(force_id, ushort, &force_id_cnt, 0);
3687 MODULE_PARM_DESC(force_id, "Override one or more detected device ID(s)");
3688
3689 module_param(ignore_resource_conflict, bool, 0);
3690 MODULE_PARM_DESC(ignore_resource_conflict, "Ignore ACPI resource conflict");
3691
3692 module_param(update_vbat, bool, 0);
3693 MODULE_PARM_DESC(update_vbat, "Update vbat if set else return powerup value");
3694
3695 module_param(fix_pwm_polarity, bool, 0);
3696 MODULE_PARM_DESC(fix_pwm_polarity,
3697                  "Force PWM polarity to active high (DANGEROUS)");
3698
3699 MODULE_LICENSE("GPL");
3700
3701 module_init(sm_it87_init);
3702 module_exit(sm_it87_exit);