1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for 93xx46 EEPROMs
8 #include <linux/delay.h>
9 #include <linux/device.h>
10 #include <linux/gpio/consumer.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/mutex.h>
15 #include <linux/of_device.h>
16 #include <linux/of_gpio.h>
17 #include <linux/slab.h>
18 #include <linux/spi/spi.h>
19 #include <linux/nvmem-provider.h>
20 #include <linux/eeprom_93xx46.h>
23 #define OP_WRITE (OP_START | 0x1)
24 #define OP_READ (OP_START | 0x2)
25 #define ADDR_EWDS 0x00
26 #define ADDR_ERAL 0x20
27 #define ADDR_EWEN 0x30
29 struct eeprom_93xx46_devtype_data {
33 static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
34 .quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
35 EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
38 struct eeprom_93xx46_dev {
39 struct spi_device *spi;
40 struct eeprom_93xx46_platform_data *pdata;
42 struct nvmem_config nvmem_config;
43 struct nvmem_device *nvmem;
48 static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
50 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
53 static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
55 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
58 static int eeprom_93xx46_read(void *priv, unsigned int off,
59 void *val, size_t count)
61 struct eeprom_93xx46_dev *edev = priv;
65 if (unlikely(off >= edev->size))
67 if ((off + count) > edev->size)
68 count = edev->size - off;
72 mutex_lock(&edev->lock);
74 if (edev->pdata->prepare)
75 edev->pdata->prepare(edev);
79 struct spi_transfer t[2] = { { 0 } };
80 u16 cmd_addr = OP_READ << edev->addrlen;
81 size_t nbytes = count;
84 if (edev->addrlen == 7) {
85 cmd_addr |= off & 0x7f;
87 if (has_quirk_single_word_read(edev))
90 cmd_addr |= (off >> 1) & 0x3f;
92 if (has_quirk_single_word_read(edev))
96 dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
97 cmd_addr, edev->spi->max_speed_hz);
101 t[0].tx_buf = (char *)&cmd_addr;
103 t[0].bits_per_word = bits;
104 spi_message_add_tail(&t[0], &m);
108 t[1].bits_per_word = 8;
109 spi_message_add_tail(&t[1], &m);
111 err = spi_sync(edev->spi, &m);
112 /* have to wait at least Tcsl ns */
116 dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
117 nbytes, (int)off, err);
126 if (edev->pdata->finish)
127 edev->pdata->finish(edev);
129 mutex_unlock(&edev->lock);
134 static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
136 struct spi_message m;
137 struct spi_transfer t;
141 cmd_addr = OP_START << edev->addrlen;
142 if (edev->addrlen == 7) {
143 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
146 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
150 if (has_quirk_instruction_length(edev)) {
155 dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
156 is_on ? "en" : "ds", cmd_addr, bits);
158 spi_message_init(&m);
159 memset(&t, 0, sizeof(t));
161 t.tx_buf = &cmd_addr;
163 t.bits_per_word = bits;
164 spi_message_add_tail(&t, &m);
166 mutex_lock(&edev->lock);
168 if (edev->pdata->prepare)
169 edev->pdata->prepare(edev);
171 ret = spi_sync(edev->spi, &m);
172 /* have to wait at least Tcsl ns */
175 dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
176 is_on ? "en" : "dis", ret);
178 if (edev->pdata->finish)
179 edev->pdata->finish(edev);
181 mutex_unlock(&edev->lock);
186 eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
187 const char *buf, unsigned off)
189 struct spi_message m;
190 struct spi_transfer t[2];
191 int bits, data_len, ret;
194 cmd_addr = OP_WRITE << edev->addrlen;
196 if (edev->addrlen == 7) {
197 cmd_addr |= off & 0x7f;
201 cmd_addr |= (off >> 1) & 0x3f;
206 dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
208 spi_message_init(&m);
209 memset(t, 0, sizeof(t));
211 t[0].tx_buf = (char *)&cmd_addr;
213 t[0].bits_per_word = bits;
214 spi_message_add_tail(&t[0], &m);
218 t[1].bits_per_word = 8;
219 spi_message_add_tail(&t[1], &m);
221 ret = spi_sync(edev->spi, &m);
222 /* have to wait program cycle time Twc ms */
227 static int eeprom_93xx46_write(void *priv, unsigned int off,
228 void *val, size_t count)
230 struct eeprom_93xx46_dev *edev = priv;
232 int i, ret, step = 1;
234 if (unlikely(off >= edev->size))
236 if ((off + count) > edev->size)
237 count = edev->size - off;
238 if (unlikely(!count))
241 /* only write even number of bytes on 16-bit devices */
242 if (edev->addrlen == 6) {
247 /* erase/write enable */
248 ret = eeprom_93xx46_ew(edev, 1);
252 mutex_lock(&edev->lock);
254 if (edev->pdata->prepare)
255 edev->pdata->prepare(edev);
257 for (i = 0; i < count; i += step) {
258 ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
260 dev_err(&edev->spi->dev, "write failed at %d: %d\n",
266 if (edev->pdata->finish)
267 edev->pdata->finish(edev);
269 mutex_unlock(&edev->lock);
271 /* erase/write disable */
272 eeprom_93xx46_ew(edev, 0);
276 static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
278 struct eeprom_93xx46_platform_data *pd = edev->pdata;
279 struct spi_message m;
280 struct spi_transfer t;
284 cmd_addr = OP_START << edev->addrlen;
285 if (edev->addrlen == 7) {
286 cmd_addr |= ADDR_ERAL << 1;
289 cmd_addr |= ADDR_ERAL;
293 if (has_quirk_instruction_length(edev)) {
298 dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
300 spi_message_init(&m);
301 memset(&t, 0, sizeof(t));
303 t.tx_buf = &cmd_addr;
305 t.bits_per_word = bits;
306 spi_message_add_tail(&t, &m);
308 mutex_lock(&edev->lock);
310 if (edev->pdata->prepare)
311 edev->pdata->prepare(edev);
313 ret = spi_sync(edev->spi, &m);
315 dev_err(&edev->spi->dev, "erase error %d\n", ret);
316 /* have to wait erase cycle time Tec ms */
322 mutex_unlock(&edev->lock);
326 static ssize_t eeprom_93xx46_store_erase(struct device *dev,
327 struct device_attribute *attr,
328 const char *buf, size_t count)
330 struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
333 sscanf(buf, "%d", &erase);
335 ret = eeprom_93xx46_ew(edev, 1);
338 ret = eeprom_93xx46_eral(edev);
341 ret = eeprom_93xx46_ew(edev, 0);
347 static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
349 static void select_assert(void *context)
351 struct eeprom_93xx46_dev *edev = context;
353 gpiod_set_value_cansleep(edev->pdata->select, 1);
356 static void select_deassert(void *context)
358 struct eeprom_93xx46_dev *edev = context;
360 gpiod_set_value_cansleep(edev->pdata->select, 0);
363 static const struct of_device_id eeprom_93xx46_of_table[] = {
364 { .compatible = "eeprom-93xx46", },
365 { .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
368 MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
370 static int eeprom_93xx46_probe_dt(struct spi_device *spi)
372 const struct of_device_id *of_id =
373 of_match_device(eeprom_93xx46_of_table, &spi->dev);
374 struct device_node *np = spi->dev.of_node;
375 struct eeprom_93xx46_platform_data *pd;
379 pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
383 ret = of_property_read_u32(np, "data-size", &tmp);
385 dev_err(&spi->dev, "data-size property not found\n");
390 pd->flags |= EE_ADDR8;
391 } else if (tmp == 16) {
392 pd->flags |= EE_ADDR16;
394 dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
398 if (of_property_read_bool(np, "read-only"))
399 pd->flags |= EE_READONLY;
401 pd->select = devm_gpiod_get_optional(&spi->dev, "select",
403 if (IS_ERR(pd->select))
404 return PTR_ERR(pd->select);
406 pd->prepare = select_assert;
407 pd->finish = select_deassert;
408 gpiod_direction_output(pd->select, 0);
411 const struct eeprom_93xx46_devtype_data *data = of_id->data;
413 pd->quirks = data->quirks;
416 spi->dev.platform_data = pd;
421 static int eeprom_93xx46_probe(struct spi_device *spi)
423 struct eeprom_93xx46_platform_data *pd;
424 struct eeprom_93xx46_dev *edev;
427 if (spi->dev.of_node) {
428 err = eeprom_93xx46_probe_dt(spi);
433 pd = spi->dev.platform_data;
435 dev_err(&spi->dev, "missing platform data\n");
439 edev = devm_kzalloc(&spi->dev, sizeof(*edev), GFP_KERNEL);
443 if (pd->flags & EE_ADDR8)
445 else if (pd->flags & EE_ADDR16)
448 dev_err(&spi->dev, "unspecified address type\n");
452 mutex_init(&edev->lock);
458 edev->nvmem_config.name = dev_name(&spi->dev);
459 edev->nvmem_config.dev = &spi->dev;
460 edev->nvmem_config.read_only = pd->flags & EE_READONLY;
461 edev->nvmem_config.root_only = true;
462 edev->nvmem_config.owner = THIS_MODULE;
463 edev->nvmem_config.compat = true;
464 edev->nvmem_config.base_dev = &spi->dev;
465 edev->nvmem_config.reg_read = eeprom_93xx46_read;
466 edev->nvmem_config.reg_write = eeprom_93xx46_write;
467 edev->nvmem_config.priv = edev;
468 edev->nvmem_config.stride = 4;
469 edev->nvmem_config.word_size = 1;
470 edev->nvmem_config.size = edev->size;
472 edev->nvmem = devm_nvmem_register(&spi->dev, &edev->nvmem_config);
473 if (IS_ERR(edev->nvmem))
474 return PTR_ERR(edev->nvmem);
476 dev_info(&spi->dev, "%d-bit eeprom %s\n",
477 (pd->flags & EE_ADDR8) ? 8 : 16,
478 (pd->flags & EE_READONLY) ? "(readonly)" : "");
480 if (!(pd->flags & EE_READONLY)) {
481 if (device_create_file(&spi->dev, &dev_attr_erase))
482 dev_err(&spi->dev, "can't create erase interface\n");
485 spi_set_drvdata(spi, edev);
489 static int eeprom_93xx46_remove(struct spi_device *spi)
491 struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
493 if (!(edev->pdata->flags & EE_READONLY))
494 device_remove_file(&spi->dev, &dev_attr_erase);
499 static struct spi_driver eeprom_93xx46_driver = {
502 .of_match_table = of_match_ptr(eeprom_93xx46_of_table),
504 .probe = eeprom_93xx46_probe,
505 .remove = eeprom_93xx46_remove,
508 module_spi_driver(eeprom_93xx46_driver);
510 MODULE_LICENSE("GPL");
511 MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
513 MODULE_ALIAS("spi:93xx46");