1 // SPDX-License-Identifier: GPL-2.0
3 * JZ47xx SoCs TCU IRQ driver
7 #include <linux/bitops.h>
9 #include <linux/clockchips.h>
10 #include <linux/clocksource.h>
11 #include <linux/interrupt.h>
12 #include <linux/mfd/ingenic-tcu.h>
13 #include <linux/mfd/syscon.h>
15 #include <linux/of_address.h>
16 #include <linux/of_irq.h>
17 #include <linux/of_platform.h>
18 #include <linux/platform_device.h>
19 #include <linux/regmap.h>
20 #include <linux/sched_clock.h>
22 #include <dt-bindings/clock/ingenic,tcu.h>
24 struct ingenic_soc_info {
25 unsigned int num_channels;
30 struct clk *timer_clk, *cs_clk;
31 unsigned int timer_channel, cs_channel;
32 struct clock_event_device cevt;
33 struct clocksource cs;
35 unsigned long pwm_channels_mask;
38 static struct ingenic_tcu *ingenic_tcu;
40 static u64 notrace ingenic_tcu_timer_read(void)
42 struct ingenic_tcu *tcu = ingenic_tcu;
45 regmap_read(tcu->map, TCU_REG_TCNTc(tcu->cs_channel), &count);
50 static u64 notrace ingenic_tcu_timer_cs_read(struct clocksource *cs)
52 return ingenic_tcu_timer_read();
55 static inline struct ingenic_tcu *to_ingenic_tcu(struct clock_event_device *evt)
57 return container_of(evt, struct ingenic_tcu, cevt);
60 static int ingenic_tcu_cevt_set_state_shutdown(struct clock_event_device *evt)
62 struct ingenic_tcu *tcu = to_ingenic_tcu(evt);
64 regmap_write(tcu->map, TCU_REG_TECR, BIT(tcu->timer_channel));
69 static int ingenic_tcu_cevt_set_next(unsigned long next,
70 struct clock_event_device *evt)
72 struct ingenic_tcu *tcu = to_ingenic_tcu(evt);
77 regmap_write(tcu->map, TCU_REG_TDFRc(tcu->timer_channel), next);
78 regmap_write(tcu->map, TCU_REG_TCNTc(tcu->timer_channel), 0);
79 regmap_write(tcu->map, TCU_REG_TESR, BIT(tcu->timer_channel));
84 static irqreturn_t ingenic_tcu_cevt_cb(int irq, void *dev_id)
86 struct clock_event_device *evt = dev_id;
87 struct ingenic_tcu *tcu = to_ingenic_tcu(evt);
89 regmap_write(tcu->map, TCU_REG_TECR, BIT(tcu->timer_channel));
91 if (evt->event_handler)
92 evt->event_handler(evt);
97 static struct clk * __init ingenic_tcu_get_clock(struct device_node *np, int id)
99 struct of_phandle_args args;
105 return of_clk_get_from_provider(&args);
108 static int __init ingenic_tcu_timer_init(struct device_node *np,
109 struct ingenic_tcu *tcu)
111 unsigned int timer_virq, channel = tcu->timer_channel;
112 struct irq_domain *domain;
116 tcu->timer_clk = ingenic_tcu_get_clock(np, channel);
117 if (IS_ERR(tcu->timer_clk))
118 return PTR_ERR(tcu->timer_clk);
120 err = clk_prepare_enable(tcu->timer_clk);
124 rate = clk_get_rate(tcu->timer_clk);
127 goto err_clk_disable;
130 domain = irq_find_host(np);
133 goto err_clk_disable;
136 timer_virq = irq_create_mapping(domain, channel);
139 goto err_clk_disable;
142 snprintf(tcu->name, sizeof(tcu->name), "TCU");
144 err = request_irq(timer_virq, ingenic_tcu_cevt_cb, IRQF_TIMER,
145 tcu->name, &tcu->cevt);
147 goto err_irq_dispose_mapping;
149 tcu->cevt.cpumask = cpumask_of(smp_processor_id());
150 tcu->cevt.features = CLOCK_EVT_FEAT_ONESHOT;
151 tcu->cevt.name = tcu->name;
152 tcu->cevt.rating = 200;
153 tcu->cevt.set_state_shutdown = ingenic_tcu_cevt_set_state_shutdown;
154 tcu->cevt.set_next_event = ingenic_tcu_cevt_set_next;
156 clockevents_config_and_register(&tcu->cevt, rate, 10, 0xffff);
160 err_irq_dispose_mapping:
161 irq_dispose_mapping(timer_virq);
163 clk_disable_unprepare(tcu->timer_clk);
165 clk_put(tcu->timer_clk);
169 static int __init ingenic_tcu_clocksource_init(struct device_node *np,
170 struct ingenic_tcu *tcu)
172 unsigned int channel = tcu->cs_channel;
173 struct clocksource *cs = &tcu->cs;
177 tcu->cs_clk = ingenic_tcu_get_clock(np, channel);
178 if (IS_ERR(tcu->cs_clk))
179 return PTR_ERR(tcu->cs_clk);
181 err = clk_prepare_enable(tcu->cs_clk);
185 rate = clk_get_rate(tcu->cs_clk);
188 goto err_clk_disable;
192 regmap_update_bits(tcu->map, TCU_REG_TCSRc(channel),
193 0xffff & ~TCU_TCSR_RESERVED_BITS, 0);
196 regmap_write(tcu->map, TCU_REG_TDFRc(channel), 0xffff);
197 regmap_write(tcu->map, TCU_REG_TCNTc(channel), 0);
200 regmap_write(tcu->map, TCU_REG_TESR, BIT(channel));
202 cs->name = "ingenic-timer";
204 cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
205 cs->mask = CLOCKSOURCE_MASK(16);
206 cs->read = ingenic_tcu_timer_cs_read;
208 err = clocksource_register_hz(cs, rate);
210 goto err_clk_disable;
215 clk_disable_unprepare(tcu->cs_clk);
217 clk_put(tcu->cs_clk);
221 static const struct ingenic_soc_info jz4740_soc_info = {
225 static const struct ingenic_soc_info jz4725b_soc_info = {
229 static const struct of_device_id ingenic_tcu_of_match[] = {
230 { .compatible = "ingenic,jz4740-tcu", .data = &jz4740_soc_info, },
231 { .compatible = "ingenic,jz4725b-tcu", .data = &jz4725b_soc_info, },
232 { .compatible = "ingenic,jz4770-tcu", .data = &jz4740_soc_info, },
233 { .compatible = "ingenic,x1000-tcu", .data = &jz4740_soc_info, },
237 static int __init ingenic_tcu_init(struct device_node *np)
239 const struct of_device_id *id = of_match_node(ingenic_tcu_of_match, np);
240 const struct ingenic_soc_info *soc_info = id->data;
241 struct ingenic_tcu *tcu;
246 of_node_clear_flag(np, OF_POPULATED);
248 map = device_node_to_regmap(np);
252 tcu = kzalloc(sizeof(*tcu), GFP_KERNEL);
256 /* Enable all TCU channels for PWM use by default except channels 0/1 */
257 tcu->pwm_channels_mask = GENMASK(soc_info->num_channels - 1, 2);
258 of_property_read_u32(np, "ingenic,pwm-channels-mask",
259 (u32 *)&tcu->pwm_channels_mask);
261 /* Verify that we have at least two free channels */
262 if (hweight8(tcu->pwm_channels_mask) > soc_info->num_channels - 2) {
263 pr_crit("%s: Invalid PWM channel mask: 0x%02lx\n", __func__,
264 tcu->pwm_channels_mask);
266 goto err_free_ingenic_tcu;
272 tcu->timer_channel = find_first_zero_bit(&tcu->pwm_channels_mask,
273 soc_info->num_channels);
274 tcu->cs_channel = find_next_zero_bit(&tcu->pwm_channels_mask,
275 soc_info->num_channels,
276 tcu->timer_channel + 1);
278 ret = ingenic_tcu_clocksource_init(np, tcu);
280 pr_crit("%s: Unable to init clocksource: %d\n", __func__, ret);
281 goto err_free_ingenic_tcu;
284 ret = ingenic_tcu_timer_init(np, tcu);
286 goto err_tcu_clocksource_cleanup;
288 /* Register the sched_clock at the end as there's no way to undo it */
289 rate = clk_get_rate(tcu->cs_clk);
290 sched_clock_register(ingenic_tcu_timer_read, 16, rate);
294 err_tcu_clocksource_cleanup:
295 clocksource_unregister(&tcu->cs);
296 clk_disable_unprepare(tcu->cs_clk);
297 clk_put(tcu->cs_clk);
298 err_free_ingenic_tcu:
303 TIMER_OF_DECLARE(jz4740_tcu_intc, "ingenic,jz4740-tcu", ingenic_tcu_init);
304 TIMER_OF_DECLARE(jz4725b_tcu_intc, "ingenic,jz4725b-tcu", ingenic_tcu_init);
305 TIMER_OF_DECLARE(jz4770_tcu_intc, "ingenic,jz4770-tcu", ingenic_tcu_init);
306 TIMER_OF_DECLARE(x1000_tcu_intc, "ingenic,x1000-tcu", ingenic_tcu_init);
308 static int __init ingenic_tcu_probe(struct platform_device *pdev)
310 platform_set_drvdata(pdev, ingenic_tcu);
315 static int __maybe_unused ingenic_tcu_suspend(struct device *dev)
317 struct ingenic_tcu *tcu = dev_get_drvdata(dev);
319 clk_disable(tcu->cs_clk);
320 clk_disable(tcu->timer_clk);
324 static int __maybe_unused ingenic_tcu_resume(struct device *dev)
326 struct ingenic_tcu *tcu = dev_get_drvdata(dev);
329 ret = clk_enable(tcu->timer_clk);
333 ret = clk_enable(tcu->cs_clk);
335 clk_disable(tcu->timer_clk);
342 static const struct dev_pm_ops __maybe_unused ingenic_tcu_pm_ops = {
343 /* _noirq: We want the TCU clocks to be gated last / ungated first */
344 .suspend_noirq = ingenic_tcu_suspend,
345 .resume_noirq = ingenic_tcu_resume,
348 static struct platform_driver ingenic_tcu_driver = {
350 .name = "ingenic-tcu-timer",
351 #ifdef CONFIG_PM_SLEEP
352 .pm = &ingenic_tcu_pm_ops,
354 .of_match_table = ingenic_tcu_of_match,
357 builtin_platform_driver_probe(ingenic_tcu_driver, ingenic_tcu_probe);