drivers/usb/dwc3/dwc3-of-simple.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /**
   3  * dwc3-of-simple.c - OF glue layer for simple integrations
   4  *
   5  * Copyright (c) 2015 Texas Instruments Incorporated - http://www.ti.com
   6  *
   7  * Author: Felipe Balbi <[email protected]>
   8  *
   9  * This is a combination of the old dwc3-qcom.c by Ivan T. Ivanov
  10  * <[email protected]> and the original patch adding support for Xilinx' SoC
  11  * by Subbaraya Sundeep Bhatta <[email protected]>
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/kernel.h>
  16 #include <linux/slab.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/dma-mapping.h>
  19 #include <linux/clk.h>
  20 #include <linux/of.h>
  21 #include <linux/of_platform.h>
  22 #include <linux/pm_runtime.h>
  23 #include <linux/reset.h>
  24
  25 struct dwc3_of_simple {
  26         struct device           *dev;
  27         struct clk              **clks;
  28         int                     num_clocks;
  29         struct reset_control    *resets;
  30         bool                    pulse_resets;
  31         bool                    need_reset;
  32 };
  33
  34 static int dwc3_of_simple_clk_init(struct dwc3_of_simple *simple, int count)
  35 {
  36         struct device           *dev = simple->dev;
  37         struct device_node      *np = dev->of_node;
  38         int                     i;
  39
  40         simple->num_clocks = count;
  41
  42         if (!count)
  43                 return 0;
  44
  45         simple->clks = devm_kcalloc(dev, simple->num_clocks,
  46                         sizeof(struct clk *), GFP_KERNEL);
  47         if (!simple->clks)
  48                 return -ENOMEM;
  49
  50         for (i = 0; i < simple->num_clocks; i++) {
  51                 struct clk      *clk;
  52                 int             ret;
  53
  54                 clk = of_clk_get(np, i);
  55                 if (IS_ERR(clk)) {
  56                         while (--i >= 0) {
  57                                 clk_disable_unprepare(simple->clks[i]);
  58                                 clk_put(simple->clks[i]);
  59                         }
  60                         return PTR_ERR(clk);
  61                 }
  62
  63                 ret = clk_prepare_enable(clk);
  64                 if (ret < 0) {
  65                         while (--i >= 0) {
  66                                 clk_disable_unprepare(simple->clks[i]);
  67                                 clk_put(simple->clks[i]);
  68                         }
  69                         clk_put(clk);
  70
  71                         return ret;
  72                 }
  73
  74                 simple->clks[i] = clk;
  75         }
  76
  77         return 0;
  78 }
  79
  80 static int dwc3_of_simple_probe(struct platform_device *pdev)
  81 {
  82         struct dwc3_of_simple   *simple;
  83         struct device           *dev = &pdev->dev;
  84         struct device_node      *np = dev->of_node;
  85
  86         int                     ret;
  87         int                     i;
  88         bool                    shared_resets = false;
  89
  90         simple = devm_kzalloc(dev, sizeof(*simple), GFP_KERNEL);
  91         if (!simple)
  92                 return -ENOMEM;
  93
  94         platform_set_drvdata(pdev, simple);
  95         simple->dev = dev;
  96
  97         /*
  98          * Some controllers need to toggle the usb3-otg reset before trying to
  99          * initialize the PHY, otherwise the PHY times out.
 100          */
 101         if (of_device_is_compatible(np, "rockchip,rk3399-dwc3"))
 102                 simple->need_reset = true;
 103
 104         if (of_device_is_compatible(np, "amlogic,meson-axg-dwc3") ||
 105             of_device_is_compatible(np, "amlogic,meson-gxl-dwc3")) {
 106                 shared_resets = true;
 107                 simple->pulse_resets = true;
 108         }
 109
 110         simple->resets = of_reset_control_array_get(np, shared_resets, true);
 111         if (IS_ERR(simple->resets)) {
 112                 ret = PTR_ERR(simple->resets);
 113                 dev_err(dev, "failed to get device resets, err=%d\n", ret);
 114                 return ret;
 115         }
 116
 117         if (simple->pulse_resets) {
 118                 ret = reset_control_reset(simple->resets);
 119                 if (ret)
 120                         goto err_resetc_put;
 121         } else {
 122                 ret = reset_control_deassert(simple->resets);
 123                 if (ret)
 124                         goto err_resetc_put;
 125         }
 126
 127         ret = dwc3_of_simple_clk_init(simple, of_count_phandle_with_args(np,
 128                                                 "clocks", "#clock-cells"));
 129         if (ret)
 130                 goto err_resetc_assert;
 131
 132         ret = of_platform_populate(np, NULL, NULL, dev);
 133         if (ret) {
 134                 for (i = 0; i < simple->num_clocks; i++) {
 135                         clk_disable_unprepare(simple->clks[i]);
 136                         clk_put(simple->clks[i]);
 137                 }
 138
 139                 goto err_resetc_assert;
 140         }
 141
 142         pm_runtime_set_active(dev);
 143         pm_runtime_enable(dev);
 144         pm_runtime_get_sync(dev);
 145
 146         return 0;
 147
 148 err_resetc_assert:
 149         if (!simple->pulse_resets)
 150                 reset_control_assert(simple->resets);
 151
 152 err_resetc_put:
 153         reset_control_put(simple->resets);
 154         return ret;
 155 }
 156
 157 static int dwc3_of_simple_remove(struct platform_device *pdev)
 158 {
 159         struct dwc3_of_simple   *simple = platform_get_drvdata(pdev);
 160         struct device           *dev = &pdev->dev;
 161         int                     i;
 162
 163         of_platform_depopulate(dev);
 164
 165         for (i = 0; i < simple->num_clocks; i++) {
 166                 clk_disable_unprepare(simple->clks[i]);
 167                 clk_put(simple->clks[i]);
 168         }
 169         simple->num_clocks = 0;
 170
 171         if (!simple->pulse_resets)
 172                 reset_control_assert(simple->resets);
 173
 174         reset_control_put(simple->resets);
 175
 176         pm_runtime_disable(dev);
 177         pm_runtime_put_noidle(dev);
 178         pm_runtime_set_suspended(dev);
 179
 180         return 0;
 181 }
 182
 183 static int __maybe_unused dwc3_of_simple_runtime_suspend(struct device *dev)
 184 {
 185         struct dwc3_of_simple   *simple = dev_get_drvdata(dev);
 186         int                     i;
 187
 188         for (i = 0; i < simple->num_clocks; i++)
 189                 clk_disable(simple->clks[i]);
 190
 191         return 0;
 192 }
 193
 194 static int __maybe_unused dwc3_of_simple_runtime_resume(struct device *dev)
 195 {
 196         struct dwc3_of_simple   *simple = dev_get_drvdata(dev);
 197         int                     ret;
 198         int                     i;
 199
 200         for (i = 0; i < simple->num_clocks; i++) {
 201                 ret = clk_enable(simple->clks[i]);
 202                 if (ret < 0) {
 203                         while (--i >= 0)
 204                                 clk_disable(simple->clks[i]);
 205                         return ret;
 206                 }
 207         }
 208
 209         return 0;
 210 }
 211
 212 static int __maybe_unused dwc3_of_simple_suspend(struct device *dev)
 213 {
 214         struct dwc3_of_simple *simple = dev_get_drvdata(dev);
 215
 216         if (simple->need_reset)
 217                 reset_control_assert(simple->resets);
 218
 219         return 0;
 220 }
 221
 222 static int __maybe_unused dwc3_of_simple_resume(struct device *dev)
 223 {
 224         struct dwc3_of_simple *simple = dev_get_drvdata(dev);
 225
 226         if (simple->need_reset)
 227                 reset_control_deassert(simple->resets);
 228
 229         return 0;
 230 }
 231
 232 static const struct dev_pm_ops dwc3_of_simple_dev_pm_ops = {
 233         SET_SYSTEM_SLEEP_PM_OPS(dwc3_of_simple_suspend, dwc3_of_simple_resume)
 234         SET_RUNTIME_PM_OPS(dwc3_of_simple_runtime_suspend,
 235                         dwc3_of_simple_runtime_resume, NULL)
 236 };
 237
 238 static const struct of_device_id of_dwc3_simple_match[] = {
 239         { .compatible = "rockchip,rk3399-dwc3" },
 240         { .compatible = "xlnx,zynqmp-dwc3" },
 241         { .compatible = "cavium,octeon-7130-usb-uctl" },
 242         { .compatible = "sprd,sc9860-dwc3" },
 243         { .compatible = "amlogic,meson-axg-dwc3" },
 244         { .compatible = "amlogic,meson-gxl-dwc3" },
 245         { .compatible = "allwinner,sun50i-h6-dwc3" },
 246         { /* Sentinel */ }
 247 };
 248 MODULE_DEVICE_TABLE(of, of_dwc3_simple_match);
 249
 250 static struct platform_driver dwc3_of_simple_driver = {
 251         .probe          = dwc3_of_simple_probe,
 252         .remove         = dwc3_of_simple_remove,
 253         .driver         = {
 254                 .name   = "dwc3-of-simple",
 255                 .of_match_table = of_dwc3_simple_match,
 256                 .pm     = &dwc3_of_simple_dev_pm_ops,
 257         },
 258 };
 259
 260 module_platform_driver(dwc3_of_simple_driver);
 261 MODULE_LICENSE("GPL v2");
 262 MODULE_DESCRIPTION("DesignWare USB3 OF Simple Glue Layer");
 263 MODULE_AUTHOR("Felipe Balbi <[email protected]>");