1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2023 Code Construct
9 #include <linux/i3c/master.h>
10 #include <linux/reset.h>
11 #include <linux/types.h>
13 #define DW_I3C_MAX_DEVS 32
15 struct dw_i3c_master_caps {
20 struct dw_i3c_master {
21 struct i3c_master_controller base;
26 struct list_head list;
27 struct dw_i3c_xfer *cur;
30 struct dw_i3c_master_caps caps;
32 struct reset_control *core_rst;
36 u8 addrs[DW_I3C_MAX_DEVS];
38 /* platform-specific data */
39 const struct dw_i3c_platform_ops *platform_ops;
42 struct dw_i3c_platform_ops {
44 * Called on early bus init: the i3c has been set up, but before any
45 * transactions have taken place. Platform implementations may use to
46 * perform actual device enabling with the i3c core ready.
48 int (*init)(struct dw_i3c_master *i3c);
51 extern int dw_i3c_common_probe(struct dw_i3c_master *master,
52 struct platform_device *pdev);
53 extern void dw_i3c_common_remove(struct dw_i3c_master *master);