1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012,2013 - ARM Ltd
6 * Derived from arch/arm/kvm/guest.c:
7 * Copyright (C) 2012 - Virtual Open Systems and Columbia University
11 #include <linux/bits.h>
12 #include <linux/errno.h>
13 #include <linux/err.h>
14 #include <linux/nospec.h>
15 #include <linux/kvm_host.h>
16 #include <linux/module.h>
17 #include <linux/stddef.h>
18 #include <linux/string.h>
19 #include <linux/vmalloc.h>
21 #include <kvm/arm_hypercalls.h>
22 #include <asm/cputype.h>
23 #include <linux/uaccess.h>
24 #include <asm/fpsimd.h>
26 #include <asm/kvm_emulate.h>
27 #include <asm/sigcontext.h>
31 const struct _kvm_stats_desc kvm_vm_stats_desc[] = {
32 KVM_GENERIC_VM_STATS()
35 const struct kvm_stats_header kvm_vm_stats_header = {
36 .name_size = KVM_STATS_NAME_SIZE,
37 .num_desc = ARRAY_SIZE(kvm_vm_stats_desc),
38 .id_offset = sizeof(struct kvm_stats_header),
39 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
40 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
41 sizeof(kvm_vm_stats_desc),
44 const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
45 KVM_GENERIC_VCPU_STATS(),
46 STATS_DESC_COUNTER(VCPU, hvc_exit_stat),
47 STATS_DESC_COUNTER(VCPU, wfe_exit_stat),
48 STATS_DESC_COUNTER(VCPU, wfi_exit_stat),
49 STATS_DESC_COUNTER(VCPU, mmio_exit_user),
50 STATS_DESC_COUNTER(VCPU, mmio_exit_kernel),
51 STATS_DESC_COUNTER(VCPU, signal_exits),
52 STATS_DESC_COUNTER(VCPU, exits)
55 const struct kvm_stats_header kvm_vcpu_stats_header = {
56 .name_size = KVM_STATS_NAME_SIZE,
57 .num_desc = ARRAY_SIZE(kvm_vcpu_stats_desc),
58 .id_offset = sizeof(struct kvm_stats_header),
59 .desc_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE,
60 .data_offset = sizeof(struct kvm_stats_header) + KVM_STATS_NAME_SIZE +
61 sizeof(kvm_vcpu_stats_desc),
64 static bool core_reg_offset_is_vreg(u64 off)
66 return off >= KVM_REG_ARM_CORE_REG(fp_regs.vregs) &&
67 off < KVM_REG_ARM_CORE_REG(fp_regs.fpsr);
70 static u64 core_reg_offset_from_id(u64 id)
72 return id & ~(KVM_REG_ARCH_MASK | KVM_REG_SIZE_MASK | KVM_REG_ARM_CORE);
75 static int core_reg_size_from_offset(const struct kvm_vcpu *vcpu, u64 off)
80 case KVM_REG_ARM_CORE_REG(regs.regs[0]) ...
81 KVM_REG_ARM_CORE_REG(regs.regs[30]):
82 case KVM_REG_ARM_CORE_REG(regs.sp):
83 case KVM_REG_ARM_CORE_REG(regs.pc):
84 case KVM_REG_ARM_CORE_REG(regs.pstate):
85 case KVM_REG_ARM_CORE_REG(sp_el1):
86 case KVM_REG_ARM_CORE_REG(elr_el1):
87 case KVM_REG_ARM_CORE_REG(spsr[0]) ...
88 KVM_REG_ARM_CORE_REG(spsr[KVM_NR_SPSR - 1]):
92 case KVM_REG_ARM_CORE_REG(fp_regs.vregs[0]) ...
93 KVM_REG_ARM_CORE_REG(fp_regs.vregs[31]):
94 size = sizeof(__uint128_t);
97 case KVM_REG_ARM_CORE_REG(fp_regs.fpsr):
98 case KVM_REG_ARM_CORE_REG(fp_regs.fpcr):
106 if (!IS_ALIGNED(off, size / sizeof(__u32)))
110 * The KVM_REG_ARM64_SVE regs must be used instead of
111 * KVM_REG_ARM_CORE for accessing the FPSIMD V-registers on
114 if (vcpu_has_sve(vcpu) && core_reg_offset_is_vreg(off))
120 static void *core_reg_addr(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
122 u64 off = core_reg_offset_from_id(reg->id);
123 int size = core_reg_size_from_offset(vcpu, off);
128 if (KVM_REG_SIZE(reg->id) != size)
132 case KVM_REG_ARM_CORE_REG(regs.regs[0]) ...
133 KVM_REG_ARM_CORE_REG(regs.regs[30]):
134 off -= KVM_REG_ARM_CORE_REG(regs.regs[0]);
136 return &vcpu->arch.ctxt.regs.regs[off];
138 case KVM_REG_ARM_CORE_REG(regs.sp):
139 return &vcpu->arch.ctxt.regs.sp;
141 case KVM_REG_ARM_CORE_REG(regs.pc):
142 return &vcpu->arch.ctxt.regs.pc;
144 case KVM_REG_ARM_CORE_REG(regs.pstate):
145 return &vcpu->arch.ctxt.regs.pstate;
147 case KVM_REG_ARM_CORE_REG(sp_el1):
148 return __ctxt_sys_reg(&vcpu->arch.ctxt, SP_EL1);
150 case KVM_REG_ARM_CORE_REG(elr_el1):
151 return __ctxt_sys_reg(&vcpu->arch.ctxt, ELR_EL1);
153 case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_EL1]):
154 return __ctxt_sys_reg(&vcpu->arch.ctxt, SPSR_EL1);
156 case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_ABT]):
157 return &vcpu->arch.ctxt.spsr_abt;
159 case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_UND]):
160 return &vcpu->arch.ctxt.spsr_und;
162 case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_IRQ]):
163 return &vcpu->arch.ctxt.spsr_irq;
165 case KVM_REG_ARM_CORE_REG(spsr[KVM_SPSR_FIQ]):
166 return &vcpu->arch.ctxt.spsr_fiq;
168 case KVM_REG_ARM_CORE_REG(fp_regs.vregs[0]) ...
169 KVM_REG_ARM_CORE_REG(fp_regs.vregs[31]):
170 off -= KVM_REG_ARM_CORE_REG(fp_regs.vregs[0]);
172 return &vcpu->arch.ctxt.fp_regs.vregs[off];
174 case KVM_REG_ARM_CORE_REG(fp_regs.fpsr):
175 return &vcpu->arch.ctxt.fp_regs.fpsr;
177 case KVM_REG_ARM_CORE_REG(fp_regs.fpcr):
178 return &vcpu->arch.ctxt.fp_regs.fpcr;
185 static int get_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
188 * Because the kvm_regs structure is a mix of 32, 64 and
189 * 128bit fields, we index it as if it was a 32bit
190 * array. Hence below, nr_regs is the number of entries, and
191 * off the index in the "array".
193 __u32 __user *uaddr = (__u32 __user *)(unsigned long)reg->addr;
194 int nr_regs = sizeof(struct kvm_regs) / sizeof(__u32);
198 /* Our ID is an index into the kvm_regs struct. */
199 off = core_reg_offset_from_id(reg->id);
200 if (off >= nr_regs ||
201 (off + (KVM_REG_SIZE(reg->id) / sizeof(__u32))) >= nr_regs)
204 addr = core_reg_addr(vcpu, reg);
208 if (copy_to_user(uaddr, addr, KVM_REG_SIZE(reg->id)))
214 static int set_core_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
216 __u32 __user *uaddr = (__u32 __user *)(unsigned long)reg->addr;
217 int nr_regs = sizeof(struct kvm_regs) / sizeof(__u32);
219 void *valp = &tmp, *addr;
223 /* Our ID is an index into the kvm_regs struct. */
224 off = core_reg_offset_from_id(reg->id);
225 if (off >= nr_regs ||
226 (off + (KVM_REG_SIZE(reg->id) / sizeof(__u32))) >= nr_regs)
229 addr = core_reg_addr(vcpu, reg);
233 if (KVM_REG_SIZE(reg->id) > sizeof(tmp))
236 if (copy_from_user(valp, uaddr, KVM_REG_SIZE(reg->id))) {
241 if (off == KVM_REG_ARM_CORE_REG(regs.pstate)) {
242 u64 mode = (*(u64 *)valp) & PSR_AA32_MODE_MASK;
244 case PSR_AA32_MODE_USR:
245 if (!kvm_supports_32bit_el0())
248 case PSR_AA32_MODE_FIQ:
249 case PSR_AA32_MODE_IRQ:
250 case PSR_AA32_MODE_SVC:
251 case PSR_AA32_MODE_ABT:
252 case PSR_AA32_MODE_UND:
253 if (!vcpu_el1_is_32bit(vcpu))
259 if (vcpu_el1_is_32bit(vcpu))
268 memcpy(addr, valp, KVM_REG_SIZE(reg->id));
270 if (*vcpu_cpsr(vcpu) & PSR_MODE32_BIT) {
273 switch (*vcpu_cpsr(vcpu)) {
275 * Either we are dealing with user mode, and only the
276 * first 15 registers (+ PC) must be narrowed to 32bit.
277 * AArch32 r0-r14 conveniently map to AArch64 x0-x14.
279 case PSR_AA32_MODE_USR:
280 case PSR_AA32_MODE_SYS:
285 * Otherwise, this is a privileged mode, and *all* the
286 * registers must be narrowed to 32bit.
293 for (i = 0; i < nr_reg; i++)
294 vcpu_set_reg(vcpu, i, (u32)vcpu_get_reg(vcpu, i));
296 *vcpu_pc(vcpu) = (u32)*vcpu_pc(vcpu);
302 #define vq_word(vq) (((vq) - SVE_VQ_MIN) / 64)
303 #define vq_mask(vq) ((u64)1 << ((vq) - SVE_VQ_MIN) % 64)
304 #define vq_present(vqs, vq) (!!((vqs)[vq_word(vq)] & vq_mask(vq)))
306 static int get_sve_vls(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
308 unsigned int max_vq, vq;
309 u64 vqs[KVM_ARM64_SVE_VLS_WORDS];
311 if (!vcpu_has_sve(vcpu))
314 if (WARN_ON(!sve_vl_valid(vcpu->arch.sve_max_vl)))
317 memset(vqs, 0, sizeof(vqs));
319 max_vq = vcpu_sve_max_vq(vcpu);
320 for (vq = SVE_VQ_MIN; vq <= max_vq; ++vq)
321 if (sve_vq_available(vq))
322 vqs[vq_word(vq)] |= vq_mask(vq);
324 if (copy_to_user((void __user *)reg->addr, vqs, sizeof(vqs)))
330 static int set_sve_vls(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
332 unsigned int max_vq, vq;
333 u64 vqs[KVM_ARM64_SVE_VLS_WORDS];
335 if (!vcpu_has_sve(vcpu))
338 if (kvm_arm_vcpu_sve_finalized(vcpu))
339 return -EPERM; /* too late! */
341 if (WARN_ON(vcpu->arch.sve_state))
344 if (copy_from_user(vqs, (const void __user *)reg->addr, sizeof(vqs)))
348 for (vq = SVE_VQ_MIN; vq <= SVE_VQ_MAX; ++vq)
349 if (vq_present(vqs, vq))
352 if (max_vq > sve_vq_from_vl(kvm_sve_max_vl))
356 * Vector lengths supported by the host can't currently be
357 * hidden from the guest individually: instead we can only set a
358 * maximum via ZCR_EL2.LEN. So, make sure the available vector
359 * lengths match the set requested exactly up to the requested
362 for (vq = SVE_VQ_MIN; vq <= max_vq; ++vq)
363 if (vq_present(vqs, vq) != sve_vq_available(vq))
366 /* Can't run with no vector lengths at all: */
367 if (max_vq < SVE_VQ_MIN)
370 /* vcpu->arch.sve_state will be alloc'd by kvm_vcpu_finalize_sve() */
371 vcpu->arch.sve_max_vl = sve_vl_from_vq(max_vq);
376 #define SVE_REG_SLICE_SHIFT 0
377 #define SVE_REG_SLICE_BITS 5
378 #define SVE_REG_ID_SHIFT (SVE_REG_SLICE_SHIFT + SVE_REG_SLICE_BITS)
379 #define SVE_REG_ID_BITS 5
381 #define SVE_REG_SLICE_MASK \
382 GENMASK(SVE_REG_SLICE_SHIFT + SVE_REG_SLICE_BITS - 1, \
384 #define SVE_REG_ID_MASK \
385 GENMASK(SVE_REG_ID_SHIFT + SVE_REG_ID_BITS - 1, SVE_REG_ID_SHIFT)
387 #define SVE_NUM_SLICES (1 << SVE_REG_SLICE_BITS)
389 #define KVM_SVE_ZREG_SIZE KVM_REG_SIZE(KVM_REG_ARM64_SVE_ZREG(0, 0))
390 #define KVM_SVE_PREG_SIZE KVM_REG_SIZE(KVM_REG_ARM64_SVE_PREG(0, 0))
393 * Number of register slices required to cover each whole SVE register.
394 * NOTE: Only the first slice every exists, for now.
395 * If you are tempted to modify this, you must also rework sve_reg_to_region()
398 #define vcpu_sve_slices(vcpu) 1
400 /* Bounds of a single SVE register slice within vcpu->arch.sve_state */
401 struct sve_state_reg_region {
402 unsigned int koffset; /* offset into sve_state in kernel memory */
403 unsigned int klen; /* length in kernel memory */
404 unsigned int upad; /* extra trailing padding in user memory */
408 * Validate SVE register ID and get sanitised bounds for user/kernel SVE
411 static int sve_reg_to_region(struct sve_state_reg_region *region,
412 struct kvm_vcpu *vcpu,
413 const struct kvm_one_reg *reg)
415 /* reg ID ranges for Z- registers */
416 const u64 zreg_id_min = KVM_REG_ARM64_SVE_ZREG(0, 0);
417 const u64 zreg_id_max = KVM_REG_ARM64_SVE_ZREG(SVE_NUM_ZREGS - 1,
420 /* reg ID ranges for P- registers and FFR (which are contiguous) */
421 const u64 preg_id_min = KVM_REG_ARM64_SVE_PREG(0, 0);
422 const u64 preg_id_max = KVM_REG_ARM64_SVE_FFR(SVE_NUM_SLICES - 1);
425 unsigned int reg_num;
427 unsigned int reqoffset, reqlen; /* User-requested offset and length */
428 unsigned int maxlen; /* Maximum permitted length */
430 size_t sve_state_size;
432 const u64 last_preg_id = KVM_REG_ARM64_SVE_PREG(SVE_NUM_PREGS - 1,
435 /* Verify that the P-regs and FFR really do have contiguous IDs: */
436 BUILD_BUG_ON(KVM_REG_ARM64_SVE_FFR(0) != last_preg_id + 1);
438 /* Verify that we match the UAPI header: */
439 BUILD_BUG_ON(SVE_NUM_SLICES != KVM_ARM64_SVE_MAX_SLICES);
441 reg_num = (reg->id & SVE_REG_ID_MASK) >> SVE_REG_ID_SHIFT;
443 if (reg->id >= zreg_id_min && reg->id <= zreg_id_max) {
444 if (!vcpu_has_sve(vcpu) || (reg->id & SVE_REG_SLICE_MASK) > 0)
447 vq = vcpu_sve_max_vq(vcpu);
449 reqoffset = SVE_SIG_ZREG_OFFSET(vq, reg_num) -
451 reqlen = KVM_SVE_ZREG_SIZE;
452 maxlen = SVE_SIG_ZREG_SIZE(vq);
453 } else if (reg->id >= preg_id_min && reg->id <= preg_id_max) {
454 if (!vcpu_has_sve(vcpu) || (reg->id & SVE_REG_SLICE_MASK) > 0)
457 vq = vcpu_sve_max_vq(vcpu);
459 reqoffset = SVE_SIG_PREG_OFFSET(vq, reg_num) -
461 reqlen = KVM_SVE_PREG_SIZE;
462 maxlen = SVE_SIG_PREG_SIZE(vq);
467 sve_state_size = vcpu_sve_state_size(vcpu);
468 if (WARN_ON(!sve_state_size))
471 region->koffset = array_index_nospec(reqoffset, sve_state_size);
472 region->klen = min(maxlen, reqlen);
473 region->upad = reqlen - region->klen;
478 static int get_sve_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
481 struct sve_state_reg_region region;
482 char __user *uptr = (char __user *)reg->addr;
484 /* Handle the KVM_REG_ARM64_SVE_VLS pseudo-reg as a special case: */
485 if (reg->id == KVM_REG_ARM64_SVE_VLS)
486 return get_sve_vls(vcpu, reg);
488 /* Try to interpret reg ID as an architectural SVE register... */
489 ret = sve_reg_to_region(®ion, vcpu, reg);
493 if (!kvm_arm_vcpu_sve_finalized(vcpu))
496 if (copy_to_user(uptr, vcpu->arch.sve_state + region.koffset,
498 clear_user(uptr + region.klen, region.upad))
504 static int set_sve_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
507 struct sve_state_reg_region region;
508 const char __user *uptr = (const char __user *)reg->addr;
510 /* Handle the KVM_REG_ARM64_SVE_VLS pseudo-reg as a special case: */
511 if (reg->id == KVM_REG_ARM64_SVE_VLS)
512 return set_sve_vls(vcpu, reg);
514 /* Try to interpret reg ID as an architectural SVE register... */
515 ret = sve_reg_to_region(®ion, vcpu, reg);
519 if (!kvm_arm_vcpu_sve_finalized(vcpu))
522 if (copy_from_user(vcpu->arch.sve_state + region.koffset, uptr,
529 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
534 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
539 static int copy_core_reg_indices(const struct kvm_vcpu *vcpu,
540 u64 __user *uindices)
545 for (i = 0; i < sizeof(struct kvm_regs) / sizeof(__u32); i++) {
546 u64 reg = KVM_REG_ARM64 | KVM_REG_ARM_CORE | i;
547 int size = core_reg_size_from_offset(vcpu, i);
554 reg |= KVM_REG_SIZE_U32;
558 reg |= KVM_REG_SIZE_U64;
561 case sizeof(__uint128_t):
562 reg |= KVM_REG_SIZE_U128;
571 if (put_user(reg, uindices))
582 static unsigned long num_core_regs(const struct kvm_vcpu *vcpu)
584 return copy_core_reg_indices(vcpu, NULL);
588 * ARM64 versions of the TIMER registers, always available on arm64
591 #define NUM_TIMER_REGS 3
593 static bool is_timer_reg(u64 index)
596 case KVM_REG_ARM_TIMER_CTL:
597 case KVM_REG_ARM_TIMER_CNT:
598 case KVM_REG_ARM_TIMER_CVAL:
604 static int copy_timer_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
606 if (put_user(KVM_REG_ARM_TIMER_CTL, uindices))
609 if (put_user(KVM_REG_ARM_TIMER_CNT, uindices))
612 if (put_user(KVM_REG_ARM_TIMER_CVAL, uindices))
618 static int set_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
620 void __user *uaddr = (void __user *)(long)reg->addr;
624 ret = copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id));
628 return kvm_arm_timer_set_reg(vcpu, reg->id, val);
631 static int get_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
633 void __user *uaddr = (void __user *)(long)reg->addr;
636 val = kvm_arm_timer_get_reg(vcpu, reg->id);
637 return copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)) ? -EFAULT : 0;
640 static unsigned long num_sve_regs(const struct kvm_vcpu *vcpu)
642 const unsigned int slices = vcpu_sve_slices(vcpu);
644 if (!vcpu_has_sve(vcpu))
647 /* Policed by KVM_GET_REG_LIST: */
648 WARN_ON(!kvm_arm_vcpu_sve_finalized(vcpu));
650 return slices * (SVE_NUM_PREGS + SVE_NUM_ZREGS + 1 /* FFR */)
651 + 1; /* KVM_REG_ARM64_SVE_VLS */
654 static int copy_sve_reg_indices(const struct kvm_vcpu *vcpu,
655 u64 __user *uindices)
657 const unsigned int slices = vcpu_sve_slices(vcpu);
662 if (!vcpu_has_sve(vcpu))
665 /* Policed by KVM_GET_REG_LIST: */
666 WARN_ON(!kvm_arm_vcpu_sve_finalized(vcpu));
669 * Enumerate this first, so that userspace can save/restore in
670 * the order reported by KVM_GET_REG_LIST:
672 reg = KVM_REG_ARM64_SVE_VLS;
673 if (put_user(reg, uindices++))
677 for (i = 0; i < slices; i++) {
678 for (n = 0; n < SVE_NUM_ZREGS; n++) {
679 reg = KVM_REG_ARM64_SVE_ZREG(n, i);
680 if (put_user(reg, uindices++))
685 for (n = 0; n < SVE_NUM_PREGS; n++) {
686 reg = KVM_REG_ARM64_SVE_PREG(n, i);
687 if (put_user(reg, uindices++))
692 reg = KVM_REG_ARM64_SVE_FFR(i);
693 if (put_user(reg, uindices++))
702 * kvm_arm_num_regs - how many registers do we present via KVM_GET_ONE_REG
704 * This is for all registers.
706 unsigned long kvm_arm_num_regs(struct kvm_vcpu *vcpu)
708 unsigned long res = 0;
710 res += num_core_regs(vcpu);
711 res += num_sve_regs(vcpu);
712 res += kvm_arm_num_sys_reg_descs(vcpu);
713 res += kvm_arm_get_fw_num_regs(vcpu);
714 res += NUM_TIMER_REGS;
720 * kvm_arm_copy_reg_indices - get indices of all registers.
722 * We do core registers right here, then we append system regs.
724 int kvm_arm_copy_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices)
728 ret = copy_core_reg_indices(vcpu, uindices);
733 ret = copy_sve_reg_indices(vcpu, uindices);
738 ret = kvm_arm_copy_fw_reg_indices(vcpu, uindices);
741 uindices += kvm_arm_get_fw_num_regs(vcpu);
743 ret = copy_timer_indices(vcpu, uindices);
746 uindices += NUM_TIMER_REGS;
748 return kvm_arm_copy_sys_reg_indices(vcpu, uindices);
751 int kvm_arm_get_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
753 /* We currently use nothing arch-specific in upper 32 bits */
754 if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32)
757 switch (reg->id & KVM_REG_ARM_COPROC_MASK) {
758 case KVM_REG_ARM_CORE: return get_core_reg(vcpu, reg);
760 case KVM_REG_ARM_FW_FEAT_BMAP:
761 return kvm_arm_get_fw_reg(vcpu, reg);
762 case KVM_REG_ARM64_SVE: return get_sve_reg(vcpu, reg);
765 if (is_timer_reg(reg->id))
766 return get_timer_reg(vcpu, reg);
768 return kvm_arm_sys_reg_get_reg(vcpu, reg);
771 int kvm_arm_set_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
773 /* We currently use nothing arch-specific in upper 32 bits */
774 if ((reg->id & ~KVM_REG_SIZE_MASK) >> 32 != KVM_REG_ARM64 >> 32)
777 switch (reg->id & KVM_REG_ARM_COPROC_MASK) {
778 case KVM_REG_ARM_CORE: return set_core_reg(vcpu, reg);
780 case KVM_REG_ARM_FW_FEAT_BMAP:
781 return kvm_arm_set_fw_reg(vcpu, reg);
782 case KVM_REG_ARM64_SVE: return set_sve_reg(vcpu, reg);
785 if (is_timer_reg(reg->id))
786 return set_timer_reg(vcpu, reg);
788 return kvm_arm_sys_reg_set_reg(vcpu, reg);
791 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
792 struct kvm_sregs *sregs)
797 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
798 struct kvm_sregs *sregs)
803 int __kvm_arm_vcpu_get_events(struct kvm_vcpu *vcpu,
804 struct kvm_vcpu_events *events)
806 events->exception.serror_pending = !!(vcpu->arch.hcr_el2 & HCR_VSE);
807 events->exception.serror_has_esr = cpus_have_const_cap(ARM64_HAS_RAS_EXTN);
809 if (events->exception.serror_pending && events->exception.serror_has_esr)
810 events->exception.serror_esr = vcpu_get_vsesr(vcpu);
813 * We never return a pending ext_dabt here because we deliver it to
814 * the virtual CPU directly when setting the event and it's no longer
815 * 'pending' at this point.
821 int __kvm_arm_vcpu_set_events(struct kvm_vcpu *vcpu,
822 struct kvm_vcpu_events *events)
824 bool serror_pending = events->exception.serror_pending;
825 bool has_esr = events->exception.serror_has_esr;
826 bool ext_dabt_pending = events->exception.ext_dabt_pending;
828 if (serror_pending && has_esr) {
829 if (!cpus_have_const_cap(ARM64_HAS_RAS_EXTN))
832 if (!((events->exception.serror_esr) & ~ESR_ELx_ISS_MASK))
833 kvm_set_sei_esr(vcpu, events->exception.serror_esr);
836 } else if (serror_pending) {
837 kvm_inject_vabt(vcpu);
840 if (ext_dabt_pending)
841 kvm_inject_dabt(vcpu, kvm_vcpu_get_hfar(vcpu));
846 u32 __attribute_const__ kvm_target_cpu(void)
848 unsigned long implementor = read_cpuid_implementor();
849 unsigned long part_number = read_cpuid_part_number();
851 switch (implementor) {
852 case ARM_CPU_IMP_ARM:
853 switch (part_number) {
854 case ARM_CPU_PART_AEM_V8:
855 return KVM_ARM_TARGET_AEM_V8;
856 case ARM_CPU_PART_FOUNDATION:
857 return KVM_ARM_TARGET_FOUNDATION_V8;
858 case ARM_CPU_PART_CORTEX_A53:
859 return KVM_ARM_TARGET_CORTEX_A53;
860 case ARM_CPU_PART_CORTEX_A57:
861 return KVM_ARM_TARGET_CORTEX_A57;
864 case ARM_CPU_IMP_APM:
865 switch (part_number) {
866 case APM_CPU_PART_POTENZA:
867 return KVM_ARM_TARGET_XGENE_POTENZA;
872 /* Return a default generic target */
873 return KVM_ARM_TARGET_GENERIC_V8;
876 void kvm_vcpu_preferred_target(struct kvm_vcpu_init *init)
878 u32 target = kvm_target_cpu();
880 memset(init, 0, sizeof(*init));
883 * For now, we don't return any features.
884 * In future, we might use features to return target
885 * specific features available for the preferred
888 init->target = (__u32)target;
891 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
896 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
901 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
902 struct kvm_translation *tr)
908 * kvm_arch_vcpu_ioctl_set_guest_debug - set up guest debugging
909 * @kvm: pointer to the KVM struct
910 * @kvm_guest_debug: the ioctl data buffer
912 * This sets up and enables the VM for guest debugging. Userspace
913 * passes in a control flag to enable different debug types and
914 * potentially other architecture specific information in the rest of
917 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
918 struct kvm_guest_debug *dbg)
922 trace_kvm_set_guest_debug(vcpu, dbg->control);
924 if (dbg->control & ~KVM_GUESTDBG_VALID_MASK) {
929 if (dbg->control & KVM_GUESTDBG_ENABLE) {
930 vcpu->guest_debug = dbg->control;
932 /* Hardware assisted Break and Watch points */
933 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW) {
934 vcpu->arch.external_debug_state = dbg->arch;
938 /* If not enabled clear all flags */
939 vcpu->guest_debug = 0;
940 vcpu_clear_flag(vcpu, DBG_SS_ACTIVE_PENDING);
947 int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu,
948 struct kvm_device_attr *attr)
952 switch (attr->group) {
953 case KVM_ARM_VCPU_PMU_V3_CTRL:
954 ret = kvm_arm_pmu_v3_set_attr(vcpu, attr);
956 case KVM_ARM_VCPU_TIMER_CTRL:
957 ret = kvm_arm_timer_set_attr(vcpu, attr);
959 case KVM_ARM_VCPU_PVTIME_CTRL:
960 ret = kvm_arm_pvtime_set_attr(vcpu, attr);
970 int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu,
971 struct kvm_device_attr *attr)
975 switch (attr->group) {
976 case KVM_ARM_VCPU_PMU_V3_CTRL:
977 ret = kvm_arm_pmu_v3_get_attr(vcpu, attr);
979 case KVM_ARM_VCPU_TIMER_CTRL:
980 ret = kvm_arm_timer_get_attr(vcpu, attr);
982 case KVM_ARM_VCPU_PVTIME_CTRL:
983 ret = kvm_arm_pvtime_get_attr(vcpu, attr);
993 int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu,
994 struct kvm_device_attr *attr)
998 switch (attr->group) {
999 case KVM_ARM_VCPU_PMU_V3_CTRL:
1000 ret = kvm_arm_pmu_v3_has_attr(vcpu, attr);
1002 case KVM_ARM_VCPU_TIMER_CTRL:
1003 ret = kvm_arm_timer_has_attr(vcpu, attr);
1005 case KVM_ARM_VCPU_PVTIME_CTRL:
1006 ret = kvm_arm_pvtime_has_attr(vcpu, attr);
1016 long kvm_vm_ioctl_mte_copy_tags(struct kvm *kvm,
1017 struct kvm_arm_copy_mte_tags *copy_tags)
1019 gpa_t guest_ipa = copy_tags->guest_ipa;
1020 size_t length = copy_tags->length;
1021 void __user *tags = copy_tags->addr;
1023 bool write = !(copy_tags->flags & KVM_ARM_TAGS_FROM_GUEST);
1026 if (!kvm_has_mte(kvm))
1029 if (copy_tags->reserved[0] || copy_tags->reserved[1])
1032 if (copy_tags->flags & ~KVM_ARM_TAGS_FROM_GUEST)
1035 if (length & ~PAGE_MASK || guest_ipa & ~PAGE_MASK)
1038 gfn = gpa_to_gfn(guest_ipa);
1040 mutex_lock(&kvm->slots_lock);
1042 while (length > 0) {
1043 kvm_pfn_t pfn = gfn_to_pfn_prot(kvm, gfn, write, NULL);
1045 unsigned long num_tags;
1048 if (is_error_noslot_pfn(pfn)) {
1053 page = pfn_to_online_page(pfn);
1055 /* Reject ZONE_DEVICE memory */
1059 maddr = page_address(page);
1062 if (page_mte_tagged(page))
1063 num_tags = mte_copy_tags_to_user(tags, maddr,
1064 MTE_GRANULES_PER_PAGE);
1066 /* No tags in memory, so write zeros */
1067 num_tags = MTE_GRANULES_PER_PAGE -
1068 clear_user(tags, MTE_GRANULES_PER_PAGE);
1069 kvm_release_pfn_clean(pfn);
1072 * Only locking to serialise with a concurrent
1073 * set_pte_at() in the VMM but still overriding the
1074 * tags, hence ignoring the return value.
1076 try_page_mte_tagging(page);
1077 num_tags = mte_copy_tags_from_user(maddr, tags,
1078 MTE_GRANULES_PER_PAGE);
1080 /* uaccess failed, don't leave stale tags */
1081 if (num_tags != MTE_GRANULES_PER_PAGE)
1082 mte_clear_page_tags(page);
1083 set_page_mte_tagged(page);
1085 kvm_release_pfn_dirty(pfn);
1088 if (num_tags != MTE_GRANULES_PER_PAGE) {
1095 length -= PAGE_SIZE;
1099 mutex_unlock(&kvm->slots_lock);
1100 /* If some data has been copied report the number of bytes copied */
1101 if (length != copy_tags->length)
1102 return copy_tags->length - length;