1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2006 Qumranet, Inc.
6 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
7 * Copyright(C) 2015 Intel Corporation.
17 #include <linux/kvm_host.h>
23 #define IA32_MTRR_DEF_TYPE_E (1ULL << 11)
24 #define IA32_MTRR_DEF_TYPE_FE (1ULL << 10)
25 #define IA32_MTRR_DEF_TYPE_TYPE_MASK (0xff)
27 static bool msr_mtrr_valid(unsigned msr)
30 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
31 case MSR_MTRRfix64K_00000:
32 case MSR_MTRRfix16K_80000:
33 case MSR_MTRRfix16K_A0000:
34 case MSR_MTRRfix4K_C0000:
35 case MSR_MTRRfix4K_C8000:
36 case MSR_MTRRfix4K_D0000:
37 case MSR_MTRRfix4K_D8000:
38 case MSR_MTRRfix4K_E0000:
39 case MSR_MTRRfix4K_E8000:
40 case MSR_MTRRfix4K_F0000:
41 case MSR_MTRRfix4K_F8000:
49 static bool valid_mtrr_type(unsigned t)
51 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
54 bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
59 if (!msr_mtrr_valid(msr))
62 if (msr == MSR_IA32_CR_PAT) {
63 return kvm_pat_valid(data);
64 } else if (msr == MSR_MTRRdefType) {
67 return valid_mtrr_type(data & 0xff);
68 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
69 for (i = 0; i < 8 ; i++)
70 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
76 WARN_ON(!(msr >= 0x200 && msr < 0x200 + 2 * KVM_NR_VAR_MTRR));
78 mask = (~0ULL) << cpuid_maxphyaddr(vcpu);
81 if (!valid_mtrr_type(data & 0xff))
88 kvm_inject_gp(vcpu, 0);
94 EXPORT_SYMBOL_GPL(kvm_mtrr_valid);
96 static bool mtrr_is_enabled(struct kvm_mtrr *mtrr_state)
98 return !!(mtrr_state->deftype & IA32_MTRR_DEF_TYPE_E);
101 static bool fixed_mtrr_is_enabled(struct kvm_mtrr *mtrr_state)
103 return !!(mtrr_state->deftype & IA32_MTRR_DEF_TYPE_FE);
106 static u8 mtrr_default_type(struct kvm_mtrr *mtrr_state)
108 return mtrr_state->deftype & IA32_MTRR_DEF_TYPE_TYPE_MASK;
111 static u8 mtrr_disabled_type(struct kvm_vcpu *vcpu)
114 * Intel SDM 11.11.2.2: all MTRRs are disabled when
115 * IA32_MTRR_DEF_TYPE.E bit is cleared, and the UC
116 * memory type is applied to all of physical memory.
118 * However, virtual machines can be run with CPUID such that
119 * there are no MTRRs. In that case, the firmware will never
120 * enable MTRRs and it is obviously undesirable to run the
121 * guest entirely with UC memory and we use WB.
123 if (guest_cpuid_has(vcpu, X86_FEATURE_MTRR))
124 return MTRR_TYPE_UNCACHABLE;
126 return MTRR_TYPE_WRBACK;
130 * Three terms are used in the following code:
131 * - segment, it indicates the address segments covered by fixed MTRRs.
132 * - unit, it corresponds to the MSR entry in the segment.
133 * - range, a range is covered in one memory cache type.
135 struct fixed_mtrr_segment {
141 /* the start position in kvm_mtrr.fixed_ranges[]. */
145 static struct fixed_mtrr_segment fixed_seg_table[] = {
146 /* MSR_MTRRfix64K_00000, 1 unit. 64K fixed mtrr. */
150 .range_shift = 16, /* 64K */
155 * MSR_MTRRfix16K_80000 ... MSR_MTRRfix16K_A0000, 2 units,
161 .range_shift = 14, /* 16K */
166 * MSR_MTRRfix4K_C0000 ... MSR_MTRRfix4K_F8000, 8 units,
172 .range_shift = 12, /* 12K */
178 * The size of unit is covered in one MSR, one MSR entry contains
179 * 8 ranges so that unit size is always 8 * 2^range_shift.
181 static u64 fixed_mtrr_seg_unit_size(int seg)
183 return 8 << fixed_seg_table[seg].range_shift;
186 static bool fixed_msr_to_seg_unit(u32 msr, int *seg, int *unit)
189 case MSR_MTRRfix64K_00000:
193 case MSR_MTRRfix16K_80000 ... MSR_MTRRfix16K_A0000:
195 *unit = array_index_nospec(
196 msr - MSR_MTRRfix16K_80000,
197 MSR_MTRRfix16K_A0000 - MSR_MTRRfix16K_80000 + 1);
199 case MSR_MTRRfix4K_C0000 ... MSR_MTRRfix4K_F8000:
201 *unit = array_index_nospec(
202 msr - MSR_MTRRfix4K_C0000,
203 MSR_MTRRfix4K_F8000 - MSR_MTRRfix4K_C0000 + 1);
212 static void fixed_mtrr_seg_unit_range(int seg, int unit, u64 *start, u64 *end)
214 struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg];
215 u64 unit_size = fixed_mtrr_seg_unit_size(seg);
217 *start = mtrr_seg->start + unit * unit_size;
218 *end = *start + unit_size;
219 WARN_ON(*end > mtrr_seg->end);
222 static int fixed_mtrr_seg_unit_range_index(int seg, int unit)
224 struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg];
226 WARN_ON(mtrr_seg->start + unit * fixed_mtrr_seg_unit_size(seg)
229 /* each unit has 8 ranges. */
230 return mtrr_seg->range_start + 8 * unit;
233 static int fixed_mtrr_seg_end_range_index(int seg)
235 struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg];
238 n = (mtrr_seg->end - mtrr_seg->start) >> mtrr_seg->range_shift;
239 return mtrr_seg->range_start + n - 1;
242 static bool fixed_msr_to_range(u32 msr, u64 *start, u64 *end)
246 if (!fixed_msr_to_seg_unit(msr, &seg, &unit))
249 fixed_mtrr_seg_unit_range(seg, unit, start, end);
253 static int fixed_msr_to_range_index(u32 msr)
257 if (!fixed_msr_to_seg_unit(msr, &seg, &unit))
260 return fixed_mtrr_seg_unit_range_index(seg, unit);
263 static int fixed_mtrr_addr_to_seg(u64 addr)
265 struct fixed_mtrr_segment *mtrr_seg;
266 int seg, seg_num = ARRAY_SIZE(fixed_seg_table);
268 for (seg = 0; seg < seg_num; seg++) {
269 mtrr_seg = &fixed_seg_table[seg];
270 if (mtrr_seg->start <= addr && addr < mtrr_seg->end)
277 static int fixed_mtrr_addr_seg_to_range_index(u64 addr, int seg)
279 struct fixed_mtrr_segment *mtrr_seg;
282 mtrr_seg = &fixed_seg_table[seg];
283 index = mtrr_seg->range_start;
284 index += (addr - mtrr_seg->start) >> mtrr_seg->range_shift;
288 static u64 fixed_mtrr_range_end_addr(int seg, int index)
290 struct fixed_mtrr_segment *mtrr_seg = &fixed_seg_table[seg];
291 int pos = index - mtrr_seg->range_start;
293 return mtrr_seg->start + ((pos + 1) << mtrr_seg->range_shift);
296 static void var_mtrr_range(struct kvm_mtrr_range *range, u64 *start, u64 *end)
300 *start = range->base & PAGE_MASK;
302 mask = range->mask & PAGE_MASK;
304 /* This cannot overflow because writing to the reserved bits of
305 * variable MTRRs causes a #GP.
307 *end = (*start | ~mask) + 1;
310 static void update_mtrr(struct kvm_vcpu *vcpu, u32 msr)
312 struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state;
316 if (msr == MSR_IA32_CR_PAT || !tdp_enabled ||
317 !kvm_arch_has_noncoherent_dma(vcpu->kvm))
320 if (!mtrr_is_enabled(mtrr_state) && msr != MSR_MTRRdefType)
324 if (fixed_msr_to_range(msr, &start, &end)) {
325 if (!fixed_mtrr_is_enabled(mtrr_state))
327 } else if (msr == MSR_MTRRdefType) {
331 /* variable range MTRRs. */
332 index = (msr - 0x200) / 2;
333 var_mtrr_range(&mtrr_state->var_ranges[index], &start, &end);
336 kvm_zap_gfn_range(vcpu->kvm, gpa_to_gfn(start), gpa_to_gfn(end));
339 static bool var_mtrr_range_is_valid(struct kvm_mtrr_range *range)
341 return (range->mask & (1 << 11)) != 0;
344 static void set_var_mtrr_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
346 struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state;
347 struct kvm_mtrr_range *tmp, *cur;
348 int index, is_mtrr_mask;
350 index = (msr - 0x200) / 2;
351 is_mtrr_mask = msr - 0x200 - 2 * index;
352 cur = &mtrr_state->var_ranges[index];
354 /* remove the entry if it's in the list. */
355 if (var_mtrr_range_is_valid(cur))
356 list_del(&mtrr_state->var_ranges[index].node);
358 /* Extend the mask with all 1 bits to the left, since those
359 * bits must implicitly be 0. The bits are then cleared
365 cur->mask = data | (-1LL << cpuid_maxphyaddr(vcpu));
367 /* add it to the list if it's enabled. */
368 if (var_mtrr_range_is_valid(cur)) {
369 list_for_each_entry(tmp, &mtrr_state->head, node)
370 if (cur->base >= tmp->base)
372 list_add_tail(&cur->node, &tmp->node);
376 int kvm_mtrr_set_msr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
380 if (!kvm_mtrr_valid(vcpu, msr, data))
383 index = fixed_msr_to_range_index(msr);
385 *(u64 *)&vcpu->arch.mtrr_state.fixed_ranges[index] = data;
386 else if (msr == MSR_MTRRdefType)
387 vcpu->arch.mtrr_state.deftype = data;
388 else if (msr == MSR_IA32_CR_PAT)
389 vcpu->arch.pat = data;
391 set_var_mtrr_msr(vcpu, msr, data);
393 update_mtrr(vcpu, msr);
397 int kvm_mtrr_get_msr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
401 /* MSR_MTRRcap is a readonly MSR. */
402 if (msr == MSR_MTRRcap) {
407 * VCNT = KVM_NR_VAR_MTRR
409 *pdata = 0x500 | KVM_NR_VAR_MTRR;
413 if (!msr_mtrr_valid(msr))
416 index = fixed_msr_to_range_index(msr);
418 *pdata = *(u64 *)&vcpu->arch.mtrr_state.fixed_ranges[index];
419 else if (msr == MSR_MTRRdefType)
420 *pdata = vcpu->arch.mtrr_state.deftype;
421 else if (msr == MSR_IA32_CR_PAT)
422 *pdata = vcpu->arch.pat;
423 else { /* Variable MTRRs */
426 index = (msr - 0x200) / 2;
427 is_mtrr_mask = msr - 0x200 - 2 * index;
429 *pdata = vcpu->arch.mtrr_state.var_ranges[index].base;
431 *pdata = vcpu->arch.mtrr_state.var_ranges[index].mask;
433 *pdata &= (1ULL << cpuid_maxphyaddr(vcpu)) - 1;
439 void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu)
441 INIT_LIST_HEAD(&vcpu->arch.mtrr_state.head);
446 struct kvm_mtrr *mtrr_state;
452 /* mtrr is completely disabled? */
454 /* [start, end) is not fully covered in MTRRs? */
457 /* private fields. */
459 /* used for fixed MTRRs. */
465 /* used for var MTRRs. */
467 struct kvm_mtrr_range *range;
468 /* max address has been covered in var MTRRs. */
476 static bool mtrr_lookup_fixed_start(struct mtrr_iter *iter)
480 if (!fixed_mtrr_is_enabled(iter->mtrr_state))
483 seg = fixed_mtrr_addr_to_seg(iter->start);
488 index = fixed_mtrr_addr_seg_to_range_index(iter->start, seg);
494 static bool match_var_range(struct mtrr_iter *iter,
495 struct kvm_mtrr_range *range)
499 var_mtrr_range(range, &start, &end);
500 if (!(start >= iter->end || end <= iter->start)) {
504 * the function is called when we do kvm_mtrr.head walking.
505 * Range has the minimum base address which interleaves
506 * [looker->start_max, looker->end).
508 iter->partial_map |= iter->start_max < start;
510 /* update the max address has been covered. */
511 iter->start_max = max(iter->start_max, end);
518 static void __mtrr_lookup_var_next(struct mtrr_iter *iter)
520 struct kvm_mtrr *mtrr_state = iter->mtrr_state;
522 list_for_each_entry_continue(iter->range, &mtrr_state->head, node)
523 if (match_var_range(iter, iter->range))
527 iter->partial_map |= iter->start_max < iter->end;
530 static void mtrr_lookup_var_start(struct mtrr_iter *iter)
532 struct kvm_mtrr *mtrr_state = iter->mtrr_state;
535 iter->start_max = iter->start;
537 iter->range = list_prepare_entry(iter->range, &mtrr_state->head, node);
539 __mtrr_lookup_var_next(iter);
542 static void mtrr_lookup_fixed_next(struct mtrr_iter *iter)
544 /* terminate the lookup. */
545 if (fixed_mtrr_range_end_addr(iter->seg, iter->index) >= iter->end) {
553 /* have looked up for all fixed MTRRs. */
554 if (iter->index >= ARRAY_SIZE(iter->mtrr_state->fixed_ranges))
555 return mtrr_lookup_var_start(iter);
557 /* switch to next segment. */
558 if (iter->index > fixed_mtrr_seg_end_range_index(iter->seg))
562 static void mtrr_lookup_var_next(struct mtrr_iter *iter)
564 __mtrr_lookup_var_next(iter);
567 static void mtrr_lookup_start(struct mtrr_iter *iter)
569 if (!mtrr_is_enabled(iter->mtrr_state)) {
570 iter->mtrr_disabled = true;
574 if (!mtrr_lookup_fixed_start(iter))
575 mtrr_lookup_var_start(iter);
578 static void mtrr_lookup_init(struct mtrr_iter *iter,
579 struct kvm_mtrr *mtrr_state, u64 start, u64 end)
581 iter->mtrr_state = mtrr_state;
584 iter->mtrr_disabled = false;
585 iter->partial_map = false;
589 mtrr_lookup_start(iter);
592 static bool mtrr_lookup_okay(struct mtrr_iter *iter)
595 iter->mem_type = iter->mtrr_state->fixed_ranges[iter->index];
600 iter->mem_type = iter->range->base & 0xff;
607 static void mtrr_lookup_next(struct mtrr_iter *iter)
610 mtrr_lookup_fixed_next(iter);
612 mtrr_lookup_var_next(iter);
615 #define mtrr_for_each_mem_type(_iter_, _mtrr_, _gpa_start_, _gpa_end_) \
616 for (mtrr_lookup_init(_iter_, _mtrr_, _gpa_start_, _gpa_end_); \
617 mtrr_lookup_okay(_iter_); mtrr_lookup_next(_iter_))
619 u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
621 struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state;
622 struct mtrr_iter iter;
625 const int wt_wb_mask = (1 << MTRR_TYPE_WRBACK)
626 | (1 << MTRR_TYPE_WRTHROUGH);
628 start = gfn_to_gpa(gfn);
629 end = start + PAGE_SIZE;
631 mtrr_for_each_mem_type(&iter, mtrr_state, start, end) {
632 int curr_type = iter.mem_type;
635 * Please refer to Intel SDM Volume 3: 11.11.4.1 MTRR
645 * If two or more variable memory ranges match and the
646 * memory types are identical, then that memory type is
649 if (type == curr_type)
653 * If two or more variable memory ranges match and one of
654 * the memory types is UC, the UC memory type used.
656 if (curr_type == MTRR_TYPE_UNCACHABLE)
657 return MTRR_TYPE_UNCACHABLE;
660 * If two or more variable memory ranges match and the
661 * memory types are WT and WB, the WT memory type is used.
663 if (((1 << type) & wt_wb_mask) &&
664 ((1 << curr_type) & wt_wb_mask)) {
665 type = MTRR_TYPE_WRTHROUGH;
670 * For overlaps not defined by the above rules, processor
671 * behavior is undefined.
674 /* We use WB for this undefined behavior. :( */
675 return MTRR_TYPE_WRBACK;
678 if (iter.mtrr_disabled)
679 return mtrr_disabled_type(vcpu);
681 /* not contained in any MTRRs. */
683 return mtrr_default_type(mtrr_state);
686 * We just check one page, partially covered by MTRRs is
689 WARN_ON(iter.partial_map);
693 EXPORT_SYMBOL_GPL(kvm_mtrr_get_guest_memory_type);
695 bool kvm_mtrr_check_gfn_range_consistency(struct kvm_vcpu *vcpu, gfn_t gfn,
698 struct kvm_mtrr *mtrr_state = &vcpu->arch.mtrr_state;
699 struct mtrr_iter iter;
703 start = gfn_to_gpa(gfn);
704 end = gfn_to_gpa(gfn + page_num);
705 mtrr_for_each_mem_type(&iter, mtrr_state, start, end) {
707 type = iter.mem_type;
711 if (type != iter.mem_type)
715 if (iter.mtrr_disabled)
718 if (!iter.partial_map)
724 return type == mtrr_default_type(mtrr_state);