1 // SPDX-License-Identifier: GPL-2.0
2 /***************************************************************************/
5 * m5307.c -- platform support for ColdFire 5307 based boards
8 * Copyright (C) 2000, Lineo (www.lineo.com)
11 /***************************************************************************/
13 #include <linux/kernel.h>
14 #include <linux/param.h>
15 #include <linux/init.h>
17 #include <asm/machdep.h>
18 #include <asm/coldfire.h>
19 #include <asm/mcfsim.h>
20 #include <asm/mcfwdebug.h>
21 #include <asm/mcfclk.h>
23 /***************************************************************************/
26 * Some platforms need software versions of the GPIO data registers.
28 unsigned short ppdata;
29 unsigned char ledbank = 0xff;
31 /***************************************************************************/
33 DEFINE_CLK(pll, "pll.0", MCF_CLK);
34 DEFINE_CLK(sys, "sys.0", MCF_BUSCLK);
35 DEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK);
36 DEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK);
37 DEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK);
38 DEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK);
39 DEFINE_CLK(mcfi2c0, "imx1-i2c.0", MCF_BUSCLK);
41 struct clk *mcf_clks[] = {
52 /***************************************************************************/
54 static void __init m5307_i2c_init(void)
56 #if IS_ENABLED(CONFIG_I2C_IMX)
57 writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0,
59 mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C);
60 #endif /* IS_ENABLED(CONFIG_I2C_IMX) */
63 /***************************************************************************/
65 void __init config_BSP(char *commandp, int size)
67 #if defined(CONFIG_NETtel) || \
68 defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA)
69 /* Copy command line from FLASH to local buffer... */
70 memcpy(commandp, (char *) 0xf0004000, size);
74 mach_sched_init = hw_timer_init;
76 /* Only support the external interrupts on their primary level */
77 mcf_mapirq2imr(25, MCFINTC_EINT1);
78 mcf_mapirq2imr(27, MCFINTC_EINT3);
79 mcf_mapirq2imr(29, MCFINTC_EINT5);
80 mcf_mapirq2imr(31, MCFINTC_EINT7);
82 #ifdef CONFIG_BDM_DISABLE
84 * Disable the BDM clocking. This also turns off most of the rest of
85 * the BDM device. This is good for EMC reasons. This option is not
86 * incompatible with the memory protection option.
88 wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK);
93 /***************************************************************************/