2 * cs4265.c -- CS4265 ALSA SoC audio driver
4 * Copyright 2014 Cirrus Logic, Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/kernel.h>
17 #include <linux/gpio/consumer.h>
18 #include <linux/init.h>
19 #include <linux/delay.h>
20 #include <linux/i2c.h>
21 #include <linux/input.h>
22 #include <linux/regmap.h>
23 #include <linux/slab.h>
24 #include <linux/platform_device.h>
25 #include <sound/core.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
28 #include <sound/soc.h>
29 #include <sound/soc-dapm.h>
30 #include <sound/initval.h>
31 #include <sound/tlv.h>
34 struct cs4265_private {
35 struct regmap *regmap;
36 struct gpio_desc *reset_gpio;
41 static const struct reg_default cs4265_reg_defaults[] = {
42 { CS4265_PWRCTL, 0x0F },
43 { CS4265_DAC_CTL, 0x08 },
44 { CS4265_ADC_CTL, 0x00 },
45 { CS4265_MCLK_FREQ, 0x00 },
46 { CS4265_SIG_SEL, 0x40 },
47 { CS4265_CHB_PGA_CTL, 0x00 },
48 { CS4265_CHA_PGA_CTL, 0x00 },
49 { CS4265_ADC_CTL2, 0x19 },
50 { CS4265_DAC_CHA_VOL, 0x00 },
51 { CS4265_DAC_CHB_VOL, 0x00 },
52 { CS4265_DAC_CTL2, 0xC0 },
53 { CS4265_SPDIF_CTL1, 0x00 },
54 { CS4265_SPDIF_CTL2, 0x00 },
55 { CS4265_INT_MASK, 0x00 },
56 { CS4265_STATUS_MODE_MSB, 0x00 },
57 { CS4265_STATUS_MODE_LSB, 0x00 },
60 static bool cs4265_readable_register(struct device *dev, unsigned int reg)
66 case CS4265_MCLK_FREQ:
68 case CS4265_CHB_PGA_CTL:
69 case CS4265_CHA_PGA_CTL:
71 case CS4265_DAC_CHA_VOL:
72 case CS4265_DAC_CHB_VOL:
74 case CS4265_SPDIF_CTL1:
75 case CS4265_SPDIF_CTL2:
77 case CS4265_STATUS_MODE_MSB:
78 case CS4265_STATUS_MODE_LSB:
86 static bool cs4265_volatile_register(struct device *dev, unsigned int reg)
89 case CS4265_INT_STATUS:
96 static DECLARE_TLV_DB_SCALE(pga_tlv, -1200, 50, 0);
98 static DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 0);
100 static const char * const digital_input_mux_text[] = {
104 static SOC_ENUM_SINGLE_DECL(digital_input_mux_enum, CS4265_SIG_SEL, 7,
105 digital_input_mux_text);
107 static const struct snd_kcontrol_new digital_input_mux =
108 SOC_DAPM_ENUM("Digital Input Mux", digital_input_mux_enum);
110 static const char * const mic_linein_text[] = {
114 static SOC_ENUM_SINGLE_DECL(mic_linein_enum, CS4265_ADC_CTL2, 0,
117 static const char * const cam_mode_text[] = {
118 "One Byte", "Two Byte"
121 static SOC_ENUM_SINGLE_DECL(cam_mode_enum, CS4265_SPDIF_CTL1, 5,
124 static const char * const cam_mono_stereo_text[] = {
128 static SOC_ENUM_SINGLE_DECL(spdif_mono_stereo_enum, CS4265_SPDIF_CTL2, 2,
129 cam_mono_stereo_text);
131 static const char * const mono_select_text[] = {
132 "Channel A", "Channel B"
135 static SOC_ENUM_SINGLE_DECL(spdif_mono_select_enum, CS4265_SPDIF_CTL2, 0,
138 static const struct snd_kcontrol_new mic_linein_mux =
139 SOC_DAPM_ENUM("ADC Input Capture Mux", mic_linein_enum);
141 static const struct snd_kcontrol_new loopback_ctl =
142 SOC_DAPM_SINGLE("Switch", CS4265_SIG_SEL, 1, 1, 0);
144 static const struct snd_kcontrol_new spdif_switch =
145 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 0, 0);
147 static const struct snd_kcontrol_new dac_switch =
148 SOC_DAPM_SINGLE("Switch", CS4265_PWRCTL, 1, 1, 0);
150 static const struct snd_kcontrol_new cs4265_snd_controls[] = {
152 SOC_DOUBLE_R_SX_TLV("PGA Volume", CS4265_CHA_PGA_CTL,
153 CS4265_CHB_PGA_CTL, 0, 0x28, 0x30, pga_tlv),
154 SOC_DOUBLE_R_TLV("DAC Volume", CS4265_DAC_CHA_VOL,
155 CS4265_DAC_CHB_VOL, 0, 0xFF, 1, dac_tlv),
156 SOC_SINGLE("De-emp 44.1kHz Switch", CS4265_DAC_CTL, 1,
158 SOC_SINGLE("DAC INV Switch", CS4265_DAC_CTL2, 5,
160 SOC_SINGLE("DAC Zero Cross Switch", CS4265_DAC_CTL2, 6,
162 SOC_SINGLE("DAC Soft Ramp Switch", CS4265_DAC_CTL2, 7,
164 SOC_SINGLE("ADC HPF Switch", CS4265_ADC_CTL, 1,
166 SOC_SINGLE("ADC Zero Cross Switch", CS4265_ADC_CTL2, 3,
168 SOC_SINGLE("ADC Soft Ramp Switch", CS4265_ADC_CTL2, 7,
170 SOC_SINGLE("E to F Buffer Disable Switch", CS4265_SPDIF_CTL1,
172 SOC_ENUM("C Data Access", cam_mode_enum),
173 SOC_SINGLE("Validity Bit Control Switch", CS4265_SPDIF_CTL2,
175 SOC_ENUM("SPDIF Mono/Stereo", spdif_mono_stereo_enum),
176 SOC_SINGLE("MMTLR Data Switch", 0,
178 SOC_ENUM("Mono Channel Select", spdif_mono_select_enum),
179 SND_SOC_BYTES("C Data Buffer", CS4265_C_DATA_BUFF, 24),
182 static const struct snd_soc_dapm_widget cs4265_dapm_widgets[] = {
184 SND_SOC_DAPM_INPUT("LINEINL"),
185 SND_SOC_DAPM_INPUT("LINEINR"),
186 SND_SOC_DAPM_INPUT("MICL"),
187 SND_SOC_DAPM_INPUT("MICR"),
189 SND_SOC_DAPM_AIF_OUT("DOUT", NULL, 0,
191 SND_SOC_DAPM_AIF_OUT("SPDIFOUT", NULL, 0,
194 SND_SOC_DAPM_MUX("ADC Mux", SND_SOC_NOPM, 0, 0, &mic_linein_mux),
196 SND_SOC_DAPM_ADC("ADC", NULL, CS4265_PWRCTL, 2, 1),
197 SND_SOC_DAPM_PGA("Pre-amp MIC", CS4265_PWRCTL, 3,
200 SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM,
201 0, 0, &digital_input_mux),
203 SND_SOC_DAPM_MIXER("SDIN1 Input Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
204 SND_SOC_DAPM_MIXER("SDIN2 Input Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
205 SND_SOC_DAPM_MIXER("SPDIF Transmitter", SND_SOC_NOPM, 0, 0, NULL, 0),
207 SND_SOC_DAPM_SWITCH("Loopback", SND_SOC_NOPM, 0, 0,
209 SND_SOC_DAPM_SWITCH("SPDIF", SND_SOC_NOPM, 0, 0,
211 SND_SOC_DAPM_SWITCH("DAC", CS4265_PWRCTL, 1, 1,
214 SND_SOC_DAPM_AIF_IN("DIN1", NULL, 0,
216 SND_SOC_DAPM_AIF_IN("DIN2", NULL, 0,
218 SND_SOC_DAPM_AIF_IN("TXIN", NULL, 0,
219 CS4265_SPDIF_CTL2, 5, 1),
221 SND_SOC_DAPM_OUTPUT("LINEOUTL"),
222 SND_SOC_DAPM_OUTPUT("LINEOUTR"),
226 static const struct snd_soc_dapm_route cs4265_audio_map[] = {
228 {"DIN1", NULL, "DAI1 Playback"},
229 {"DIN2", NULL, "DAI2 Playback"},
230 {"SDIN1 Input Mixer", NULL, "DIN1"},
231 {"SDIN2 Input Mixer", NULL, "DIN2"},
232 {"Input Mux", "SDIN1", "SDIN1 Input Mixer"},
233 {"Input Mux", "SDIN2", "SDIN2 Input Mixer"},
234 {"DAC", "Switch", "Input Mux"},
235 {"SPDIF", "Switch", "Input Mux"},
236 {"LINEOUTL", NULL, "DAC"},
237 {"LINEOUTR", NULL, "DAC"},
238 {"SPDIFOUT", NULL, "SPDIF"},
240 {"ADC Mux", "LINEIN", "LINEINL"},
241 {"ADC Mux", "LINEIN", "LINEINR"},
242 {"ADC Mux", "MIC", "MICL"},
243 {"ADC Mux", "MIC", "MICR"},
244 {"ADC", NULL, "ADC Mux"},
245 {"DOUT", NULL, "ADC"},
246 {"DAI1 Capture", NULL, "DOUT"},
247 {"DAI2 Capture", NULL, "DOUT"},
250 {"Loopback", "Switch", "ADC"},
251 {"DAC", NULL, "Loopback"},
254 struct cs4265_clk_para {
257 u8 fm_mode; /* values 1, 2, or 4 */
261 static const struct cs4265_clk_para clk_map_table[] = {
263 {8192000, 32000, 0, 0},
264 {12288000, 32000, 0, 1},
265 {16384000, 32000, 0, 2},
266 {24576000, 32000, 0, 3},
267 {32768000, 32000, 0, 4},
270 {11289600, 44100, 0, 0},
271 {16934400, 44100, 0, 1},
272 {22579200, 44100, 0, 2},
273 {33868000, 44100, 0, 3},
274 {45158400, 44100, 0, 4},
277 {12288000, 48000, 0, 0},
278 {18432000, 48000, 0, 1},
279 {24576000, 48000, 0, 2},
280 {36864000, 48000, 0, 3},
281 {49152000, 48000, 0, 4},
284 {8192000, 64000, 1, 0},
285 {12288000, 64000, 1, 1},
286 {16934400, 64000, 1, 2},
287 {24576000, 64000, 1, 3},
288 {32768000, 64000, 1, 4},
291 {11289600, 88200, 1, 0},
292 {16934400, 88200, 1, 1},
293 {22579200, 88200, 1, 2},
294 {33868000, 88200, 1, 3},
295 {45158400, 88200, 1, 4},
298 {12288000, 96000, 1, 0},
299 {18432000, 96000, 1, 1},
300 {24576000, 96000, 1, 2},
301 {36864000, 96000, 1, 3},
302 {49152000, 96000, 1, 4},
305 {8192000, 128000, 2, 0},
306 {12288000, 128000, 2, 1},
307 {16934400, 128000, 2, 2},
308 {24576000, 128000, 2, 3},
309 {32768000, 128000, 2, 4},
312 {11289600, 176400, 2, 0},
313 {16934400, 176400, 2, 1},
314 {22579200, 176400, 2, 2},
315 {33868000, 176400, 2, 3},
316 {49152000, 176400, 2, 4},
319 {12288000, 192000, 2, 0},
320 {18432000, 192000, 2, 1},
321 {24576000, 192000, 2, 2},
322 {36864000, 192000, 2, 3},
323 {49152000, 192000, 2, 4},
326 static int cs4265_get_clk_index(int mclk, int rate)
330 for (i = 0; i < ARRAY_SIZE(clk_map_table); i++) {
331 if (clk_map_table[i].rate == rate &&
332 clk_map_table[i].mclk == mclk)
338 static int cs4265_set_sysclk(struct snd_soc_dai *codec_dai, int clk_id,
339 unsigned int freq, int dir)
341 struct snd_soc_codec *codec = codec_dai->codec;
342 struct cs4265_private *cs4265 = snd_soc_codec_get_drvdata(codec);
346 dev_err(codec->dev, "Invalid clk_id %d\n", clk_id);
349 for (i = 0; i < ARRAY_SIZE(clk_map_table); i++) {
350 if (clk_map_table[i].mclk == freq) {
351 cs4265->sysclk = freq;
356 dev_err(codec->dev, "Invalid freq parameter %d\n", freq);
360 static int cs4265_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
362 struct snd_soc_codec *codec = codec_dai->codec;
363 struct cs4265_private *cs4265 = snd_soc_codec_get_drvdata(codec);
366 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
367 case SND_SOC_DAIFMT_CBM_CFM:
368 snd_soc_update_bits(codec, CS4265_ADC_CTL,
372 case SND_SOC_DAIFMT_CBS_CFS:
373 snd_soc_update_bits(codec, CS4265_ADC_CTL,
381 /* interface format */
382 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
383 case SND_SOC_DAIFMT_I2S:
384 iface |= SND_SOC_DAIFMT_I2S;
386 case SND_SOC_DAIFMT_RIGHT_J:
387 iface |= SND_SOC_DAIFMT_RIGHT_J;
389 case SND_SOC_DAIFMT_LEFT_J:
390 iface |= SND_SOC_DAIFMT_LEFT_J;
396 cs4265->format = iface;
400 static int cs4265_digital_mute(struct snd_soc_dai *dai, int mute)
402 struct snd_soc_codec *codec = dai->codec;
405 snd_soc_update_bits(codec, CS4265_DAC_CTL,
407 CS4265_DAC_CTL_MUTE);
408 snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
409 CS4265_SPDIF_CTL2_MUTE,
410 CS4265_SPDIF_CTL2_MUTE);
412 snd_soc_update_bits(codec, CS4265_DAC_CTL,
415 snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
416 CS4265_SPDIF_CTL2_MUTE,
422 static int cs4265_pcm_hw_params(struct snd_pcm_substream *substream,
423 struct snd_pcm_hw_params *params,
424 struct snd_soc_dai *dai)
426 struct snd_soc_codec *codec = dai->codec;
427 struct cs4265_private *cs4265 = snd_soc_codec_get_drvdata(codec);
430 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE &&
431 ((cs4265->format & SND_SOC_DAIFMT_FORMAT_MASK)
432 == SND_SOC_DAIFMT_RIGHT_J))
435 index = cs4265_get_clk_index(cs4265->sysclk, params_rate(params));
437 snd_soc_update_bits(codec, CS4265_ADC_CTL,
438 CS4265_ADC_FM, clk_map_table[index].fm_mode << 6);
439 snd_soc_update_bits(codec, CS4265_MCLK_FREQ,
440 CS4265_MCLK_FREQ_MASK,
441 clk_map_table[index].mclkdiv << 4);
444 dev_err(codec->dev, "can't get correct mclk\n");
448 switch (cs4265->format & SND_SOC_DAIFMT_FORMAT_MASK) {
449 case SND_SOC_DAIFMT_I2S:
450 snd_soc_update_bits(codec, CS4265_DAC_CTL,
451 CS4265_DAC_CTL_DIF, (1 << 4));
452 snd_soc_update_bits(codec, CS4265_ADC_CTL,
453 CS4265_ADC_DIF, (1 << 4));
454 snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
455 CS4265_SPDIF_CTL2_DIF, (1 << 6));
457 case SND_SOC_DAIFMT_RIGHT_J:
458 if (params_width(params) == 16) {
459 snd_soc_update_bits(codec, CS4265_DAC_CTL,
460 CS4265_DAC_CTL_DIF, (1 << 5));
461 snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
462 CS4265_SPDIF_CTL2_DIF, (1 << 7));
464 snd_soc_update_bits(codec, CS4265_DAC_CTL,
465 CS4265_DAC_CTL_DIF, (3 << 5));
466 snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
467 CS4265_SPDIF_CTL2_DIF, (1 << 7));
470 case SND_SOC_DAIFMT_LEFT_J:
471 snd_soc_update_bits(codec, CS4265_DAC_CTL,
472 CS4265_DAC_CTL_DIF, 0);
473 snd_soc_update_bits(codec, CS4265_ADC_CTL,
475 snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
476 CS4265_SPDIF_CTL2_DIF, (1 << 6));
485 static int cs4265_set_bias_level(struct snd_soc_codec *codec,
486 enum snd_soc_bias_level level)
489 case SND_SOC_BIAS_ON:
491 case SND_SOC_BIAS_PREPARE:
492 snd_soc_update_bits(codec, CS4265_PWRCTL,
493 CS4265_PWRCTL_PDN, 0);
495 case SND_SOC_BIAS_STANDBY:
496 snd_soc_update_bits(codec, CS4265_PWRCTL,
500 case SND_SOC_BIAS_OFF:
501 snd_soc_update_bits(codec, CS4265_PWRCTL,
506 codec->dapm.bias_level = level;
510 #define CS4265_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
511 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \
512 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \
513 SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000)
515 #define CS4265_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE | \
516 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_U24_LE)
518 static const struct snd_soc_dai_ops cs4265_ops = {
519 .hw_params = cs4265_pcm_hw_params,
520 .digital_mute = cs4265_digital_mute,
521 .set_fmt = cs4265_set_fmt,
522 .set_sysclk = cs4265_set_sysclk,
525 static struct snd_soc_dai_driver cs4265_dai[] = {
527 .name = "cs4265-dai1",
529 .stream_name = "DAI1 Playback",
532 .rates = CS4265_RATES,
533 .formats = CS4265_FORMATS,
536 .stream_name = "DAI1 Capture",
539 .rates = CS4265_RATES,
540 .formats = CS4265_FORMATS,
545 .name = "cs4265-dai2",
547 .stream_name = "DAI2 Playback",
550 .rates = CS4265_RATES,
551 .formats = CS4265_FORMATS,
554 .stream_name = "DAI2 Capture",
557 .rates = CS4265_RATES,
558 .formats = CS4265_FORMATS,
564 static const struct snd_soc_codec_driver soc_codec_cs4265 = {
565 .set_bias_level = cs4265_set_bias_level,
567 .dapm_widgets = cs4265_dapm_widgets,
568 .num_dapm_widgets = ARRAY_SIZE(cs4265_dapm_widgets),
569 .dapm_routes = cs4265_audio_map,
570 .num_dapm_routes = ARRAY_SIZE(cs4265_audio_map),
572 .controls = cs4265_snd_controls,
573 .num_controls = ARRAY_SIZE(cs4265_snd_controls),
576 static const struct regmap_config cs4265_regmap = {
580 .max_register = CS4265_MAX_REGISTER,
581 .reg_defaults = cs4265_reg_defaults,
582 .num_reg_defaults = ARRAY_SIZE(cs4265_reg_defaults),
583 .readable_reg = cs4265_readable_register,
584 .volatile_reg = cs4265_volatile_register,
585 .cache_type = REGCACHE_RBTREE,
588 static int cs4265_i2c_probe(struct i2c_client *i2c_client,
589 const struct i2c_device_id *id)
591 struct cs4265_private *cs4265;
593 unsigned int devid = 0;
596 cs4265 = devm_kzalloc(&i2c_client->dev, sizeof(struct cs4265_private),
601 cs4265->regmap = devm_regmap_init_i2c(i2c_client, &cs4265_regmap);
602 if (IS_ERR(cs4265->regmap)) {
603 ret = PTR_ERR(cs4265->regmap);
604 dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret);
608 cs4265->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev,
609 "reset", GPIOD_OUT_LOW);
610 if (IS_ERR(cs4265->reset_gpio))
611 return PTR_ERR(cs4265->reset_gpio);
613 if (cs4265->reset_gpio) {
615 gpiod_set_value_cansleep(cs4265->reset_gpio, 1);
618 i2c_set_clientdata(i2c_client, cs4265);
620 ret = regmap_read(cs4265->regmap, CS4265_CHIP_ID, ®);
621 devid = reg & CS4265_CHIP_ID_MASK;
622 if (devid != CS4265_CHIP_ID_VAL) {
624 dev_err(&i2c_client->dev,
625 "CS4265 Device ID (%X). Expected %X\n",
626 devid, CS4265_CHIP_ID);
629 dev_info(&i2c_client->dev,
630 "CS4265 Version %x\n",
631 reg & CS4265_REV_ID_MASK);
633 regmap_write(cs4265->regmap, CS4265_PWRCTL, 0x0F);
635 ret = snd_soc_register_codec(&i2c_client->dev,
636 &soc_codec_cs4265, cs4265_dai,
637 ARRAY_SIZE(cs4265_dai));
641 static int cs4265_i2c_remove(struct i2c_client *client)
643 snd_soc_unregister_codec(&client->dev);
647 static const struct of_device_id cs4265_of_match[] = {
648 { .compatible = "cirrus,cs4265", },
651 MODULE_DEVICE_TABLE(of, cs4265_of_match);
653 static const struct i2c_device_id cs4265_id[] = {
657 MODULE_DEVICE_TABLE(i2c, cs4265_id);
659 static struct i2c_driver cs4265_i2c_driver = {
662 .owner = THIS_MODULE,
663 .of_match_table = cs4265_of_match,
665 .id_table = cs4265_id,
666 .probe = cs4265_i2c_probe,
667 .remove = cs4265_i2c_remove,
670 module_i2c_driver(cs4265_i2c_driver);
672 MODULE_DESCRIPTION("ASoC CS4265 driver");
674 MODULE_LICENSE("GPL");