2 * SPDX-License-Identifier: MIT
4 * Copyright © 2014-2016 Intel Corporation
7 #include <linux/anon_inodes.h>
8 #include <linux/mman.h>
9 #include <linux/pfn_t.h>
10 #include <linux/sizes.h>
12 #include "gt/intel_gt.h"
13 #include "gt/intel_gt_requests.h"
16 #include "i915_gem_gtt.h"
17 #include "i915_gem_ioctls.h"
18 #include "i915_gem_object.h"
19 #include "i915_gem_mman.h"
20 #include "i915_trace.h"
21 #include "i915_user_extensions.h"
25 __vma_matches(struct vm_area_struct *vma, struct file *filp,
26 unsigned long addr, unsigned long size)
28 if (vma->vm_file != filp)
31 return vma->vm_start == addr &&
32 (vma->vm_end - vma->vm_start) == PAGE_ALIGN(size);
36 * i915_gem_mmap_ioctl - Maps the contents of an object, returning the address
39 * @data: ioctl data blob
42 * While the mapping holds a reference on the contents of the object, it doesn't
43 * imply a ref on the object itself.
47 * DRM driver writers who look a this function as an example for how to do GEM
48 * mmap support, please don't implement mmap support like here. The modern way
49 * to implement DRM mmap support is with an mmap offset ioctl (like
50 * i915_gem_mmap_gtt) and then using the mmap syscall on the DRM fd directly.
51 * That way debug tooling like valgrind will understand what's going on, hiding
52 * the mmap call in a driver private ioctl will break that. The i915 driver only
53 * does cpu mmaps this way because we didn't know better.
56 i915_gem_mmap_ioctl(struct drm_device *dev, void *data,
57 struct drm_file *file)
59 struct drm_i915_private *i915 = to_i915(dev);
60 struct drm_i915_gem_mmap *args = data;
61 struct drm_i915_gem_object *obj;
65 * mmap ioctl is disallowed for all discrete platforms,
66 * and for all platforms with GRAPHICS_VER > 12.
68 if (IS_DGFX(i915) || GRAPHICS_VER(i915) > 12)
71 if (args->flags & ~(I915_MMAP_WC))
74 if (args->flags & I915_MMAP_WC && !boot_cpu_has(X86_FEATURE_PAT))
77 obj = i915_gem_object_lookup(file, args->handle);
81 /* prime objects have no backing filp to GEM mmap
84 if (!obj->base.filp) {
89 if (range_overflows(args->offset, args->size, (u64)obj->base.size)) {
94 addr = vm_mmap(obj->base.filp, 0, args->size,
95 PROT_READ | PROT_WRITE, MAP_SHARED,
97 if (IS_ERR_VALUE(addr))
100 if (args->flags & I915_MMAP_WC) {
101 struct mm_struct *mm = current->mm;
102 struct vm_area_struct *vma;
104 if (mmap_write_lock_killable(mm)) {
108 vma = find_vma(mm, addr);
109 if (vma && __vma_matches(vma, obj->base.filp, addr, args->size))
111 pgprot_writecombine(vm_get_page_prot(vma->vm_flags));
114 mmap_write_unlock(mm);
115 if (IS_ERR_VALUE(addr))
118 i915_gem_object_put(obj);
120 args->addr_ptr = (u64)addr;
124 i915_gem_object_put(obj);
128 static unsigned int tile_row_pages(const struct drm_i915_gem_object *obj)
130 return i915_gem_object_get_tile_row_size(obj) >> PAGE_SHIFT;
134 * i915_gem_mmap_gtt_version - report the current feature set for GTT mmaps
136 * A history of the GTT mmap interface:
138 * 0 - Everything had to fit into the GTT. Both parties of a memcpy had to
139 * aligned and suitable for fencing, and still fit into the available
140 * mappable space left by the pinned display objects. A classic problem
141 * we called the page-fault-of-doom where we would ping-pong between
142 * two objects that could not fit inside the GTT and so the memcpy
143 * would page one object in at the expense of the other between every
146 * 1 - Objects can be any size, and have any compatible fencing (X Y, or none
147 * as set via i915_gem_set_tiling() [DRM_I915_GEM_SET_TILING]). If the
148 * object is too large for the available space (or simply too large
149 * for the mappable aperture!), a view is created instead and faulted
150 * into userspace. (This view is aligned and sized appropriately for
153 * 2 - Recognise WC as a separate cache domain so that we can flush the
154 * delayed writes via GTT before performing direct access via WC.
156 * 3 - Remove implicit set-domain(GTT) and synchronisation on initial
157 * pagefault; swapin remains transparent.
159 * 4 - Support multiple fault handlers per object depending on object's
160 * backing storage (a.k.a. MMAP_OFFSET).
164 * * snoopable objects cannot be accessed via the GTT. It can cause machine
165 * hangs on some architectures, corruption on others. An attempt to service
166 * a GTT page fault from a snoopable object will generate a SIGBUS.
168 * * the object must be able to fit into RAM (physical memory, though no
169 * limited to the mappable aperture).
174 * * a new GTT page fault will synchronize rendering from the GPU and flush
175 * all data to system memory. Subsequent access will not be synchronized.
177 * * all mappings are revoked on runtime device suspend.
179 * * there are only 8, 16 or 32 fence registers to share between all users
180 * (older machines require fence register for display and blitter access
181 * as well). Contention of the fence registers will cause the previous users
182 * to be unmapped and any new access will generate new page faults.
184 * * running out of memory while servicing a fault may generate a SIGBUS,
185 * rather than the expected SIGSEGV.
187 int i915_gem_mmap_gtt_version(void)
192 static inline struct i915_ggtt_view
193 compute_partial_view(const struct drm_i915_gem_object *obj,
197 struct i915_ggtt_view view;
199 if (i915_gem_object_is_tiled(obj))
200 chunk = roundup(chunk, tile_row_pages(obj) ?: 1);
202 view.type = I915_GGTT_VIEW_PARTIAL;
203 view.partial.offset = rounddown(page_offset, chunk);
205 min_t(unsigned int, chunk,
206 (obj->base.size >> PAGE_SHIFT) - view.partial.offset);
208 /* If the partial covers the entire object, just create a normal VMA. */
209 if (chunk >= obj->base.size >> PAGE_SHIFT)
210 view.type = I915_GGTT_VIEW_NORMAL;
215 static vm_fault_t i915_error_to_vmf_fault(int err)
219 WARN_ONCE(err, "unhandled error in %s: %i\n", __func__, err);
221 case -EIO: /* shmemfs failure from swap device */
222 case -EFAULT: /* purged object */
223 case -ENODEV: /* bad object, how did you get here! */
224 case -ENXIO: /* unable to access backing store (on device) */
225 return VM_FAULT_SIGBUS;
227 case -ENOMEM: /* our allocation failure */
232 case -ENOSPC: /* transient failure to evict? */
237 * EBUSY is ok: this just means that another thread
238 * already did the job.
240 return VM_FAULT_NOPAGE;
244 static vm_fault_t vm_fault_cpu(struct vm_fault *vmf)
246 struct vm_area_struct *area = vmf->vma;
247 struct i915_mmap_offset *mmo = area->vm_private_data;
248 struct drm_i915_gem_object *obj = mmo->obj;
249 resource_size_t iomap;
252 /* Sanity check that we allow writing into this object */
253 if (unlikely(i915_gem_object_is_readonly(obj) &&
254 area->vm_flags & VM_WRITE))
255 return VM_FAULT_SIGBUS;
257 if (i915_gem_object_lock_interruptible(obj, NULL))
258 return VM_FAULT_NOPAGE;
260 err = i915_gem_object_pin_pages(obj);
265 if (!i915_gem_object_has_struct_page(obj)) {
266 iomap = obj->mm.region->iomap.base;
267 iomap -= obj->mm.region->region.start;
270 /* PTEs are revoked in obj->ops->put_pages() */
271 err = remap_io_sg(area,
272 area->vm_start, area->vm_end - area->vm_start,
273 obj->mm.pages->sgl, iomap);
275 if (area->vm_flags & VM_WRITE) {
276 GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
277 obj->mm.dirty = true;
280 i915_gem_object_unpin_pages(obj);
283 i915_gem_object_unlock(obj);
284 return i915_error_to_vmf_fault(err);
287 static vm_fault_t vm_fault_gtt(struct vm_fault *vmf)
289 #define MIN_CHUNK_PAGES (SZ_1M >> PAGE_SHIFT)
290 struct vm_area_struct *area = vmf->vma;
291 struct i915_mmap_offset *mmo = area->vm_private_data;
292 struct drm_i915_gem_object *obj = mmo->obj;
293 struct drm_device *dev = obj->base.dev;
294 struct drm_i915_private *i915 = to_i915(dev);
295 struct intel_runtime_pm *rpm = &i915->runtime_pm;
296 struct i915_ggtt *ggtt = &i915->ggtt;
297 bool write = area->vm_flags & VM_WRITE;
298 struct i915_gem_ww_ctx ww;
299 intel_wakeref_t wakeref;
300 struct i915_vma *vma;
305 /* We don't use vmf->pgoff since that has the fake offset */
306 page_offset = (vmf->address - area->vm_start) >> PAGE_SHIFT;
308 trace_i915_gem_object_fault(obj, page_offset, true, write);
310 wakeref = intel_runtime_pm_get(rpm);
312 i915_gem_ww_ctx_init(&ww, true);
314 ret = i915_gem_object_lock(obj, &ww);
318 /* Sanity check that we allow writing into this object */
319 if (i915_gem_object_is_readonly(obj) && write) {
324 ret = i915_gem_object_pin_pages(obj);
328 ret = intel_gt_reset_trylock(ggtt->vm.gt, &srcu);
332 /* Now pin it into the GTT as needed */
333 vma = i915_gem_object_ggtt_pin_ww(obj, &ww, NULL, 0, 0,
335 PIN_NONBLOCK /* NOWARN */ |
337 if (IS_ERR(vma) && vma != ERR_PTR(-EDEADLK)) {
338 /* Use a partial view if it is bigger than available space */
339 struct i915_ggtt_view view =
340 compute_partial_view(obj, page_offset, MIN_CHUNK_PAGES);
343 flags = PIN_MAPPABLE | PIN_NOSEARCH;
344 if (view.type == I915_GGTT_VIEW_NORMAL)
345 flags |= PIN_NONBLOCK; /* avoid warnings for pinned */
348 * Userspace is now writing through an untracked VMA, abandon
349 * all hope that the hardware is able to track future writes.
352 vma = i915_gem_object_ggtt_pin_ww(obj, &ww, &view, 0, 0, flags);
353 if (IS_ERR(vma) && vma != ERR_PTR(-EDEADLK)) {
354 flags = PIN_MAPPABLE;
355 view.type = I915_GGTT_VIEW_PARTIAL;
356 vma = i915_gem_object_ggtt_pin_ww(obj, &ww, &view, 0, 0, flags);
359 /* The entire mappable GGTT is pinned? Unexpected! */
360 GEM_BUG_ON(vma == ERR_PTR(-ENOSPC));
367 /* Access to snoopable pages through the GTT is incoherent. */
368 if (obj->cache_level != I915_CACHE_NONE && !HAS_LLC(i915)) {
373 ret = i915_vma_pin_fence(vma);
377 /* Finally, remap it using the new GTT offset */
378 ret = remap_io_mapping(area,
379 area->vm_start + (vma->ggtt_view.partial.offset << PAGE_SHIFT),
380 (ggtt->gmadr.start + vma->node.start) >> PAGE_SHIFT,
381 min_t(u64, vma->size, area->vm_end - area->vm_start),
386 assert_rpm_wakelock_held(rpm);
388 /* Mark as being mmapped into userspace for later revocation */
389 mutex_lock(&i915->ggtt.vm.mutex);
390 if (!i915_vma_set_userfault(vma) && !obj->userfault_count++)
391 list_add(&obj->userfault_link, &i915->ggtt.userfault_list);
392 mutex_unlock(&i915->ggtt.vm.mutex);
394 /* Track the mmo associated with the fenced vma */
397 if (IS_ACTIVE(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND))
398 intel_wakeref_auto(&i915->ggtt.userfault_wakeref,
399 msecs_to_jiffies_timeout(CONFIG_DRM_I915_USERFAULT_AUTOSUSPEND));
402 GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
403 i915_vma_set_ggtt_write(vma);
404 obj->mm.dirty = true;
408 i915_vma_unpin_fence(vma);
410 __i915_vma_unpin(vma);
412 intel_gt_reset_unlock(ggtt->vm.gt, srcu);
414 i915_gem_object_unpin_pages(obj);
416 if (ret == -EDEADLK) {
417 ret = i915_gem_ww_ctx_backoff(&ww);
421 i915_gem_ww_ctx_fini(&ww);
422 intel_runtime_pm_put(rpm, wakeref);
423 return i915_error_to_vmf_fault(ret);
427 vm_access(struct vm_area_struct *area, unsigned long addr,
428 void *buf, int len, int write)
430 struct i915_mmap_offset *mmo = area->vm_private_data;
431 struct drm_i915_gem_object *obj = mmo->obj;
432 struct i915_gem_ww_ctx ww;
436 if (i915_gem_object_is_readonly(obj) && write)
439 addr -= area->vm_start;
440 if (addr >= obj->base.size)
443 i915_gem_ww_ctx_init(&ww, true);
445 err = i915_gem_object_lock(obj, &ww);
449 /* As this is primarily for debugging, let's focus on simplicity */
450 vaddr = i915_gem_object_pin_map(obj, I915_MAP_FORCE_WC);
452 err = PTR_ERR(vaddr);
457 memcpy(vaddr + addr, buf, len);
458 __i915_gem_object_flush_map(obj, addr, len);
460 memcpy(buf, vaddr + addr, len);
463 i915_gem_object_unpin_map(obj);
465 if (err == -EDEADLK) {
466 err = i915_gem_ww_ctx_backoff(&ww);
470 i915_gem_ww_ctx_fini(&ww);
478 void __i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj)
480 struct i915_vma *vma;
482 GEM_BUG_ON(!obj->userfault_count);
484 for_each_ggtt_vma(vma, obj)
485 i915_vma_revoke_mmap(vma);
487 GEM_BUG_ON(obj->userfault_count);
491 * It is vital that we remove the page mapping if we have mapped a tiled
492 * object through the GTT and then lose the fence register due to
493 * resource pressure. Similarly if the object has been moved out of the
494 * aperture, than pages mapped into userspace must be revoked. Removing the
495 * mapping will then trigger a page fault on the next user access, allowing
496 * fixup by vm_fault_gtt().
498 void i915_gem_object_release_mmap_gtt(struct drm_i915_gem_object *obj)
500 struct drm_i915_private *i915 = to_i915(obj->base.dev);
501 intel_wakeref_t wakeref;
504 * Serialisation between user GTT access and our code depends upon
505 * revoking the CPU's PTE whilst the mutex is held. The next user
506 * pagefault then has to wait until we release the mutex.
508 * Note that RPM complicates somewhat by adding an additional
509 * requirement that operations to the GGTT be made holding the RPM
512 wakeref = intel_runtime_pm_get(&i915->runtime_pm);
513 mutex_lock(&i915->ggtt.vm.mutex);
515 if (!obj->userfault_count)
518 __i915_gem_object_release_mmap_gtt(obj);
521 * Ensure that the CPU's PTE are revoked and there are not outstanding
522 * memory transactions from userspace before we return. The TLB
523 * flushing implied above by changing the PTE above *should* be
524 * sufficient, an extra barrier here just provides us with a bit
525 * of paranoid documentation about our requirement to serialise
526 * memory writes before touching registers / GSM.
531 mutex_unlock(&i915->ggtt.vm.mutex);
532 intel_runtime_pm_put(&i915->runtime_pm, wakeref);
535 void i915_gem_object_release_mmap_offset(struct drm_i915_gem_object *obj)
537 struct i915_mmap_offset *mmo, *mn;
539 spin_lock(&obj->mmo.lock);
540 rbtree_postorder_for_each_entry_safe(mmo, mn,
541 &obj->mmo.offsets, offset) {
543 * vma_node_unmap for GTT mmaps handled already in
544 * __i915_gem_object_release_mmap_gtt
546 if (mmo->mmap_type == I915_MMAP_TYPE_GTT)
549 spin_unlock(&obj->mmo.lock);
550 drm_vma_node_unmap(&mmo->vma_node,
551 obj->base.dev->anon_inode->i_mapping);
552 spin_lock(&obj->mmo.lock);
554 spin_unlock(&obj->mmo.lock);
557 static struct i915_mmap_offset *
558 lookup_mmo(struct drm_i915_gem_object *obj,
559 enum i915_mmap_type mmap_type)
563 spin_lock(&obj->mmo.lock);
564 rb = obj->mmo.offsets.rb_node;
566 struct i915_mmap_offset *mmo =
567 rb_entry(rb, typeof(*mmo), offset);
569 if (mmo->mmap_type == mmap_type) {
570 spin_unlock(&obj->mmo.lock);
574 if (mmo->mmap_type < mmap_type)
579 spin_unlock(&obj->mmo.lock);
584 static struct i915_mmap_offset *
585 insert_mmo(struct drm_i915_gem_object *obj, struct i915_mmap_offset *mmo)
587 struct rb_node *rb, **p;
589 spin_lock(&obj->mmo.lock);
591 p = &obj->mmo.offsets.rb_node;
593 struct i915_mmap_offset *pos;
596 pos = rb_entry(rb, typeof(*pos), offset);
598 if (pos->mmap_type == mmo->mmap_type) {
599 spin_unlock(&obj->mmo.lock);
600 drm_vma_offset_remove(obj->base.dev->vma_offset_manager,
606 if (pos->mmap_type < mmo->mmap_type)
611 rb_link_node(&mmo->offset, rb, p);
612 rb_insert_color(&mmo->offset, &obj->mmo.offsets);
613 spin_unlock(&obj->mmo.lock);
618 static struct i915_mmap_offset *
619 mmap_offset_attach(struct drm_i915_gem_object *obj,
620 enum i915_mmap_type mmap_type,
621 struct drm_file *file)
623 struct drm_i915_private *i915 = to_i915(obj->base.dev);
624 struct i915_mmap_offset *mmo;
627 mmo = lookup_mmo(obj, mmap_type);
631 mmo = kmalloc(sizeof(*mmo), GFP_KERNEL);
633 return ERR_PTR(-ENOMEM);
636 mmo->mmap_type = mmap_type;
637 drm_vma_node_reset(&mmo->vma_node);
639 err = drm_vma_offset_add(obj->base.dev->vma_offset_manager,
640 &mmo->vma_node, obj->base.size / PAGE_SIZE);
644 /* Attempt to reap some mmap space from dead objects */
645 err = intel_gt_retire_requests_timeout(&i915->gt, MAX_SCHEDULE_TIMEOUT);
649 i915_gem_drain_freed_objects(i915);
650 err = drm_vma_offset_add(obj->base.dev->vma_offset_manager,
651 &mmo->vma_node, obj->base.size / PAGE_SIZE);
656 mmo = insert_mmo(obj, mmo);
657 GEM_BUG_ON(lookup_mmo(obj, mmap_type) != mmo);
660 drm_vma_node_allow(&mmo->vma_node, file);
669 __assign_mmap_offset(struct drm_file *file,
671 enum i915_mmap_type mmap_type,
674 struct drm_i915_gem_object *obj;
675 struct i915_mmap_offset *mmo;
678 obj = i915_gem_object_lookup(file, handle);
682 if (i915_gem_object_never_mmap(obj)) {
687 if (mmap_type != I915_MMAP_TYPE_GTT &&
688 !i915_gem_object_has_struct_page(obj) &&
689 !i915_gem_object_type_has(obj, I915_GEM_OBJECT_HAS_IOMEM)) {
694 mmo = mmap_offset_attach(obj, mmap_type, file);
700 *offset = drm_vma_node_offset_addr(&mmo->vma_node);
703 i915_gem_object_put(obj);
708 i915_gem_dumb_mmap_offset(struct drm_file *file,
709 struct drm_device *dev,
713 enum i915_mmap_type mmap_type;
715 if (boot_cpu_has(X86_FEATURE_PAT))
716 mmap_type = I915_MMAP_TYPE_WC;
717 else if (!i915_ggtt_has_aperture(&to_i915(dev)->ggtt))
720 mmap_type = I915_MMAP_TYPE_GTT;
722 return __assign_mmap_offset(file, handle, mmap_type, offset);
726 * i915_gem_mmap_offset_ioctl - prepare an object for GTT mmap'ing
728 * @data: GTT mapping ioctl data
729 * @file: GEM object info
731 * Simply returns the fake offset to userspace so it can mmap it.
732 * The mmap call will end up in drm_gem_mmap(), which will set things
733 * up so we can get faults in the handler above.
735 * The fault handler will take care of binding the object into the GTT
736 * (since it may have been evicted to make room for something), allocating
737 * a fence register, and mapping the appropriate aperture address into
741 i915_gem_mmap_offset_ioctl(struct drm_device *dev, void *data,
742 struct drm_file *file)
744 struct drm_i915_private *i915 = to_i915(dev);
745 struct drm_i915_gem_mmap_offset *args = data;
746 enum i915_mmap_type type;
750 * Historically we failed to check args.pad and args.offset
751 * and so we cannot use those fields for user input and we cannot
752 * add -EINVAL for them as the ABI is fixed, i.e. old userspace
753 * may be feeding in garbage in those fields.
755 * if (args->pad) return -EINVAL; is verbotten!
758 err = i915_user_extensions(u64_to_user_ptr(args->extensions),
763 switch (args->flags) {
764 case I915_MMAP_OFFSET_GTT:
765 if (!i915_ggtt_has_aperture(&i915->ggtt))
767 type = I915_MMAP_TYPE_GTT;
770 case I915_MMAP_OFFSET_WC:
771 if (!boot_cpu_has(X86_FEATURE_PAT))
773 type = I915_MMAP_TYPE_WC;
776 case I915_MMAP_OFFSET_WB:
777 type = I915_MMAP_TYPE_WB;
780 case I915_MMAP_OFFSET_UC:
781 if (!boot_cpu_has(X86_FEATURE_PAT))
783 type = I915_MMAP_TYPE_UC;
790 return __assign_mmap_offset(file, args->handle, type, &args->offset);
793 static void vm_open(struct vm_area_struct *vma)
795 struct i915_mmap_offset *mmo = vma->vm_private_data;
796 struct drm_i915_gem_object *obj = mmo->obj;
799 i915_gem_object_get(obj);
802 static void vm_close(struct vm_area_struct *vma)
804 struct i915_mmap_offset *mmo = vma->vm_private_data;
805 struct drm_i915_gem_object *obj = mmo->obj;
808 i915_gem_object_put(obj);
811 static const struct vm_operations_struct vm_ops_gtt = {
812 .fault = vm_fault_gtt,
818 static const struct vm_operations_struct vm_ops_cpu = {
819 .fault = vm_fault_cpu,
825 static int singleton_release(struct inode *inode, struct file *file)
827 struct drm_i915_private *i915 = file->private_data;
829 cmpxchg(&i915->gem.mmap_singleton, file, NULL);
830 drm_dev_put(&i915->drm);
835 static const struct file_operations singleton_fops = {
836 .owner = THIS_MODULE,
837 .release = singleton_release,
840 static struct file *mmap_singleton(struct drm_i915_private *i915)
845 file = READ_ONCE(i915->gem.mmap_singleton);
846 if (file && !get_file_rcu(file))
852 file = anon_inode_getfile("i915.gem", &singleton_fops, i915, O_RDWR);
856 /* Everyone shares a single global address space */
857 file->f_mapping = i915->drm.anon_inode->i_mapping;
859 smp_store_mb(i915->gem.mmap_singleton, file);
860 drm_dev_get(&i915->drm);
866 * This overcomes the limitation in drm_gem_mmap's assignment of a
867 * drm_gem_object as the vma->vm_private_data. Since we need to
868 * be able to resolve multiple mmap offsets which could be tied
869 * to a single gem object.
871 int i915_gem_mmap(struct file *filp, struct vm_area_struct *vma)
873 struct drm_vma_offset_node *node;
874 struct drm_file *priv = filp->private_data;
875 struct drm_device *dev = priv->minor->dev;
876 struct drm_i915_gem_object *obj = NULL;
877 struct i915_mmap_offset *mmo = NULL;
880 if (drm_dev_is_unplugged(dev))
884 drm_vma_offset_lock_lookup(dev->vma_offset_manager);
885 node = drm_vma_offset_exact_lookup_locked(dev->vma_offset_manager,
888 if (node && drm_vma_node_is_allowed(node, priv)) {
890 * Skip 0-refcnted objects as it is in the process of being
891 * destroyed and will be invalid when the vma manager lock
894 mmo = container_of(node, struct i915_mmap_offset, vma_node);
895 obj = i915_gem_object_get_rcu(mmo->obj);
897 drm_vma_offset_unlock_lookup(dev->vma_offset_manager);
900 return node ? -EACCES : -EINVAL;
902 if (i915_gem_object_is_readonly(obj)) {
903 if (vma->vm_flags & VM_WRITE) {
904 i915_gem_object_put(obj);
907 vma->vm_flags &= ~VM_MAYWRITE;
910 anon = mmap_singleton(to_i915(dev));
912 i915_gem_object_put(obj);
913 return PTR_ERR(anon);
916 vma->vm_flags |= VM_PFNMAP | VM_DONTEXPAND | VM_DONTDUMP;
917 vma->vm_private_data = mmo;
920 * We keep the ref on mmo->obj, not vm_file, but we require
921 * vma->vm_file->f_mapping, see vma_link(), for later revocation.
922 * Our userspace is accustomed to having per-file resource cleanup
923 * (i.e. contexts, objects and requests) on their close(fd), which
924 * requires avoiding extraneous references to their filp, hence why
925 * we prefer to use an anonymous file for their mmaps.
927 vma_set_file(vma, anon);
928 /* Drop the initial creation reference, the vma is now holding one. */
931 switch (mmo->mmap_type) {
932 case I915_MMAP_TYPE_WC:
934 pgprot_writecombine(vm_get_page_prot(vma->vm_flags));
935 vma->vm_ops = &vm_ops_cpu;
938 case I915_MMAP_TYPE_WB:
939 vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
940 vma->vm_ops = &vm_ops_cpu;
943 case I915_MMAP_TYPE_UC:
945 pgprot_noncached(vm_get_page_prot(vma->vm_flags));
946 vma->vm_ops = &vm_ops_cpu;
949 case I915_MMAP_TYPE_GTT:
951 pgprot_writecombine(vm_get_page_prot(vma->vm_flags));
952 vma->vm_ops = &vm_ops_gtt;
955 vma->vm_page_prot = pgprot_decrypted(vma->vm_page_prot);
960 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
961 #include "selftests/i915_gem_mman.c"