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[linux.git] / arch / riscv / include / asm / errata_list.h
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2021 Sifive.
4  */
5 #ifndef ASM_ERRATA_LIST_H
6 #define ASM_ERRATA_LIST_H
7
8 #include <asm/alternative.h>
9 #include <asm/vendorid_list.h>
10
11 #ifdef CONFIG_ERRATA_SIFIVE
12 #define ERRATA_SIFIVE_CIP_453 0
13 #define ERRATA_SIFIVE_CIP_1200 1
14 #define ERRATA_SIFIVE_NUMBER 2
15 #endif
16
17 #ifdef __ASSEMBLY__
18
19 #define ALT_INSN_FAULT(x)                                               \
20 ALTERNATIVE(__stringify(RISCV_PTR do_trap_insn_fault),                  \
21             __stringify(RISCV_PTR sifive_cip_453_insn_fault_trp),       \
22             SIFIVE_VENDOR_ID, ERRATA_SIFIVE_CIP_453,                    \
23             CONFIG_ERRATA_SIFIVE_CIP_453)
24
25 #define ALT_PAGE_FAULT(x)                                               \
26 ALTERNATIVE(__stringify(RISCV_PTR do_page_fault),                       \
27             __stringify(RISCV_PTR sifive_cip_453_page_fault_trp),       \
28             SIFIVE_VENDOR_ID, ERRATA_SIFIVE_CIP_453,                    \
29             CONFIG_ERRATA_SIFIVE_CIP_453)
30 #else /* !__ASSEMBLY__ */
31
32 #define ALT_FLUSH_TLB_PAGE(x)                                           \
33 asm(ALTERNATIVE("sfence.vma %0", "sfence.vma", SIFIVE_VENDOR_ID,        \
34                 ERRATA_SIFIVE_CIP_1200, CONFIG_ERRATA_SIFIVE_CIP_1200)  \
35                 : : "r" (addr) : "memory")
36
37 #endif /* __ASSEMBLY__ */
38
39 #endif
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