drivers/gpu/drm/amd/display/dc/bios/command_table_helper.c

   1 /*
   2  * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25
  26 #include "dm_services.h"
  27
  28 #include "atom.h"
  29
  30 #include "include/bios_parser_types.h"
  31
  32 #include "command_table_helper.h"
  33
  34 bool dal_bios_parser_init_cmd_tbl_helper(
  35         const struct command_table_helper **h,
  36         enum dce_version dce)
  37 {
  38         switch (dce) {
  39         case DCE_VERSION_8_0:
  40         case DCE_VERSION_8_1:
  41         case DCE_VERSION_8_3:
  42                 *h = dal_cmd_tbl_helper_dce80_get_table();
  43                 return true;
  44
  45         case DCE_VERSION_10_0:
  46                 *h = dal_cmd_tbl_helper_dce110_get_table();
  47                 return true;
  48
  49         case DCE_VERSION_11_0:
  50                 *h = dal_cmd_tbl_helper_dce110_get_table();
  51                 return true;
  52
  53         case DCE_VERSION_11_2:
  54                 *h = dal_cmd_tbl_helper_dce112_get_table();
  55                 return true;
  56
  57         default:
  58                 /* Unsupported DCE */
  59                 BREAK_TO_DEBUGGER();
  60                 return false;
  61         }
  62 }
  63
  64 /* real implementations */
  65
  66 bool dal_cmd_table_helper_controller_id_to_atom(
  67         enum controller_id id,
  68         uint8_t *atom_id)
  69 {
  70         if (atom_id == NULL) {
  71                 BREAK_TO_DEBUGGER();
  72                 return false;
  73         }
  74
  75         switch (id) {
  76         case CONTROLLER_ID_D0:
  77                 *atom_id = ATOM_CRTC1;
  78                 return true;
  79         case CONTROLLER_ID_D1:
  80                 *atom_id = ATOM_CRTC2;
  81                 return true;
  82         case CONTROLLER_ID_D2:
  83                 *atom_id = ATOM_CRTC3;
  84                 return true;
  85         case CONTROLLER_ID_D3:
  86                 *atom_id = ATOM_CRTC4;
  87                 return true;
  88         case CONTROLLER_ID_D4:
  89                 *atom_id = ATOM_CRTC5;
  90                 return true;
  91         case CONTROLLER_ID_D5:
  92                 *atom_id = ATOM_CRTC6;
  93                 return true;
  94         case CONTROLLER_ID_UNDERLAY0:
  95                 *atom_id = ATOM_UNDERLAY_PIPE0;
  96                 return true;
  97         case CONTROLLER_ID_UNDEFINED:
  98                 *atom_id = ATOM_CRTC_INVALID;
  99                 return true;
 100         default:
 101                 /* Wrong controller id */
 102                 BREAK_TO_DEBUGGER();
 103                 return false;
 104         }
 105 }
 106
 107 /**
 108 * translate_transmitter_bp_to_atom
 109 *
 110 * @brief
 111 *  Translate the Transmitter to the corresponding ATOM BIOS value
 112 *
 113 * @param
 114 *   input transmitter
 115 *   output digitalTransmitter
 116 *    // =00: Digital Transmitter1 ( UNIPHY linkAB )
 117 *    // =01: Digital Transmitter2 ( UNIPHY linkCD )
 118 *    // =02: Digital Transmitter3 ( UNIPHY linkEF )
 119 */
 120 uint8_t dal_cmd_table_helper_transmitter_bp_to_atom(
 121         enum transmitter t)
 122 {
 123         switch (t) {
 124         case TRANSMITTER_UNIPHY_A:
 125         case TRANSMITTER_UNIPHY_B:
 126         case TRANSMITTER_TRAVIS_LCD:
 127                 return 0;
 128         case TRANSMITTER_UNIPHY_C:
 129         case TRANSMITTER_UNIPHY_D:
 130                 return 1;
 131         case TRANSMITTER_UNIPHY_E:
 132         case TRANSMITTER_UNIPHY_F:
 133                 return 2;
 134         default:
 135                 /* Invalid Transmitter Type! */
 136                 BREAK_TO_DEBUGGER();
 137                 return 0;
 138         }
 139 }
 140
 141 uint32_t dal_cmd_table_helper_encoder_mode_bp_to_atom(
 142         enum signal_type s,
 143         bool enable_dp_audio)
 144 {
 145         switch (s) {
 146         case SIGNAL_TYPE_DVI_SINGLE_LINK:
 147         case SIGNAL_TYPE_DVI_DUAL_LINK:
 148                 return ATOM_ENCODER_MODE_DVI;
 149         case SIGNAL_TYPE_HDMI_TYPE_A:
 150                 return ATOM_ENCODER_MODE_HDMI;
 151         case SIGNAL_TYPE_LVDS:
 152                 return ATOM_ENCODER_MODE_LVDS;
 153         case SIGNAL_TYPE_EDP:
 154         case SIGNAL_TYPE_DISPLAY_PORT_MST:
 155         case SIGNAL_TYPE_DISPLAY_PORT:
 156         case SIGNAL_TYPE_VIRTUAL:
 157                 if (enable_dp_audio)
 158                         return ATOM_ENCODER_MODE_DP_AUDIO;
 159                 else
 160                         return ATOM_ENCODER_MODE_DP;
 161         case SIGNAL_TYPE_RGB:
 162                 return ATOM_ENCODER_MODE_CRT;
 163         default:
 164                 return ATOM_ENCODER_MODE_CRT;
 165         }
 166 }
 167
 168 void dal_cmd_table_helper_assign_control_parameter(
 169         const struct command_table_helper *h,
 170         struct bp_encoder_control *control,
 171         DIG_ENCODER_CONTROL_PARAMETERS_V2 *ctrl_param)
 172 {
 173         /* there are three transmitter blocks, each one has two links 4-lanes
 174          * each, A+B, C+D, E+F, Uniphy A, C and E are enumerated as link 0 in
 175          * each transmitter block B, D and F as link 1, third transmitter block
 176          * has non splitable links (UniphyE and UniphyF can not be configured
 177          * separately to drive two different streams)
 178          */
 179         if ((control->transmitter == TRANSMITTER_UNIPHY_B) ||
 180                 (control->transmitter == TRANSMITTER_UNIPHY_D) ||
 181                 (control->transmitter == TRANSMITTER_UNIPHY_F)) {
 182                 /* Bit2: Link Select
 183                  * =0: PHY linkA/C/E
 184                  * =1: PHY linkB/D/F
 185                  */
 186                 ctrl_param->acConfig.ucLinkSel = 1;
 187         }
 188
 189         /* Bit[4:3]: Transmitter Selection
 190          * =00: Digital Transmitter1 ( UNIPHY linkAB )
 191          * =01: Digital Transmitter2 ( UNIPHY linkCD )
 192          * =02: Digital Transmitter3 ( UNIPHY linkEF )
 193          * =03: Reserved
 194          */
 195         ctrl_param->acConfig.ucTransmitterSel =
 196                 (uint8_t)(h->transmitter_bp_to_atom(control->transmitter));
 197
 198         /* We need to convert from KHz units into 10KHz units */
 199         ctrl_param->ucAction = h->encoder_action_to_atom(control->action);
 200         ctrl_param->usPixelClock = cpu_to_le16((uint16_t)(control->pixel_clock / 10));
 201         ctrl_param->ucEncoderMode =
 202                 (uint8_t)(h->encoder_mode_bp_to_atom(
 203                         control->signal, control->enable_dp_audio));
 204         ctrl_param->ucLaneNum = (uint8_t)(control->lanes_number);
 205 }
 206
 207 bool dal_cmd_table_helper_clock_source_id_to_ref_clk_src(
 208         enum clock_source_id id,
 209         uint32_t *ref_clk_src_id)
 210 {
 211         if (ref_clk_src_id == NULL) {
 212                 BREAK_TO_DEBUGGER();
 213                 return false;
 214         }
 215
 216         switch (id) {
 217         case CLOCK_SOURCE_ID_PLL1:
 218                 *ref_clk_src_id = ENCODER_REFCLK_SRC_P1PLL;
 219                 return true;
 220         case CLOCK_SOURCE_ID_PLL2:
 221                 *ref_clk_src_id = ENCODER_REFCLK_SRC_P2PLL;
 222                 return true;
 223         case CLOCK_SOURCE_ID_DCPLL:
 224                 *ref_clk_src_id = ENCODER_REFCLK_SRC_DCPLL;
 225                 return true;
 226         case CLOCK_SOURCE_ID_EXTERNAL:
 227                 *ref_clk_src_id = ENCODER_REFCLK_SRC_EXTCLK;
 228                 return true;
 229         case CLOCK_SOURCE_ID_UNDEFINED:
 230                 *ref_clk_src_id = ENCODER_REFCLK_SRC_INVALID;
 231                 return true;
 232         default:
 233                 /* Unsupported clock source id */
 234                 BREAK_TO_DEBUGGER();
 235                 return false;
 236         }
 237 }
 238
 239 uint8_t dal_cmd_table_helper_encoder_id_to_atom(
 240         enum encoder_id id)
 241 {
 242         switch (id) {
 243         case ENCODER_ID_INTERNAL_LVDS:
 244                 return ENCODER_OBJECT_ID_INTERNAL_LVDS;
 245         case ENCODER_ID_INTERNAL_TMDS1:
 246                 return ENCODER_OBJECT_ID_INTERNAL_TMDS1;
 247         case ENCODER_ID_INTERNAL_TMDS2:
 248                 return ENCODER_OBJECT_ID_INTERNAL_TMDS2;
 249         case ENCODER_ID_INTERNAL_DAC1:
 250                 return ENCODER_OBJECT_ID_INTERNAL_DAC1;
 251         case ENCODER_ID_INTERNAL_DAC2:
 252                 return ENCODER_OBJECT_ID_INTERNAL_DAC2;
 253         case ENCODER_ID_INTERNAL_LVTM1:
 254                 return ENCODER_OBJECT_ID_INTERNAL_LVTM1;
 255         case ENCODER_ID_INTERNAL_HDMI:
 256                 return ENCODER_OBJECT_ID_HDMI_INTERNAL;
 257         case ENCODER_ID_EXTERNAL_TRAVIS:
 258                 return ENCODER_OBJECT_ID_TRAVIS;
 259         case ENCODER_ID_EXTERNAL_NUTMEG:
 260                 return ENCODER_OBJECT_ID_NUTMEG;
 261         case ENCODER_ID_INTERNAL_KLDSCP_TMDS1:
 262                 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1;
 263         case ENCODER_ID_INTERNAL_KLDSCP_DAC1:
 264                 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1;
 265         case ENCODER_ID_INTERNAL_KLDSCP_DAC2:
 266                 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2;
 267         case ENCODER_ID_EXTERNAL_MVPU_FPGA:
 268                 return ENCODER_OBJECT_ID_MVPU_FPGA;
 269         case ENCODER_ID_INTERNAL_DDI:
 270                 return ENCODER_OBJECT_ID_INTERNAL_DDI;
 271         case ENCODER_ID_INTERNAL_UNIPHY:
 272                 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY;
 273         case ENCODER_ID_INTERNAL_KLDSCP_LVTMA:
 274                 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA;
 275         case ENCODER_ID_INTERNAL_UNIPHY1:
 276                 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY1;
 277         case ENCODER_ID_INTERNAL_UNIPHY2:
 278                 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY2;
 279         case ENCODER_ID_INTERNAL_UNIPHY3:
 280                 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY3;
 281         case ENCODER_ID_INTERNAL_WIRELESS:
 282                 return ENCODER_OBJECT_ID_INTERNAL_VCE;
 283         case ENCODER_ID_UNKNOWN:
 284                 return ENCODER_OBJECT_ID_NONE;
 285         default:
 286                 /* Invalid encoder id */
 287                 BREAK_TO_DEBUGGER();
 288                 return ENCODER_OBJECT_ID_NONE;
 289         }
 290 }