1 // SPDX-License-Identifier: GPL-2.0+
3 * si1133.c - Support for Silabs SI1133 combined ambient
4 * light and UV index sensors
9 #include <linux/delay.h>
10 #include <linux/i2c.h>
11 #include <linux/interrupt.h>
12 #include <linux/module.h>
13 #include <linux/regmap.h>
15 #include <linux/iio/iio.h>
16 #include <linux/iio/sysfs.h>
18 #include <linux/util_macros.h>
20 #define SI1133_REG_PART_ID 0x00
21 #define SI1133_REG_REV_ID 0x01
22 #define SI1133_REG_MFR_ID 0x02
23 #define SI1133_REG_INFO0 0x03
24 #define SI1133_REG_INFO1 0x04
26 #define SI1133_PART_ID 0x33
28 #define SI1133_REG_HOSTIN0 0x0A
29 #define SI1133_REG_COMMAND 0x0B
30 #define SI1133_REG_IRQ_ENABLE 0x0F
31 #define SI1133_REG_RESPONSE1 0x10
32 #define SI1133_REG_RESPONSE0 0x11
33 #define SI1133_REG_IRQ_STATUS 0x12
34 #define SI1133_REG_MEAS_RATE 0x1A
36 #define SI1133_IRQ_CHANNEL_ENABLE 0xF
38 #define SI1133_CMD_RESET_CTR 0x00
39 #define SI1133_CMD_RESET_SW 0x01
40 #define SI1133_CMD_FORCE 0x11
41 #define SI1133_CMD_START_AUTONOMOUS 0x13
42 #define SI1133_CMD_PARAM_SET 0x80
43 #define SI1133_CMD_PARAM_QUERY 0x40
44 #define SI1133_CMD_PARAM_MASK 0x3F
46 #define SI1133_CMD_ERR_MASK BIT(4)
47 #define SI1133_CMD_SEQ_MASK 0xF
48 #define SI1133_MAX_CMD_CTR 0xF
50 #define SI1133_PARAM_REG_CHAN_LIST 0x01
51 #define SI1133_PARAM_REG_ADCCONFIG(x) ((x) * 4) + 2
52 #define SI1133_PARAM_REG_ADCSENS(x) ((x) * 4) + 3
53 #define SI1133_PARAM_REG_ADCPOST(x) ((x) * 4) + 4
55 #define SI1133_ADCMUX_MASK 0x1F
57 #define SI1133_ADCCONFIG_DECIM_RATE(x) (x) << 5
59 #define SI1133_ADCSENS_SCALE_MASK 0x70
60 #define SI1133_ADCSENS_SCALE_SHIFT 4
61 #define SI1133_ADCSENS_HSIG_MASK BIT(7)
62 #define SI1133_ADCSENS_HSIG_SHIFT 7
63 #define SI1133_ADCSENS_HW_GAIN_MASK 0xF
64 #define SI1133_ADCSENS_NB_MEAS(x) fls(x) << SI1133_ADCSENS_SCALE_SHIFT
66 #define SI1133_ADCPOST_24BIT_EN BIT(6)
67 #define SI1133_ADCPOST_POSTSHIFT_BITQTY(x) (x & GENMASK(2, 0)) << 3
69 #define SI1133_PARAM_ADCMUX_SMALL_IR 0x0
70 #define SI1133_PARAM_ADCMUX_MED_IR 0x1
71 #define SI1133_PARAM_ADCMUX_LARGE_IR 0x2
72 #define SI1133_PARAM_ADCMUX_WHITE 0xB
73 #define SI1133_PARAM_ADCMUX_LARGE_WHITE 0xD
74 #define SI1133_PARAM_ADCMUX_UV 0x18
75 #define SI1133_PARAM_ADCMUX_UV_DEEP 0x19
77 #define SI1133_ERR_INVALID_CMD 0x0
78 #define SI1133_ERR_INVALID_LOCATION_CMD 0x1
79 #define SI1133_ERR_SATURATION_ADC_OR_OVERFLOW_ACCUMULATION 0x2
80 #define SI1133_ERR_OUTPUT_BUFFER_OVERFLOW 0x3
82 #define SI1133_COMPLETION_TIMEOUT_MS 500
84 #define SI1133_CMD_MINSLEEP_US_LOW 5000
85 #define SI1133_CMD_MINSLEEP_US_HIGH 7500
86 #define SI1133_CMD_TIMEOUT_MS 25
87 #define SI1133_CMD_LUX_TIMEOUT_MS 5000
88 #define SI1133_CMD_TIMEOUT_US SI1133_CMD_TIMEOUT_MS * 1000
90 #define SI1133_REG_HOSTOUT(x) (x) + 0x13
92 #define SI1133_MEASUREMENT_FREQUENCY 1250
94 #define SI1133_X_ORDER_MASK 0x0070
95 #define SI1133_Y_ORDER_MASK 0x0007
96 #define si1133_get_x_order(m) ((m) & SI1133_X_ORDER_MASK) >> 4
97 #define si1133_get_y_order(m) ((m) & SI1133_Y_ORDER_MASK)
99 #define SI1133_LUX_ADC_MASK 0xE
100 #define SI1133_ADC_THRESHOLD 16000
101 #define SI1133_INPUT_FRACTION_HIGH 7
102 #define SI1133_INPUT_FRACTION_LOW 15
103 #define SI1133_LUX_OUTPUT_FRACTION 12
104 #define SI1133_LUX_BUFFER_SIZE 9
106 static const int si1133_scale_available[] = {
107 1, 2, 4, 8, 16, 32, 64, 128};
109 static IIO_CONST_ATTR(scale_available, "1 2 4 8 16 32 64 128");
111 static IIO_CONST_ATTR_INT_TIME_AVAIL("0.0244 0.0488 0.0975 0.195 0.390 0.780 "
112 "1.560 3.120 6.24 12.48 25.0 50.0");
114 /* A.K.A. HW_GAIN in datasheet */
115 enum si1133_int_time {
130 /* Integration time in milliseconds, nanoseconds */
131 static const int si1133_int_time_table[][2] = {
132 [_24_4_us] = {0, 24400},
133 [_48_8_us] = {0, 48800},
134 [_97_5_us] = {0, 97500},
135 [_195_0_us] = {0, 195000},
136 [_390_0_us] = {0, 390000},
137 [_780_0_us] = {0, 780000},
138 [_1_560_0_us] = {1, 560000},
139 [_3_120_0_us] = {3, 120000},
140 [_6_240_0_us] = {6, 240000},
141 [_12_480_0_us] = {12, 480000},
142 [_25_ms] = {25, 000000},
143 [_50_ms] = {50, 000000},
146 static const struct regmap_range si1133_reg_ranges[] = {
147 regmap_reg_range(0x00, 0x02),
148 regmap_reg_range(0x0A, 0x0B),
149 regmap_reg_range(0x0F, 0x0F),
150 regmap_reg_range(0x10, 0x12),
151 regmap_reg_range(0x13, 0x2C),
154 static const struct regmap_range si1133_reg_ro_ranges[] = {
155 regmap_reg_range(0x00, 0x02),
156 regmap_reg_range(0x10, 0x2C),
159 static const struct regmap_range si1133_precious_ranges[] = {
160 regmap_reg_range(0x12, 0x12),
163 static const struct regmap_access_table si1133_write_ranges_table = {
164 .yes_ranges = si1133_reg_ranges,
165 .n_yes_ranges = ARRAY_SIZE(si1133_reg_ranges),
166 .no_ranges = si1133_reg_ro_ranges,
167 .n_no_ranges = ARRAY_SIZE(si1133_reg_ro_ranges),
170 static const struct regmap_access_table si1133_read_ranges_table = {
171 .yes_ranges = si1133_reg_ranges,
172 .n_yes_ranges = ARRAY_SIZE(si1133_reg_ranges),
175 static const struct regmap_access_table si1133_precious_table = {
176 .yes_ranges = si1133_precious_ranges,
177 .n_yes_ranges = ARRAY_SIZE(si1133_precious_ranges),
180 static const struct regmap_config si1133_regmap_config = {
184 .max_register = 0x2C,
186 .wr_table = &si1133_write_ranges_table,
187 .rd_table = &si1133_read_ranges_table,
189 .precious_table = &si1133_precious_table,
193 struct regmap *regmap;
194 struct i2c_client *client;
196 /* Lock protecting one command at a time can be processed */
204 struct completion completion;
207 struct si1133_coeff {
212 struct si1133_lux_coeff {
213 struct si1133_coeff coeff_high[4];
214 struct si1133_coeff coeff_low[9];
217 static const struct si1133_lux_coeff lux_coeff = {
237 static int si1133_calculate_polynomial_inner(u32 input, u8 fraction, u16 mag,
240 return ((input << fraction) / mag) << shift;
243 static int si1133_calculate_output(u32 x, u32 y, u8 x_order, u8 y_order,
244 u8 input_fraction, s8 sign,
245 const struct si1133_coeff *coeffs)
253 shift = ((u16)coeffs->info & 0xFF00) >> 8;
259 x1 = si1133_calculate_polynomial_inner(x, input_fraction,
266 y1 = si1133_calculate_polynomial_inner(y, input_fraction,
272 return sign * x1 * x2 * y1 * y2;
276 * The algorithm is from:
277 * https://siliconlabs.github.io/Gecko_SDK_Doc/efm32zg/html/si1133_8c_source.html#l00716
279 static int si1133_calc_polynomial(u32 x, u32 y, u8 input_fraction, u8 num_coeff,
280 const struct si1133_coeff *coeffs)
287 for (counter = 0; counter < num_coeff; counter++) {
288 if (coeffs->info < 0)
293 x_order = si1133_get_x_order(coeffs->info);
294 y_order = si1133_get_y_order(coeffs->info);
296 if ((x_order == 0) && (y_order == 0))
298 sign * coeffs->mag << SI1133_LUX_OUTPUT_FRACTION;
300 output += si1133_calculate_output(x, y, x_order,
302 input_fraction, sign,
310 static int si1133_cmd_reset_sw(struct si1133_data *data)
312 struct device *dev = &data->client->dev;
314 unsigned long timeout;
317 err = regmap_write(data->regmap, SI1133_REG_COMMAND,
318 SI1133_CMD_RESET_SW);
322 timeout = jiffies + msecs_to_jiffies(SI1133_CMD_TIMEOUT_MS);
324 err = regmap_read(data->regmap, SI1133_REG_RESPONSE0, &resp);
326 usleep_range(SI1133_CMD_MINSLEEP_US_LOW,
327 SI1133_CMD_MINSLEEP_US_HIGH);
331 if ((resp & SI1133_MAX_CMD_CTR) == SI1133_MAX_CMD_CTR)
334 if (time_after(jiffies, timeout)) {
335 dev_warn(dev, "Timeout on reset ctr resp: %d\n", resp);
341 data->rsp_seq = SI1133_MAX_CMD_CTR;
346 static int si1133_parse_response_err(struct device *dev, u32 resp, u8 cmd)
351 case SI1133_ERR_OUTPUT_BUFFER_OVERFLOW:
352 dev_warn(dev, "Output buffer overflow: %#02hhx\n", cmd);
354 case SI1133_ERR_SATURATION_ADC_OR_OVERFLOW_ACCUMULATION:
355 dev_warn(dev, "Saturation of the ADC or overflow of accumulation: %#02hhx\n",
358 case SI1133_ERR_INVALID_LOCATION_CMD:
360 "Parameter access to an invalid location: %#02hhx\n",
363 case SI1133_ERR_INVALID_CMD:
364 dev_warn(dev, "Invalid command %#02hhx\n", cmd);
367 dev_warn(dev, "Unknown error %#02hhx\n", cmd);
372 static int si1133_cmd_reset_counter(struct si1133_data *data)
374 int err = regmap_write(data->regmap, SI1133_REG_COMMAND,
375 SI1133_CMD_RESET_CTR);
384 static int si1133_command(struct si1133_data *data, u8 cmd)
386 struct device *dev = &data->client->dev;
391 mutex_lock(&data->mutex);
393 expected_seq = (data->rsp_seq + 1) & SI1133_MAX_CMD_CTR;
395 if (cmd == SI1133_CMD_FORCE)
396 reinit_completion(&data->completion);
398 err = regmap_write(data->regmap, SI1133_REG_COMMAND, cmd);
400 dev_warn(dev, "Failed to write command %#02hhx, ret=%d\n", cmd,
405 if (cmd == SI1133_CMD_FORCE) {
407 if (!wait_for_completion_timeout(&data->completion,
408 msecs_to_jiffies(SI1133_COMPLETION_TIMEOUT_MS))) {
412 err = regmap_read(data->regmap, SI1133_REG_RESPONSE0, &resp);
416 err = regmap_read_poll_timeout(data->regmap,
417 SI1133_REG_RESPONSE0, resp,
418 (resp & SI1133_CMD_SEQ_MASK) ==
420 (resp & SI1133_CMD_ERR_MASK),
421 SI1133_CMD_MINSLEEP_US_LOW,
422 SI1133_CMD_TIMEOUT_MS * 1000);
425 "Failed to read command %#02hhx, ret=%d\n",
431 if (resp & SI1133_CMD_ERR_MASK) {
432 err = si1133_parse_response_err(dev, resp, cmd);
433 si1133_cmd_reset_counter(data);
435 data->rsp_seq = expected_seq;
439 mutex_unlock(&data->mutex);
444 static int si1133_param_set(struct si1133_data *data, u8 param, u32 value)
446 int err = regmap_write(data->regmap, SI1133_REG_HOSTIN0, value);
451 return si1133_command(data, SI1133_CMD_PARAM_SET |
452 (param & SI1133_CMD_PARAM_MASK));
455 static int si1133_param_query(struct si1133_data *data, u8 param, u32 *result)
457 int err = si1133_command(data, SI1133_CMD_PARAM_QUERY |
458 (param & SI1133_CMD_PARAM_MASK));
462 return regmap_read(data->regmap, SI1133_REG_RESPONSE1, result);
465 #define SI1133_CHANNEL(_ch, _type) \
468 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
469 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_INT_TIME) | \
470 BIT(IIO_CHAN_INFO_SCALE) | \
471 BIT(IIO_CHAN_INFO_HARDWAREGAIN), \
473 static const struct iio_chan_spec si1133_channels[] = {
476 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
480 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_WHITE, IIO_INTENSITY)
481 .channel2 = IIO_MOD_LIGHT_BOTH,
484 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_LARGE_WHITE, IIO_INTENSITY)
485 .channel2 = IIO_MOD_LIGHT_BOTH,
486 .extend_name = "large",
489 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_SMALL_IR, IIO_INTENSITY)
490 .extend_name = "small",
492 .channel2 = IIO_MOD_LIGHT_IR,
495 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_MED_IR, IIO_INTENSITY)
497 .channel2 = IIO_MOD_LIGHT_IR,
500 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_LARGE_IR, IIO_INTENSITY)
501 .extend_name = "large",
503 .channel2 = IIO_MOD_LIGHT_IR,
506 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_UV, IIO_UVINDEX)
509 SI1133_CHANNEL(SI1133_PARAM_ADCMUX_UV_DEEP, IIO_UVINDEX)
511 .channel2 = IIO_MOD_LIGHT_DUV,
515 static int si1133_get_int_time_index(int milliseconds, int nanoseconds)
519 for (i = 0; i < ARRAY_SIZE(si1133_int_time_table); i++) {
520 if (milliseconds == si1133_int_time_table[i][0] &&
521 nanoseconds == si1133_int_time_table[i][1])
527 static int si1133_set_integration_time(struct si1133_data *data, u8 adc,
528 int milliseconds, int nanoseconds)
532 index = si1133_get_int_time_index(milliseconds, nanoseconds);
536 data->adc_sens[adc] &= 0xF0;
537 data->adc_sens[adc] |= index;
539 return si1133_param_set(data, SI1133_PARAM_REG_ADCSENS(0),
540 data->adc_sens[adc]);
543 static int si1133_set_chlist(struct si1133_data *data, u8 scan_mask)
545 /* channel list already set, no need to reprogram */
546 if (data->scan_mask == scan_mask)
549 data->scan_mask = scan_mask;
551 return si1133_param_set(data, SI1133_PARAM_REG_CHAN_LIST, scan_mask);
554 static int si1133_chan_set_adcconfig(struct si1133_data *data, u8 adc,
559 err = si1133_param_set(data, SI1133_PARAM_REG_ADCCONFIG(adc),
564 data->adc_config[adc] = adc_config;
569 static int si1133_update_adcconfig(struct si1133_data *data, uint8_t adc,
570 u8 mask, u8 shift, u8 value)
575 err = si1133_param_query(data, SI1133_PARAM_REG_ADCCONFIG(adc),
581 adc_config |= (value << shift);
583 return si1133_chan_set_adcconfig(data, adc, adc_config);
586 static int si1133_set_adcmux(struct si1133_data *data, u8 adc, u8 mux)
588 if ((mux & data->adc_config[adc]) == mux)
589 return 0; /* mux already set to correct value */
591 return si1133_update_adcconfig(data, adc, SI1133_ADCMUX_MASK, 0, mux);
594 static int si1133_force_measurement(struct si1133_data *data)
596 return si1133_command(data, SI1133_CMD_FORCE);
599 static int si1133_bulk_read(struct si1133_data *data, u8 start_reg, u8 length,
604 err = si1133_force_measurement(data);
608 return regmap_bulk_read(data->regmap, start_reg, buffer, length);
611 static int si1133_measure(struct si1133_data *data,
612 struct iio_chan_spec const *chan,
619 err = si1133_set_adcmux(data, 0, chan->channel);
623 /* Deactivate lux measurements if they were active */
624 err = si1133_set_chlist(data, BIT(0));
628 err = si1133_bulk_read(data, SI1133_REG_HOSTOUT(0), sizeof(resp),
633 *val = be16_to_cpu(resp);
638 static irqreturn_t si1133_threaded_irq_handler(int irq, void *private)
640 struct iio_dev *iio_dev = private;
641 struct si1133_data *data = iio_priv(iio_dev);
645 err = regmap_read(data->regmap, SI1133_REG_IRQ_STATUS, &irq_status);
647 dev_err_ratelimited(&iio_dev->dev, "Error reading IRQ\n");
651 if (irq_status != data->scan_mask)
655 complete(&data->completion);
660 static int si1133_scale_to_swgain(int scale_integer, int scale_fractional)
662 scale_integer = find_closest(scale_integer, si1133_scale_available,
663 ARRAY_SIZE(si1133_scale_available));
664 if (scale_integer < 0 ||
665 scale_integer > ARRAY_SIZE(si1133_scale_available) ||
666 scale_fractional != 0)
669 return scale_integer;
672 static int si1133_chan_set_adcsens(struct si1133_data *data, u8 adc,
677 err = si1133_param_set(data, SI1133_PARAM_REG_ADCSENS(adc), adc_sens);
681 data->adc_sens[adc] = adc_sens;
686 static int si1133_update_adcsens(struct si1133_data *data, u8 mask,
692 err = si1133_param_query(data, SI1133_PARAM_REG_ADCSENS(0),
698 adc_sens |= (value << shift);
700 return si1133_chan_set_adcsens(data, 0, adc_sens);
703 static int si1133_get_lux(struct si1133_data *data, int *val)
710 u8 buffer[SI1133_LUX_BUFFER_SIZE];
712 /* Activate lux channels */
713 err = si1133_set_chlist(data, SI1133_LUX_ADC_MASK);
717 err = si1133_bulk_read(data, SI1133_REG_HOSTOUT(0),
718 SI1133_LUX_BUFFER_SIZE, buffer);
722 high_vis = (buffer[0] << 16) | (buffer[1] << 8) | buffer[2];
723 low_vis = (buffer[3] << 16) | (buffer[4] << 8) | buffer[5];
724 ir = (buffer[6] << 16) | (buffer[7] << 8) | buffer[8];
726 if (high_vis > SI1133_ADC_THRESHOLD || ir > SI1133_ADC_THRESHOLD)
727 lux = si1133_calc_polynomial(high_vis, ir,
728 SI1133_INPUT_FRACTION_HIGH,
729 ARRAY_SIZE(lux_coeff.coeff_high),
730 &lux_coeff.coeff_high[0]);
732 lux = si1133_calc_polynomial(low_vis, ir,
733 SI1133_INPUT_FRACTION_LOW,
734 ARRAY_SIZE(lux_coeff.coeff_low),
735 &lux_coeff.coeff_low[0]);
737 *val = lux >> SI1133_LUX_OUTPUT_FRACTION;
742 static int si1133_read_raw(struct iio_dev *iio_dev,
743 struct iio_chan_spec const *chan,
744 int *val, int *val2, long mask)
746 struct si1133_data *data = iio_priv(iio_dev);
747 u8 adc_sens = data->adc_sens[0];
751 case IIO_CHAN_INFO_PROCESSED:
752 switch (chan->type) {
754 err = si1133_get_lux(data, val);
762 case IIO_CHAN_INFO_RAW:
763 switch (chan->type) {
766 err = si1133_measure(data, chan, val);
774 case IIO_CHAN_INFO_INT_TIME:
775 switch (chan->type) {
778 adc_sens &= SI1133_ADCSENS_HW_GAIN_MASK;
780 *val = si1133_int_time_table[adc_sens][0];
781 *val2 = si1133_int_time_table[adc_sens][1];
782 return IIO_VAL_INT_PLUS_MICRO;
786 case IIO_CHAN_INFO_SCALE:
787 switch (chan->type) {
790 adc_sens &= SI1133_ADCSENS_SCALE_MASK;
791 adc_sens >>= SI1133_ADCSENS_SCALE_SHIFT;
793 *val = BIT(adc_sens);
799 case IIO_CHAN_INFO_HARDWAREGAIN:
800 switch (chan->type) {
803 adc_sens >>= SI1133_ADCSENS_HSIG_SHIFT;
816 static int si1133_write_raw(struct iio_dev *iio_dev,
817 struct iio_chan_spec const *chan,
818 int val, int val2, long mask)
820 struct si1133_data *data = iio_priv(iio_dev);
823 case IIO_CHAN_INFO_SCALE:
824 switch (chan->type) {
827 val = si1133_scale_to_swgain(val, val2);
831 return si1133_update_adcsens(data,
832 SI1133_ADCSENS_SCALE_MASK,
833 SI1133_ADCSENS_SCALE_SHIFT,
838 case IIO_CHAN_INFO_INT_TIME:
839 return si1133_set_integration_time(data, 0, val, val2);
840 case IIO_CHAN_INFO_HARDWAREGAIN:
841 switch (chan->type) {
844 if (val != 0 && val != 1)
847 return si1133_update_adcsens(data,
848 SI1133_ADCSENS_HSIG_MASK,
849 SI1133_ADCSENS_HSIG_SHIFT,
859 static struct attribute *si1133_attributes[] = {
860 &iio_const_attr_integration_time_available.dev_attr.attr,
861 &iio_const_attr_scale_available.dev_attr.attr,
865 static const struct attribute_group si1133_attribute_group = {
866 .attrs = si1133_attributes,
869 static const struct iio_info si1133_info = {
870 .read_raw = si1133_read_raw,
871 .write_raw = si1133_write_raw,
872 .attrs = &si1133_attribute_group,
876 * si1133_init_lux_channels - Configure 3 different channels(adc) (1,2 and 3)
877 * The channel configuration for the lux measurement was taken from :
878 * https://siliconlabs.github.io/Gecko_SDK_Doc/efm32zg/html/si1133_8c_source.html#l00578
880 * Reserved the channel 0 for the other raw measurements
882 static int si1133_init_lux_channels(struct si1133_data *data)
886 err = si1133_chan_set_adcconfig(data, 1,
887 SI1133_ADCCONFIG_DECIM_RATE(1) |
888 SI1133_PARAM_ADCMUX_LARGE_WHITE);
892 err = si1133_param_set(data, SI1133_PARAM_REG_ADCPOST(1),
893 SI1133_ADCPOST_24BIT_EN |
894 SI1133_ADCPOST_POSTSHIFT_BITQTY(0));
897 err = si1133_chan_set_adcsens(data, 1, SI1133_ADCSENS_HSIG_MASK |
898 SI1133_ADCSENS_NB_MEAS(64) | _48_8_us);
902 err = si1133_chan_set_adcconfig(data, 2,
903 SI1133_ADCCONFIG_DECIM_RATE(1) |
904 SI1133_PARAM_ADCMUX_LARGE_WHITE);
908 err = si1133_param_set(data, SI1133_PARAM_REG_ADCPOST(2),
909 SI1133_ADCPOST_24BIT_EN |
910 SI1133_ADCPOST_POSTSHIFT_BITQTY(2));
914 err = si1133_chan_set_adcsens(data, 2, SI1133_ADCSENS_HSIG_MASK |
915 SI1133_ADCSENS_NB_MEAS(1) | _3_120_0_us);
919 err = si1133_chan_set_adcconfig(data, 3,
920 SI1133_ADCCONFIG_DECIM_RATE(1) |
921 SI1133_PARAM_ADCMUX_MED_IR);
925 err = si1133_param_set(data, SI1133_PARAM_REG_ADCPOST(3),
926 SI1133_ADCPOST_24BIT_EN |
927 SI1133_ADCPOST_POSTSHIFT_BITQTY(2));
931 return si1133_chan_set_adcsens(data, 3, SI1133_ADCSENS_HSIG_MASK |
932 SI1133_ADCSENS_NB_MEAS(64) | _48_8_us);
935 static int si1133_initialize(struct si1133_data *data)
939 err = si1133_cmd_reset_sw(data);
943 /* Turn off autonomous mode */
944 err = si1133_param_set(data, SI1133_REG_MEAS_RATE, 0);
948 err = si1133_init_lux_channels(data);
952 return regmap_write(data->regmap, SI1133_REG_IRQ_ENABLE,
953 SI1133_IRQ_CHANNEL_ENABLE);
956 static int si1133_validate_ids(struct iio_dev *iio_dev)
958 struct si1133_data *data = iio_priv(iio_dev);
960 unsigned int part_id, rev_id, mfr_id;
963 err = regmap_read(data->regmap, SI1133_REG_PART_ID, &part_id);
967 err = regmap_read(data->regmap, SI1133_REG_REV_ID, &rev_id);
971 err = regmap_read(data->regmap, SI1133_REG_MFR_ID, &mfr_id);
975 dev_info(&iio_dev->dev,
976 "Device ID part %#02hhx rev %#02hhx mfr %#02hhx\n",
977 part_id, rev_id, mfr_id);
978 if (part_id != SI1133_PART_ID) {
979 dev_err(&iio_dev->dev,
980 "Part ID mismatch got %#02hhx, expected %#02x\n",
981 part_id, SI1133_PART_ID);
988 static int si1133_probe(struct i2c_client *client,
989 const struct i2c_device_id *id)
991 struct si1133_data *data;
992 struct iio_dev *iio_dev;
995 iio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
999 data = iio_priv(iio_dev);
1001 init_completion(&data->completion);
1003 data->regmap = devm_regmap_init_i2c(client, &si1133_regmap_config);
1004 if (IS_ERR(data->regmap)) {
1005 err = PTR_ERR(data->regmap);
1006 dev_err(&client->dev, "Failed to initialise regmap: %d\n", err);
1010 i2c_set_clientdata(client, iio_dev);
1011 data->client = client;
1013 iio_dev->dev.parent = &client->dev;
1014 iio_dev->name = id->name;
1015 iio_dev->channels = si1133_channels;
1016 iio_dev->num_channels = ARRAY_SIZE(si1133_channels);
1017 iio_dev->info = &si1133_info;
1018 iio_dev->modes = INDIO_DIRECT_MODE;
1020 mutex_init(&data->mutex);
1022 err = si1133_validate_ids(iio_dev);
1026 err = si1133_initialize(data);
1028 dev_err(&client->dev,
1029 "Error when initializing chip: %d\n", err);
1034 dev_err(&client->dev,
1035 "Required interrupt not provided, cannot proceed\n");
1039 err = devm_request_threaded_irq(&client->dev, client->irq,
1041 si1133_threaded_irq_handler,
1042 IRQF_ONESHOT | IRQF_SHARED,
1043 client->name, iio_dev);
1045 dev_warn(&client->dev, "Request irq %d failed: %i\n",
1050 return devm_iio_device_register(&client->dev, iio_dev);
1053 static const struct i2c_device_id si1133_ids[] = {
1057 MODULE_DEVICE_TABLE(i2c, si1133_ids);
1059 static struct i2c_driver si1133_driver = {
1063 .probe = si1133_probe,
1064 .id_table = si1133_ids,
1067 module_i2c_driver(si1133_driver);
1070 MODULE_DESCRIPTION("Silabs SI1133, UV index sensor and ambient light sensor driver");
1071 MODULE_LICENSE("GPL");