1 // SPDX-License-Identifier: GPL-2.0-only
3 * PowerQUICC II support functions
7 * Copyright (c) 2007 Freescale Semiconductor, Inc.
17 #define PQ2_SCCR (0x10c80/4) /* System Clock Configuration Register */
18 #define PQ2_SCMR (0x10c88/4) /* System Clock Mode Register */
20 static int pq2_corecnf_map[] = {
21 3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, -1,
22 6, 5, 13, 2, 14, 4, 15, 9, 0, 11, 8, 10, 16, 12, 7, -1
25 /* Get various clocks from crystal frequency.
26 * Returns zero on failure and non-zero on success.
28 int pq2_get_clocks(u32 crystal, u32 *sysfreq, u32 *corefreq,
29 u32 *timebase, u32 *brgfreq)
32 u32 sccr, scmr, mainclk, busclk;
33 int corecnf, busdf, plldf, pllmf, dfbrg;
35 immr = fsl_get_immr();
37 printf("pq2_get_clocks: Couldn't get IMMR base.\r\n");
41 sccr = in_be32(&immr[PQ2_SCCR]);
42 scmr = in_be32(&immr[PQ2_SCMR]);
45 corecnf = (scmr >> 24) & 0x1f;
46 busdf = (scmr >> 20) & 0xf;
47 plldf = (scmr >> 12) & 1;
50 mainclk = crystal * (pllmf + 1) / (plldf + 1);
51 busclk = mainclk / (busdf + 1);
54 *sysfreq = mainclk / 2;
56 *timebase = busclk / 4;
58 *brgfreq = mainclk / (1 << ((dfbrg + 1) * 2));
61 int coremult = pq2_corecnf_map[corecnf];
64 *corefreq = mainclk / 2;
65 else if (coremult == 0)
68 *corefreq = busclk * coremult / 2;
74 /* Set common device tree fields based on the given clock frequencies. */
75 void pq2_set_clocks(u32 sysfreq, u32 corefreq, u32 timebase, u32 brgfreq)
79 dt_fixup_cpu_clocks(corefreq, timebase, sysfreq);
81 node = finddevice("/soc/cpm");
83 setprop(node, "clock-frequency", &sysfreq, 4);
85 node = finddevice("/soc/cpm/brg");
87 setprop(node, "clock-frequency", &brgfreq, 4);
90 int pq2_fixup_clocks(u32 crystal)
92 u32 sysfreq, corefreq, timebase, brgfreq;
94 if (!pq2_get_clocks(crystal, &sysfreq, &corefreq, &timebase, &brgfreq))
97 pq2_set_clocks(sysfreq, corefreq, timebase, brgfreq);