2 * Copyright (C) 2012 Avionic Design GmbH
3 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
10 #include <linux/bitops.h>
11 #include <linux/host1x.h>
12 #include <linux/idr.h>
13 #include <linux/iommu.h>
15 #include <drm/drm_atomic.h>
16 #include <drm/drm_atomic_helper.h>
18 #if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
19 #include <asm/dma-iommu.h>
25 #define DRIVER_NAME "tegra"
26 #define DRIVER_DESC "NVIDIA Tegra graphics"
27 #define DRIVER_DATE "20120330"
28 #define DRIVER_MAJOR 0
29 #define DRIVER_MINOR 0
30 #define DRIVER_PATCHLEVEL 0
32 #define CARVEOUT_SZ SZ_64M
33 #define CDMA_GATHER_FETCHES_MAX_NB 16383
35 struct tegra_drm_file {
40 static int tegra_atomic_check(struct drm_device *drm,
41 struct drm_atomic_state *state)
45 err = drm_atomic_helper_check(drm, state);
49 return tegra_display_hub_atomic_check(drm, state);
52 static const struct drm_mode_config_funcs tegra_drm_mode_config_funcs = {
53 .fb_create = tegra_fb_create,
54 #ifdef CONFIG_DRM_FBDEV_EMULATION
55 .output_poll_changed = drm_fb_helper_output_poll_changed,
57 .atomic_check = tegra_atomic_check,
58 .atomic_commit = drm_atomic_helper_commit,
61 static void tegra_atomic_commit_tail(struct drm_atomic_state *old_state)
63 struct drm_device *drm = old_state->dev;
64 struct tegra_drm *tegra = drm->dev_private;
67 drm_atomic_helper_commit_modeset_disables(drm, old_state);
68 tegra_display_hub_atomic_commit(drm, old_state);
69 drm_atomic_helper_commit_planes(drm, old_state, 0);
70 drm_atomic_helper_commit_modeset_enables(drm, old_state);
71 drm_atomic_helper_commit_hw_done(old_state);
72 drm_atomic_helper_wait_for_vblanks(drm, old_state);
73 drm_atomic_helper_cleanup_planes(drm, old_state);
75 drm_atomic_helper_commit_tail_rpm(old_state);
79 static const struct drm_mode_config_helper_funcs
80 tegra_drm_mode_config_helpers = {
81 .atomic_commit_tail = tegra_atomic_commit_tail,
84 static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
86 struct host1x_device *device = to_host1x_device(drm->dev);
87 struct tegra_drm *tegra;
90 tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
94 if (iommu_present(&platform_bus_type)) {
95 tegra->domain = iommu_domain_alloc(&platform_bus_type);
101 err = iova_cache_get();
106 mutex_init(&tegra->clients_lock);
107 INIT_LIST_HEAD(&tegra->clients);
109 drm->dev_private = tegra;
112 drm_mode_config_init(drm);
114 drm->mode_config.min_width = 0;
115 drm->mode_config.min_height = 0;
117 drm->mode_config.max_width = 4096;
118 drm->mode_config.max_height = 4096;
120 drm->mode_config.allow_fb_modifiers = true;
122 drm->mode_config.normalize_zpos = true;
124 drm->mode_config.funcs = &tegra_drm_mode_config_funcs;
125 drm->mode_config.helper_private = &tegra_drm_mode_config_helpers;
127 err = tegra_drm_fb_prepare(drm);
131 drm_kms_helper_poll_init(drm);
133 err = host1x_device_init(device);
138 u64 carveout_start, carveout_end, gem_start, gem_end;
139 u64 dma_mask = dma_get_mask(&device->dev);
140 dma_addr_t start, end;
143 start = tegra->domain->geometry.aperture_start & dma_mask;
144 end = tegra->domain->geometry.aperture_end & dma_mask;
147 gem_end = end - CARVEOUT_SZ;
148 carveout_start = gem_end + 1;
151 order = __ffs(tegra->domain->pgsize_bitmap);
152 init_iova_domain(&tegra->carveout.domain, 1UL << order,
153 carveout_start >> order);
155 tegra->carveout.shift = iova_shift(&tegra->carveout.domain);
156 tegra->carveout.limit = carveout_end >> tegra->carveout.shift;
158 drm_mm_init(&tegra->mm, gem_start, gem_end - gem_start + 1);
159 mutex_init(&tegra->mm_lock);
161 DRM_DEBUG("IOMMU apertures:\n");
162 DRM_DEBUG(" GEM: %#llx-%#llx\n", gem_start, gem_end);
163 DRM_DEBUG(" Carveout: %#llx-%#llx\n", carveout_start,
168 err = tegra_display_hub_prepare(tegra->hub);
174 * We don't use the drm_irq_install() helpers provided by the DRM
175 * core, so we need to set this manually in order to allow the
176 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
178 drm->irq_enabled = true;
180 /* syncpoints are used for full 32-bit hardware VBLANK counters */
181 drm->max_vblank_count = 0xffffffff;
183 err = drm_vblank_init(drm, drm->mode_config.num_crtc);
187 drm_mode_config_reset(drm);
189 err = tegra_drm_fb_init(drm);
197 tegra_display_hub_cleanup(tegra->hub);
199 host1x_device_exit(device);
201 drm_kms_helper_poll_fini(drm);
202 tegra_drm_fb_free(drm);
204 drm_mode_config_cleanup(drm);
207 mutex_destroy(&tegra->mm_lock);
208 drm_mm_takedown(&tegra->mm);
209 put_iova_domain(&tegra->carveout.domain);
214 iommu_domain_free(tegra->domain);
220 static void tegra_drm_unload(struct drm_device *drm)
222 struct host1x_device *device = to_host1x_device(drm->dev);
223 struct tegra_drm *tegra = drm->dev_private;
226 drm_kms_helper_poll_fini(drm);
227 tegra_drm_fb_exit(drm);
228 drm_atomic_helper_shutdown(drm);
229 drm_mode_config_cleanup(drm);
231 err = host1x_device_exit(device);
236 mutex_destroy(&tegra->mm_lock);
237 drm_mm_takedown(&tegra->mm);
238 put_iova_domain(&tegra->carveout.domain);
240 iommu_domain_free(tegra->domain);
246 static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
248 struct tegra_drm_file *fpriv;
250 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
254 idr_init(&fpriv->contexts);
255 mutex_init(&fpriv->lock);
256 filp->driver_priv = fpriv;
261 static void tegra_drm_context_free(struct tegra_drm_context *context)
263 context->client->ops->close_channel(context);
267 static struct host1x_bo *
268 host1x_bo_lookup(struct drm_file *file, u32 handle)
270 struct drm_gem_object *gem;
273 gem = drm_gem_object_lookup(file, handle);
277 bo = to_tegra_bo(gem);
281 static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
282 struct drm_tegra_reloc __user *src,
283 struct drm_device *drm,
284 struct drm_file *file)
289 err = get_user(cmdbuf, &src->cmdbuf.handle);
293 err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
297 err = get_user(target, &src->target.handle);
301 err = get_user(dest->target.offset, &src->target.offset);
305 err = get_user(dest->shift, &src->shift);
309 dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf);
310 if (!dest->cmdbuf.bo)
313 dest->target.bo = host1x_bo_lookup(file, target);
314 if (!dest->target.bo)
320 int tegra_drm_submit(struct tegra_drm_context *context,
321 struct drm_tegra_submit *args, struct drm_device *drm,
322 struct drm_file *file)
324 struct host1x_client *client = &context->client->base;
325 unsigned int num_cmdbufs = args->num_cmdbufs;
326 unsigned int num_relocs = args->num_relocs;
327 struct drm_tegra_cmdbuf __user *user_cmdbufs;
328 struct drm_tegra_reloc __user *user_relocs;
329 struct drm_tegra_syncpt __user *user_syncpt;
330 struct drm_tegra_syncpt syncpt;
331 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
332 struct drm_gem_object **refs;
333 struct host1x_syncpt *sp;
334 struct host1x_job *job;
335 unsigned int num_refs;
338 user_cmdbufs = u64_to_user_ptr(args->cmdbufs);
339 user_relocs = u64_to_user_ptr(args->relocs);
340 user_syncpt = u64_to_user_ptr(args->syncpts);
342 /* We don't yet support other than one syncpt_incr struct per submit */
343 if (args->num_syncpts != 1)
346 /* We don't yet support waitchks */
347 if (args->num_waitchks != 0)
350 job = host1x_job_alloc(context->channel, args->num_cmdbufs,
355 job->num_relocs = args->num_relocs;
356 job->client = client;
357 job->class = client->class;
358 job->serialize = true;
361 * Track referenced BOs so that they can be unreferenced after the
362 * submission is complete.
364 num_refs = num_cmdbufs + num_relocs * 2;
366 refs = kmalloc_array(num_refs, sizeof(*refs), GFP_KERNEL);
372 /* reuse as an iterator later */
375 while (num_cmdbufs) {
376 struct drm_tegra_cmdbuf cmdbuf;
377 struct host1x_bo *bo;
378 struct tegra_bo *obj;
381 if (copy_from_user(&cmdbuf, user_cmdbufs, sizeof(cmdbuf))) {
387 * The maximum number of CDMA gather fetches is 16383, a higher
388 * value means the words count is malformed.
390 if (cmdbuf.words > CDMA_GATHER_FETCHES_MAX_NB) {
395 bo = host1x_bo_lookup(file, cmdbuf.handle);
401 offset = (u64)cmdbuf.offset + (u64)cmdbuf.words * sizeof(u32);
402 obj = host1x_to_tegra_bo(bo);
403 refs[num_refs++] = &obj->gem;
406 * Gather buffer base address must be 4-bytes aligned,
407 * unaligned offset is malformed and cause commands stream
408 * corruption on the buffer address relocation.
410 if (offset & 3 || offset > obj->gem.size) {
415 host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
420 /* copy and resolve relocations from submit */
421 while (num_relocs--) {
422 struct host1x_reloc *reloc;
423 struct tegra_bo *obj;
425 err = host1x_reloc_copy_from_user(&job->relocs[num_relocs],
426 &user_relocs[num_relocs], drm,
431 reloc = &job->relocs[num_relocs];
432 obj = host1x_to_tegra_bo(reloc->cmdbuf.bo);
433 refs[num_refs++] = &obj->gem;
436 * The unaligned cmdbuf offset will cause an unaligned write
437 * during of the relocations patching, corrupting the commands
440 if (reloc->cmdbuf.offset & 3 ||
441 reloc->cmdbuf.offset >= obj->gem.size) {
446 obj = host1x_to_tegra_bo(reloc->target.bo);
447 refs[num_refs++] = &obj->gem;
449 if (reloc->target.offset >= obj->gem.size) {
455 if (copy_from_user(&syncpt, user_syncpt, sizeof(syncpt))) {
460 /* check whether syncpoint ID is valid */
461 sp = host1x_syncpt_get(host1x, syncpt.id);
467 job->is_addr_reg = context->client->ops->is_addr_reg;
468 job->is_valid_class = context->client->ops->is_valid_class;
469 job->syncpt_incrs = syncpt.incrs;
470 job->syncpt_id = syncpt.id;
471 job->timeout = 10000;
473 if (args->timeout && args->timeout < 10000)
474 job->timeout = args->timeout;
476 err = host1x_job_pin(job, context->client->base.dev);
480 err = host1x_job_submit(job);
482 host1x_job_unpin(job);
486 args->fence = job->syncpt_end;
490 drm_gem_object_put_unlocked(refs[num_refs]);
500 #ifdef CONFIG_DRM_TEGRA_STAGING
501 static int tegra_gem_create(struct drm_device *drm, void *data,
502 struct drm_file *file)
504 struct drm_tegra_gem_create *args = data;
507 bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
515 static int tegra_gem_mmap(struct drm_device *drm, void *data,
516 struct drm_file *file)
518 struct drm_tegra_gem_mmap *args = data;
519 struct drm_gem_object *gem;
522 gem = drm_gem_object_lookup(file, args->handle);
526 bo = to_tegra_bo(gem);
528 args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
530 drm_gem_object_put_unlocked(gem);
535 static int tegra_syncpt_read(struct drm_device *drm, void *data,
536 struct drm_file *file)
538 struct host1x *host = dev_get_drvdata(drm->dev->parent);
539 struct drm_tegra_syncpt_read *args = data;
540 struct host1x_syncpt *sp;
542 sp = host1x_syncpt_get(host, args->id);
546 args->value = host1x_syncpt_read_min(sp);
550 static int tegra_syncpt_incr(struct drm_device *drm, void *data,
551 struct drm_file *file)
553 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
554 struct drm_tegra_syncpt_incr *args = data;
555 struct host1x_syncpt *sp;
557 sp = host1x_syncpt_get(host1x, args->id);
561 return host1x_syncpt_incr(sp);
564 static int tegra_syncpt_wait(struct drm_device *drm, void *data,
565 struct drm_file *file)
567 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
568 struct drm_tegra_syncpt_wait *args = data;
569 struct host1x_syncpt *sp;
571 sp = host1x_syncpt_get(host1x, args->id);
575 return host1x_syncpt_wait(sp, args->thresh,
576 msecs_to_jiffies(args->timeout),
580 static int tegra_client_open(struct tegra_drm_file *fpriv,
581 struct tegra_drm_client *client,
582 struct tegra_drm_context *context)
586 err = client->ops->open_channel(client, context);
590 err = idr_alloc(&fpriv->contexts, context, 1, 0, GFP_KERNEL);
592 client->ops->close_channel(context);
596 context->client = client;
602 static int tegra_open_channel(struct drm_device *drm, void *data,
603 struct drm_file *file)
605 struct tegra_drm_file *fpriv = file->driver_priv;
606 struct tegra_drm *tegra = drm->dev_private;
607 struct drm_tegra_open_channel *args = data;
608 struct tegra_drm_context *context;
609 struct tegra_drm_client *client;
612 context = kzalloc(sizeof(*context), GFP_KERNEL);
616 mutex_lock(&fpriv->lock);
618 list_for_each_entry(client, &tegra->clients, list)
619 if (client->base.class == args->client) {
620 err = tegra_client_open(fpriv, client, context);
624 args->context = context->id;
631 mutex_unlock(&fpriv->lock);
635 static int tegra_close_channel(struct drm_device *drm, void *data,
636 struct drm_file *file)
638 struct tegra_drm_file *fpriv = file->driver_priv;
639 struct drm_tegra_close_channel *args = data;
640 struct tegra_drm_context *context;
643 mutex_lock(&fpriv->lock);
645 context = idr_find(&fpriv->contexts, args->context);
651 idr_remove(&fpriv->contexts, context->id);
652 tegra_drm_context_free(context);
655 mutex_unlock(&fpriv->lock);
659 static int tegra_get_syncpt(struct drm_device *drm, void *data,
660 struct drm_file *file)
662 struct tegra_drm_file *fpriv = file->driver_priv;
663 struct drm_tegra_get_syncpt *args = data;
664 struct tegra_drm_context *context;
665 struct host1x_syncpt *syncpt;
668 mutex_lock(&fpriv->lock);
670 context = idr_find(&fpriv->contexts, args->context);
676 if (args->index >= context->client->base.num_syncpts) {
681 syncpt = context->client->base.syncpts[args->index];
682 args->id = host1x_syncpt_id(syncpt);
685 mutex_unlock(&fpriv->lock);
689 static int tegra_submit(struct drm_device *drm, void *data,
690 struct drm_file *file)
692 struct tegra_drm_file *fpriv = file->driver_priv;
693 struct drm_tegra_submit *args = data;
694 struct tegra_drm_context *context;
697 mutex_lock(&fpriv->lock);
699 context = idr_find(&fpriv->contexts, args->context);
705 err = context->client->ops->submit(context, args, drm, file);
708 mutex_unlock(&fpriv->lock);
712 static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
713 struct drm_file *file)
715 struct tegra_drm_file *fpriv = file->driver_priv;
716 struct drm_tegra_get_syncpt_base *args = data;
717 struct tegra_drm_context *context;
718 struct host1x_syncpt_base *base;
719 struct host1x_syncpt *syncpt;
722 mutex_lock(&fpriv->lock);
724 context = idr_find(&fpriv->contexts, args->context);
730 if (args->syncpt >= context->client->base.num_syncpts) {
735 syncpt = context->client->base.syncpts[args->syncpt];
737 base = host1x_syncpt_get_base(syncpt);
743 args->id = host1x_syncpt_base_id(base);
746 mutex_unlock(&fpriv->lock);
750 static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
751 struct drm_file *file)
753 struct drm_tegra_gem_set_tiling *args = data;
754 enum tegra_bo_tiling_mode mode;
755 struct drm_gem_object *gem;
756 unsigned long value = 0;
759 switch (args->mode) {
760 case DRM_TEGRA_GEM_TILING_MODE_PITCH:
761 mode = TEGRA_BO_TILING_MODE_PITCH;
763 if (args->value != 0)
768 case DRM_TEGRA_GEM_TILING_MODE_TILED:
769 mode = TEGRA_BO_TILING_MODE_TILED;
771 if (args->value != 0)
776 case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
777 mode = TEGRA_BO_TILING_MODE_BLOCK;
789 gem = drm_gem_object_lookup(file, args->handle);
793 bo = to_tegra_bo(gem);
795 bo->tiling.mode = mode;
796 bo->tiling.value = value;
798 drm_gem_object_put_unlocked(gem);
803 static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
804 struct drm_file *file)
806 struct drm_tegra_gem_get_tiling *args = data;
807 struct drm_gem_object *gem;
811 gem = drm_gem_object_lookup(file, args->handle);
815 bo = to_tegra_bo(gem);
817 switch (bo->tiling.mode) {
818 case TEGRA_BO_TILING_MODE_PITCH:
819 args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
823 case TEGRA_BO_TILING_MODE_TILED:
824 args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
828 case TEGRA_BO_TILING_MODE_BLOCK:
829 args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
830 args->value = bo->tiling.value;
838 drm_gem_object_put_unlocked(gem);
843 static int tegra_gem_set_flags(struct drm_device *drm, void *data,
844 struct drm_file *file)
846 struct drm_tegra_gem_set_flags *args = data;
847 struct drm_gem_object *gem;
850 if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
853 gem = drm_gem_object_lookup(file, args->handle);
857 bo = to_tegra_bo(gem);
860 if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
861 bo->flags |= TEGRA_BO_BOTTOM_UP;
863 drm_gem_object_put_unlocked(gem);
868 static int tegra_gem_get_flags(struct drm_device *drm, void *data,
869 struct drm_file *file)
871 struct drm_tegra_gem_get_flags *args = data;
872 struct drm_gem_object *gem;
875 gem = drm_gem_object_lookup(file, args->handle);
879 bo = to_tegra_bo(gem);
882 if (bo->flags & TEGRA_BO_BOTTOM_UP)
883 args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
885 drm_gem_object_put_unlocked(gem);
891 static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
892 #ifdef CONFIG_DRM_TEGRA_STAGING
893 DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create,
894 DRM_UNLOCKED | DRM_RENDER_ALLOW),
895 DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap,
896 DRM_UNLOCKED | DRM_RENDER_ALLOW),
897 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read,
898 DRM_UNLOCKED | DRM_RENDER_ALLOW),
899 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr,
900 DRM_UNLOCKED | DRM_RENDER_ALLOW),
901 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait,
902 DRM_UNLOCKED | DRM_RENDER_ALLOW),
903 DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel,
904 DRM_UNLOCKED | DRM_RENDER_ALLOW),
905 DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel,
906 DRM_UNLOCKED | DRM_RENDER_ALLOW),
907 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt,
908 DRM_UNLOCKED | DRM_RENDER_ALLOW),
909 DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit,
910 DRM_UNLOCKED | DRM_RENDER_ALLOW),
911 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base,
912 DRM_UNLOCKED | DRM_RENDER_ALLOW),
913 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling,
914 DRM_UNLOCKED | DRM_RENDER_ALLOW),
915 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling,
916 DRM_UNLOCKED | DRM_RENDER_ALLOW),
917 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags,
918 DRM_UNLOCKED | DRM_RENDER_ALLOW),
919 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags,
920 DRM_UNLOCKED | DRM_RENDER_ALLOW),
924 static const struct file_operations tegra_drm_fops = {
925 .owner = THIS_MODULE,
927 .release = drm_release,
928 .unlocked_ioctl = drm_ioctl,
929 .mmap = tegra_drm_mmap,
932 .compat_ioctl = drm_compat_ioctl,
933 .llseek = noop_llseek,
936 static int tegra_drm_context_cleanup(int id, void *p, void *data)
938 struct tegra_drm_context *context = p;
940 tegra_drm_context_free(context);
945 static void tegra_drm_postclose(struct drm_device *drm, struct drm_file *file)
947 struct tegra_drm_file *fpriv = file->driver_priv;
949 mutex_lock(&fpriv->lock);
950 idr_for_each(&fpriv->contexts, tegra_drm_context_cleanup, NULL);
951 mutex_unlock(&fpriv->lock);
953 idr_destroy(&fpriv->contexts);
954 mutex_destroy(&fpriv->lock);
958 #ifdef CONFIG_DEBUG_FS
959 static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
961 struct drm_info_node *node = (struct drm_info_node *)s->private;
962 struct drm_device *drm = node->minor->dev;
963 struct drm_framebuffer *fb;
965 mutex_lock(&drm->mode_config.fb_lock);
967 list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
968 seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
969 fb->base.id, fb->width, fb->height,
971 fb->format->cpp[0] * 8,
972 drm_framebuffer_read_refcount(fb));
975 mutex_unlock(&drm->mode_config.fb_lock);
980 static int tegra_debugfs_iova(struct seq_file *s, void *data)
982 struct drm_info_node *node = (struct drm_info_node *)s->private;
983 struct drm_device *drm = node->minor->dev;
984 struct tegra_drm *tegra = drm->dev_private;
985 struct drm_printer p = drm_seq_file_printer(s);
988 mutex_lock(&tegra->mm_lock);
989 drm_mm_print(&tegra->mm, &p);
990 mutex_unlock(&tegra->mm_lock);
996 static struct drm_info_list tegra_debugfs_list[] = {
997 { "framebuffers", tegra_debugfs_framebuffers, 0 },
998 { "iova", tegra_debugfs_iova, 0 },
1001 static int tegra_debugfs_init(struct drm_minor *minor)
1003 return drm_debugfs_create_files(tegra_debugfs_list,
1004 ARRAY_SIZE(tegra_debugfs_list),
1005 minor->debugfs_root, minor);
1009 static struct drm_driver tegra_drm_driver = {
1010 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
1011 DRIVER_ATOMIC | DRIVER_RENDER,
1012 .load = tegra_drm_load,
1013 .unload = tegra_drm_unload,
1014 .open = tegra_drm_open,
1015 .postclose = tegra_drm_postclose,
1016 .lastclose = drm_fb_helper_lastclose,
1018 #if defined(CONFIG_DEBUG_FS)
1019 .debugfs_init = tegra_debugfs_init,
1022 .gem_free_object_unlocked = tegra_bo_free_object,
1023 .gem_vm_ops = &tegra_bo_vm_ops,
1025 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1026 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1027 .gem_prime_export = tegra_gem_prime_export,
1028 .gem_prime_import = tegra_gem_prime_import,
1030 .dumb_create = tegra_bo_dumb_create,
1032 .ioctls = tegra_drm_ioctls,
1033 .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
1034 .fops = &tegra_drm_fops,
1036 .name = DRIVER_NAME,
1037 .desc = DRIVER_DESC,
1038 .date = DRIVER_DATE,
1039 .major = DRIVER_MAJOR,
1040 .minor = DRIVER_MINOR,
1041 .patchlevel = DRIVER_PATCHLEVEL,
1044 int tegra_drm_register_client(struct tegra_drm *tegra,
1045 struct tegra_drm_client *client)
1047 mutex_lock(&tegra->clients_lock);
1048 list_add_tail(&client->list, &tegra->clients);
1049 client->drm = tegra;
1050 mutex_unlock(&tegra->clients_lock);
1055 int tegra_drm_unregister_client(struct tegra_drm *tegra,
1056 struct tegra_drm_client *client)
1058 mutex_lock(&tegra->clients_lock);
1059 list_del_init(&client->list);
1061 mutex_unlock(&tegra->clients_lock);
1066 struct iommu_group *host1x_client_iommu_attach(struct host1x_client *client,
1069 struct drm_device *drm = dev_get_drvdata(client->parent);
1070 struct tegra_drm *tegra = drm->dev_private;
1071 struct iommu_group *group = NULL;
1074 if (tegra->domain) {
1075 group = iommu_group_get(client->dev);
1077 dev_err(client->dev, "failed to get IOMMU group\n");
1078 return ERR_PTR(-ENODEV);
1081 if (!shared || (shared && (group != tegra->group))) {
1082 #if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
1083 if (client->dev->archdata.mapping) {
1084 struct dma_iommu_mapping *mapping =
1085 to_dma_iommu_mapping(client->dev);
1086 arm_iommu_detach_device(client->dev);
1087 arm_iommu_release_mapping(mapping);
1090 err = iommu_attach_group(tegra->domain, group);
1092 iommu_group_put(group);
1093 return ERR_PTR(err);
1096 if (shared && !tegra->group)
1097 tegra->group = group;
1104 void host1x_client_iommu_detach(struct host1x_client *client,
1105 struct iommu_group *group)
1107 struct drm_device *drm = dev_get_drvdata(client->parent);
1108 struct tegra_drm *tegra = drm->dev_private;
1111 if (group == tegra->group) {
1112 iommu_detach_group(tegra->domain, group);
1113 tegra->group = NULL;
1116 iommu_group_put(group);
1120 void *tegra_drm_alloc(struct tegra_drm *tegra, size_t size, dma_addr_t *dma)
1128 size = iova_align(&tegra->carveout.domain, size);
1130 size = PAGE_ALIGN(size);
1132 gfp = GFP_KERNEL | __GFP_ZERO;
1133 if (!tegra->domain) {
1135 * Many units only support 32-bit addresses, even on 64-bit
1136 * SoCs. If there is no IOMMU to translate into a 32-bit IO
1137 * virtual address space, force allocations to be in the
1138 * lower 32-bit range.
1143 virt = (void *)__get_free_pages(gfp, get_order(size));
1145 return ERR_PTR(-ENOMEM);
1147 if (!tegra->domain) {
1149 * If IOMMU is disabled, devices address physical memory
1152 *dma = virt_to_phys(virt);
1156 alloc = alloc_iova(&tegra->carveout.domain,
1157 size >> tegra->carveout.shift,
1158 tegra->carveout.limit, true);
1164 *dma = iova_dma_addr(&tegra->carveout.domain, alloc);
1165 err = iommu_map(tegra->domain, *dma, virt_to_phys(virt),
1166 size, IOMMU_READ | IOMMU_WRITE);
1173 __free_iova(&tegra->carveout.domain, alloc);
1175 free_pages((unsigned long)virt, get_order(size));
1177 return ERR_PTR(err);
1180 void tegra_drm_free(struct tegra_drm *tegra, size_t size, void *virt,
1184 size = iova_align(&tegra->carveout.domain, size);
1186 size = PAGE_ALIGN(size);
1188 if (tegra->domain) {
1189 iommu_unmap(tegra->domain, dma, size);
1190 free_iova(&tegra->carveout.domain,
1191 iova_pfn(&tegra->carveout.domain, dma));
1194 free_pages((unsigned long)virt, get_order(size));
1197 static int host1x_drm_probe(struct host1x_device *dev)
1199 struct drm_driver *driver = &tegra_drm_driver;
1200 struct drm_device *drm;
1203 drm = drm_dev_alloc(driver, &dev->dev);
1205 return PTR_ERR(drm);
1207 dev_set_drvdata(&dev->dev, drm);
1209 err = drm_fb_helper_remove_conflicting_framebuffers(NULL, "tegradrmfb", false);
1213 err = drm_dev_register(drm, 0);
1224 static int host1x_drm_remove(struct host1x_device *dev)
1226 struct drm_device *drm = dev_get_drvdata(&dev->dev);
1228 drm_dev_unregister(drm);
1234 #ifdef CONFIG_PM_SLEEP
1235 static int host1x_drm_suspend(struct device *dev)
1237 struct drm_device *drm = dev_get_drvdata(dev);
1239 return drm_mode_config_helper_suspend(drm);
1242 static int host1x_drm_resume(struct device *dev)
1244 struct drm_device *drm = dev_get_drvdata(dev);
1246 return drm_mode_config_helper_resume(drm);
1250 static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
1253 static const struct of_device_id host1x_drm_subdevs[] = {
1254 { .compatible = "nvidia,tegra20-dc", },
1255 { .compatible = "nvidia,tegra20-hdmi", },
1256 { .compatible = "nvidia,tegra20-gr2d", },
1257 { .compatible = "nvidia,tegra20-gr3d", },
1258 { .compatible = "nvidia,tegra30-dc", },
1259 { .compatible = "nvidia,tegra30-hdmi", },
1260 { .compatible = "nvidia,tegra30-gr2d", },
1261 { .compatible = "nvidia,tegra30-gr3d", },
1262 { .compatible = "nvidia,tegra114-dsi", },
1263 { .compatible = "nvidia,tegra114-hdmi", },
1264 { .compatible = "nvidia,tegra114-gr3d", },
1265 { .compatible = "nvidia,tegra124-dc", },
1266 { .compatible = "nvidia,tegra124-sor", },
1267 { .compatible = "nvidia,tegra124-hdmi", },
1268 { .compatible = "nvidia,tegra124-dsi", },
1269 { .compatible = "nvidia,tegra124-vic", },
1270 { .compatible = "nvidia,tegra132-dsi", },
1271 { .compatible = "nvidia,tegra210-dc", },
1272 { .compatible = "nvidia,tegra210-dsi", },
1273 { .compatible = "nvidia,tegra210-sor", },
1274 { .compatible = "nvidia,tegra210-sor1", },
1275 { .compatible = "nvidia,tegra210-vic", },
1276 { .compatible = "nvidia,tegra186-display", },
1277 { .compatible = "nvidia,tegra186-dc", },
1278 { .compatible = "nvidia,tegra186-sor", },
1279 { .compatible = "nvidia,tegra186-sor1", },
1280 { .compatible = "nvidia,tegra186-vic", },
1281 { .compatible = "nvidia,tegra194-display", },
1282 { .compatible = "nvidia,tegra194-dc", },
1283 { .compatible = "nvidia,tegra194-sor", },
1284 { .compatible = "nvidia,tegra194-vic", },
1288 static struct host1x_driver host1x_drm_driver = {
1291 .pm = &host1x_drm_pm_ops,
1293 .probe = host1x_drm_probe,
1294 .remove = host1x_drm_remove,
1295 .subdevs = host1x_drm_subdevs,
1298 static struct platform_driver * const drivers[] = {
1299 &tegra_display_hub_driver,
1303 &tegra_dpaux_driver,
1310 static int __init host1x_drm_init(void)
1314 err = host1x_driver_register(&host1x_drm_driver);
1318 err = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
1320 goto unregister_host1x;
1325 host1x_driver_unregister(&host1x_drm_driver);
1328 module_init(host1x_drm_init);
1330 static void __exit host1x_drm_exit(void)
1332 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
1333 host1x_driver_unregister(&host1x_drm_driver);
1335 module_exit(host1x_drm_exit);
1338 MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1339 MODULE_LICENSE("GPL v2");