2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2001 - 2007 Tensilica Inc.
15 #include <linux/errno.h>
16 #include <linux/hw_breakpoint.h>
17 #include <linux/kernel.h>
19 #include <linux/perf_event.h>
20 #include <linux/ptrace.h>
21 #include <linux/regset.h>
22 #include <linux/sched.h>
23 #include <linux/sched/task_stack.h>
24 #include <linux/security.h>
25 #include <linux/signal.h>
26 #include <linux/smp.h>
27 #include <linux/tracehook.h>
28 #include <linux/uaccess.h>
30 #define CREATE_TRACE_POINTS
31 #include <trace/events/syscalls.h>
33 #include <asm/coprocessor.h>
36 #include <asm/pgtable.h>
37 #include <asm/ptrace.h>
39 static int gpr_get(struct task_struct *target,
40 const struct user_regset *regset,
41 unsigned int pos, unsigned int count,
42 void *kbuf, void __user *ubuf)
44 struct pt_regs *regs = task_pt_regs(target);
45 struct user_pt_regs newregs = {
47 .ps = regs->ps & ~(1 << PS_EXCM_BIT),
50 .lcount = regs->lcount,
52 .threadptr = regs->threadptr,
53 .windowbase = regs->windowbase,
54 .windowstart = regs->windowstart,
58 regs->areg + XCHAL_NUM_AREGS - regs->windowbase * 4,
59 regs->windowbase * 16);
60 memcpy(newregs.a + regs->windowbase * 4,
62 (WSBITS - regs->windowbase) * 16);
64 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
68 static int gpr_set(struct task_struct *target,
69 const struct user_regset *regset,
70 unsigned int pos, unsigned int count,
71 const void *kbuf, const void __user *ubuf)
74 struct user_pt_regs newregs = {0};
76 const u32 ps_mask = PS_CALLINC_MASK | PS_OWB_MASK;
78 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
82 if (newregs.windowbase >= XCHAL_NUM_AREGS / 4)
85 regs = task_pt_regs(target);
86 regs->pc = newregs.pc;
87 regs->ps = (regs->ps & ~ps_mask) | (newregs.ps & ps_mask);
88 regs->lbeg = newregs.lbeg;
89 regs->lend = newregs.lend;
90 regs->lcount = newregs.lcount;
91 regs->sar = newregs.sar;
92 regs->threadptr = newregs.threadptr;
94 if (newregs.windowbase != regs->windowbase ||
95 newregs.windowstart != regs->windowstart) {
98 rotws = (((newregs.windowstart |
99 (newregs.windowstart << WSBITS)) >>
100 newregs.windowbase) &
101 ((1 << WSBITS) - 1)) & ~1;
102 wmask = ((rotws ? WSBITS + 1 - ffs(rotws) : 0) << 4) |
104 regs->windowbase = newregs.windowbase;
105 regs->windowstart = newregs.windowstart;
109 memcpy(regs->areg + XCHAL_NUM_AREGS - newregs.windowbase * 4,
110 newregs.a, newregs.windowbase * 16);
111 memcpy(regs->areg, newregs.a + newregs.windowbase * 4,
112 (WSBITS - newregs.windowbase) * 16);
117 static int tie_get(struct task_struct *target,
118 const struct user_regset *regset,
119 unsigned int pos, unsigned int count,
120 void *kbuf, void __user *ubuf)
123 struct pt_regs *regs = task_pt_regs(target);
124 struct thread_info *ti = task_thread_info(target);
125 elf_xtregs_t *newregs = kzalloc(sizeof(elf_xtregs_t), GFP_KERNEL);
130 newregs->opt = regs->xtregs_opt;
131 newregs->user = ti->xtregs_user;
133 #if XTENSA_HAVE_COPROCESSORS
134 /* Flush all coprocessor registers to memory. */
135 coprocessor_flush_all(ti);
136 newregs->cp0 = ti->xtregs_cp.cp0;
137 newregs->cp1 = ti->xtregs_cp.cp1;
138 newregs->cp2 = ti->xtregs_cp.cp2;
139 newregs->cp3 = ti->xtregs_cp.cp3;
140 newregs->cp4 = ti->xtregs_cp.cp4;
141 newregs->cp5 = ti->xtregs_cp.cp5;
142 newregs->cp6 = ti->xtregs_cp.cp6;
143 newregs->cp7 = ti->xtregs_cp.cp7;
145 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
151 static int tie_set(struct task_struct *target,
152 const struct user_regset *regset,
153 unsigned int pos, unsigned int count,
154 const void *kbuf, const void __user *ubuf)
157 struct pt_regs *regs = task_pt_regs(target);
158 struct thread_info *ti = task_thread_info(target);
159 elf_xtregs_t *newregs = kzalloc(sizeof(elf_xtregs_t), GFP_KERNEL);
164 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
169 regs->xtregs_opt = newregs->opt;
170 ti->xtregs_user = newregs->user;
172 #if XTENSA_HAVE_COPROCESSORS
173 /* Flush all coprocessors before we overwrite them. */
174 coprocessor_flush_all(ti);
175 coprocessor_release_all(ti);
176 ti->xtregs_cp.cp0 = newregs->cp0;
177 ti->xtregs_cp.cp1 = newregs->cp1;
178 ti->xtregs_cp.cp2 = newregs->cp2;
179 ti->xtregs_cp.cp3 = newregs->cp3;
180 ti->xtregs_cp.cp4 = newregs->cp4;
181 ti->xtregs_cp.cp5 = newregs->cp5;
182 ti->xtregs_cp.cp6 = newregs->cp6;
183 ti->xtregs_cp.cp7 = newregs->cp7;
195 static const struct user_regset xtensa_regsets[] = {
197 .core_note_type = NT_PRSTATUS,
198 .n = sizeof(struct user_pt_regs) / sizeof(u32),
200 .align = sizeof(u32),
205 .core_note_type = NT_PRFPREG,
206 .n = sizeof(elf_xtregs_t) / sizeof(u32),
208 .align = sizeof(u32),
214 static const struct user_regset_view user_xtensa_view = {
216 .e_machine = EM_XTENSA,
217 .regsets = xtensa_regsets,
218 .n = ARRAY_SIZE(xtensa_regsets)
221 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
223 return &user_xtensa_view;
226 void user_enable_single_step(struct task_struct *child)
228 child->ptrace |= PT_SINGLESTEP;
231 void user_disable_single_step(struct task_struct *child)
233 child->ptrace &= ~PT_SINGLESTEP;
237 * Called by kernel/ptrace.c when detaching to disable single stepping.
240 void ptrace_disable(struct task_struct *child)
242 /* Nothing to do.. */
245 static int ptrace_getregs(struct task_struct *child, void __user *uregs)
247 return copy_regset_to_user(child, &user_xtensa_view, REGSET_GPR,
248 0, sizeof(xtensa_gregset_t), uregs);
251 static int ptrace_setregs(struct task_struct *child, void __user *uregs)
253 return copy_regset_from_user(child, &user_xtensa_view, REGSET_GPR,
254 0, sizeof(xtensa_gregset_t), uregs);
257 static int ptrace_getxregs(struct task_struct *child, void __user *uregs)
259 return copy_regset_to_user(child, &user_xtensa_view, REGSET_TIE,
260 0, sizeof(elf_xtregs_t), uregs);
263 static int ptrace_setxregs(struct task_struct *child, void __user *uregs)
265 return copy_regset_from_user(child, &user_xtensa_view, REGSET_TIE,
266 0, sizeof(elf_xtregs_t), uregs);
269 static int ptrace_peekusr(struct task_struct *child, long regno,
272 struct pt_regs *regs;
275 regs = task_pt_regs(child);
276 tmp = 0; /* Default return value. */
279 case REG_AR_BASE ... REG_AR_BASE + XCHAL_NUM_AREGS - 1:
280 tmp = regs->areg[regno - REG_AR_BASE];
283 case REG_A_BASE ... REG_A_BASE + 15:
284 tmp = regs->areg[regno - REG_A_BASE];
292 /* Note: PS.EXCM is not set while user task is running;
293 * its being set in regs is for exception handling
296 tmp = (regs->ps & ~(1 << PS_EXCM_BIT));
304 unsigned long wb = regs->windowbase;
305 unsigned long ws = regs->windowstart;
306 tmp = ((ws >> wb) | (ws << (WSBITS - wb))) &
333 return put_user(tmp, ret);
336 static int ptrace_pokeusr(struct task_struct *child, long regno, long val)
338 struct pt_regs *regs;
339 regs = task_pt_regs(child);
342 case REG_AR_BASE ... REG_AR_BASE + XCHAL_NUM_AREGS - 1:
343 regs->areg[regno - REG_AR_BASE] = val;
346 case REG_A_BASE ... REG_A_BASE + 15:
347 regs->areg[regno - REG_A_BASE] = val;
364 #ifdef CONFIG_HAVE_HW_BREAKPOINT
365 static void ptrace_hbptriggered(struct perf_event *bp,
366 struct perf_sample_data *data,
367 struct pt_regs *regs)
370 struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
372 if (bp->attr.bp_type & HW_BREAKPOINT_X) {
373 for (i = 0; i < XCHAL_NUM_IBREAK; ++i)
374 if (current->thread.ptrace_bp[i] == bp)
378 for (i = 0; i < XCHAL_NUM_DBREAK; ++i)
379 if (current->thread.ptrace_wp[i] == bp)
384 force_sig_ptrace_errno_trap(i, (void __user *)bkpt->address);
387 static struct perf_event *ptrace_hbp_create(struct task_struct *tsk, int type)
389 struct perf_event_attr attr;
391 ptrace_breakpoint_init(&attr);
393 /* Initialise fields to sane defaults. */
399 return register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL,
404 * Address bit 0 choose instruction (0) or data (1) break register, bits
405 * 31..1 are the register number.
406 * Both PTRACE_GETHBPREGS and PTRACE_SETHBPREGS transfer two 32-bit words:
407 * address (0) and control (1).
408 * Instruction breakpoint contorl word is 0 to clear breakpoint, 1 to set.
409 * Data breakpoint control word bit 31 is 'trigger on store', bit 30 is
410 * 'trigger on load, bits 29..0 are length. Length 0 is used to clear a
411 * breakpoint. To set a breakpoint length must be a power of 2 in the range
412 * 1..64 and the address must be length-aligned.
415 static long ptrace_gethbpregs(struct task_struct *child, long addr,
418 struct perf_event *bp;
419 u32 user_data[2] = {0};
420 bool dbreak = addr & 1;
421 unsigned idx = addr >> 1;
423 if ((!dbreak && idx >= XCHAL_NUM_IBREAK) ||
424 (dbreak && idx >= XCHAL_NUM_DBREAK))
428 bp = child->thread.ptrace_wp[idx];
430 bp = child->thread.ptrace_bp[idx];
433 user_data[0] = bp->attr.bp_addr;
434 user_data[1] = bp->attr.disabled ? 0 : bp->attr.bp_len;
436 if (bp->attr.bp_type & HW_BREAKPOINT_R)
437 user_data[1] |= DBREAKC_LOAD_MASK;
438 if (bp->attr.bp_type & HW_BREAKPOINT_W)
439 user_data[1] |= DBREAKC_STOR_MASK;
443 if (copy_to_user(datap, user_data, sizeof(user_data)))
449 static long ptrace_sethbpregs(struct task_struct *child, long addr,
452 struct perf_event *bp;
453 struct perf_event_attr attr;
455 bool dbreak = addr & 1;
456 unsigned idx = addr >> 1;
459 if ((!dbreak && idx >= XCHAL_NUM_IBREAK) ||
460 (dbreak && idx >= XCHAL_NUM_DBREAK))
463 if (copy_from_user(user_data, datap, sizeof(user_data)))
467 bp = child->thread.ptrace_wp[idx];
468 if (user_data[1] & DBREAKC_LOAD_MASK)
469 bp_type |= HW_BREAKPOINT_R;
470 if (user_data[1] & DBREAKC_STOR_MASK)
471 bp_type |= HW_BREAKPOINT_W;
473 bp = child->thread.ptrace_bp[idx];
474 bp_type = HW_BREAKPOINT_X;
478 bp = ptrace_hbp_create(child,
479 bp_type ? bp_type : HW_BREAKPOINT_RW);
483 child->thread.ptrace_wp[idx] = bp;
485 child->thread.ptrace_bp[idx] = bp;
489 attr.bp_addr = user_data[0];
490 attr.bp_len = user_data[1] & ~(DBREAKC_LOAD_MASK | DBREAKC_STOR_MASK);
491 attr.bp_type = bp_type;
492 attr.disabled = !attr.bp_len;
494 return modify_user_hw_breakpoint(bp, &attr);
498 long arch_ptrace(struct task_struct *child, long request,
499 unsigned long addr, unsigned long data)
502 void __user *datap = (void __user *) data;
505 case PTRACE_PEEKUSR: /* read register specified by addr. */
506 ret = ptrace_peekusr(child, addr, datap);
509 case PTRACE_POKEUSR: /* write register specified by addr. */
510 ret = ptrace_pokeusr(child, addr, data);
514 ret = ptrace_getregs(child, datap);
518 ret = ptrace_setregs(child, datap);
521 case PTRACE_GETXTREGS:
522 ret = ptrace_getxregs(child, datap);
525 case PTRACE_SETXTREGS:
526 ret = ptrace_setxregs(child, datap);
528 #ifdef CONFIG_HAVE_HW_BREAKPOINT
529 case PTRACE_GETHBPREGS:
530 ret = ptrace_gethbpregs(child, addr, datap);
533 case PTRACE_SETHBPREGS:
534 ret = ptrace_sethbpregs(child, addr, datap);
538 ret = ptrace_request(child, request, addr, data);
545 void do_syscall_trace_leave(struct pt_regs *regs);
546 int do_syscall_trace_enter(struct pt_regs *regs)
548 if (regs->syscall == NO_SYSCALL)
549 regs->areg[2] = -ENOSYS;
551 if (test_thread_flag(TIF_SYSCALL_TRACE) &&
552 tracehook_report_syscall_entry(regs)) {
553 regs->areg[2] = -ENOSYS;
554 regs->syscall = NO_SYSCALL;
558 if (regs->syscall == NO_SYSCALL) {
559 do_syscall_trace_leave(regs);
563 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
564 trace_sys_enter(regs, syscall_get_nr(current, regs));
569 void do_syscall_trace_leave(struct pt_regs *regs)
573 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
574 trace_sys_exit(regs, regs_return_value(regs));
576 step = test_thread_flag(TIF_SINGLESTEP);
578 if (step || test_thread_flag(TIF_SYSCALL_TRACE))
579 tracehook_report_syscall_exit(regs, step);