drivers/gpu/drm/mediatek/mtk_disp_gamma.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (c) 2021 MediaTek Inc.
   4  */
   5
   6 #include <linux/clk.h>
   7 #include <linux/component.h>
   8 #include <linux/module.h>
   9 #include <linux/of_device.h>
  10 #include <linux/of_irq.h>
  11 #include <linux/platform_device.h>
  12 #include <linux/soc/mediatek/mtk-cmdq.h>
  13
  14 #include "mtk_disp_drv.h"
  15 #include "mtk_drm_crtc.h"
  16 #include "mtk_drm_ddp_comp.h"
  17
  18 #define DISP_GAMMA_EN                           0x0000
  19 #define GAMMA_EN                                        BIT(0)
  20 #define DISP_GAMMA_CFG                          0x0020
  21 #define GAMMA_LUT_EN                                    BIT(1)
  22 #define GAMMA_DITHERING                                 BIT(2)
  23 #define DISP_GAMMA_SIZE                         0x0030
  24 #define DISP_GAMMA_LUT                          0x0700
  25
  26 #define LUT_10BIT_MASK                          0x03ff
  27
  28 struct mtk_disp_gamma_data {
  29         bool has_dither;
  30 };
  31
  32 /**
  33  * struct mtk_disp_gamma - DISP_GAMMA driver structure
  34  * @ddp_comp - structure containing type enum and hardware resources
  35  * @crtc - associated crtc to report irq events to
  36  */
  37 struct mtk_disp_gamma {
  38         struct clk *clk;
  39         void __iomem *regs;
  40         struct cmdq_client_reg cmdq_reg;
  41         const struct mtk_disp_gamma_data *data;
  42 };
  43
  44 int mtk_gamma_clk_enable(struct device *dev)
  45 {
  46         struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
  47
  48         return clk_prepare_enable(gamma->clk);
  49 }
  50
  51 void mtk_gamma_clk_disable(struct device *dev)
  52 {
  53         struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
  54
  55         clk_disable_unprepare(gamma->clk);
  56 }
  57
  58 void mtk_gamma_set_common(void __iomem *regs, struct drm_crtc_state *state)
  59 {
  60         unsigned int i, reg;
  61         struct drm_color_lut *lut;
  62         void __iomem *lut_base;
  63         u32 word;
  64
  65         if (state->gamma_lut) {
  66                 reg = readl(regs + DISP_GAMMA_CFG);
  67                 reg = reg | GAMMA_LUT_EN;
  68                 writel(reg, regs + DISP_GAMMA_CFG);
  69                 lut_base = regs + DISP_GAMMA_LUT;
  70                 lut = (struct drm_color_lut *)state->gamma_lut->data;
  71                 for (i = 0; i < MTK_LUT_SIZE; i++) {
  72                         word = (((lut[i].red >> 6) & LUT_10BIT_MASK) << 20) +
  73                                 (((lut[i].green >> 6) & LUT_10BIT_MASK) << 10) +
  74                                 ((lut[i].blue >> 6) & LUT_10BIT_MASK);
  75                         writel(word, (lut_base + i * 4));
  76                 }
  77         }
  78 }
  79
  80 void mtk_gamma_set(struct device *dev, struct drm_crtc_state *state)
  81 {
  82         struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
  83
  84         mtk_gamma_set_common(gamma->regs, state);
  85 }
  86
  87 void mtk_gamma_config(struct device *dev, unsigned int w,
  88                       unsigned int h, unsigned int vrefresh,
  89                       unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
  90 {
  91         struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
  92
  93         mtk_ddp_write(cmdq_pkt, h << 16 | w, &gamma->cmdq_reg, gamma->regs,
  94                       DISP_GAMMA_SIZE);
  95         if (gamma->data && gamma->data->has_dither)
  96                 mtk_dither_set_common(gamma->regs, &gamma->cmdq_reg, bpc,
  97                                       DISP_GAMMA_CFG, GAMMA_DITHERING, cmdq_pkt);
  98 }
  99
 100 void mtk_gamma_start(struct device *dev)
 101 {
 102         struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
 103
 104         writel(GAMMA_EN, gamma->regs + DISP_GAMMA_EN);
 105 }
 106
 107 void mtk_gamma_stop(struct device *dev)
 108 {
 109         struct mtk_disp_gamma *gamma = dev_get_drvdata(dev);
 110
 111         writel_relaxed(0x0, gamma->regs + DISP_GAMMA_EN);
 112 }
 113
 114 static int mtk_disp_gamma_bind(struct device *dev, struct device *master,
 115                                void *data)
 116 {
 117         return 0;
 118 }
 119
 120 static void mtk_disp_gamma_unbind(struct device *dev, struct device *master,
 121                                   void *data)
 122 {
 123 }
 124
 125 static const struct component_ops mtk_disp_gamma_component_ops = {
 126         .bind   = mtk_disp_gamma_bind,
 127         .unbind = mtk_disp_gamma_unbind,
 128 };
 129
 130 static int mtk_disp_gamma_probe(struct platform_device *pdev)
 131 {
 132         struct device *dev = &pdev->dev;
 133         struct mtk_disp_gamma *priv;
 134         struct resource *res;
 135         int ret;
 136
 137         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 138         if (!priv)
 139                 return -ENOMEM;
 140
 141         priv->clk = devm_clk_get(dev, NULL);
 142         if (IS_ERR(priv->clk)) {
 143                 dev_err(dev, "failed to get gamma clk\n");
 144                 return PTR_ERR(priv->clk);
 145         }
 146
 147         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 148         priv->regs = devm_ioremap_resource(dev, res);
 149         if (IS_ERR(priv->regs)) {
 150                 dev_err(dev, "failed to ioremap gamma\n");
 151                 return PTR_ERR(priv->regs);
 152         }
 153
 154 #if IS_REACHABLE(CONFIG_MTK_CMDQ)
 155         ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0);
 156         if (ret)
 157                 dev_dbg(dev, "get mediatek,gce-client-reg fail!\n");
 158 #endif
 159
 160         priv->data = of_device_get_match_data(dev);
 161         platform_set_drvdata(pdev, priv);
 162
 163         ret = component_add(dev, &mtk_disp_gamma_component_ops);
 164         if (ret)
 165                 dev_err(dev, "Failed to add component: %d\n", ret);
 166
 167         return ret;
 168 }
 169
 170 static int mtk_disp_gamma_remove(struct platform_device *pdev)
 171 {
 172         component_del(&pdev->dev, &mtk_disp_gamma_component_ops);
 173
 174         return 0;
 175 }
 176
 177 static const struct mtk_disp_gamma_data mt8173_gamma_driver_data = {
 178         .has_dither = true,
 179 };
 180
 181 static const struct of_device_id mtk_disp_gamma_driver_dt_match[] = {
 182         { .compatible = "mediatek,mt8173-disp-gamma",
 183           .data = &mt8173_gamma_driver_data},
 184         { .compatible = "mediatek,mt8183-disp-gamma"},
 185         {},
 186 };
 187 MODULE_DEVICE_TABLE(of, mtk_disp_gamma_driver_dt_match);
 188
 189 struct platform_driver mtk_disp_gamma_driver = {
 190         .probe          = mtk_disp_gamma_probe,
 191         .remove         = mtk_disp_gamma_remove,
 192         .driver         = {
 193                 .name   = "mediatek-disp-gamma",
 194                 .owner  = THIS_MODULE,
 195                 .of_match_table = mtk_disp_gamma_driver_dt_match,
 196         },
 197 };