drivers/tty/serial/sunsu.c

   1 /*
   2  * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
   3  *
   4  * Copyright (C) 1997  Eddie C. Dost  ([email protected])
   5  * Copyright (C) 1998-1999  Pete Zaitcev   ([email protected])
   6  *
   7  * This is mainly a variation of 8250.c, credits go to authors mentioned
   8  * therein.  In fact this driver should be merged into the generic 8250.c
   9  * infrastructure perhaps using a 8250_sparc.c module.
  10  *
  11  * Fixed to use tty_get_baud_rate().
  12  *   Theodore Ts'o <[email protected]>, 2001-Oct-12
  13  *
  14  * Converted to new 2.5.x UART layer.
  15  *   David S. Miller ([email protected]), 2002-Jul-29
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/kernel.h>
  20 #include <linux/spinlock.h>
  21 #include <linux/errno.h>
  22 #include <linux/tty.h>
  23 #include <linux/tty_flip.h>
  24 #include <linux/major.h>
  25 #include <linux/string.h>
  26 #include <linux/ptrace.h>
  27 #include <linux/ioport.h>
  28 #include <linux/circ_buf.h>
  29 #include <linux/serial.h>
  30 #include <linux/sysrq.h>
  31 #include <linux/console.h>
  32 #include <linux/slab.h>
  33 #ifdef CONFIG_SERIO
  34 #include <linux/serio.h>
  35 #endif
  36 #include <linux/serial_reg.h>
  37 #include <linux/init.h>
  38 #include <linux/delay.h>
  39 #include <linux/of_device.h>
  40
  41 #include <asm/io.h>
  42 #include <asm/irq.h>
  43 #include <asm/prom.h>
  44 #include <asm/setup.h>
  45
  46 #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  47 #define SUPPORT_SYSRQ
  48 #endif
  49
  50 #include <linux/serial_core.h>
  51 #include <linux/sunserialcore.h>
  52
  53 /* We are on a NS PC87303 clocked with 24.0 MHz, which results
  54  * in a UART clock of 1.8462 MHz.
  55  */
  56 #define SU_BASE_BAUD    (1846200 / 16)
  57
  58 enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
  59 static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
  60
  61 struct serial_uart_config {
  62         char    *name;
  63         int     dfl_xmit_fifo_size;
  64         int     flags;
  65 };
  66
  67 /*
  68  * Here we define the default xmit fifo size used for each type of UART.
  69  */
  70 static const struct serial_uart_config uart_config[] = {
  71         { "unknown",    1,      0 },
  72         { "8250",       1,      0 },
  73         { "16450",      1,      0 },
  74         { "16550",      1,      0 },
  75         { "16550A",     16,     UART_CLEAR_FIFO | UART_USE_FIFO },
  76         { "Cirrus",     1,      0 },
  77         { "ST16650",    1,      UART_CLEAR_FIFO | UART_STARTECH },
  78         { "ST16650V2",  32,     UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  79         { "TI16750",    64,     UART_CLEAR_FIFO | UART_USE_FIFO },
  80         { "Startech",   1,      0 },
  81         { "16C950/954", 128,    UART_CLEAR_FIFO | UART_USE_FIFO },
  82         { "ST16654",    64,     UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  83         { "XR16850",    128,    UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  84         { "RSA",        2048,   UART_CLEAR_FIFO | UART_USE_FIFO }
  85 };
  86
  87 struct uart_sunsu_port {
  88         struct uart_port        port;
  89         unsigned char           acr;
  90         unsigned char           ier;
  91         unsigned short          rev;
  92         unsigned char           lcr;
  93         unsigned int            lsr_break_flag;
  94         unsigned int            cflag;
  95
  96         /* Probing information.  */
  97         enum su_type            su_type;
  98         unsigned int            type_probed;    /* XXX Stupid */
  99         unsigned long           reg_size;
 100
 101 #ifdef CONFIG_SERIO
 102         struct serio            serio;
 103         int                     serio_open;
 104 #endif
 105 };
 106
 107 static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
 108 {
 109         offset <<= up->port.regshift;
 110
 111         switch (up->port.iotype) {
 112         case UPIO_HUB6:
 113                 outb(up->port.hub6 - 1 + offset, up->port.iobase);
 114                 return inb(up->port.iobase + 1);
 115
 116         case UPIO_MEM:
 117                 return readb(up->port.membase + offset);
 118
 119         default:
 120                 return inb(up->port.iobase + offset);
 121         }
 122 }
 123
 124 static void serial_out(struct uart_sunsu_port *up, int offset, int value)
 125 {
 126 #ifndef CONFIG_SPARC64
 127         /*
 128          * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
 129          * connected with a gate then go to SlavIO. When IRQ4 goes tristated
 130          * gate outputs a logical one. Since we use level triggered interrupts
 131          * we have lockup and watchdog reset. We cannot mask IRQ because
 132          * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
 133          * This problem is similar to what Alpha people suffer, see serial.c.
 134          */
 135         if (offset == UART_MCR)
 136                 value |= UART_MCR_OUT2;
 137 #endif
 138         offset <<= up->port.regshift;
 139
 140         switch (up->port.iotype) {
 141         case UPIO_HUB6:
 142                 outb(up->port.hub6 - 1 + offset, up->port.iobase);
 143                 outb(value, up->port.iobase + 1);
 144                 break;
 145
 146         case UPIO_MEM:
 147                 writeb(value, up->port.membase + offset);
 148                 break;
 149
 150         default:
 151                 outb(value, up->port.iobase + offset);
 152         }
 153 }
 154
 155 /*
 156  * We used to support using pause I/O for certain machines.  We
 157  * haven't supported this for a while, but just in case it's badly
 158  * needed for certain old 386 machines, I've left these #define's
 159  * in....
 160  */
 161 #define serial_inp(up, offset)          serial_in(up, offset)
 162 #define serial_outp(up, offset, value)  serial_out(up, offset, value)
 163
 164
 165 /*
 166  * For the 16C950
 167  */
 168 static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
 169 {
 170         serial_out(up, UART_SCR, offset);
 171         serial_out(up, UART_ICR, value);
 172 }
 173
 174 #if 0 /* Unused currently */
 175 static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
 176 {
 177         unsigned int value;
 178
 179         serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
 180         serial_out(up, UART_SCR, offset);
 181         value = serial_in(up, UART_ICR);
 182         serial_icr_write(up, UART_ACR, up->acr);
 183
 184         return value;
 185 }
 186 #endif
 187
 188 #ifdef CONFIG_SERIAL_8250_RSA
 189 /*
 190  * Attempts to turn on the RSA FIFO.  Returns zero on failure.
 191  * We set the port uart clock rate if we succeed.
 192  */
 193 static int __enable_rsa(struct uart_sunsu_port *up)
 194 {
 195         unsigned char mode;
 196         int result;
 197
 198         mode = serial_inp(up, UART_RSA_MSR);
 199         result = mode & UART_RSA_MSR_FIFO;
 200
 201         if (!result) {
 202                 serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
 203                 mode = serial_inp(up, UART_RSA_MSR);
 204                 result = mode & UART_RSA_MSR_FIFO;
 205         }
 206
 207         if (result)
 208                 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
 209
 210         return result;
 211 }
 212
 213 static void enable_rsa(struct uart_sunsu_port *up)
 214 {
 215         if (up->port.type == PORT_RSA) {
 216                 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
 217                         spin_lock_irq(&up->port.lock);
 218                         __enable_rsa(up);
 219                         spin_unlock_irq(&up->port.lock);
 220                 }
 221                 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
 222                         serial_outp(up, UART_RSA_FRR, 0);
 223         }
 224 }
 225
 226 /*
 227  * Attempts to turn off the RSA FIFO.  Returns zero on failure.
 228  * It is unknown why interrupts were disabled in here.  However,
 229  * the caller is expected to preserve this behaviour by grabbing
 230  * the spinlock before calling this function.
 231  */
 232 static void disable_rsa(struct uart_sunsu_port *up)
 233 {
 234         unsigned char mode;
 235         int result;
 236
 237         if (up->port.type == PORT_RSA &&
 238             up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
 239                 spin_lock_irq(&up->port.lock);
 240
 241                 mode = serial_inp(up, UART_RSA_MSR);
 242                 result = !(mode & UART_RSA_MSR_FIFO);
 243
 244                 if (!result) {
 245                         serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
 246                         mode = serial_inp(up, UART_RSA_MSR);
 247                         result = !(mode & UART_RSA_MSR_FIFO);
 248                 }
 249
 250                 if (result)
 251                         up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
 252                 spin_unlock_irq(&up->port.lock);
 253         }
 254 }
 255 #endif /* CONFIG_SERIAL_8250_RSA */
 256
 257 static inline void __stop_tx(struct uart_sunsu_port *p)
 258 {
 259         if (p->ier & UART_IER_THRI) {
 260                 p->ier &= ~UART_IER_THRI;
 261                 serial_out(p, UART_IER, p->ier);
 262         }
 263 }
 264
 265 static void sunsu_stop_tx(struct uart_port *port)
 266 {
 267         struct uart_sunsu_port *up =
 268                 container_of(port, struct uart_sunsu_port, port);
 269
 270         __stop_tx(up);
 271
 272         /*
 273          * We really want to stop the transmitter from sending.
 274          */
 275         if (up->port.type == PORT_16C950) {
 276                 up->acr |= UART_ACR_TXDIS;
 277                 serial_icr_write(up, UART_ACR, up->acr);
 278         }
 279 }
 280
 281 static void sunsu_start_tx(struct uart_port *port)
 282 {
 283         struct uart_sunsu_port *up =
 284                 container_of(port, struct uart_sunsu_port, port);
 285
 286         if (!(up->ier & UART_IER_THRI)) {
 287                 up->ier |= UART_IER_THRI;
 288                 serial_out(up, UART_IER, up->ier);
 289         }
 290
 291         /*
 292          * Re-enable the transmitter if we disabled it.
 293          */
 294         if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
 295                 up->acr &= ~UART_ACR_TXDIS;
 296                 serial_icr_write(up, UART_ACR, up->acr);
 297         }
 298 }
 299
 300 static void sunsu_stop_rx(struct uart_port *port)
 301 {
 302         struct uart_sunsu_port *up =
 303                 container_of(port, struct uart_sunsu_port, port);
 304
 305         up->ier &= ~UART_IER_RLSI;
 306         up->port.read_status_mask &= ~UART_LSR_DR;
 307         serial_out(up, UART_IER, up->ier);
 308 }
 309
 310 static void sunsu_enable_ms(struct uart_port *port)
 311 {
 312         struct uart_sunsu_port *up =
 313                 container_of(port, struct uart_sunsu_port, port);
 314         unsigned long flags;
 315
 316         spin_lock_irqsave(&up->port.lock, flags);
 317         up->ier |= UART_IER_MSI;
 318         serial_out(up, UART_IER, up->ier);
 319         spin_unlock_irqrestore(&up->port.lock, flags);
 320 }
 321
 322 static void
 323 receive_chars(struct uart_sunsu_port *up, unsigned char *status)
 324 {
 325         struct tty_port *port = &up->port.state->port;
 326         unsigned char ch, flag;
 327         int max_count = 256;
 328         int saw_console_brk = 0;
 329
 330         do {
 331                 ch = serial_inp(up, UART_RX);
 332                 flag = TTY_NORMAL;
 333                 up->port.icount.rx++;
 334
 335                 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
 336                                        UART_LSR_FE | UART_LSR_OE))) {
 337                         /*
 338                          * For statistics only
 339                          */
 340                         if (*status & UART_LSR_BI) {
 341                                 *status &= ~(UART_LSR_FE | UART_LSR_PE);
 342                                 up->port.icount.brk++;
 343                                 if (up->port.cons != NULL &&
 344                                     up->port.line == up->port.cons->index)
 345                                         saw_console_brk = 1;
 346                                 /*
 347                                  * We do the SysRQ and SAK checking
 348                                  * here because otherwise the break
 349                                  * may get masked by ignore_status_mask
 350                                  * or read_status_mask.
 351                                  */
 352                                 if (uart_handle_break(&up->port))
 353                                         goto ignore_char;
 354                         } else if (*status & UART_LSR_PE)
 355                                 up->port.icount.parity++;
 356                         else if (*status & UART_LSR_FE)
 357                                 up->port.icount.frame++;
 358                         if (*status & UART_LSR_OE)
 359                                 up->port.icount.overrun++;
 360
 361                         /*
 362                          * Mask off conditions which should be ingored.
 363                          */
 364                         *status &= up->port.read_status_mask;
 365
 366                         if (up->port.cons != NULL &&
 367                             up->port.line == up->port.cons->index) {
 368                                 /* Recover the break flag from console xmit */
 369                                 *status |= up->lsr_break_flag;
 370                                 up->lsr_break_flag = 0;
 371                         }
 372
 373                         if (*status & UART_LSR_BI) {
 374                                 flag = TTY_BREAK;
 375                         } else if (*status & UART_LSR_PE)
 376                                 flag = TTY_PARITY;
 377                         else if (*status & UART_LSR_FE)
 378                                 flag = TTY_FRAME;
 379                 }
 380                 if (uart_handle_sysrq_char(&up->port, ch))
 381                         goto ignore_char;
 382                 if ((*status & up->port.ignore_status_mask) == 0)
 383                         tty_insert_flip_char(port, ch, flag);
 384                 if (*status & UART_LSR_OE)
 385                         /*
 386                          * Overrun is special, since it's reported
 387                          * immediately, and doesn't affect the current
 388                          * character.
 389                          */
 390                          tty_insert_flip_char(port, 0, TTY_OVERRUN);
 391         ignore_char:
 392                 *status = serial_inp(up, UART_LSR);
 393         } while ((*status & UART_LSR_DR) && (max_count-- > 0));
 394
 395         if (saw_console_brk)
 396                 sun_do_break();
 397 }
 398
 399 static void transmit_chars(struct uart_sunsu_port *up)
 400 {
 401         struct circ_buf *xmit = &up->port.state->xmit;
 402         int count;
 403
 404         if (up->port.x_char) {
 405                 serial_outp(up, UART_TX, up->port.x_char);
 406                 up->port.icount.tx++;
 407                 up->port.x_char = 0;
 408                 return;
 409         }
 410         if (uart_tx_stopped(&up->port)) {
 411                 sunsu_stop_tx(&up->port);
 412                 return;
 413         }
 414         if (uart_circ_empty(xmit)) {
 415                 __stop_tx(up);
 416                 return;
 417         }
 418
 419         count = up->port.fifosize;
 420         do {
 421                 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
 422                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 423                 up->port.icount.tx++;
 424                 if (uart_circ_empty(xmit))
 425                         break;
 426         } while (--count > 0);
 427
 428         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 429                 uart_write_wakeup(&up->port);
 430
 431         if (uart_circ_empty(xmit))
 432                 __stop_tx(up);
 433 }
 434
 435 static void check_modem_status(struct uart_sunsu_port *up)
 436 {
 437         int status;
 438
 439         status = serial_in(up, UART_MSR);
 440
 441         if ((status & UART_MSR_ANY_DELTA) == 0)
 442                 return;
 443
 444         if (status & UART_MSR_TERI)
 445                 up->port.icount.rng++;
 446         if (status & UART_MSR_DDSR)
 447                 up->port.icount.dsr++;
 448         if (status & UART_MSR_DDCD)
 449                 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
 450         if (status & UART_MSR_DCTS)
 451                 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
 452
 453         wake_up_interruptible(&up->port.state->port.delta_msr_wait);
 454 }
 455
 456 static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
 457 {
 458         struct uart_sunsu_port *up = dev_id;
 459         unsigned long flags;
 460         unsigned char status;
 461
 462         spin_lock_irqsave(&up->port.lock, flags);
 463
 464         do {
 465                 status = serial_inp(up, UART_LSR);
 466                 if (status & UART_LSR_DR)
 467                         receive_chars(up, &status);
 468                 check_modem_status(up);
 469                 if (status & UART_LSR_THRE)
 470                         transmit_chars(up);
 471
 472                 spin_unlock_irqrestore(&up->port.lock, flags);
 473
 474                 tty_flip_buffer_push(&up->port.state->port);
 475
 476                 spin_lock_irqsave(&up->port.lock, flags);
 477
 478         } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
 479
 480         spin_unlock_irqrestore(&up->port.lock, flags);
 481
 482         return IRQ_HANDLED;
 483 }
 484
 485 /* Separate interrupt handling path for keyboard/mouse ports.  */
 486
 487 static void
 488 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
 489                    unsigned int iflag, unsigned int quot);
 490
 491 static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
 492 {
 493         unsigned int cur_cflag = up->cflag;
 494         int quot, new_baud;
 495
 496         up->cflag &= ~CBAUD;
 497         up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
 498
 499         quot = up->port.uartclk / (16 * new_baud);
 500
 501         sunsu_change_speed(&up->port, up->cflag, 0, quot);
 502 }
 503
 504 static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
 505 {
 506         do {
 507                 unsigned char ch = serial_inp(up, UART_RX);
 508
 509                 /* Stop-A is handled by drivers/char/keyboard.c now. */
 510                 if (up->su_type == SU_PORT_KBD) {
 511 #ifdef CONFIG_SERIO
 512                         serio_interrupt(&up->serio, ch, 0);
 513 #endif
 514                 } else if (up->su_type == SU_PORT_MS) {
 515                         int ret = suncore_mouse_baud_detection(ch, is_break);
 516
 517                         switch (ret) {
 518                         case 2:
 519                                 sunsu_change_mouse_baud(up);
 520                                 /* fallthru */
 521                         case 1:
 522                                 break;
 523
 524                         case 0:
 525 #ifdef CONFIG_SERIO
 526                                 serio_interrupt(&up->serio, ch, 0);
 527 #endif
 528                                 break;
 529                         }
 530                 }
 531         } while (serial_in(up, UART_LSR) & UART_LSR_DR);
 532 }
 533
 534 static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
 535 {
 536         struct uart_sunsu_port *up = dev_id;
 537
 538         if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
 539                 unsigned char status = serial_inp(up, UART_LSR);
 540
 541                 if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
 542                         receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
 543         }
 544
 545         return IRQ_HANDLED;
 546 }
 547
 548 static unsigned int sunsu_tx_empty(struct uart_port *port)
 549 {
 550         struct uart_sunsu_port *up =
 551                 container_of(port, struct uart_sunsu_port, port);
 552         unsigned long flags;
 553         unsigned int ret;
 554
 555         spin_lock_irqsave(&up->port.lock, flags);
 556         ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
 557         spin_unlock_irqrestore(&up->port.lock, flags);
 558
 559         return ret;
 560 }
 561
 562 static unsigned int sunsu_get_mctrl(struct uart_port *port)
 563 {
 564         struct uart_sunsu_port *up =
 565                 container_of(port, struct uart_sunsu_port, port);
 566         unsigned char status;
 567         unsigned int ret;
 568
 569         status = serial_in(up, UART_MSR);
 570
 571         ret = 0;
 572         if (status & UART_MSR_DCD)
 573                 ret |= TIOCM_CAR;
 574         if (status & UART_MSR_RI)
 575                 ret |= TIOCM_RNG;
 576         if (status & UART_MSR_DSR)
 577                 ret |= TIOCM_DSR;
 578         if (status & UART_MSR_CTS)
 579                 ret |= TIOCM_CTS;
 580         return ret;
 581 }
 582
 583 static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
 584 {
 585         struct uart_sunsu_port *up =
 586                 container_of(port, struct uart_sunsu_port, port);
 587         unsigned char mcr = 0;
 588
 589         if (mctrl & TIOCM_RTS)
 590                 mcr |= UART_MCR_RTS;
 591         if (mctrl & TIOCM_DTR)
 592                 mcr |= UART_MCR_DTR;
 593         if (mctrl & TIOCM_OUT1)
 594                 mcr |= UART_MCR_OUT1;
 595         if (mctrl & TIOCM_OUT2)
 596                 mcr |= UART_MCR_OUT2;
 597         if (mctrl & TIOCM_LOOP)
 598                 mcr |= UART_MCR_LOOP;
 599
 600         serial_out(up, UART_MCR, mcr);
 601 }
 602
 603 static void sunsu_break_ctl(struct uart_port *port, int break_state)
 604 {
 605         struct uart_sunsu_port *up =
 606                 container_of(port, struct uart_sunsu_port, port);
 607         unsigned long flags;
 608
 609         spin_lock_irqsave(&up->port.lock, flags);
 610         if (break_state == -1)
 611                 up->lcr |= UART_LCR_SBC;
 612         else
 613                 up->lcr &= ~UART_LCR_SBC;
 614         serial_out(up, UART_LCR, up->lcr);
 615         spin_unlock_irqrestore(&up->port.lock, flags);
 616 }
 617
 618 static int sunsu_startup(struct uart_port *port)
 619 {
 620         struct uart_sunsu_port *up =
 621                 container_of(port, struct uart_sunsu_port, port);
 622         unsigned long flags;
 623         int retval;
 624
 625         if (up->port.type == PORT_16C950) {
 626                 /* Wake up and initialize UART */
 627                 up->acr = 0;
 628                 serial_outp(up, UART_LCR, 0xBF);
 629                 serial_outp(up, UART_EFR, UART_EFR_ECB);
 630                 serial_outp(up, UART_IER, 0);
 631                 serial_outp(up, UART_LCR, 0);
 632                 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
 633                 serial_outp(up, UART_LCR, 0xBF);
 634                 serial_outp(up, UART_EFR, UART_EFR_ECB);
 635                 serial_outp(up, UART_LCR, 0);
 636         }
 637
 638 #ifdef CONFIG_SERIAL_8250_RSA
 639         /*
 640          * If this is an RSA port, see if we can kick it up to the
 641          * higher speed clock.
 642          */
 643         enable_rsa(up);
 644 #endif
 645
 646         /*
 647          * Clear the FIFO buffers and disable them.
 648          * (they will be reenabled in set_termios())
 649          */
 650         if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
 651                 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 652                 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 653                                 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
 654                 serial_outp(up, UART_FCR, 0);
 655         }
 656
 657         /*
 658          * Clear the interrupt registers.
 659          */
 660         (void) serial_inp(up, UART_LSR);
 661         (void) serial_inp(up, UART_RX);
 662         (void) serial_inp(up, UART_IIR);
 663         (void) serial_inp(up, UART_MSR);
 664
 665         /*
 666          * At this point, there's no way the LSR could still be 0xff;
 667          * if it is, then bail out, because there's likely no UART
 668          * here.
 669          */
 670         if (!(up->port.flags & UPF_BUGGY_UART) &&
 671             (serial_inp(up, UART_LSR) == 0xff)) {
 672                 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
 673                 return -ENODEV;
 674         }
 675
 676         if (up->su_type != SU_PORT_PORT) {
 677                 retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
 678                                      IRQF_SHARED, su_typev[up->su_type], up);
 679         } else {
 680                 retval = request_irq(up->port.irq, sunsu_serial_interrupt,
 681                                      IRQF_SHARED, su_typev[up->su_type], up);
 682         }
 683         if (retval) {
 684                 printk("su: Cannot register IRQ %d\n", up->port.irq);
 685                 return retval;
 686         }
 687
 688         /*
 689          * Now, initialize the UART
 690          */
 691         serial_outp(up, UART_LCR, UART_LCR_WLEN8);
 692
 693         spin_lock_irqsave(&up->port.lock, flags);
 694
 695         up->port.mctrl |= TIOCM_OUT2;
 696
 697         sunsu_set_mctrl(&up->port, up->port.mctrl);
 698         spin_unlock_irqrestore(&up->port.lock, flags);
 699
 700         /*
 701          * Finally, enable interrupts.  Note: Modem status interrupts
 702          * are set via set_termios(), which will be occurring imminently
 703          * anyway, so we don't enable them here.
 704          */
 705         up->ier = UART_IER_RLSI | UART_IER_RDI;
 706         serial_outp(up, UART_IER, up->ier);
 707
 708         if (up->port.flags & UPF_FOURPORT) {
 709                 unsigned int icp;
 710                 /*
 711                  * Enable interrupts on the AST Fourport board
 712                  */
 713                 icp = (up->port.iobase & 0xfe0) | 0x01f;
 714                 outb_p(0x80, icp);
 715                 (void) inb_p(icp);
 716         }
 717
 718         /*
 719          * And clear the interrupt registers again for luck.
 720          */
 721         (void) serial_inp(up, UART_LSR);
 722         (void) serial_inp(up, UART_RX);
 723         (void) serial_inp(up, UART_IIR);
 724         (void) serial_inp(up, UART_MSR);
 725
 726         return 0;
 727 }
 728
 729 static void sunsu_shutdown(struct uart_port *port)
 730 {
 731         struct uart_sunsu_port *up =
 732                 container_of(port, struct uart_sunsu_port, port);
 733         unsigned long flags;
 734
 735         /*
 736          * Disable interrupts from this port
 737          */
 738         up->ier = 0;
 739         serial_outp(up, UART_IER, 0);
 740
 741         spin_lock_irqsave(&up->port.lock, flags);
 742         if (up->port.flags & UPF_FOURPORT) {
 743                 /* reset interrupts on the AST Fourport board */
 744                 inb((up->port.iobase & 0xfe0) | 0x1f);
 745                 up->port.mctrl |= TIOCM_OUT1;
 746         } else
 747                 up->port.mctrl &= ~TIOCM_OUT2;
 748
 749         sunsu_set_mctrl(&up->port, up->port.mctrl);
 750         spin_unlock_irqrestore(&up->port.lock, flags);
 751
 752         /*
 753          * Disable break condition and FIFOs
 754          */
 755         serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
 756         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 757                                   UART_FCR_CLEAR_RCVR |
 758                                   UART_FCR_CLEAR_XMIT);
 759         serial_outp(up, UART_FCR, 0);
 760
 761 #ifdef CONFIG_SERIAL_8250_RSA
 762         /*
 763          * Reset the RSA board back to 115kbps compat mode.
 764          */
 765         disable_rsa(up);
 766 #endif
 767
 768         /*
 769          * Read data port to reset things.
 770          */
 771         (void) serial_in(up, UART_RX);
 772
 773         free_irq(up->port.irq, up);
 774 }
 775
 776 static void
 777 sunsu_change_speed(struct uart_port *port, unsigned int cflag,
 778                    unsigned int iflag, unsigned int quot)
 779 {
 780         struct uart_sunsu_port *up =
 781                 container_of(port, struct uart_sunsu_port, port);
 782         unsigned char cval, fcr = 0;
 783         unsigned long flags;
 784
 785         switch (cflag & CSIZE) {
 786         case CS5:
 787                 cval = 0x00;
 788                 break;
 789         case CS6:
 790                 cval = 0x01;
 791                 break;
 792         case CS7:
 793                 cval = 0x02;
 794                 break;
 795         default:
 796         case CS8:
 797                 cval = 0x03;
 798                 break;
 799         }
 800
 801         if (cflag & CSTOPB)
 802                 cval |= 0x04;
 803         if (cflag & PARENB)
 804                 cval |= UART_LCR_PARITY;
 805         if (!(cflag & PARODD))
 806                 cval |= UART_LCR_EPAR;
 807 #ifdef CMSPAR
 808         if (cflag & CMSPAR)
 809                 cval |= UART_LCR_SPAR;
 810 #endif
 811
 812         /*
 813          * Work around a bug in the Oxford Semiconductor 952 rev B
 814          * chip which causes it to seriously miscalculate baud rates
 815          * when DLL is 0.
 816          */
 817         if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
 818             up->rev == 0x5201)
 819                 quot ++;
 820
 821         if (uart_config[up->port.type].flags & UART_USE_FIFO) {
 822                 if ((up->port.uartclk / quot) < (2400 * 16))
 823                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
 824 #ifdef CONFIG_SERIAL_8250_RSA
 825                 else if (up->port.type == PORT_RSA)
 826                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
 827 #endif
 828                 else
 829                         fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
 830         }
 831         if (up->port.type == PORT_16750)
 832                 fcr |= UART_FCR7_64BYTE;
 833
 834         /*
 835          * Ok, we're now changing the port state.  Do it with
 836          * interrupts disabled.
 837          */
 838         spin_lock_irqsave(&up->port.lock, flags);
 839
 840         /*
 841          * Update the per-port timeout.
 842          */
 843         uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
 844
 845         up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
 846         if (iflag & INPCK)
 847                 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
 848         if (iflag & (IGNBRK | BRKINT | PARMRK))
 849                 up->port.read_status_mask |= UART_LSR_BI;
 850
 851         /*
 852          * Characteres to ignore
 853          */
 854         up->port.ignore_status_mask = 0;
 855         if (iflag & IGNPAR)
 856                 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
 857         if (iflag & IGNBRK) {
 858                 up->port.ignore_status_mask |= UART_LSR_BI;
 859                 /*
 860                  * If we're ignoring parity and break indicators,
 861                  * ignore overruns too (for real raw support).
 862                  */
 863                 if (iflag & IGNPAR)
 864                         up->port.ignore_status_mask |= UART_LSR_OE;
 865         }
 866
 867         /*
 868          * ignore all characters if CREAD is not set
 869          */
 870         if ((cflag & CREAD) == 0)
 871                 up->port.ignore_status_mask |= UART_LSR_DR;
 872
 873         /*
 874          * CTS flow control flag and modem status interrupts
 875          */
 876         up->ier &= ~UART_IER_MSI;
 877         if (UART_ENABLE_MS(&up->port, cflag))
 878                 up->ier |= UART_IER_MSI;
 879
 880         serial_out(up, UART_IER, up->ier);
 881
 882         if (uart_config[up->port.type].flags & UART_STARTECH) {
 883                 serial_outp(up, UART_LCR, 0xBF);
 884                 serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
 885         }
 886         serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
 887         serial_outp(up, UART_DLL, quot & 0xff);         /* LS of divisor */
 888         serial_outp(up, UART_DLM, quot >> 8);           /* MS of divisor */
 889         if (up->port.type == PORT_16750)
 890                 serial_outp(up, UART_FCR, fcr);         /* set fcr */
 891         serial_outp(up, UART_LCR, cval);                /* reset DLAB */
 892         up->lcr = cval;                                 /* Save LCR */
 893         if (up->port.type != PORT_16750) {
 894                 if (fcr & UART_FCR_ENABLE_FIFO) {
 895                         /* emulated UARTs (Lucent Venus 167x) need two steps */
 896                         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 897                 }
 898                 serial_outp(up, UART_FCR, fcr);         /* set fcr */
 899         }
 900
 901         up->cflag = cflag;
 902
 903         spin_unlock_irqrestore(&up->port.lock, flags);
 904 }
 905
 906 static void
 907 sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
 908                   struct ktermios *old)
 909 {
 910         unsigned int baud, quot;
 911
 912         /*
 913          * Ask the core to calculate the divisor for us.
 914          */
 915         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 916         quot = uart_get_divisor(port, baud);
 917
 918         sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
 919 }
 920
 921 static void sunsu_release_port(struct uart_port *port)
 922 {
 923 }
 924
 925 static int sunsu_request_port(struct uart_port *port)
 926 {
 927         return 0;
 928 }
 929
 930 static void sunsu_config_port(struct uart_port *port, int flags)
 931 {
 932         struct uart_sunsu_port *up =
 933                 container_of(port, struct uart_sunsu_port, port);
 934
 935         if (flags & UART_CONFIG_TYPE) {
 936                 /*
 937                  * We are supposed to call autoconfig here, but this requires
 938                  * splitting all the OBP probing crap from the UART probing.
 939                  * We'll do it when we kill sunsu.c altogether.
 940                  */
 941                 port->type = up->type_probed;   /* XXX */
 942         }
 943 }
 944
 945 static int
 946 sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
 947 {
 948         return -EINVAL;
 949 }
 950
 951 static const char *
 952 sunsu_type(struct uart_port *port)
 953 {
 954         int type = port->type;
 955
 956         if (type >= ARRAY_SIZE(uart_config))
 957                 type = 0;
 958         return uart_config[type].name;
 959 }
 960
 961 static struct uart_ops sunsu_pops = {
 962         .tx_empty       = sunsu_tx_empty,
 963         .set_mctrl      = sunsu_set_mctrl,
 964         .get_mctrl      = sunsu_get_mctrl,
 965         .stop_tx        = sunsu_stop_tx,
 966         .start_tx       = sunsu_start_tx,
 967         .stop_rx        = sunsu_stop_rx,
 968         .enable_ms      = sunsu_enable_ms,
 969         .break_ctl      = sunsu_break_ctl,
 970         .startup        = sunsu_startup,
 971         .shutdown       = sunsu_shutdown,
 972         .set_termios    = sunsu_set_termios,
 973         .type           = sunsu_type,
 974         .release_port   = sunsu_release_port,
 975         .request_port   = sunsu_request_port,
 976         .config_port    = sunsu_config_port,
 977         .verify_port    = sunsu_verify_port,
 978 };
 979
 980 #define UART_NR 4
 981
 982 static struct uart_sunsu_port sunsu_ports[UART_NR];
 983 static int nr_inst; /* Number of already registered ports */
 984
 985 #ifdef CONFIG_SERIO
 986
 987 static DEFINE_SPINLOCK(sunsu_serio_lock);
 988
 989 static int sunsu_serio_write(struct serio *serio, unsigned char ch)
 990 {
 991         struct uart_sunsu_port *up = serio->port_data;
 992         unsigned long flags;
 993         int lsr;
 994
 995         spin_lock_irqsave(&sunsu_serio_lock, flags);
 996
 997         do {
 998                 lsr = serial_in(up, UART_LSR);
 999         } while (!(lsr & UART_LSR_THRE));
1000
1001         /* Send the character out. */
1002         serial_out(up, UART_TX, ch);
1003
1004         spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1005
1006         return 0;
1007 }
1008
1009 static int sunsu_serio_open(struct serio *serio)
1010 {
1011         struct uart_sunsu_port *up = serio->port_data;
1012         unsigned long flags;
1013         int ret;
1014
1015         spin_lock_irqsave(&sunsu_serio_lock, flags);
1016         if (!up->serio_open) {
1017                 up->serio_open = 1;
1018                 ret = 0;
1019         } else
1020                 ret = -EBUSY;
1021         spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1022
1023         return ret;
1024 }
1025
1026 static void sunsu_serio_close(struct serio *serio)
1027 {
1028         struct uart_sunsu_port *up = serio->port_data;
1029         unsigned long flags;
1030
1031         spin_lock_irqsave(&sunsu_serio_lock, flags);
1032         up->serio_open = 0;
1033         spin_unlock_irqrestore(&sunsu_serio_lock, flags);
1034 }
1035
1036 #endif /* CONFIG_SERIO */
1037
1038 static void sunsu_autoconfig(struct uart_sunsu_port *up)
1039 {
1040         unsigned char status1, status2, scratch, scratch2, scratch3;
1041         unsigned char save_lcr, save_mcr;
1042         unsigned long flags;
1043
1044         if (up->su_type == SU_PORT_NONE)
1045                 return;
1046
1047         up->type_probed = PORT_UNKNOWN;
1048         up->port.iotype = UPIO_MEM;
1049
1050         spin_lock_irqsave(&up->port.lock, flags);
1051
1052         if (!(up->port.flags & UPF_BUGGY_UART)) {
1053                 /*
1054                  * Do a simple existence test first; if we fail this, there's
1055                  * no point trying anything else.
1056                  *
1057                  * 0x80 is used as a nonsense port to prevent against false
1058                  * positives due to ISA bus float.  The assumption is that
1059                  * 0x80 is a non-existent port; which should be safe since
1060                  * include/asm/io.h also makes this assumption.
1061                  */
1062                 scratch = serial_inp(up, UART_IER);
1063                 serial_outp(up, UART_IER, 0);
1064 #ifdef __i386__
1065                 outb(0xff, 0x080);
1066 #endif
1067                 scratch2 = serial_inp(up, UART_IER);
1068                 serial_outp(up, UART_IER, 0x0f);
1069 #ifdef __i386__
1070                 outb(0, 0x080);
1071 #endif
1072                 scratch3 = serial_inp(up, UART_IER);
1073                 serial_outp(up, UART_IER, scratch);
1074                 if (scratch2 != 0 || scratch3 != 0x0F)
1075                         goto out;       /* We failed; there's nothing here */
1076         }
1077
1078         save_mcr = serial_in(up, UART_MCR);
1079         save_lcr = serial_in(up, UART_LCR);
1080
1081         /*
1082          * Check to see if a UART is really there.  Certain broken
1083          * internal modems based on the Rockwell chipset fail this
1084          * test, because they apparently don't implement the loopback
1085          * test mode.  So this test is skipped on the COM 1 through
1086          * COM 4 ports.  This *should* be safe, since no board
1087          * manufacturer would be stupid enough to design a board
1088          * that conflicts with COM 1-4 --- we hope!
1089          */
1090         if (!(up->port.flags & UPF_SKIP_TEST)) {
1091                 serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1092                 status1 = serial_inp(up, UART_MSR) & 0xF0;
1093                 serial_outp(up, UART_MCR, save_mcr);
1094                 if (status1 != 0x90)
1095                         goto out;       /* We failed loopback test */
1096         }
1097         serial_outp(up, UART_LCR, 0xBF);        /* set up for StarTech test */
1098         serial_outp(up, UART_EFR, 0);           /* EFR is the same as FCR */
1099         serial_outp(up, UART_LCR, 0);
1100         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1101         scratch = serial_in(up, UART_IIR) >> 6;
1102         switch (scratch) {
1103                 case 0:
1104                         up->port.type = PORT_16450;
1105                         break;
1106                 case 1:
1107                         up->port.type = PORT_UNKNOWN;
1108                         break;
1109                 case 2:
1110                         up->port.type = PORT_16550;
1111                         break;
1112                 case 3:
1113                         up->port.type = PORT_16550A;
1114                         break;
1115         }
1116         if (up->port.type == PORT_16550A) {
1117                 /* Check for Startech UART's */
1118                 serial_outp(up, UART_LCR, UART_LCR_DLAB);
1119                 if (serial_in(up, UART_EFR) == 0) {
1120                         up->port.type = PORT_16650;
1121                 } else {
1122                         serial_outp(up, UART_LCR, 0xBF);
1123                         if (serial_in(up, UART_EFR) == 0)
1124                                 up->port.type = PORT_16650V2;
1125                 }
1126         }
1127         if (up->port.type == PORT_16550A) {
1128                 /* Check for TI 16750 */
1129                 serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
1130                 serial_outp(up, UART_FCR,
1131                             UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1132                 scratch = serial_in(up, UART_IIR) >> 5;
1133                 if (scratch == 7) {
1134                         /*
1135                          * If this is a 16750, and not a cheap UART
1136                          * clone, then it should only go into 64 byte
1137                          * mode if the UART_FCR7_64BYTE bit was set
1138                          * while UART_LCR_DLAB was latched.
1139                          */
1140                         serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1141                         serial_outp(up, UART_LCR, 0);
1142                         serial_outp(up, UART_FCR,
1143                                     UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1144                         scratch = serial_in(up, UART_IIR) >> 5;
1145                         if (scratch == 6)
1146                                 up->port.type = PORT_16750;
1147                 }
1148                 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1149         }
1150         serial_outp(up, UART_LCR, save_lcr);
1151         if (up->port.type == PORT_16450) {
1152                 scratch = serial_in(up, UART_SCR);
1153                 serial_outp(up, UART_SCR, 0xa5);
1154                 status1 = serial_in(up, UART_SCR);
1155                 serial_outp(up, UART_SCR, 0x5a);
1156                 status2 = serial_in(up, UART_SCR);
1157                 serial_outp(up, UART_SCR, scratch);
1158
1159                 if ((status1 != 0xa5) || (status2 != 0x5a))
1160                         up->port.type = PORT_8250;
1161         }
1162
1163         up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
1164
1165         if (up->port.type == PORT_UNKNOWN)
1166                 goto out;
1167         up->type_probed = up->port.type;        /* XXX */
1168
1169         /*
1170          * Reset the UART.
1171          */
1172 #ifdef CONFIG_SERIAL_8250_RSA
1173         if (up->port.type == PORT_RSA)
1174                 serial_outp(up, UART_RSA_FRR, 0);
1175 #endif
1176         serial_outp(up, UART_MCR, save_mcr);
1177         serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
1178                                      UART_FCR_CLEAR_RCVR |
1179                                      UART_FCR_CLEAR_XMIT));
1180         serial_outp(up, UART_FCR, 0);
1181         (void)serial_in(up, UART_RX);
1182         serial_outp(up, UART_IER, 0);
1183
1184 out:
1185         spin_unlock_irqrestore(&up->port.lock, flags);
1186 }
1187
1188 static struct uart_driver sunsu_reg = {
1189         .owner                  = THIS_MODULE,
1190         .driver_name            = "sunsu",
1191         .dev_name               = "ttyS",
1192         .major                  = TTY_MAJOR,
1193 };
1194
1195 static int sunsu_kbd_ms_init(struct uart_sunsu_port *up)
1196 {
1197         int quot, baud;
1198 #ifdef CONFIG_SERIO
1199         struct serio *serio;
1200 #endif
1201
1202         if (up->su_type == SU_PORT_KBD) {
1203                 up->cflag = B1200 | CS8 | CLOCAL | CREAD;
1204                 baud = 1200;
1205         } else {
1206                 up->cflag = B4800 | CS8 | CLOCAL | CREAD;
1207                 baud = 4800;
1208         }
1209         quot = up->port.uartclk / (16 * baud);
1210
1211         sunsu_autoconfig(up);
1212         if (up->port.type == PORT_UNKNOWN)
1213                 return -ENODEV;
1214
1215         printk("%s: %s port at %llx, irq %u\n",
1216                up->port.dev->of_node->full_name,
1217                (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
1218                (unsigned long long) up->port.mapbase,
1219                up->port.irq);
1220
1221 #ifdef CONFIG_SERIO
1222         serio = &up->serio;
1223         serio->port_data = up;
1224
1225         serio->id.type = SERIO_RS232;
1226         if (up->su_type == SU_PORT_KBD) {
1227                 serio->id.proto = SERIO_SUNKBD;
1228                 strlcpy(serio->name, "sukbd", sizeof(serio->name));
1229         } else {
1230                 serio->id.proto = SERIO_SUN;
1231                 serio->id.extra = 1;
1232                 strlcpy(serio->name, "sums", sizeof(serio->name));
1233         }
1234         strlcpy(serio->phys,
1235                 (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
1236                 sizeof(serio->phys));
1237
1238         serio->write = sunsu_serio_write;
1239         serio->open = sunsu_serio_open;
1240         serio->close = sunsu_serio_close;
1241         serio->dev.parent = up->port.dev;
1242
1243         serio_register_port(serio);
1244 #endif
1245
1246         sunsu_change_speed(&up->port, up->cflag, 0, quot);
1247
1248         sunsu_startup(&up->port);
1249         return 0;
1250 }
1251
1252 /*
1253  * ------------------------------------------------------------
1254  * Serial console driver
1255  * ------------------------------------------------------------
1256  */
1257
1258 #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
1259
1260 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1261
1262 /*
1263  *      Wait for transmitter & holding register to empty
1264  */
1265 static void wait_for_xmitr(struct uart_sunsu_port *up)
1266 {
1267         unsigned int status, tmout = 10000;
1268
1269         /* Wait up to 10ms for the character(s) to be sent. */
1270         do {
1271                 status = serial_in(up, UART_LSR);
1272
1273                 if (status & UART_LSR_BI)
1274                         up->lsr_break_flag = UART_LSR_BI;
1275
1276                 if (--tmout == 0)
1277                         break;
1278                 udelay(1);
1279         } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1280
1281         /* Wait up to 1s for flow control if necessary */
1282         if (up->port.flags & UPF_CONS_FLOW) {
1283                 tmout = 1000000;
1284                 while (--tmout &&
1285                        ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1286                         udelay(1);
1287         }
1288 }
1289
1290 static void sunsu_console_putchar(struct uart_port *port, int ch)
1291 {
1292         struct uart_sunsu_port *up =
1293                 container_of(port, struct uart_sunsu_port, port);
1294
1295         wait_for_xmitr(up);
1296         serial_out(up, UART_TX, ch);
1297 }
1298
1299 /*
1300  *      Print a string to the serial port trying not to disturb
1301  *      any possible real use of the port...
1302  */
1303 static void sunsu_console_write(struct console *co, const char *s,
1304                                 unsigned int count)
1305 {
1306         struct uart_sunsu_port *up = &sunsu_ports[co->index];
1307         unsigned long flags;
1308         unsigned int ier;
1309         int locked = 1;
1310
1311         if (up->port.sysrq || oops_in_progress)
1312                 locked = spin_trylock_irqsave(&up->port.lock, flags);
1313         else
1314                 spin_lock_irqsave(&up->port.lock, flags);
1315
1316         /*
1317          *      First save the UER then disable the interrupts
1318          */
1319         ier = serial_in(up, UART_IER);
1320         serial_out(up, UART_IER, 0);
1321
1322         uart_console_write(&up->port, s, count, sunsu_console_putchar);
1323
1324         /*
1325          *      Finally, wait for transmitter to become empty
1326          *      and restore the IER
1327          */
1328         wait_for_xmitr(up);
1329         serial_out(up, UART_IER, ier);
1330
1331         if (locked)
1332                 spin_unlock_irqrestore(&up->port.lock, flags);
1333 }
1334
1335 /*
1336  *      Setup initial baud/bits/parity. We do two things here:
1337  *      - construct a cflag setting for the first su_open()
1338  *      - initialize the serial port
1339  *      Return non-zero if we didn't find a serial port.
1340  */
1341 static int __init sunsu_console_setup(struct console *co, char *options)
1342 {
1343         static struct ktermios dummy;
1344         struct ktermios termios;
1345         struct uart_port *port;
1346
1347         printk("Console: ttyS%d (SU)\n",
1348                (sunsu_reg.minor - 64) + co->index);
1349
1350         if (co->index > nr_inst)
1351                 return -ENODEV;
1352         port = &sunsu_ports[co->index].port;
1353
1354         /*
1355          * Temporary fix.
1356          */
1357         spin_lock_init(&port->lock);
1358
1359         /* Get firmware console settings.  */
1360         sunserial_console_termios(co, port->dev->of_node);
1361
1362         memset(&termios, 0, sizeof(struct ktermios));
1363         termios.c_cflag = co->cflag;
1364         port->mctrl |= TIOCM_DTR;
1365         port->ops->set_termios(port, &termios, &dummy);
1366
1367         return 0;
1368 }
1369
1370 static struct console sunsu_console = {
1371         .name   =       "ttyS",
1372         .write  =       sunsu_console_write,
1373         .device =       uart_console_device,
1374         .setup  =       sunsu_console_setup,
1375         .flags  =       CON_PRINTBUFFER,
1376         .index  =       -1,
1377         .data   =       &sunsu_reg,
1378 };
1379
1380 /*
1381  *      Register console.
1382  */
1383
1384 static inline struct console *SUNSU_CONSOLE(void)
1385 {
1386         return &sunsu_console;
1387 }
1388 #else
1389 #define SUNSU_CONSOLE()                 (NULL)
1390 #define sunsu_serial_console_init()     do { } while (0)
1391 #endif
1392
1393 static enum su_type su_get_type(struct device_node *dp)
1394 {
1395         struct device_node *ap = of_find_node_by_path("/aliases");
1396
1397         if (ap) {
1398                 const char *keyb = of_get_property(ap, "keyboard", NULL);
1399                 const char *ms = of_get_property(ap, "mouse", NULL);
1400
1401                 if (keyb) {
1402                         if (dp == of_find_node_by_path(keyb))
1403                                 return SU_PORT_KBD;
1404                 }
1405                 if (ms) {
1406                         if (dp == of_find_node_by_path(ms))
1407                                 return SU_PORT_MS;
1408                 }
1409         }
1410
1411         return SU_PORT_PORT;
1412 }
1413
1414 static int su_probe(struct platform_device *op)
1415 {
1416         struct device_node *dp = op->dev.of_node;
1417         struct uart_sunsu_port *up;
1418         struct resource *rp;
1419         enum su_type type;
1420         bool ignore_line;
1421         int err;
1422
1423         type = su_get_type(dp);
1424         if (type == SU_PORT_PORT) {
1425                 if (nr_inst >= UART_NR)
1426                         return -EINVAL;
1427                 up = &sunsu_ports[nr_inst];
1428         } else {
1429                 up = kzalloc(sizeof(*up), GFP_KERNEL);
1430                 if (!up)
1431                         return -ENOMEM;
1432         }
1433
1434         up->port.line = nr_inst;
1435
1436         spin_lock_init(&up->port.lock);
1437
1438         up->su_type = type;
1439
1440         rp = &op->resource[0];
1441         up->port.mapbase = rp->start;
1442         up->reg_size = resource_size(rp);
1443         up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
1444         if (!up->port.membase) {
1445                 if (type != SU_PORT_PORT)
1446                         kfree(up);
1447                 return -ENOMEM;
1448         }
1449
1450         up->port.irq = op->archdata.irqs[0];
1451
1452         up->port.dev = &op->dev;
1453
1454         up->port.type = PORT_UNKNOWN;
1455         up->port.uartclk = (SU_BASE_BAUD * 16);
1456
1457         err = 0;
1458         if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
1459                 err = sunsu_kbd_ms_init(up);
1460                 if (err) {
1461                         of_iounmap(&op->resource[0],
1462                                    up->port.membase, up->reg_size);
1463                         kfree(up);
1464                         return err;
1465                 }
1466                 platform_set_drvdata(op, up);
1467
1468                 nr_inst++;
1469
1470                 return 0;
1471         }
1472
1473         up->port.flags |= UPF_BOOT_AUTOCONF;
1474
1475         sunsu_autoconfig(up);
1476
1477         err = -ENODEV;
1478         if (up->port.type == PORT_UNKNOWN)
1479                 goto out_unmap;
1480
1481         up->port.ops = &sunsu_pops;
1482
1483         ignore_line = false;
1484         if (!strcmp(dp->name, "rsc-console") ||
1485             !strcmp(dp->name, "lom-console"))
1486                 ignore_line = true;
1487
1488         sunserial_console_match(SUNSU_CONSOLE(), dp,
1489                                 &sunsu_reg, up->port.line,
1490                                 ignore_line);
1491         err = uart_add_one_port(&sunsu_reg, &up->port);
1492         if (err)
1493                 goto out_unmap;
1494
1495         platform_set_drvdata(op, up);
1496
1497         nr_inst++;
1498
1499         return 0;
1500
1501 out_unmap:
1502         of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1503         kfree(up);
1504         return err;
1505 }
1506
1507 static int su_remove(struct platform_device *op)
1508 {
1509         struct uart_sunsu_port *up = platform_get_drvdata(op);
1510         bool kbdms = false;
1511
1512         if (up->su_type == SU_PORT_MS ||
1513             up->su_type == SU_PORT_KBD)
1514                 kbdms = true;
1515
1516         if (kbdms) {
1517 #ifdef CONFIG_SERIO
1518                 serio_unregister_port(&up->serio);
1519 #endif
1520         } else if (up->port.type != PORT_UNKNOWN)
1521                 uart_remove_one_port(&sunsu_reg, &up->port);
1522
1523         if (up->port.membase)
1524                 of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1525
1526         if (kbdms)
1527                 kfree(up);
1528
1529         return 0;
1530 }
1531
1532 static const struct of_device_id su_match[] = {
1533         {
1534                 .name = "su",
1535         },
1536         {
1537                 .name = "su_pnp",
1538         },
1539         {
1540                 .name = "serial",
1541                 .compatible = "su",
1542         },
1543         {
1544                 .type = "serial",
1545                 .compatible = "su",
1546         },
1547         {},
1548 };
1549 MODULE_DEVICE_TABLE(of, su_match);
1550
1551 static struct platform_driver su_driver = {
1552         .driver = {
1553                 .name = "su",
1554                 .of_match_table = su_match,
1555         },
1556         .probe          = su_probe,
1557         .remove         = su_remove,
1558 };
1559
1560 static int __init sunsu_init(void)
1561 {
1562         struct device_node *dp;
1563         int err;
1564         int num_uart = 0;
1565
1566         for_each_node_by_name(dp, "su") {
1567                 if (su_get_type(dp) == SU_PORT_PORT)
1568                         num_uart++;
1569         }
1570         for_each_node_by_name(dp, "su_pnp") {
1571                 if (su_get_type(dp) == SU_PORT_PORT)
1572                         num_uart++;
1573         }
1574         for_each_node_by_name(dp, "serial") {
1575                 if (of_device_is_compatible(dp, "su")) {
1576                         if (su_get_type(dp) == SU_PORT_PORT)
1577                                 num_uart++;
1578                 }
1579         }
1580         for_each_node_by_type(dp, "serial") {
1581                 if (of_device_is_compatible(dp, "su")) {
1582                         if (su_get_type(dp) == SU_PORT_PORT)
1583                                 num_uart++;
1584                 }
1585         }
1586
1587         if (num_uart) {
1588                 err = sunserial_register_minors(&sunsu_reg, num_uart);
1589                 if (err)
1590                         return err;
1591         }
1592
1593         err = platform_driver_register(&su_driver);
1594         if (err && num_uart)
1595                 sunserial_unregister_minors(&sunsu_reg, num_uart);
1596
1597         return err;
1598 }
1599
1600 static void __exit sunsu_exit(void)
1601 {
1602         platform_driver_unregister(&su_driver);
1603         if (sunsu_reg.nr)
1604                 sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
1605 }
1606
1607 module_init(sunsu_init);
1608 module_exit(sunsu_exit);
1609
1610 MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
1611 MODULE_DESCRIPTION("Sun SU serial port driver");
1612 MODULE_VERSION("2.0");
1613 MODULE_LICENSE("GPL");