2 * AHCI SATA platform library
4 * Copyright 2004-2005 Red Hat, Inc.
6 * Copyright 2010 MontaVista Software, LLC.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2, or (at your option)
15 #include <linux/clk.h>
16 #include <linux/kernel.h>
17 #include <linux/gfp.h>
18 #include <linux/module.h>
20 #include <linux/interrupt.h>
21 #include <linux/device.h>
22 #include <linux/platform_device.h>
23 #include <linux/libata.h>
24 #include <linux/ahci_platform.h>
25 #include <linux/phy/phy.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/of_platform.h>
30 static void ahci_host_stop(struct ata_host *host);
32 struct ata_port_operations ahci_platform_ops = {
33 .inherits = &ahci_ops,
34 .host_stop = ahci_host_stop,
36 EXPORT_SYMBOL_GPL(ahci_platform_ops);
39 * ahci_platform_enable_phys - Enable PHYs
40 * @hpriv: host private area to store config values
42 * This function enables all the PHYs found in hpriv->phys, if any.
43 * If a PHY fails to be enabled, it disables all the PHYs already
44 * enabled in reverse order and returns an error.
47 * 0 on success otherwise a negative error code
49 static int ahci_platform_enable_phys(struct ahci_host_priv *hpriv)
53 for (i = 0; i < hpriv->nports; i++) {
54 rc = phy_init(hpriv->phys[i]);
58 rc = phy_power_on(hpriv->phys[i]);
60 phy_exit(hpriv->phys[i]);
69 phy_power_off(hpriv->phys[i]);
70 phy_exit(hpriv->phys[i]);
76 * ahci_platform_disable_phys - Disable PHYs
77 * @hpriv: host private area to store config values
79 * This function disables all PHYs found in hpriv->phys.
81 static void ahci_platform_disable_phys(struct ahci_host_priv *hpriv)
85 for (i = 0; i < hpriv->nports; i++) {
86 phy_power_off(hpriv->phys[i]);
87 phy_exit(hpriv->phys[i]);
92 * ahci_platform_enable_clks - Enable platform clocks
93 * @hpriv: host private area to store config values
95 * This function enables all the clks found in hpriv->clks, starting at
96 * index 0. If any clk fails to enable it disables all the clks already
97 * enabled in reverse order, and then returns an error.
100 * 0 on success otherwise a negative error code
102 int ahci_platform_enable_clks(struct ahci_host_priv *hpriv)
106 for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++) {
107 rc = clk_prepare_enable(hpriv->clks[c]);
109 goto disable_unprepare_clk;
113 disable_unprepare_clk:
115 clk_disable_unprepare(hpriv->clks[c]);
118 EXPORT_SYMBOL_GPL(ahci_platform_enable_clks);
121 * ahci_platform_disable_clks - Disable platform clocks
122 * @hpriv: host private area to store config values
124 * This function disables all the clks found in hpriv->clks, in reverse
125 * order of ahci_platform_enable_clks (starting at the end of the array).
127 void ahci_platform_disable_clks(struct ahci_host_priv *hpriv)
131 for (c = AHCI_MAX_CLKS - 1; c >= 0; c--)
133 clk_disable_unprepare(hpriv->clks[c]);
135 EXPORT_SYMBOL_GPL(ahci_platform_disable_clks);
138 * ahci_platform_enable_regulators - Enable regulators
139 * @hpriv: host private area to store config values
141 * This function enables all the regulators found in
142 * hpriv->target_pwrs, if any. If a regulator fails to be enabled, it
143 * disables all the regulators already enabled in reverse order and
147 * 0 on success otherwise a negative error code
149 int ahci_platform_enable_regulators(struct ahci_host_priv *hpriv)
153 for (i = 0; i < hpriv->nports; i++) {
154 if (!hpriv->target_pwrs[i])
157 rc = regulator_enable(hpriv->target_pwrs[i]);
159 goto disable_target_pwrs;
166 if (hpriv->target_pwrs[i])
167 regulator_disable(hpriv->target_pwrs[i]);
171 EXPORT_SYMBOL_GPL(ahci_platform_enable_regulators);
174 * ahci_platform_disable_regulators - Disable regulators
175 * @hpriv: host private area to store config values
177 * This function disables all regulators found in hpriv->target_pwrs.
179 void ahci_platform_disable_regulators(struct ahci_host_priv *hpriv)
183 for (i = 0; i < hpriv->nports; i++) {
184 if (!hpriv->target_pwrs[i])
186 regulator_disable(hpriv->target_pwrs[i]);
189 EXPORT_SYMBOL_GPL(ahci_platform_disable_regulators);
191 * ahci_platform_enable_resources - Enable platform resources
192 * @hpriv: host private area to store config values
194 * This function enables all ahci_platform managed resources in the
197 * 2) Clocks (through ahci_platform_enable_clks)
200 * If resource enabling fails at any point the previous enabled resources
201 * are disabled in reverse order.
204 * 0 on success otherwise a negative error code
206 int ahci_platform_enable_resources(struct ahci_host_priv *hpriv)
210 rc = ahci_platform_enable_regulators(hpriv);
214 rc = ahci_platform_enable_clks(hpriv);
216 goto disable_regulator;
218 rc = ahci_platform_enable_phys(hpriv);
225 ahci_platform_disable_clks(hpriv);
228 ahci_platform_disable_regulators(hpriv);
232 EXPORT_SYMBOL_GPL(ahci_platform_enable_resources);
235 * ahci_platform_disable_resources - Disable platform resources
236 * @hpriv: host private area to store config values
238 * This function disables all ahci_platform managed resources in the
241 * 2) Clocks (through ahci_platform_disable_clks)
244 void ahci_platform_disable_resources(struct ahci_host_priv *hpriv)
246 ahci_platform_disable_phys(hpriv);
248 ahci_platform_disable_clks(hpriv);
250 ahci_platform_disable_regulators(hpriv);
252 EXPORT_SYMBOL_GPL(ahci_platform_disable_resources);
254 static void ahci_platform_put_resources(struct device *dev, void *res)
256 struct ahci_host_priv *hpriv = res;
259 if (hpriv->got_runtime_pm) {
260 pm_runtime_put_sync(dev);
261 pm_runtime_disable(dev);
264 for (c = 0; c < AHCI_MAX_CLKS && hpriv->clks[c]; c++)
265 clk_put(hpriv->clks[c]);
267 * The regulators are tied to child node device and not to the
268 * SATA device itself. So we can't use devm for automatically
269 * releasing them. We have to do it manually here.
271 for (c = 0; c < hpriv->nports; c++)
272 if (hpriv->target_pwrs && hpriv->target_pwrs[c])
273 regulator_put(hpriv->target_pwrs[c]);
275 kfree(hpriv->target_pwrs);
278 static int ahci_platform_get_phy(struct ahci_host_priv *hpriv, u32 port,
279 struct device *dev, struct device_node *node)
283 hpriv->phys[port] = devm_of_phy_get(dev, node, NULL);
285 if (!IS_ERR(hpriv->phys[port]))
288 rc = PTR_ERR(hpriv->phys[port]);
291 /* No PHY support. Check if PHY is required. */
292 if (of_find_property(node, "phys", NULL)) {
294 "couldn't get PHY in node %s: ENOSYS\n",
299 /* continue normally */
300 hpriv->phys[port] = NULL;
306 "couldn't get PHY in node %s: %d\n",
315 static int ahci_platform_get_regulator(struct ahci_host_priv *hpriv, u32 port,
318 struct regulator *target_pwr;
321 target_pwr = regulator_get_optional(dev, "target");
323 if (!IS_ERR(target_pwr))
324 hpriv->target_pwrs[port] = target_pwr;
326 rc = PTR_ERR(target_pwr);
332 * ahci_platform_get_resources - Get platform resources
333 * @pdev: platform device to get resources for
335 * This function allocates an ahci_host_priv struct, and gets the following
336 * resources, storing a reference to them inside the returned struct:
338 * 1) mmio registers (IORESOURCE_MEM 0, mandatory)
339 * 2) regulator for controlling the targets power (optional)
340 * 3) 0 - AHCI_MAX_CLKS clocks, as specified in the devs devicetree node,
341 * or for non devicetree enabled platforms a single clock
345 * The allocated ahci_host_priv on success, otherwise an ERR_PTR value
347 struct ahci_host_priv *ahci_platform_get_resources(struct platform_device *pdev)
349 struct device *dev = &pdev->dev;
350 struct ahci_host_priv *hpriv;
352 struct device_node *child;
353 int i, sz, enabled_ports = 0, rc = -ENOMEM, child_nodes;
354 u32 mask_port_map = 0;
356 if (!devres_open_group(dev, NULL, GFP_KERNEL))
357 return ERR_PTR(-ENOMEM);
359 hpriv = devres_alloc(ahci_platform_put_resources, sizeof(*hpriv),
364 devres_add(dev, hpriv);
366 hpriv->mmio = devm_ioremap_resource(dev,
367 platform_get_resource(pdev, IORESOURCE_MEM, 0));
368 if (IS_ERR(hpriv->mmio)) {
369 dev_err(dev, "no mmio space\n");
370 rc = PTR_ERR(hpriv->mmio);
374 for (i = 0; i < AHCI_MAX_CLKS; i++) {
376 * For now we must use clk_get(dev, NULL) for the first clock,
377 * because some platforms (da850, spear13xx) are not yet
378 * converted to use devicetree for clocks. For new platforms
379 * this is equivalent to of_clk_get(dev->of_node, 0).
382 clk = clk_get(dev, NULL);
384 clk = of_clk_get(dev->of_node, i);
388 if (rc == -EPROBE_DEFER)
392 hpriv->clks[i] = clk;
395 hpriv->nports = child_nodes = of_get_child_count(dev->of_node);
398 * If no sub-node was found, we still need to set nports to
399 * one in order to be able to use the
400 * ahci_platform_[en|dis]able_[phys|regulators] functions.
405 sz = hpriv->nports * sizeof(*hpriv->phys);
406 hpriv->phys = devm_kzalloc(dev, sz, GFP_KERNEL);
411 sz = hpriv->nports * sizeof(*hpriv->target_pwrs);
412 hpriv->target_pwrs = kzalloc(sz, GFP_KERNEL);
413 if (!hpriv->target_pwrs) {
419 for_each_child_of_node(dev->of_node, child) {
421 struct platform_device *port_dev __maybe_unused;
423 if (!of_device_is_available(child))
426 if (of_property_read_u32(child, "reg", &port)) {
431 if (port >= hpriv->nports) {
432 dev_warn(dev, "invalid port number %d\n", port);
435 mask_port_map |= BIT(port);
437 #ifdef CONFIG_OF_ADDRESS
438 of_platform_device_create(child, NULL, NULL);
440 port_dev = of_find_device_by_node(child);
443 rc = ahci_platform_get_regulator(hpriv, port,
445 if (rc == -EPROBE_DEFER)
450 rc = ahci_platform_get_phy(hpriv, port, dev, child);
456 if (!enabled_ports) {
457 dev_warn(dev, "No port enabled\n");
462 if (!hpriv->mask_port_map)
463 hpriv->mask_port_map = mask_port_map;
466 * If no sub-node was found, keep this for device tree
469 rc = ahci_platform_get_phy(hpriv, 0, dev, dev->of_node);
473 rc = ahci_platform_get_regulator(hpriv, 0, dev);
474 if (rc == -EPROBE_DEFER)
477 pm_runtime_enable(dev);
478 pm_runtime_get_sync(dev);
479 hpriv->got_runtime_pm = true;
481 devres_remove_group(dev, NULL);
485 devres_release_group(dev, NULL);
488 EXPORT_SYMBOL_GPL(ahci_platform_get_resources);
491 * ahci_platform_init_host - Bring up an ahci-platform host
492 * @pdev: platform device pointer for the host
493 * @hpriv: ahci-host private data for the host
494 * @pi_template: template for the ata_port_info to use
495 * @sht: scsi_host_template to use when registering
497 * This function does all the usual steps needed to bring up an
498 * ahci-platform host, note any necessary resources (ie clks, phys, etc.)
499 * must be initialized / enabled before calling this.
502 * 0 on success otherwise a negative error code
504 int ahci_platform_init_host(struct platform_device *pdev,
505 struct ahci_host_priv *hpriv,
506 const struct ata_port_info *pi_template,
507 struct scsi_host_template *sht)
509 struct device *dev = &pdev->dev;
510 struct ata_port_info pi = *pi_template;
511 const struct ata_port_info *ppi[] = { &pi, NULL };
512 struct ata_host *host;
513 int i, irq, n_ports, rc;
515 irq = platform_get_irq(pdev, 0);
517 dev_err(dev, "no irq\n");
524 pi.private_data = (void *)(unsigned long)hpriv->flags;
526 ahci_save_initial_config(dev, hpriv);
528 if (hpriv->cap & HOST_CAP_NCQ)
529 pi.flags |= ATA_FLAG_NCQ;
531 if (hpriv->cap & HOST_CAP_PMP)
532 pi.flags |= ATA_FLAG_PMP;
534 ahci_set_em_messages(hpriv, &pi);
536 /* CAP.NP sometimes indicate the index of the last enabled
537 * port, at other times, that of the last possible port, so
538 * determining the maximum port number requires looking at
539 * both CAP.NP and port_map.
541 n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map));
543 host = ata_host_alloc_pinfo(dev, ppi, n_ports);
547 host->private_data = hpriv;
549 if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss)
550 host->flags |= ATA_HOST_PARALLEL_SCAN;
552 dev_info(dev, "SSS flag set, parallel bus scan disabled\n");
554 if (pi.flags & ATA_FLAG_EM)
557 for (i = 0; i < host->n_ports; i++) {
558 struct ata_port *ap = host->ports[i];
560 ata_port_desc(ap, "mmio %pR",
561 platform_get_resource(pdev, IORESOURCE_MEM, 0));
562 ata_port_desc(ap, "port 0x%x", 0x100 + ap->port_no * 0x80);
564 /* set enclosure management message type */
565 if (ap->flags & ATA_FLAG_EM)
566 ap->em_message_type = hpriv->em_msg_type;
568 /* disabled/not-implemented port */
569 if (!(hpriv->port_map & (1 << i)))
570 ap->ops = &ata_dummy_port_ops;
573 if (hpriv->cap & HOST_CAP_64) {
574 rc = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
576 rc = dma_coerce_mask_and_coherent(dev,
579 dev_err(dev, "Failed to enable 64-bit DMA.\n");
582 dev_warn(dev, "Enable 32-bit DMA instead of 64-bit.\n");
586 rc = ahci_reset_controller(host);
590 ahci_init_controller(host);
591 ahci_print_info(host, "platform");
593 return ahci_host_activate(host, sht);
595 EXPORT_SYMBOL_GPL(ahci_platform_init_host);
597 static void ahci_host_stop(struct ata_host *host)
599 struct ahci_host_priv *hpriv = host->private_data;
601 ahci_platform_disable_resources(hpriv);
604 #ifdef CONFIG_PM_SLEEP
606 * ahci_platform_suspend_host - Suspend an ahci-platform host
607 * @dev: device pointer for the host
609 * This function does all the usual steps needed to suspend an
610 * ahci-platform host, note any necessary resources (ie clks, phys, etc.)
611 * must be disabled after calling this.
614 * 0 on success otherwise a negative error code
616 int ahci_platform_suspend_host(struct device *dev)
618 struct ata_host *host = dev_get_drvdata(dev);
619 struct ahci_host_priv *hpriv = host->private_data;
620 void __iomem *mmio = hpriv->mmio;
623 if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) {
624 dev_err(dev, "firmware update required for suspend/resume\n");
629 * AHCI spec rev1.1 section 8.3.3:
630 * Software must disable interrupts prior to requesting a
631 * transition of the HBA to D3 state.
633 ctl = readl(mmio + HOST_CTL);
635 writel(ctl, mmio + HOST_CTL);
636 readl(mmio + HOST_CTL); /* flush */
638 return ata_host_suspend(host, PMSG_SUSPEND);
640 EXPORT_SYMBOL_GPL(ahci_platform_suspend_host);
643 * ahci_platform_resume_host - Resume an ahci-platform host
644 * @dev: device pointer for the host
646 * This function does all the usual steps needed to resume an ahci-platform
647 * host, note any necessary resources (ie clks, phys, etc.) must be
648 * initialized / enabled before calling this.
651 * 0 on success otherwise a negative error code
653 int ahci_platform_resume_host(struct device *dev)
655 struct ata_host *host = dev_get_drvdata(dev);
658 if (dev->power.power_state.event == PM_EVENT_SUSPEND) {
659 rc = ahci_reset_controller(host);
663 ahci_init_controller(host);
666 ata_host_resume(host);
670 EXPORT_SYMBOL_GPL(ahci_platform_resume_host);
673 * ahci_platform_suspend - Suspend an ahci-platform device
674 * @dev: the platform device to suspend
676 * This function suspends the host associated with the device, followed by
677 * disabling all the resources of the device.
680 * 0 on success otherwise a negative error code
682 int ahci_platform_suspend(struct device *dev)
684 struct ata_host *host = dev_get_drvdata(dev);
685 struct ahci_host_priv *hpriv = host->private_data;
688 rc = ahci_platform_suspend_host(dev);
692 ahci_platform_disable_resources(hpriv);
696 EXPORT_SYMBOL_GPL(ahci_platform_suspend);
699 * ahci_platform_resume - Resume an ahci-platform device
700 * @dev: the platform device to resume
702 * This function enables all the resources of the device followed by
703 * resuming the host associated with the device.
706 * 0 on success otherwise a negative error code
708 int ahci_platform_resume(struct device *dev)
710 struct ata_host *host = dev_get_drvdata(dev);
711 struct ahci_host_priv *hpriv = host->private_data;
714 rc = ahci_platform_enable_resources(hpriv);
718 rc = ahci_platform_resume_host(dev);
720 goto disable_resources;
722 /* We resumed so update PM runtime state */
723 pm_runtime_disable(dev);
724 pm_runtime_set_active(dev);
725 pm_runtime_enable(dev);
730 ahci_platform_disable_resources(hpriv);
734 EXPORT_SYMBOL_GPL(ahci_platform_resume);
737 MODULE_DESCRIPTION("AHCI SATA platform library");
739 MODULE_LICENSE("GPL");