1 // SPDX-License-Identifier: GPL-2.0
3 * host.c - ChipIdea USB host controller driver
5 * Copyright (c) 2012 Intel Corporation
7 * Author: Alexander Shishkin
10 #include <linux/kernel.h>
12 #include <linux/usb.h>
13 #include <linux/usb/hcd.h>
14 #include <linux/usb/chipidea.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/pinctrl/consumer.h>
18 #include "../host/ehci.h"
24 static struct hc_driver __read_mostly ci_ehci_hc_driver;
25 static int (*orig_bus_suspend)(struct usb_hcd *hcd);
28 struct regulator *reg_vbus;
32 struct ci_hdrc_dma_aligned_buffer {
34 void *old_xfer_buffer;
38 static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
40 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
41 struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
42 struct device *dev = hcd->self.controller;
43 struct ci_hdrc *ci = dev_get_drvdata(dev);
45 int port = HCS_N_PORTS(ehci->hcs_params);
47 if (priv->reg_vbus && enable != priv->enabled) {
50 "Not support multi-port regulator control\n");
54 ret = regulator_enable(priv->reg_vbus);
56 ret = regulator_disable(priv->reg_vbus);
59 "Failed to %s vbus regulator, ret=%d\n",
60 enable ? "enable" : "disable", ret);
63 priv->enabled = enable;
66 if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
68 * Marvell 28nm HSIC PHY requires forcing the port to HS mode.
69 * As HSIC is always HS, this should be safe for others.
71 hw_port_test_set(ci, 5);
72 hw_port_test_set(ci, 0);
77 static int ehci_ci_reset(struct usb_hcd *hcd)
79 struct device *dev = hcd->self.controller;
80 struct ci_hdrc *ci = dev_get_drvdata(dev);
81 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
84 ret = ehci_setup(hcd);
88 ehci->need_io_watchdog = 0;
90 if (ci->platdata->notify_event) {
91 ret = ci->platdata->notify_event(ci,
92 CI_HDRC_CONTROLLER_RESET_EVENT);
97 ci_platform_configure(ci);
102 static const struct ehci_driver_overrides ehci_ci_overrides = {
103 .extra_priv_size = sizeof(struct ehci_ci_priv),
104 .port_power = ehci_ci_portpower,
105 .reset = ehci_ci_reset,
108 static irqreturn_t host_irq(struct ci_hdrc *ci)
110 return usb_hcd_irq(ci->irq, ci->hcd);
113 static int host_start(struct ci_hdrc *ci)
116 struct ehci_hcd *ehci;
117 struct ehci_ci_priv *priv;
123 hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent,
124 ci->dev, dev_name(ci->dev), NULL);
128 dev_set_drvdata(ci->dev, ci);
129 hcd->rsrc_start = ci->hw_bank.phys;
130 hcd->rsrc_len = ci->hw_bank.size;
131 hcd->regs = ci->hw_bank.abs;
134 hcd->power_budget = ci->platdata->power_budget;
135 hcd->tpl_support = ci->platdata->tpl_support;
136 if (ci->phy || ci->usb_phy) {
137 hcd->skip_phy_initialization = 1;
139 hcd->usb_phy = ci->usb_phy;
142 ehci = hcd_to_ehci(hcd);
143 ehci->caps = ci->hw_bank.cap;
144 ehci->has_hostpc = ci->hw_bank.lpm;
145 ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
146 ehci->imx28_write_fix = ci->imx28_write_fix;
148 priv = (struct ehci_ci_priv *)ehci->priv;
149 priv->reg_vbus = NULL;
151 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
152 if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
153 ret = regulator_enable(ci->platdata->reg_vbus);
156 "Failed to enable vbus regulator, ret=%d\n",
161 priv->reg_vbus = ci->platdata->reg_vbus;
165 if (ci->platdata->pins_host)
166 pinctrl_select_state(ci->platdata->pctl,
167 ci->platdata->pins_host);
171 ret = usb_add_hcd(hcd, 0, 0);
176 struct usb_otg *otg = &ci->otg;
178 if (ci_otg_is_fsm_mode(ci)) {
179 otg->host = &hcd->self;
180 hcd->self.otg_port = 1;
183 if (ci->platdata->notify_event &&
184 (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC))
185 ci->platdata->notify_event
186 (ci, CI_HDRC_IMX_HSIC_ACTIVE_EVENT);
192 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
193 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
194 regulator_disable(ci->platdata->reg_vbus);
201 static void host_stop(struct ci_hdrc *ci)
203 struct usb_hcd *hcd = ci->hcd;
206 if (ci->platdata->notify_event)
207 ci->platdata->notify_event(ci,
208 CI_HDRC_CONTROLLER_STOPPED_EVENT);
210 ci->role = CI_ROLE_END;
211 synchronize_irq(ci->irq);
213 if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
214 (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
215 regulator_disable(ci->platdata->reg_vbus);
220 if (ci->platdata->pins_host && ci->platdata->pins_default)
221 pinctrl_select_state(ci->platdata->pctl,
222 ci->platdata->pins_default);
226 void ci_hdrc_host_destroy(struct ci_hdrc *ci)
228 if (ci->role == CI_ROLE_HOST && ci->hcd)
232 /* The below code is based on tegra ehci driver */
233 static int ci_ehci_hub_control(
242 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
243 u32 __iomem *status_reg;
248 struct device *dev = hcd->self.controller;
249 struct ci_hdrc *ci = dev_get_drvdata(dev);
251 status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1];
253 spin_lock_irqsave(&ehci->lock, flags);
255 if (ci->platdata->hub_control) {
256 retval = ci->platdata->hub_control(ci, typeReq, wValue, wIndex,
257 buf, wLength, &done, &flags);
262 if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
263 temp = ehci_readl(ehci, status_reg);
264 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
269 temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E);
270 temp |= PORT_WKDISC_E | PORT_WKOC_E;
271 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
274 * If a transaction is in progress, there may be a delay in
275 * suspending the port. Poll until the port is suspended.
277 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND,
279 ehci_err(ehci, "timeout waiting for SUSPEND\n");
281 if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
282 if (ci->platdata->notify_event)
283 ci->platdata->notify_event(ci,
284 CI_HDRC_IMX_HSIC_SUSPEND_EVENT);
286 temp = ehci_readl(ehci, status_reg);
287 temp &= ~(PORT_WKDISC_E | PORT_WKCONN_E);
288 ehci_writel(ehci, temp, status_reg);
291 set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports);
296 * After resume has finished, it needs do some post resume
297 * operation for some SoCs.
299 else if (typeReq == ClearPortFeature &&
300 wValue == USB_PORT_FEAT_C_SUSPEND) {
301 /* Make sure the resume has finished, it should be finished */
302 if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 25000))
303 ehci_err(ehci, "timeout waiting for resume\n");
306 spin_unlock_irqrestore(&ehci->lock, flags);
308 /* Handle the hub control events here */
309 return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
311 spin_unlock_irqrestore(&ehci->lock, flags);
314 static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
316 struct ehci_hcd *ehci = hcd_to_ehci(hcd);
317 struct device *dev = hcd->self.controller;
318 struct ci_hdrc *ci = dev_get_drvdata(dev);
322 int ret = orig_bus_suspend(hcd);
327 port = HCS_N_PORTS(ehci->hcs_params);
329 u32 __iomem *reg = &ehci->regs->port_status[port];
330 u32 portsc = ehci_readl(ehci, reg);
332 if (portsc & PORT_CONNECT) {
334 * For chipidea, the resume signal will be ended
335 * automatically, so for remote wakeup case, the
336 * usbcmd.rs may not be set before the resume has
337 * ended if other resume paths consumes too much
338 * time (~24ms), in that case, the SOF will not
339 * send out within 3ms after resume ends, then the
340 * high speed device will enter full speed mode.
343 tmp = ehci_readl(ehci, &ehci->regs->command);
345 ehci_writel(ehci, tmp, &ehci->regs->command);
347 * It needs a short delay between set RS bit and PHCD.
349 usleep_range(150, 200);
351 * Need to clear WKCN and WKOC for imx HSIC,
352 * otherwise, there will be wakeup event.
354 if (ci->platdata->flags & CI_HDRC_IMX_IS_HSIC) {
355 tmp = ehci_readl(ehci, reg);
356 tmp &= ~(PORT_WKDISC_E | PORT_WKCONN_E);
357 ehci_writel(ehci, tmp, reg);
367 static void ci_hdrc_free_dma_aligned_buffer(struct urb *urb)
369 struct ci_hdrc_dma_aligned_buffer *temp;
372 if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
375 temp = container_of(urb->transfer_buffer,
376 struct ci_hdrc_dma_aligned_buffer, data);
378 if (usb_urb_dir_in(urb)) {
379 if (usb_pipeisoc(urb->pipe))
380 length = urb->transfer_buffer_length;
382 length = urb->actual_length;
384 memcpy(temp->old_xfer_buffer, temp->data, length);
386 urb->transfer_buffer = temp->old_xfer_buffer;
387 kfree(temp->kmalloc_ptr);
389 urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
392 static int ci_hdrc_alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
394 struct ci_hdrc_dma_aligned_buffer *temp, *kmalloc_ptr;
395 const unsigned int ci_hdrc_usb_dma_align = 32;
398 if (urb->num_sgs || urb->sg || urb->transfer_buffer_length == 0 ||
399 !((uintptr_t)urb->transfer_buffer & (ci_hdrc_usb_dma_align - 1)))
402 /* Allocate a buffer with enough padding for alignment */
403 kmalloc_size = urb->transfer_buffer_length +
404 sizeof(struct ci_hdrc_dma_aligned_buffer) +
405 ci_hdrc_usb_dma_align - 1;
407 kmalloc_ptr = kmalloc(kmalloc_size, mem_flags);
411 /* Position our struct dma_aligned_buffer such that data is aligned */
412 temp = PTR_ALIGN(kmalloc_ptr + 1, ci_hdrc_usb_dma_align) - 1;
413 temp->kmalloc_ptr = kmalloc_ptr;
414 temp->old_xfer_buffer = urb->transfer_buffer;
415 if (usb_urb_dir_out(urb))
416 memcpy(temp->data, urb->transfer_buffer,
417 urb->transfer_buffer_length);
418 urb->transfer_buffer = temp->data;
420 urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;
425 static int ci_hdrc_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
430 ret = ci_hdrc_alloc_dma_aligned_buffer(urb, mem_flags);
434 ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
436 ci_hdrc_free_dma_aligned_buffer(urb);
441 static void ci_hdrc_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
443 usb_hcd_unmap_urb_for_dma(hcd, urb);
444 ci_hdrc_free_dma_aligned_buffer(urb);
447 int ci_hdrc_host_init(struct ci_hdrc *ci)
449 struct ci_role_driver *rdrv;
451 if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
454 rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
458 rdrv->start = host_start;
459 rdrv->stop = host_stop;
460 rdrv->irq = host_irq;
462 ci->roles[CI_ROLE_HOST] = rdrv;
464 if (ci->platdata->flags & CI_HDRC_REQUIRES_ALIGNED_DMA) {
465 ci_ehci_hc_driver.map_urb_for_dma = ci_hdrc_map_urb_for_dma;
466 ci_ehci_hc_driver.unmap_urb_for_dma = ci_hdrc_unmap_urb_for_dma;
472 void ci_hdrc_host_driver_init(void)
474 ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
475 orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
476 ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
477 ci_ehci_hc_driver.hub_control = ci_ehci_hub_control;