1 // SPDX-License-Identifier: GPL-2.0-only
3 * Haoyu HYM8563 RTC driver
5 * Copyright (C) 2013 MundoReader S.L.
9 * Copyright (C) 2010 ROCKCHIP, Inc.
12 #include <linux/module.h>
13 #include <linux/clk-provider.h>
14 #include <linux/i2c.h>
15 #include <linux/bcd.h>
16 #include <linux/rtc.h>
18 #define HYM8563_CTL1 0x00
19 #define HYM8563_CTL1_TEST BIT(7)
20 #define HYM8563_CTL1_STOP BIT(5)
21 #define HYM8563_CTL1_TESTC BIT(3)
23 #define HYM8563_CTL2 0x01
24 #define HYM8563_CTL2_TI_TP BIT(4)
25 #define HYM8563_CTL2_AF BIT(3)
26 #define HYM8563_CTL2_TF BIT(2)
27 #define HYM8563_CTL2_AIE BIT(1)
28 #define HYM8563_CTL2_TIE BIT(0)
30 #define HYM8563_SEC 0x02
31 #define HYM8563_SEC_VL BIT(7)
32 #define HYM8563_SEC_MASK 0x7f
34 #define HYM8563_MIN 0x03
35 #define HYM8563_MIN_MASK 0x7f
37 #define HYM8563_HOUR 0x04
38 #define HYM8563_HOUR_MASK 0x3f
40 #define HYM8563_DAY 0x05
41 #define HYM8563_DAY_MASK 0x3f
43 #define HYM8563_WEEKDAY 0x06
44 #define HYM8563_WEEKDAY_MASK 0x07
46 #define HYM8563_MONTH 0x07
47 #define HYM8563_MONTH_CENTURY BIT(7)
48 #define HYM8563_MONTH_MASK 0x1f
50 #define HYM8563_YEAR 0x08
52 #define HYM8563_ALM_MIN 0x09
53 #define HYM8563_ALM_HOUR 0x0a
54 #define HYM8563_ALM_DAY 0x0b
55 #define HYM8563_ALM_WEEK 0x0c
57 /* Each alarm check can be disabled by setting this bit in the register */
58 #define HYM8563_ALM_BIT_DISABLE BIT(7)
60 #define HYM8563_CLKOUT 0x0d
61 #define HYM8563_CLKOUT_ENABLE BIT(7)
62 #define HYM8563_CLKOUT_32768 0
63 #define HYM8563_CLKOUT_1024 1
64 #define HYM8563_CLKOUT_32 2
65 #define HYM8563_CLKOUT_1 3
66 #define HYM8563_CLKOUT_MASK 3
68 #define HYM8563_TMR_CTL 0x0e
69 #define HYM8563_TMR_CTL_ENABLE BIT(7)
70 #define HYM8563_TMR_CTL_4096 0
71 #define HYM8563_TMR_CTL_64 1
72 #define HYM8563_TMR_CTL_1 2
73 #define HYM8563_TMR_CTL_1_60 3
74 #define HYM8563_TMR_CTL_MASK 3
76 #define HYM8563_TMR_CNT 0x0f
79 struct i2c_client *client;
80 struct rtc_device *rtc;
81 #ifdef CONFIG_COMMON_CLK
82 struct clk_hw clkout_hw;
90 static int hym8563_rtc_read_time(struct device *dev, struct rtc_time *tm)
92 struct i2c_client *client = to_i2c_client(dev);
96 ret = i2c_smbus_read_i2c_block_data(client, HYM8563_SEC, 7, buf);
100 if (buf[0] & HYM8563_SEC_VL) {
101 dev_warn(&client->dev,
102 "no valid clock/calendar values available\n");
106 tm->tm_sec = bcd2bin(buf[0] & HYM8563_SEC_MASK);
107 tm->tm_min = bcd2bin(buf[1] & HYM8563_MIN_MASK);
108 tm->tm_hour = bcd2bin(buf[2] & HYM8563_HOUR_MASK);
109 tm->tm_mday = bcd2bin(buf[3] & HYM8563_DAY_MASK);
110 tm->tm_wday = bcd2bin(buf[4] & HYM8563_WEEKDAY_MASK); /* 0 = Sun */
111 tm->tm_mon = bcd2bin(buf[5] & HYM8563_MONTH_MASK) - 1; /* 0 = Jan */
112 tm->tm_year = bcd2bin(buf[6]) + 100;
117 static int hym8563_rtc_set_time(struct device *dev, struct rtc_time *tm)
119 struct i2c_client *client = to_i2c_client(dev);
123 /* Years >= 2100 are to far in the future, 19XX is to early */
124 if (tm->tm_year < 100 || tm->tm_year >= 200)
127 buf[0] = bin2bcd(tm->tm_sec);
128 buf[1] = bin2bcd(tm->tm_min);
129 buf[2] = bin2bcd(tm->tm_hour);
130 buf[3] = bin2bcd(tm->tm_mday);
131 buf[4] = bin2bcd(tm->tm_wday);
132 buf[5] = bin2bcd(tm->tm_mon + 1);
135 * While the HYM8563 has a century flag in the month register,
136 * it does not seem to carry it over a subsequent write/read.
137 * So we'll limit ourself to 100 years, starting at 2000 for now.
139 buf[6] = bin2bcd(tm->tm_year - 100);
142 * CTL1 only contains TEST-mode bits apart from stop,
143 * so no need to read the value first
145 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1,
150 ret = i2c_smbus_write_i2c_block_data(client, HYM8563_SEC, 7, buf);
154 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
161 static int hym8563_rtc_alarm_irq_enable(struct device *dev,
162 unsigned int enabled)
164 struct i2c_client *client = to_i2c_client(dev);
167 data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
172 data |= HYM8563_CTL2_AIE;
174 data &= ~HYM8563_CTL2_AIE;
176 return i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
179 static int hym8563_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
181 struct i2c_client *client = to_i2c_client(dev);
182 struct rtc_time *alm_tm = &alm->time;
186 ret = i2c_smbus_read_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
190 /* The alarm only has a minute accuracy */
193 alm_tm->tm_min = (buf[0] & HYM8563_ALM_BIT_DISABLE) ?
195 bcd2bin(buf[0] & HYM8563_MIN_MASK);
196 alm_tm->tm_hour = (buf[1] & HYM8563_ALM_BIT_DISABLE) ?
198 bcd2bin(buf[1] & HYM8563_HOUR_MASK);
199 alm_tm->tm_mday = (buf[2] & HYM8563_ALM_BIT_DISABLE) ?
201 bcd2bin(buf[2] & HYM8563_DAY_MASK);
202 alm_tm->tm_wday = (buf[3] & HYM8563_ALM_BIT_DISABLE) ?
204 bcd2bin(buf[3] & HYM8563_WEEKDAY_MASK);
206 ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
210 if (ret & HYM8563_CTL2_AIE)
216 static int hym8563_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
218 struct i2c_client *client = to_i2c_client(dev);
219 struct rtc_time *alm_tm = &alm->time;
224 * The alarm has no seconds so deal with it
226 if (alm_tm->tm_sec) {
229 if (alm_tm->tm_min >= 60) {
232 if (alm_tm->tm_hour >= 24) {
235 if (alm_tm->tm_mday > 31)
241 ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
245 ret &= ~HYM8563_CTL2_AIE;
247 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
251 buf[0] = (alm_tm->tm_min < 60 && alm_tm->tm_min >= 0) ?
252 bin2bcd(alm_tm->tm_min) : HYM8563_ALM_BIT_DISABLE;
254 buf[1] = (alm_tm->tm_hour < 24 && alm_tm->tm_hour >= 0) ?
255 bin2bcd(alm_tm->tm_hour) : HYM8563_ALM_BIT_DISABLE;
257 buf[2] = (alm_tm->tm_mday <= 31 && alm_tm->tm_mday >= 1) ?
258 bin2bcd(alm_tm->tm_mday) : HYM8563_ALM_BIT_DISABLE;
260 buf[3] = (alm_tm->tm_wday < 7 && alm_tm->tm_wday >= 0) ?
261 bin2bcd(alm_tm->tm_wday) : HYM8563_ALM_BIT_DISABLE;
263 ret = i2c_smbus_write_i2c_block_data(client, HYM8563_ALM_MIN, 4, buf);
267 return hym8563_rtc_alarm_irq_enable(dev, alm->enabled);
270 static const struct rtc_class_ops hym8563_rtc_ops = {
271 .read_time = hym8563_rtc_read_time,
272 .set_time = hym8563_rtc_set_time,
273 .alarm_irq_enable = hym8563_rtc_alarm_irq_enable,
274 .read_alarm = hym8563_rtc_read_alarm,
275 .set_alarm = hym8563_rtc_set_alarm,
279 * Handling of the clkout
282 #ifdef CONFIG_COMMON_CLK
283 #define clkout_hw_to_hym8563(_hw) container_of(_hw, struct hym8563, clkout_hw)
285 static int clkout_rates[] = {
292 static unsigned long hym8563_clkout_recalc_rate(struct clk_hw *hw,
293 unsigned long parent_rate)
295 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
296 struct i2c_client *client = hym8563->client;
297 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
302 ret &= HYM8563_CLKOUT_MASK;
303 return clkout_rates[ret];
306 static long hym8563_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
307 unsigned long *prate)
311 for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
312 if (clkout_rates[i] <= rate)
313 return clkout_rates[i];
318 static int hym8563_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
319 unsigned long parent_rate)
321 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
322 struct i2c_client *client = hym8563->client;
323 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
329 for (i = 0; i < ARRAY_SIZE(clkout_rates); i++)
330 if (clkout_rates[i] == rate) {
331 ret &= ~HYM8563_CLKOUT_MASK;
333 return i2c_smbus_write_byte_data(client,
334 HYM8563_CLKOUT, ret);
340 static int hym8563_clkout_control(struct clk_hw *hw, bool enable)
342 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
343 struct i2c_client *client = hym8563->client;
344 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
350 ret |= HYM8563_CLKOUT_ENABLE;
352 ret &= ~HYM8563_CLKOUT_ENABLE;
354 return i2c_smbus_write_byte_data(client, HYM8563_CLKOUT, ret);
357 static int hym8563_clkout_prepare(struct clk_hw *hw)
359 return hym8563_clkout_control(hw, 1);
362 static void hym8563_clkout_unprepare(struct clk_hw *hw)
364 hym8563_clkout_control(hw, 0);
367 static int hym8563_clkout_is_prepared(struct clk_hw *hw)
369 struct hym8563 *hym8563 = clkout_hw_to_hym8563(hw);
370 struct i2c_client *client = hym8563->client;
371 int ret = i2c_smbus_read_byte_data(client, HYM8563_CLKOUT);
376 return !!(ret & HYM8563_CLKOUT_ENABLE);
379 static const struct clk_ops hym8563_clkout_ops = {
380 .prepare = hym8563_clkout_prepare,
381 .unprepare = hym8563_clkout_unprepare,
382 .is_prepared = hym8563_clkout_is_prepared,
383 .recalc_rate = hym8563_clkout_recalc_rate,
384 .round_rate = hym8563_clkout_round_rate,
385 .set_rate = hym8563_clkout_set_rate,
388 static struct clk *hym8563_clkout_register_clk(struct hym8563 *hym8563)
390 struct i2c_client *client = hym8563->client;
391 struct device_node *node = client->dev.of_node;
393 struct clk_init_data init;
396 ret = i2c_smbus_write_byte_data(client, HYM8563_CLKOUT,
401 init.name = "hym8563-clkout";
402 init.ops = &hym8563_clkout_ops;
404 init.parent_names = NULL;
405 init.num_parents = 0;
406 hym8563->clkout_hw.init = &init;
408 /* optional override of the clockname */
409 of_property_read_string(node, "clock-output-names", &init.name);
411 /* register the clock */
412 clk = clk_register(&client->dev, &hym8563->clkout_hw);
415 of_clk_add_provider(node, of_clk_src_simple_get, clk);
422 * The alarm interrupt is implemented as a level-low interrupt in the
423 * hym8563, while the timer interrupt uses a falling edge.
424 * We don't use the timer at all, so the interrupt is requested to
425 * use the level-low trigger.
427 static irqreturn_t hym8563_irq(int irq, void *dev_id)
429 struct hym8563 *hym8563 = (struct hym8563 *)dev_id;
430 struct i2c_client *client = hym8563->client;
433 rtc_lock(hym8563->rtc);
435 /* Clear the alarm flag */
437 data = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
439 dev_err(&client->dev, "%s: error reading i2c data %d\n",
444 data &= ~HYM8563_CTL2_AF;
446 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL2, data);
448 dev_err(&client->dev, "%s: error writing i2c data %d\n",
453 rtc_unlock(hym8563->rtc);
457 static int hym8563_init_device(struct i2c_client *client)
461 /* Clear stop flag if present */
462 ret = i2c_smbus_write_byte_data(client, HYM8563_CTL1, 0);
466 ret = i2c_smbus_read_byte_data(client, HYM8563_CTL2);
470 /* Disable alarm and timer interrupts */
471 ret &= ~HYM8563_CTL2_AIE;
472 ret &= ~HYM8563_CTL2_TIE;
474 /* Clear any pending alarm and timer flags */
475 if (ret & HYM8563_CTL2_AF)
476 ret &= ~HYM8563_CTL2_AF;
478 if (ret & HYM8563_CTL2_TF)
479 ret &= ~HYM8563_CTL2_TF;
481 ret &= ~HYM8563_CTL2_TI_TP;
483 return i2c_smbus_write_byte_data(client, HYM8563_CTL2, ret);
486 #ifdef CONFIG_PM_SLEEP
487 static int hym8563_suspend(struct device *dev)
489 struct i2c_client *client = to_i2c_client(dev);
492 if (device_may_wakeup(dev)) {
493 ret = enable_irq_wake(client->irq);
495 dev_err(dev, "enable_irq_wake failed, %d\n", ret);
503 static int hym8563_resume(struct device *dev)
505 struct i2c_client *client = to_i2c_client(dev);
507 if (device_may_wakeup(dev))
508 disable_irq_wake(client->irq);
514 static SIMPLE_DEV_PM_OPS(hym8563_pm_ops, hym8563_suspend, hym8563_resume);
516 static int hym8563_probe(struct i2c_client *client,
517 const struct i2c_device_id *id)
519 struct hym8563 *hym8563;
522 hym8563 = devm_kzalloc(&client->dev, sizeof(*hym8563), GFP_KERNEL);
526 hym8563->client = client;
527 i2c_set_clientdata(client, hym8563);
529 ret = hym8563_init_device(client);
531 dev_err(&client->dev, "could not init device, %d\n", ret);
535 if (client->irq > 0) {
536 ret = devm_request_threaded_irq(&client->dev, client->irq,
538 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
539 client->name, hym8563);
541 dev_err(&client->dev, "irq %d request failed, %d\n",
547 if (client->irq > 0 ||
548 device_property_read_bool(&client->dev, "wakeup-source")) {
549 device_init_wakeup(&client->dev, true);
552 /* check state of calendar information */
553 ret = i2c_smbus_read_byte_data(client, HYM8563_SEC);
557 dev_dbg(&client->dev, "rtc information is %s\n",
558 (ret & HYM8563_SEC_VL) ? "invalid" : "valid");
560 hym8563->rtc = devm_rtc_device_register(&client->dev, client->name,
561 &hym8563_rtc_ops, THIS_MODULE);
562 if (IS_ERR(hym8563->rtc))
563 return PTR_ERR(hym8563->rtc);
565 /* the hym8563 alarm only supports a minute accuracy */
566 hym8563->rtc->uie_unsupported = 1;
568 #ifdef CONFIG_COMMON_CLK
569 hym8563_clkout_register_clk(hym8563);
575 static const struct i2c_device_id hym8563_id[] = {
579 MODULE_DEVICE_TABLE(i2c, hym8563_id);
581 static const struct of_device_id hym8563_dt_idtable[] = {
582 { .compatible = "haoyu,hym8563" },
585 MODULE_DEVICE_TABLE(of, hym8563_dt_idtable);
587 static struct i2c_driver hym8563_driver = {
589 .name = "rtc-hym8563",
590 .pm = &hym8563_pm_ops,
591 .of_match_table = hym8563_dt_idtable,
593 .probe = hym8563_probe,
594 .id_table = hym8563_id,
597 module_i2c_driver(hym8563_driver);
600 MODULE_DESCRIPTION("HYM8563 RTC driver");
601 MODULE_LICENSE("GPL");