1 /* SPDX-License-Identifier: GPL-2.0 */
3 * perf.h - performance monitor header
5 * Copyright (C) 2021 Intel Corporation
11 DMAR_LATENCY_INV_IOTLB = 0,
12 DMAR_LATENCY_INV_DEVTLB,
19 COUNTS_10e2 = 0, /* < 0.1us */
20 COUNTS_10e3, /* 0.1us ~ 1us */
21 COUNTS_10e4, /* 1us ~ 10us */
22 COUNTS_10e5, /* 10us ~ 100us */
23 COUNTS_10e6, /* 100us ~ 1ms */
24 COUNTS_10e7, /* 1ms ~ 10ms */
25 COUNTS_10e8_plus, /* 10ms and plus*/
32 struct latency_statistic {
34 u64 counter[COUNTS_NUM];
38 #ifdef CONFIG_DMAR_PERF
39 int dmar_latency_enable(struct intel_iommu *iommu, enum latency_type type);
40 void dmar_latency_disable(struct intel_iommu *iommu, enum latency_type type);
41 bool dmar_latency_enabled(struct intel_iommu *iommu, enum latency_type type);
42 void dmar_latency_update(struct intel_iommu *iommu, enum latency_type type,
44 int dmar_latency_snapshot(struct intel_iommu *iommu, char *str, size_t size);
47 dmar_latency_enable(struct intel_iommu *iommu, enum latency_type type)
53 dmar_latency_disable(struct intel_iommu *iommu, enum latency_type type)
58 dmar_latency_enabled(struct intel_iommu *iommu, enum latency_type type)
64 dmar_latency_update(struct intel_iommu *iommu, enum latency_type type, u64 latency)
69 dmar_latency_snapshot(struct intel_iommu *iommu, char *str, size_t size)
73 #endif /* CONFIG_DMAR_PERF */