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25 #ifndef I915_REQUEST_H
26 #define I915_REQUEST_H
28 #include <linux/dma-fence.h>
29 #include <linux/irq_work.h>
30 #include <linux/lockdep.h>
32 #include "gem/i915_gem_context_types.h"
33 #include "gt/intel_context_types.h"
34 #include "gt/intel_engine_types.h"
35 #include "gt/intel_timeline_types.h"
38 #include "i915_scheduler.h"
39 #include "i915_selftest.h"
40 #include "i915_sw_fence.h"
42 #include <uapi/drm/i915_drm.h>
45 struct drm_i915_gem_object;
48 struct i915_capture_list {
49 struct i915_capture_list *next;
53 #define RQ_TRACE(rq, fmt, ...) do { \
54 const struct i915_request *rq__ = (rq); \
55 ENGINE_TRACE(rq__->engine, "fence %llx:%lld, current %d " fmt, \
56 rq__->fence.context, rq__->fence.seqno, \
57 hwsp_seqno(rq__), ##__VA_ARGS__); \
62 * I915_FENCE_FLAG_ACTIVE - this request is currently submitted to HW.
64 * Set by __i915_request_submit() on handing over to HW, and cleared
65 * by __i915_request_unsubmit() if we preempt this request.
67 * Finally cleared for consistency on retiring the request, when
68 * we know the HW is no longer running this request.
70 * See i915_request_is_active()
72 I915_FENCE_FLAG_ACTIVE = DMA_FENCE_FLAG_USER_BITS,
75 * I915_FENCE_FLAG_PQUEUE - this request is ready for execution
77 * Using the scheduler, when a request is ready for execution it is put
78 * into the priority queue, and removed from that queue when transferred
79 * to the HW runlists. We want to track its membership within the
80 * priority queue so that we can easily check before rescheduling.
82 * See i915_request_in_priority_queue()
84 I915_FENCE_FLAG_PQUEUE,
87 * I915_FENCE_FLAG_HOLD - this request is currently on hold
89 * This request has been suspended, pending an ongoing investigation.
94 * I915_FENCE_FLAG_INITIAL_BREADCRUMB - this request has the initial
95 * breadcrumb that marks the end of semaphore waits and start of the
98 I915_FENCE_FLAG_INITIAL_BREADCRUMB,
101 * I915_FENCE_FLAG_SIGNAL - this request is currently on signal_list
103 * Internal bookkeeping used by the breadcrumb code to track when
104 * a request is on the various signal_list.
106 I915_FENCE_FLAG_SIGNAL,
109 * I915_FENCE_FLAG_NOPREEMPT - this request should not be preempted
111 * The execution of some requests should not be interrupted. This is
112 * a sensitive operation as it makes the request super important,
113 * blocking other higher priority work. Abuse of this flag will
114 * lead to quality of service issues.
116 I915_FENCE_FLAG_NOPREEMPT,
119 * I915_FENCE_FLAG_SENTINEL - this request should be last in the queue
121 * A high priority sentinel request may be submitted to clear the
122 * submission queue. As it will be the only request in-flight, upon
123 * execution all other active requests will have been preempted and
124 * unsubmitted. This preemptive pulse is used to re-evaluate the
125 * in-flight requests, particularly in cases where an active context
126 * is banned and those active requests need to be cancelled.
128 I915_FENCE_FLAG_SENTINEL,
131 * I915_FENCE_FLAG_BOOST - upclock the gpu for this request
133 * Some requests are more important than others! In particular, a
134 * request that the user is waiting on is typically required for
135 * interactive latency, for which we want to minimise by upclocking
136 * the GPU. Here we track such boost requests on a per-request basis.
138 I915_FENCE_FLAG_BOOST,
142 * Request queue structure.
144 * The request queue allows us to note sequence numbers that have been emitted
145 * and may be associated with active buffers to be retired.
147 * By keeping this list, we can avoid having to do questionable sequence
148 * number comparisons on buffer last_read|write_seqno. It also allows an
149 * emission time to be associated with the request for tracking how far ahead
150 * of the GPU the submission is.
152 * When modifying this structure be very aware that we perform a lockless
153 * RCU lookup of it that may race against reallocation of the struct
154 * from the slab freelist. We intentionally do not zero the structure on
155 * allocation so that the lookup can use the dangling pointers (and is
156 * cogniscent that those pointers may be wrong). Instead, everything that
157 * needs to be initialised must be done so explicitly.
159 * The requests are reference counted.
161 struct i915_request {
162 struct dma_fence fence;
165 /** On Which ring this request was generated */
166 struct drm_i915_private *i915;
169 * Context and ring buffer related to this request
170 * Contexts are refcounted, so when this request is associated with a
171 * context, we must increment the context's refcount, to guarantee that
172 * it persists while any request is linked to it. Requests themselves
173 * are also refcounted, so the request will only be freed when the last
174 * reference to it is dismissed, and the code in
175 * i915_request_free() will then decrement the refcount on the
178 struct intel_engine_cs *engine;
179 struct intel_context *context;
180 struct intel_ring *ring;
181 struct intel_timeline __rcu *timeline;
182 struct list_head signal_link;
185 * The rcu epoch of when this request was allocated. Used to judiciously
186 * apply backpressure on future allocations to ensure that under
187 * mempressure there is sufficient RCU ticks for us to reclaim our
188 * RCU protected slabs.
190 unsigned long rcustate;
193 * We pin the timeline->mutex while constructing the request to
194 * ensure that no caller accidentally drops it during construction.
195 * The timeline->mutex must be held to ensure that only this caller
196 * can use the ring and manipulate the associated timeline during
199 struct pin_cookie cookie;
202 * Fences for the various phases in the request's lifetime.
204 * The submit fence is used to await upon all of the request's
205 * dependencies. When it is signaled, the request is ready to run.
206 * It is used by the driver to then queue the request for execution.
208 struct i915_sw_fence submit;
210 wait_queue_entry_t submitq;
211 struct i915_sw_dma_fence_cb dmaq;
212 struct i915_request_duration_cb {
213 struct dma_fence_cb cb;
217 struct list_head execute_cb;
218 struct i915_sw_fence semaphore;
221 * A list of everyone we wait upon, and everyone who waits upon us.
222 * Even though we will not be submitted to the hardware before the
223 * submit fence is signaled (it waits for all external events as well
224 * as our own requests), the scheduler still needs to know the
225 * dependency tree for the lifetime of the request (from execbuf
226 * to retirement), i.e. bidirectional dependency information for the
227 * request not tied to individual fences.
229 struct i915_sched_node sched;
230 struct i915_dependency dep;
231 intel_engine_mask_t execution_mask;
234 * A convenience pointer to the current breadcrumb value stored in
235 * the HW status page (or our timeline's local equivalent). The full
236 * path would be rq->hw_context->ring->timeline->hwsp_seqno.
238 const u32 *hwsp_seqno;
241 * If we need to access the timeline's seqno for this request in
242 * another request, we need to keep a read reference to this associated
243 * cacheline, so that we do not free and recycle it before the foreign
244 * observers have completed. Hence, we keep a pointer to the cacheline
245 * inside the timeline's HWSP vma, but it is only valid while this
246 * request has not completed and guarded by the timeline mutex.
248 struct intel_timeline_cacheline __rcu *hwsp_cacheline;
250 /** Position in the ring of the start of the request */
253 /** Position in the ring of the start of the user packets */
257 * Position in the ring of the start of the postfix.
258 * This is required to calculate the maximum available ring space
259 * without overwriting the postfix.
263 /** Position in the ring of the end of the whole request */
266 /** Position in the ring of the end of any workarounds after the tail */
269 /** Preallocate space in the ring for the emitting the request */
272 /** Batch buffer related to this request if any (used for
273 * error state dump only).
275 struct i915_vma *batch;
277 * Additional buffers requested by userspace to be captured upon
278 * a GPU hang. The vma/obj on this list are protected by their
279 * active reference - all objects on this list must also be
280 * on the active_list (of their final request).
282 struct i915_capture_list *capture_list;
284 /** Time at which this request was emitted, in jiffies. */
285 unsigned long emitted_jiffies;
287 /** timeline->request entry for this request */
288 struct list_head link;
290 struct drm_i915_file_private *file_priv;
291 /** file_priv list entry for this request */
292 struct list_head client_link;
294 I915_SELFTEST_DECLARE(struct {
295 struct list_head link;
300 #define I915_FENCE_GFP (GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN)
302 extern const struct dma_fence_ops i915_fence_ops;
304 static inline bool dma_fence_is_i915(const struct dma_fence *fence)
306 return fence->ops == &i915_fence_ops;
309 struct kmem_cache *i915_request_slab_cache(void);
311 struct i915_request * __must_check
312 __i915_request_create(struct intel_context *ce, gfp_t gfp);
313 struct i915_request * __must_check
314 i915_request_create(struct intel_context *ce);
316 void i915_request_set_error_once(struct i915_request *rq, int error);
317 void __i915_request_skip(struct i915_request *rq);
319 struct i915_request *__i915_request_commit(struct i915_request *request);
320 void __i915_request_queue(struct i915_request *rq,
321 const struct i915_sched_attr *attr);
323 bool i915_request_retire(struct i915_request *rq);
324 void i915_request_retire_upto(struct i915_request *rq);
326 static inline struct i915_request *
327 to_request(struct dma_fence *fence)
329 /* We assume that NULL fence/request are interoperable */
330 BUILD_BUG_ON(offsetof(struct i915_request, fence) != 0);
331 GEM_BUG_ON(fence && !dma_fence_is_i915(fence));
332 return container_of(fence, struct i915_request, fence);
335 static inline struct i915_request *
336 i915_request_get(struct i915_request *rq)
338 return to_request(dma_fence_get(&rq->fence));
341 static inline struct i915_request *
342 i915_request_get_rcu(struct i915_request *rq)
344 return to_request(dma_fence_get_rcu(&rq->fence));
348 i915_request_put(struct i915_request *rq)
350 dma_fence_put(&rq->fence);
353 int i915_request_await_object(struct i915_request *to,
354 struct drm_i915_gem_object *obj,
356 int i915_request_await_dma_fence(struct i915_request *rq,
357 struct dma_fence *fence);
358 int i915_request_await_execution(struct i915_request *rq,
359 struct dma_fence *fence,
360 void (*hook)(struct i915_request *rq,
361 struct dma_fence *signal));
363 void i915_request_add(struct i915_request *rq);
365 bool __i915_request_submit(struct i915_request *request);
366 void i915_request_submit(struct i915_request *request);
368 void __i915_request_unsubmit(struct i915_request *request);
369 void i915_request_unsubmit(struct i915_request *request);
371 /* Note: part of the intel_breadcrumbs family */
372 bool i915_request_enable_breadcrumb(struct i915_request *request);
373 void i915_request_cancel_breadcrumb(struct i915_request *request);
375 long i915_request_wait(struct i915_request *rq,
378 __attribute__((nonnull(1)));
379 #define I915_WAIT_INTERRUPTIBLE BIT(0)
380 #define I915_WAIT_PRIORITY BIT(1) /* small priority bump for the request */
381 #define I915_WAIT_ALL BIT(2) /* used by i915_gem_object_wait() */
383 static inline bool i915_request_signaled(const struct i915_request *rq)
385 /* The request may live longer than its HWSP, so check flags first! */
386 return test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &rq->fence.flags);
389 static inline bool i915_request_is_active(const struct i915_request *rq)
391 return test_bit(I915_FENCE_FLAG_ACTIVE, &rq->fence.flags);
394 static inline bool i915_request_in_priority_queue(const struct i915_request *rq)
396 return test_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);
400 i915_request_has_initial_breadcrumb(const struct i915_request *rq)
402 return test_bit(I915_FENCE_FLAG_INITIAL_BREADCRUMB, &rq->fence.flags);
406 * Returns true if seq1 is later than seq2.
408 static inline bool i915_seqno_passed(u32 seq1, u32 seq2)
410 return (s32)(seq1 - seq2) >= 0;
413 static inline u32 __hwsp_seqno(const struct i915_request *rq)
415 const u32 *hwsp = READ_ONCE(rq->hwsp_seqno);
417 return READ_ONCE(*hwsp);
421 * hwsp_seqno - the current breadcrumb value in the HW status page
422 * @rq: the request, to chase the relevant HW status page
424 * The emphasis in naming here is that hwsp_seqno() is not a property of the
425 * request, but an indication of the current HW state (associated with this
426 * request). Its value will change as the GPU executes more requests.
428 * Returns the current breadcrumb value in the associated HW status page (or
429 * the local timeline's equivalent) for this request. The request itself
430 * has the associated breadcrumb value of rq->fence.seqno, when the HW
431 * status page has that breadcrumb or later, this request is complete.
433 static inline u32 hwsp_seqno(const struct i915_request *rq)
437 rcu_read_lock(); /* the HWSP may be freed at runtime */
438 seqno = __hwsp_seqno(rq);
444 static inline bool __i915_request_has_started(const struct i915_request *rq)
446 return i915_seqno_passed(hwsp_seqno(rq), rq->fence.seqno - 1);
450 * i915_request_started - check if the request has begun being executed
453 * If the timeline is not using initial breadcrumbs, a request is
454 * considered started if the previous request on its timeline (i.e.
455 * context) has been signaled.
457 * If the timeline is using semaphores, it will also be emitting an
458 * "initial breadcrumb" after the semaphores are complete and just before
459 * it began executing the user payload. A request can therefore be active
460 * on the HW and not yet started as it is still busywaiting on its
461 * dependencies (via HW semaphores).
463 * If the request has started, its dependencies will have been signaled
464 * (either by fences or by semaphores) and it will have begun processing
467 * However, even if a request has started, it may have been preempted and
468 * so no longer active, or it may have already completed.
470 * See also i915_request_is_active().
472 * Returns true if the request has begun executing the user payload, or
475 static inline bool i915_request_started(const struct i915_request *rq)
477 if (i915_request_signaled(rq))
480 /* Remember: started but may have since been preempted! */
481 return __i915_request_has_started(rq);
485 * i915_request_is_running - check if the request may actually be executing
488 * Returns true if the request is currently submitted to hardware, has passed
489 * its start point (i.e. the context is setup and not busywaiting). Note that
490 * it may no longer be running by the time the function returns!
492 static inline bool i915_request_is_running(const struct i915_request *rq)
494 if (!i915_request_is_active(rq))
497 return __i915_request_has_started(rq);
501 * i915_request_is_ready - check if the request is ready for execution
504 * Upon construction, the request is instructed to wait upon various
505 * signals before it is ready to be executed by the HW. That is, we do
506 * not want to start execution and read data before it is written. In practice,
507 * this is controlled with a mixture of interrupts and semaphores. Once
508 * the submit fence is completed, the backend scheduler will place the
509 * request into its queue and from there submit it for execution. So we
510 * can detect when a request is eligible for execution (and is under control
511 * of the scheduler) by querying where it is in any of the scheduler's lists.
513 * Returns true if the request is ready for execution (it may be inflight),
516 static inline bool i915_request_is_ready(const struct i915_request *rq)
518 return !list_empty(&rq->sched.link);
521 static inline bool i915_request_completed(const struct i915_request *rq)
523 if (i915_request_signaled(rq))
526 return i915_seqno_passed(hwsp_seqno(rq), rq->fence.seqno);
529 static inline void i915_request_mark_complete(struct i915_request *rq)
531 WRITE_ONCE(rq->hwsp_seqno, /* decouple from HWSP */
532 (u32 *)&rq->fence.seqno);
535 static inline bool i915_request_has_waitboost(const struct i915_request *rq)
537 return test_bit(I915_FENCE_FLAG_BOOST, &rq->fence.flags);
540 static inline bool i915_request_has_nopreempt(const struct i915_request *rq)
542 /* Preemption should only be disabled very rarely */
543 return unlikely(test_bit(I915_FENCE_FLAG_NOPREEMPT, &rq->fence.flags));
546 static inline bool i915_request_has_sentinel(const struct i915_request *rq)
548 return unlikely(test_bit(I915_FENCE_FLAG_SENTINEL, &rq->fence.flags));
551 static inline bool i915_request_on_hold(const struct i915_request *rq)
553 return unlikely(test_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags));
556 static inline void i915_request_set_hold(struct i915_request *rq)
558 set_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags);
561 static inline void i915_request_clear_hold(struct i915_request *rq)
563 clear_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags);
566 static inline struct intel_timeline *
567 i915_request_timeline(struct i915_request *rq)
569 /* Valid only while the request is being constructed (or retired). */
570 return rcu_dereference_protected(rq->timeline,
571 lockdep_is_held(&rcu_access_pointer(rq->timeline)->mutex));
574 static inline struct i915_gem_context *
575 i915_request_gem_context(struct i915_request *rq)
577 /* Valid only while the request is being constructed (or retired). */
578 return rcu_dereference_protected(rq->context->gem_context, true);
581 static inline struct intel_timeline *
582 i915_request_active_timeline(struct i915_request *rq)
585 * When in use during submission, we are protected by a guarantee that
586 * the context/timeline is pinned and must remain pinned until after
589 return rcu_dereference_protected(rq->timeline,
590 lockdep_is_held(&rq->engine->active.lock));
593 #endif /* I915_REQUEST_H */