2 * Copyright 2018 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
26 #include <linux/uaccess.h>
28 #include <drm/drm_debugfs.h>
32 #include "amdgpu_dm.h"
33 #include "amdgpu_dm_debugfs.h"
34 #include "dm_helpers.h"
35 #include "dmub/inc/dmub_srv.h"
37 struct dmub_debugfs_trace_header {
42 struct dmub_debugfs_trace_entry {
49 /* function description
50 * get/ set DP configuration: lane_count, link_rate, spread_spectrum
52 * valid lane count value: 1, 2, 4
53 * valid link rate value:
54 * 06h = 1.62Gbps per lane
55 * 0Ah = 2.7Gbps per lane
56 * 0Ch = 3.24Gbps per lane
57 * 14h = 5.4Gbps per lane
58 * 1Eh = 8.1Gbps per lane
60 * debugfs is located at /sys/kernel/debug/dri/0/DP-x/link_settings
62 * --- to get dp configuration
66 * It will list current, verified, reported, preferred dp configuration.
67 * current -- for current video mode
68 * verified --- maximum configuration which pass link training
69 * reported --- DP rx report caps (DPCD register offset 0, 1 2)
70 * preferred --- user force settings
72 * --- set (or force) dp configuration
74 * echo <lane_count> <link_rate> > link_settings
76 * for example, to force to 2 lane, 2.7GHz,
77 * echo 4 0xa > link_settings
79 * spread_spectrum could not be changed dynamically.
81 * in case invalid lane count, link rate are force, no hw programming will be
82 * done. please check link settings after force operation to see if HW get
87 * check current and preferred settings.
90 static ssize_t dp_link_settings_read(struct file *f, char __user *buf,
91 size_t size, loff_t *pos)
93 struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
94 struct dc_link *link = connector->dc_link;
96 char *rd_buf_ptr = NULL;
97 const uint32_t rd_buf_size = 100;
102 if (*pos & 3 || size & 3)
105 rd_buf = kcalloc(rd_buf_size, sizeof(char), GFP_KERNEL);
111 str_len = strlen("Current: %d %d %d ");
112 snprintf(rd_buf_ptr, str_len, "Current: %d %d %d ",
113 link->cur_link_settings.lane_count,
114 link->cur_link_settings.link_rate,
115 link->cur_link_settings.link_spread);
116 rd_buf_ptr += str_len;
118 str_len = strlen("Verified: %d %d %d ");
119 snprintf(rd_buf_ptr, str_len, "Verified: %d %d %d ",
120 link->verified_link_cap.lane_count,
121 link->verified_link_cap.link_rate,
122 link->verified_link_cap.link_spread);
123 rd_buf_ptr += str_len;
125 str_len = strlen("Reported: %d %d %d ");
126 snprintf(rd_buf_ptr, str_len, "Reported: %d %d %d ",
127 link->reported_link_cap.lane_count,
128 link->reported_link_cap.link_rate,
129 link->reported_link_cap.link_spread);
130 rd_buf_ptr += str_len;
132 str_len = strlen("Preferred: %d %d %d ");
133 snprintf(rd_buf_ptr, str_len, "Preferred: %d %d %d\n",
134 link->preferred_link_setting.lane_count,
135 link->preferred_link_setting.link_rate,
136 link->preferred_link_setting.link_spread);
139 if (*pos >= rd_buf_size)
142 r = put_user(*(rd_buf + result), buf);
144 return r; /* r = -EFAULT */
156 static ssize_t dp_link_settings_write(struct file *f, const char __user *buf,
157 size_t size, loff_t *pos)
159 struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
160 struct dc_link *link = connector->dc_link;
161 struct dc *dc = (struct dc *)link->dc;
162 struct dc_link_settings prefer_link_settings;
164 char *wr_buf_ptr = NULL;
165 const uint32_t wr_buf_size = 40;
169 /* 0: lane_count; 1: link_rate */
170 uint8_t param_index = 0;
172 const char delimiter[3] = {' ', '\n', '\0'};
173 bool valid_input = false;
178 wr_buf = kcalloc(wr_buf_size, sizeof(char), GFP_KERNEL);
183 r = copy_from_user(wr_buf_ptr, buf, wr_buf_size);
185 /* r is bytes not be copied */
186 if (r >= wr_buf_size) {
188 DRM_DEBUG_DRIVER("user data not read\n");
192 bytes_from_user = wr_buf_size - r;
194 while (isspace(*wr_buf_ptr))
197 while ((*wr_buf_ptr != '\0') && (param_index < 2)) {
199 sub_str = strsep(&wr_buf_ptr, delimiter);
201 r = kstrtol(sub_str, 16, ¶m[param_index]);
204 DRM_DEBUG_DRIVER("string to int convert error code: %d\n", r);
207 while (isspace(*wr_buf_ptr))
214 case LANE_COUNT_FOUR:
225 case LINK_RATE_HIGH2:
226 case LINK_RATE_HIGH3:
235 DRM_DEBUG_DRIVER("Invalid Input value No HW will be programmed\n");
236 return bytes_from_user;
239 /* save user force lane_count, link_rate to preferred settings
240 * spread spectrum will not be changed
242 prefer_link_settings.link_spread = link->cur_link_settings.link_spread;
243 prefer_link_settings.lane_count = param[0];
244 prefer_link_settings.link_rate = param[1];
246 dc_link_set_preferred_link_settings(dc, &prefer_link_settings, link);
249 return bytes_from_user;
252 /* function: get current DP PHY settings: voltage swing, pre-emphasis,
253 * post-cursor2 (defined by VESA DP specification)
256 * voltage swing: 0,1,2,3
257 * pre-emphasis : 0,1,2,3
258 * post cursor2 : 0,1,2,3
261 * how to use this debugfs
263 * debugfs is located at /sys/kernel/debug/dri/0/DP-x
265 * there will be directories, like DP-1, DP-2,DP-3, etc. for DP display
267 * To figure out which DP-x is the display for DP to be check,
270 * There should be debugfs file, like link_settings, phy_settings.
272 * from lane_count, link_rate to figure which DP-x is for display to be worked
275 * To get current DP PHY settings,
278 * To change DP PHY settings,
279 * echo <voltage_swing> <pre-emphasis> <post_cursor2> > phy_settings
280 * for examle, to change voltage swing to 2, pre-emphasis to 3, post_cursor2 to
282 * echo 2 3 0 > phy_settings
284 * To check if change be applied, get current phy settings by
287 * In case invalid values are set by user, like
288 * echo 1 4 0 > phy_settings
290 * HW will NOT be programmed by these settings.
291 * cat phy_settings will show the previous valid settings.
293 static ssize_t dp_phy_settings_read(struct file *f, char __user *buf,
294 size_t size, loff_t *pos)
296 struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
297 struct dc_link *link = connector->dc_link;
299 const uint32_t rd_buf_size = 20;
303 if (*pos & 3 || size & 3)
306 rd_buf = kcalloc(rd_buf_size, sizeof(char), GFP_KERNEL);
310 snprintf(rd_buf, rd_buf_size, " %d %d %d ",
311 link->cur_lane_setting.VOLTAGE_SWING,
312 link->cur_lane_setting.PRE_EMPHASIS,
313 link->cur_lane_setting.POST_CURSOR2);
316 if (*pos >= rd_buf_size)
319 r = put_user((*(rd_buf + result)), buf);
321 return r; /* r = -EFAULT */
333 static ssize_t dp_phy_settings_write(struct file *f, const char __user *buf,
334 size_t size, loff_t *pos)
336 struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
337 struct dc_link *link = connector->dc_link;
338 struct dc *dc = (struct dc *)link->dc;
340 char *wr_buf_ptr = NULL;
341 uint32_t wr_buf_size = 40;
345 uint8_t param_index = 0;
347 const char delimiter[3] = {' ', '\n', '\0'};
348 bool use_prefer_link_setting;
349 struct link_training_settings link_lane_settings;
354 wr_buf = kcalloc(wr_buf_size, sizeof(char), GFP_KERNEL);
359 r = copy_from_user(wr_buf_ptr, buf, wr_buf_size);
361 /* r is bytes not be copied */
362 if (r >= wr_buf_size) {
364 DRM_DEBUG_DRIVER("user data not be read\n");
368 bytes_from_user = wr_buf_size - r;
370 while (isspace(*wr_buf_ptr))
373 while ((*wr_buf_ptr != '\0') && (param_index < 3)) {
375 sub_str = strsep(&wr_buf_ptr, delimiter);
377 r = kstrtol(sub_str, 16, ¶m[param_index]);
380 DRM_DEBUG_DRIVER("string to int convert error code: %d\n", r);
383 while (isspace(*wr_buf_ptr))
387 if ((param[0] > VOLTAGE_SWING_MAX_LEVEL) ||
388 (param[1] > PRE_EMPHASIS_MAX_LEVEL) ||
389 (param[2] > POST_CURSOR2_MAX_LEVEL)) {
391 DRM_DEBUG_DRIVER("Invalid Input No HW will be programmed\n");
392 return bytes_from_user;
395 /* get link settings: lane count, link rate */
396 use_prefer_link_setting =
397 ((link->preferred_link_setting.link_rate != LINK_RATE_UNKNOWN) &&
398 (link->test_pattern_enabled));
400 memset(&link_lane_settings, 0, sizeof(link_lane_settings));
402 if (use_prefer_link_setting) {
403 link_lane_settings.link_settings.lane_count =
404 link->preferred_link_setting.lane_count;
405 link_lane_settings.link_settings.link_rate =
406 link->preferred_link_setting.link_rate;
407 link_lane_settings.link_settings.link_spread =
408 link->preferred_link_setting.link_spread;
410 link_lane_settings.link_settings.lane_count =
411 link->cur_link_settings.lane_count;
412 link_lane_settings.link_settings.link_rate =
413 link->cur_link_settings.link_rate;
414 link_lane_settings.link_settings.link_spread =
415 link->cur_link_settings.link_spread;
418 /* apply phy settings from user */
419 for (r = 0; r < link_lane_settings.link_settings.lane_count; r++) {
420 link_lane_settings.lane_settings[r].VOLTAGE_SWING =
421 (enum dc_voltage_swing) (param[0]);
422 link_lane_settings.lane_settings[r].PRE_EMPHASIS =
423 (enum dc_pre_emphasis) (param[1]);
424 link_lane_settings.lane_settings[r].POST_CURSOR2 =
425 (enum dc_post_cursor2) (param[2]);
428 /* program ASIC registers and DPCD registers */
429 dc_link_set_drive_settings(dc, &link_lane_settings, link);
432 return bytes_from_user;
435 /* function description
437 * set PHY layer or Link layer test pattern
438 * PHY test pattern is used for PHY SI check.
439 * Link layer test will not affect PHY SI.
441 * Reset Test Pattern:
442 * 0 = DP_TEST_PATTERN_VIDEO_MODE
444 * PHY test pattern supported:
445 * 1 = DP_TEST_PATTERN_D102
446 * 2 = DP_TEST_PATTERN_SYMBOL_ERROR
447 * 3 = DP_TEST_PATTERN_PRBS7
448 * 4 = DP_TEST_PATTERN_80BIT_CUSTOM
449 * 5 = DP_TEST_PATTERN_CP2520_1
450 * 6 = DP_TEST_PATTERN_CP2520_2 = DP_TEST_PATTERN_HBR2_COMPLIANCE_EYE
451 * 7 = DP_TEST_PATTERN_CP2520_3
453 * DP PHY Link Training Patterns
454 * 8 = DP_TEST_PATTERN_TRAINING_PATTERN1
455 * 9 = DP_TEST_PATTERN_TRAINING_PATTERN2
456 * a = DP_TEST_PATTERN_TRAINING_PATTERN3
457 * b = DP_TEST_PATTERN_TRAINING_PATTERN4
459 * DP Link Layer Test pattern
460 * c = DP_TEST_PATTERN_COLOR_SQUARES
461 * d = DP_TEST_PATTERN_COLOR_SQUARES_CEA
462 * e = DP_TEST_PATTERN_VERTICAL_BARS
463 * f = DP_TEST_PATTERN_HORIZONTAL_BARS
464 * 10= DP_TEST_PATTERN_COLOR_RAMP
466 * debugfs phy_test_pattern is located at /syskernel/debug/dri/0/DP-x
468 * --- set test pattern
469 * echo <test pattern #> > test_pattern
471 * If test pattern # is not supported, NO HW programming will be done.
472 * for DP_TEST_PATTERN_80BIT_CUSTOM, it needs extra 10 bytes of data
473 * for the user pattern. input 10 bytes data are separated by space
475 * echo 0x4 0x11 0x22 0x33 0x44 0x55 0x66 0x77 0x88 0x99 0xaa > test_pattern
477 * --- reset test pattern
478 * echo 0 > test_pattern
480 * --- HPD detection is disabled when set PHY test pattern
482 * when PHY test pattern (pattern # within [1,7]) is set, HPD pin of HW ASIC
483 * is disable. User could unplug DP display from DP connected and plug scope to
484 * check test pattern PHY SI.
485 * If there is need unplug scope and plug DP display back, do steps below:
486 * echo 0 > phy_test_pattern
490 * "echo 0 > phy_test_pattern" will re-enable HPD pin again so that video sw
491 * driver could detect "unplug scope" and "plug DP display"
493 static ssize_t dp_phy_test_pattern_debugfs_write(struct file *f, const char __user *buf,
494 size_t size, loff_t *pos)
496 struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
497 struct dc_link *link = connector->dc_link;
499 char *wr_buf_ptr = NULL;
500 uint32_t wr_buf_size = 100;
501 uint32_t wr_buf_count = 0;
504 char *sub_str = NULL;
505 uint8_t param_index = 0;
506 uint8_t param_nums = 0;
507 long param[11] = {0x0};
508 const char delimiter[3] = {' ', '\n', '\0'};
509 enum dp_test_pattern test_pattern = DP_TEST_PATTERN_UNSUPPORTED;
510 bool disable_hpd = false;
511 bool valid_test_pattern = false;
512 /* init with defalut 80bit custom pattern */
513 uint8_t custom_pattern[10] = {
514 0x1f, 0x7c, 0xf0, 0xc1, 0x07,
515 0x1f, 0x7c, 0xf0, 0xc1, 0x07
517 struct dc_link_settings prefer_link_settings = {LANE_COUNT_UNKNOWN,
518 LINK_RATE_UNKNOWN, LINK_SPREAD_DISABLED};
519 struct dc_link_settings cur_link_settings = {LANE_COUNT_UNKNOWN,
520 LINK_RATE_UNKNOWN, LINK_SPREAD_DISABLED};
521 struct link_training_settings link_training_settings;
527 wr_buf = kcalloc(wr_buf_size, sizeof(char), GFP_KERNEL);
532 r = copy_from_user(wr_buf_ptr, buf, wr_buf_size);
534 /* r is bytes not be copied */
535 if (r >= wr_buf_size) {
537 DRM_DEBUG_DRIVER("user data not be read\n");
541 bytes_from_user = wr_buf_size - r;
543 /* check number of parameters. isspace could not differ space and \n */
544 while ((*wr_buf_ptr != 0xa) && (wr_buf_count < wr_buf_size)) {
546 while (isspace(*wr_buf_ptr) && (wr_buf_count < wr_buf_size)) {
551 if (wr_buf_count == wr_buf_size)
555 while ((!isspace(*wr_buf_ptr)) && (wr_buf_count < wr_buf_size)) {
562 if (wr_buf_count == wr_buf_size)
566 /* max 11 parameters */
570 wr_buf_ptr = wr_buf; /* reset buf pinter */
571 wr_buf_count = 0; /* number of char already checked */
573 while (isspace(*wr_buf_ptr) && (wr_buf_count < wr_buf_size)) {
578 while (param_index < param_nums) {
579 /* after strsep, wr_buf_ptr will be moved to after space */
580 sub_str = strsep(&wr_buf_ptr, delimiter);
582 r = kstrtol(sub_str, 16, ¶m[param_index]);
585 DRM_DEBUG_DRIVER("string to int convert error code: %d\n", r);
590 test_pattern = param[0];
592 switch (test_pattern) {
593 case DP_TEST_PATTERN_VIDEO_MODE:
594 case DP_TEST_PATTERN_COLOR_SQUARES:
595 case DP_TEST_PATTERN_COLOR_SQUARES_CEA:
596 case DP_TEST_PATTERN_VERTICAL_BARS:
597 case DP_TEST_PATTERN_HORIZONTAL_BARS:
598 case DP_TEST_PATTERN_COLOR_RAMP:
599 valid_test_pattern = true;
602 case DP_TEST_PATTERN_D102:
603 case DP_TEST_PATTERN_SYMBOL_ERROR:
604 case DP_TEST_PATTERN_PRBS7:
605 case DP_TEST_PATTERN_80BIT_CUSTOM:
606 case DP_TEST_PATTERN_HBR2_COMPLIANCE_EYE:
607 case DP_TEST_PATTERN_TRAINING_PATTERN4:
609 valid_test_pattern = true;
613 valid_test_pattern = false;
614 test_pattern = DP_TEST_PATTERN_UNSUPPORTED;
618 if (!valid_test_pattern) {
620 DRM_DEBUG_DRIVER("Invalid Test Pattern Parameters\n");
621 return bytes_from_user;
624 if (test_pattern == DP_TEST_PATTERN_80BIT_CUSTOM) {
625 for (i = 0; i < 10; i++) {
626 if ((uint8_t) param[i + 1] != 0x0)
631 /* not use default value */
632 for (i = 0; i < 10; i++)
633 custom_pattern[i] = (uint8_t) param[i + 1];
637 /* Usage: set DP physical test pattern using debugfs with normal DP
638 * panel. Then plug out DP panel and connect a scope to measure
639 * For normal video mode and test pattern generated from CRCT,
640 * they are visibile to user. So do not disable HPD.
641 * Video Mode is also set to clear the test pattern, so enable HPD
642 * because it might have been disabled after a test pattern was set.
643 * AUX depends on HPD * sequence dependent, do not move!
646 dc_link_enable_hpd(link);
648 prefer_link_settings.lane_count = link->verified_link_cap.lane_count;
649 prefer_link_settings.link_rate = link->verified_link_cap.link_rate;
650 prefer_link_settings.link_spread = link->verified_link_cap.link_spread;
652 cur_link_settings.lane_count = link->cur_link_settings.lane_count;
653 cur_link_settings.link_rate = link->cur_link_settings.link_rate;
654 cur_link_settings.link_spread = link->cur_link_settings.link_spread;
656 link_training_settings.link_settings = cur_link_settings;
659 if (test_pattern != DP_TEST_PATTERN_VIDEO_MODE) {
660 if (prefer_link_settings.lane_count != LANE_COUNT_UNKNOWN &&
661 prefer_link_settings.link_rate != LINK_RATE_UNKNOWN &&
662 (prefer_link_settings.lane_count != cur_link_settings.lane_count ||
663 prefer_link_settings.link_rate != cur_link_settings.link_rate))
664 link_training_settings.link_settings = prefer_link_settings;
667 for (i = 0; i < (unsigned int)(link_training_settings.link_settings.lane_count); i++)
668 link_training_settings.lane_settings[i] = link->cur_lane_setting;
670 dc_link_set_test_pattern(
673 DP_TEST_PATTERN_COLOR_SPACE_RGB,
674 &link_training_settings,
678 /* Usage: Set DP physical test pattern using AMDDP with normal DP panel
679 * Then plug out DP panel and connect a scope to measure DP PHY signal.
680 * Need disable interrupt to avoid SW driver disable DP output. This is
681 * done after the test pattern is set.
683 if (valid_test_pattern && disable_hpd)
684 dc_link_disable_hpd(link);
688 return bytes_from_user;
692 * Returns the DMCUB tracebuffer contents.
693 * Example usage: cat /sys/kernel/debug/dri/0/amdgpu_dm_dmub_tracebuffer
695 static int dmub_tracebuffer_show(struct seq_file *m, void *data)
697 struct amdgpu_device *adev = m->private;
698 struct dmub_srv_fb_info *fb_info = adev->dm.dmub_fb_info;
699 struct dmub_debugfs_trace_entry *entries;
701 uint32_t tbuf_size, max_entries, num_entries, i;
706 tbuf_base = (uint8_t *)fb_info->fb[DMUB_WINDOW_5_TRACEBUFF].cpu_addr;
710 tbuf_size = fb_info->fb[DMUB_WINDOW_5_TRACEBUFF].size;
711 max_entries = (tbuf_size - sizeof(struct dmub_debugfs_trace_header)) /
712 sizeof(struct dmub_debugfs_trace_entry);
715 ((struct dmub_debugfs_trace_header *)tbuf_base)->entry_count;
717 num_entries = min(num_entries, max_entries);
719 entries = (struct dmub_debugfs_trace_entry
721 sizeof(struct dmub_debugfs_trace_header));
723 for (i = 0; i < num_entries; ++i) {
724 struct dmub_debugfs_trace_entry *entry = &entries[i];
727 "trace_code=%u tick_count=%u param0=%u param1=%u\n",
728 entry->trace_code, entry->tick_count, entry->param0,
736 * Returns the DMCUB firmware state contents.
737 * Example usage: cat /sys/kernel/debug/dri/0/amdgpu_dm_dmub_fw_state
739 static int dmub_fw_state_show(struct seq_file *m, void *data)
741 struct amdgpu_device *adev = m->private;
742 struct dmub_srv_fb_info *fb_info = adev->dm.dmub_fb_info;
749 state_base = (uint8_t *)fb_info->fb[DMUB_WINDOW_6_FW_STATE].cpu_addr;
753 state_size = fb_info->fb[DMUB_WINDOW_6_FW_STATE].size;
755 return seq_write(m, state_base, state_size);
759 * Returns the current and maximum output bpc for the connector.
760 * Example usage: cat /sys/kernel/debug/dri/0/DP-1/output_bpc
762 static int output_bpc_show(struct seq_file *m, void *data)
764 struct drm_connector *connector = m->private;
765 struct drm_device *dev = connector->dev;
766 struct drm_crtc *crtc = NULL;
767 struct dm_crtc_state *dm_crtc_state = NULL;
771 mutex_lock(&dev->mode_config.mutex);
772 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
774 if (connector->state == NULL)
777 crtc = connector->state->crtc;
781 drm_modeset_lock(&crtc->mutex, NULL);
782 if (crtc->state == NULL)
785 dm_crtc_state = to_dm_crtc_state(crtc->state);
786 if (dm_crtc_state->stream == NULL)
789 switch (dm_crtc_state->stream->timing.display_color_depth) {
790 case COLOR_DEPTH_666:
793 case COLOR_DEPTH_888:
796 case COLOR_DEPTH_101010:
799 case COLOR_DEPTH_121212:
802 case COLOR_DEPTH_161616:
809 seq_printf(m, "Current: %u\n", bpc);
810 seq_printf(m, "Maximum: %u\n", connector->display_info.bpc);
815 drm_modeset_unlock(&crtc->mutex);
817 drm_modeset_unlock(&dev->mode_config.connection_mutex);
818 mutex_unlock(&dev->mode_config.mutex);
824 * Returns the min and max vrr vfreq through the connector's debugfs file.
825 * Example usage: cat /sys/kernel/debug/dri/0/DP-1/vrr_range
827 static int vrr_range_show(struct seq_file *m, void *data)
829 struct drm_connector *connector = m->private;
830 struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector);
832 if (connector->status != connector_status_connected)
835 seq_printf(m, "Min: %u\n", (unsigned int)aconnector->min_vfreq);
836 seq_printf(m, "Max: %u\n", (unsigned int)aconnector->max_vfreq);
841 /* function description
843 * generic SDP message access for testing
845 * debugfs sdp_message is located at /syskernel/debug/dri/0/DP-x
848 * Hb0 : Secondary-Data Packet ID
849 * Hb1 : Secondary-Data Packet type
850 * Hb2 : Secondary-Data-packet-specific header, Byte 0
851 * Hb3 : Secondary-Data-packet-specific header, Byte 1
853 * for using custom sdp message: input 4 bytes SDP header and 32 bytes raw data
855 static ssize_t dp_sdp_message_debugfs_write(struct file *f, const char __user *buf,
856 size_t size, loff_t *pos)
860 struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
861 struct dm_crtc_state *acrtc_state;
862 uint32_t write_size = 36;
864 if (connector->base.status != connector_status_connected)
870 acrtc_state = to_dm_crtc_state(connector->base.state->crtc->state);
872 r = copy_from_user(data, buf, write_size);
876 dc_stream_send_dp_sdp(acrtc_state->stream, data, write_size);
881 static ssize_t dp_dpcd_address_write(struct file *f, const char __user *buf,
882 size_t size, loff_t *pos)
885 struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
887 if (size < sizeof(connector->debugfs_dpcd_address))
890 r = copy_from_user(&connector->debugfs_dpcd_address,
891 buf, sizeof(connector->debugfs_dpcd_address));
896 static ssize_t dp_dpcd_size_write(struct file *f, const char __user *buf,
897 size_t size, loff_t *pos)
900 struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
902 if (size < sizeof(connector->debugfs_dpcd_size))
905 r = copy_from_user(&connector->debugfs_dpcd_size,
906 buf, sizeof(connector->debugfs_dpcd_size));
908 if (connector->debugfs_dpcd_size > 256)
909 connector->debugfs_dpcd_size = 0;
914 static ssize_t dp_dpcd_data_write(struct file *f, const char __user *buf,
915 size_t size, loff_t *pos)
919 struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
920 struct dc_link *link = connector->dc_link;
921 uint32_t write_size = connector->debugfs_dpcd_size;
923 if (size < write_size)
926 data = kzalloc(write_size, GFP_KERNEL);
930 r = copy_from_user(data, buf, write_size);
932 dm_helpers_dp_write_dpcd(link->ctx, link,
933 connector->debugfs_dpcd_address, data, write_size - r);
935 return write_size - r;
938 static ssize_t dp_dpcd_data_read(struct file *f, char __user *buf,
939 size_t size, loff_t *pos)
943 struct amdgpu_dm_connector *connector = file_inode(f)->i_private;
944 struct dc_link *link = connector->dc_link;
945 uint32_t read_size = connector->debugfs_dpcd_size;
947 if (size < read_size)
950 data = kzalloc(read_size, GFP_KERNEL);
954 dm_helpers_dp_read_dpcd(link->ctx, link,
955 connector->debugfs_dpcd_address, data, read_size);
957 r = copy_to_user(buf, data, read_size);
960 return read_size - r;
963 DEFINE_SHOW_ATTRIBUTE(dmub_fw_state);
964 DEFINE_SHOW_ATTRIBUTE(dmub_tracebuffer);
965 DEFINE_SHOW_ATTRIBUTE(output_bpc);
966 DEFINE_SHOW_ATTRIBUTE(vrr_range);
968 static const struct file_operations dp_link_settings_debugfs_fops = {
969 .owner = THIS_MODULE,
970 .read = dp_link_settings_read,
971 .write = dp_link_settings_write,
972 .llseek = default_llseek
975 static const struct file_operations dp_phy_settings_debugfs_fop = {
976 .owner = THIS_MODULE,
977 .read = dp_phy_settings_read,
978 .write = dp_phy_settings_write,
979 .llseek = default_llseek
982 static const struct file_operations dp_phy_test_pattern_fops = {
983 .owner = THIS_MODULE,
984 .write = dp_phy_test_pattern_debugfs_write,
985 .llseek = default_llseek
988 static const struct file_operations sdp_message_fops = {
989 .owner = THIS_MODULE,
990 .write = dp_sdp_message_debugfs_write,
991 .llseek = default_llseek
994 static const struct file_operations dp_dpcd_address_debugfs_fops = {
995 .owner = THIS_MODULE,
996 .write = dp_dpcd_address_write,
997 .llseek = default_llseek
1000 static const struct file_operations dp_dpcd_size_debugfs_fops = {
1001 .owner = THIS_MODULE,
1002 .write = dp_dpcd_size_write,
1003 .llseek = default_llseek
1006 static const struct file_operations dp_dpcd_data_debugfs_fops = {
1007 .owner = THIS_MODULE,
1008 .read = dp_dpcd_data_read,
1009 .write = dp_dpcd_data_write,
1010 .llseek = default_llseek
1013 static const struct {
1015 const struct file_operations *fops;
1016 } dp_debugfs_entries[] = {
1017 {"link_settings", &dp_link_settings_debugfs_fops},
1018 {"phy_settings", &dp_phy_settings_debugfs_fop},
1019 {"test_pattern", &dp_phy_test_pattern_fops},
1020 {"output_bpc", &output_bpc_fops},
1021 {"vrr_range", &vrr_range_fops},
1022 {"sdp_message", &sdp_message_fops},
1023 {"aux_dpcd_address", &dp_dpcd_address_debugfs_fops},
1024 {"aux_dpcd_size", &dp_dpcd_size_debugfs_fops},
1025 {"aux_dpcd_data", &dp_dpcd_data_debugfs_fops}
1029 * Force YUV420 output if available from the given mode
1031 static int force_yuv420_output_set(void *data, u64 val)
1033 struct amdgpu_dm_connector *connector = data;
1035 connector->force_yuv420_output = (bool)val;
1041 * Check if YUV420 is forced when available from the given mode
1043 static int force_yuv420_output_get(void *data, u64 *val)
1045 struct amdgpu_dm_connector *connector = data;
1047 *val = connector->force_yuv420_output;
1052 DEFINE_DEBUGFS_ATTRIBUTE(force_yuv420_output_fops, force_yuv420_output_get,
1053 force_yuv420_output_set, "%llu\n");
1058 static int psr_get(void *data, u64 *val)
1060 struct amdgpu_dm_connector *connector = data;
1061 struct dc_link *link = connector->dc_link;
1062 uint32_t psr_state = 0;
1064 dc_link_get_psr_state(link, &psr_state);
1072 DEFINE_DEBUGFS_ATTRIBUTE(psr_fops, psr_get, NULL, "%llu\n");
1074 void connector_debugfs_init(struct amdgpu_dm_connector *connector)
1077 struct dentry *dir = connector->base.debugfs_entry;
1079 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
1080 connector->base.connector_type == DRM_MODE_CONNECTOR_eDP) {
1081 for (i = 0; i < ARRAY_SIZE(dp_debugfs_entries); i++) {
1082 debugfs_create_file(dp_debugfs_entries[i].name,
1083 0644, dir, connector,
1084 dp_debugfs_entries[i].fops);
1087 if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)
1088 debugfs_create_file_unsafe("psr_state", 0444, dir, connector, &psr_fops);
1090 debugfs_create_file_unsafe("force_yuv420_output", 0644, dir, connector,
1091 &force_yuv420_output_fops);
1093 connector->debugfs_dpcd_address = 0;
1094 connector->debugfs_dpcd_size = 0;
1099 * Writes DTN log state to the user supplied buffer.
1100 * Example usage: cat /sys/kernel/debug/dri/0/amdgpu_dm_dtn_log
1102 static ssize_t dtn_log_read(
1108 struct amdgpu_device *adev = file_inode(f)->i_private;
1109 struct dc *dc = adev->dm.dc;
1110 struct dc_log_buffer_ctx log_ctx = { 0 };
1116 if (!dc->hwss.log_hw_state)
1119 dc->hwss.log_hw_state(dc, &log_ctx);
1121 if (*pos < log_ctx.pos) {
1122 size_t to_copy = log_ctx.pos - *pos;
1124 to_copy = min(to_copy, size);
1126 if (!copy_to_user(buf, log_ctx.buf + *pos, to_copy)) {
1138 * Writes DTN log state to dmesg when triggered via a write.
1139 * Example usage: echo 1 > /sys/kernel/debug/dri/0/amdgpu_dm_dtn_log
1141 static ssize_t dtn_log_write(
1143 const char __user *buf,
1147 struct amdgpu_device *adev = file_inode(f)->i_private;
1148 struct dc *dc = adev->dm.dc;
1150 /* Write triggers log output via dmesg. */
1154 if (dc->hwss.log_hw_state)
1155 dc->hwss.log_hw_state(dc, NULL);
1161 * Backlight at this moment. Read only.
1162 * As written to display, taking ABM and backlight lut into account.
1163 * Ranges from 0x0 to 0x10000 (= 100% PWM)
1165 static int current_backlight_read(struct seq_file *m, void *data)
1167 struct drm_info_node *node = (struct drm_info_node *)m->private;
1168 struct drm_device *dev = node->minor->dev;
1169 struct amdgpu_device *adev = dev->dev_private;
1170 struct dc *dc = adev->dm.dc;
1171 unsigned int backlight = dc_get_current_backlight_pwm(dc);
1173 seq_printf(m, "0x%x\n", backlight);
1178 * Backlight value that is being approached. Read only.
1179 * As written to display, taking ABM and backlight lut into account.
1180 * Ranges from 0x0 to 0x10000 (= 100% PWM)
1182 static int target_backlight_read(struct seq_file *m, void *data)
1184 struct drm_info_node *node = (struct drm_info_node *)m->private;
1185 struct drm_device *dev = node->minor->dev;
1186 struct amdgpu_device *adev = dev->dev_private;
1187 struct dc *dc = adev->dm.dc;
1188 unsigned int backlight = dc_get_target_backlight_pwm(dc);
1190 seq_printf(m, "0x%x\n", backlight);
1194 static int mst_topo(struct seq_file *m, void *unused)
1196 struct drm_info_node *node = (struct drm_info_node *)m->private;
1197 struct drm_device *dev = node->minor->dev;
1198 struct drm_connector *connector;
1199 struct drm_connector_list_iter conn_iter;
1200 struct amdgpu_dm_connector *aconnector;
1202 drm_connector_list_iter_begin(dev, &conn_iter);
1203 drm_for_each_connector_iter(connector, &conn_iter) {
1204 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
1207 aconnector = to_amdgpu_dm_connector(connector);
1209 seq_printf(m, "\nMST topology for connector %d\n", aconnector->connector_id);
1210 drm_dp_mst_dump_topology(m, &aconnector->mst_mgr);
1212 drm_connector_list_iter_end(&conn_iter);
1217 static const struct drm_info_list amdgpu_dm_debugfs_list[] = {
1218 {"amdgpu_current_backlight_pwm", ¤t_backlight_read},
1219 {"amdgpu_target_backlight_pwm", &target_backlight_read},
1220 {"amdgpu_mst_topology", &mst_topo},
1224 * Sets the DC visual confirm debug option from the given string.
1225 * Example usage: echo 1 > /sys/kernel/debug/dri/0/amdgpu_visual_confirm
1227 static int visual_confirm_set(void *data, u64 val)
1229 struct amdgpu_device *adev = data;
1231 adev->dm.dc->debug.visual_confirm = (enum visual_confirm)val;
1237 * Reads the DC visual confirm debug option value into the given buffer.
1238 * Example usage: cat /sys/kernel/debug/dri/0/amdgpu_dm_visual_confirm
1240 static int visual_confirm_get(void *data, u64 *val)
1242 struct amdgpu_device *adev = data;
1244 *val = adev->dm.dc->debug.visual_confirm;
1249 DEFINE_DEBUGFS_ATTRIBUTE(visual_confirm_fops, visual_confirm_get,
1250 visual_confirm_set, "%llu\n");
1252 int dtn_debugfs_init(struct amdgpu_device *adev)
1254 static const struct file_operations dtn_log_fops = {
1255 .owner = THIS_MODULE,
1256 .read = dtn_log_read,
1257 .write = dtn_log_write,
1258 .llseek = default_llseek
1261 struct drm_minor *minor = adev->ddev->primary;
1262 struct dentry *root = minor->debugfs_root;
1265 ret = amdgpu_debugfs_add_files(adev, amdgpu_dm_debugfs_list,
1266 ARRAY_SIZE(amdgpu_dm_debugfs_list));
1270 debugfs_create_file("amdgpu_dm_dtn_log", 0644, root, adev,
1273 debugfs_create_file_unsafe("amdgpu_dm_visual_confirm", 0644, root, adev,
1274 &visual_confirm_fops);
1276 debugfs_create_file_unsafe("amdgpu_dm_dmub_tracebuffer", 0644, root,
1277 adev, &dmub_tracebuffer_fops);
1279 debugfs_create_file_unsafe("amdgpu_dm_dmub_fw_state", 0644, root,
1280 adev, &dmub_fw_state_fops);