drivers/gpu/drm/imx/imx-ldb.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * i.MX drm driver - LVDS display bridge
   4  *
   5  * Copyright (C) 2012 Sascha Hauer, Pengutronix
   6  */
   7
   8 #include <linux/clk.h>
   9 #include <linux/component.h>
  10 #include <linux/mfd/syscon.h>
  11 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
  12 #include <linux/module.h>
  13 #include <linux/of_device.h>
  14 #include <linux/of_graph.h>
  15 #include <linux/regmap.h>
  16 #include <linux/videodev2.h>
  17
  18 #include <video/of_display_timing.h>
  19 #include <video/of_videomode.h>
  20
  21 #include <drm/drm_atomic.h>
  22 #include <drm/drm_atomic_helper.h>
  23 #include <drm/drm_bridge.h>
  24 #include <drm/drm_fb_helper.h>
  25 #include <drm/drm_managed.h>
  26 #include <drm/drm_of.h>
  27 #include <drm/drm_panel.h>
  28 #include <drm/drm_print.h>
  29 #include <drm/drm_probe_helper.h>
  30 #include <drm/drm_simple_kms_helper.h>
  31
  32 #include "imx-drm.h"
  33
  34 #define DRIVER_NAME "imx-ldb"
  35
  36 #define LDB_CH0_MODE_EN_TO_DI0          (1 << 0)
  37 #define LDB_CH0_MODE_EN_TO_DI1          (3 << 0)
  38 #define LDB_CH0_MODE_EN_MASK            (3 << 0)
  39 #define LDB_CH1_MODE_EN_TO_DI0          (1 << 2)
  40 #define LDB_CH1_MODE_EN_TO_DI1          (3 << 2)
  41 #define LDB_CH1_MODE_EN_MASK            (3 << 2)
  42 #define LDB_SPLIT_MODE_EN               (1 << 4)
  43 #define LDB_DATA_WIDTH_CH0_24           (1 << 5)
  44 #define LDB_BIT_MAP_CH0_JEIDA           (1 << 6)
  45 #define LDB_DATA_WIDTH_CH1_24           (1 << 7)
  46 #define LDB_BIT_MAP_CH1_JEIDA           (1 << 8)
  47 #define LDB_DI0_VS_POL_ACT_LOW          (1 << 9)
  48 #define LDB_DI1_VS_POL_ACT_LOW          (1 << 10)
  49 #define LDB_BGREF_RMODE_INT             (1 << 15)
  50
  51 struct imx_ldb_channel;
  52
  53 struct imx_ldb_encoder {
  54         struct drm_connector connector;
  55         struct drm_encoder encoder;
  56         struct imx_ldb_channel *channel;
  57 };
  58
  59 struct imx_ldb;
  60
  61 struct imx_ldb_channel {
  62         struct imx_ldb *ldb;
  63
  64         /* Defines what is connected to the ldb, only one at a time */
  65         struct drm_panel *panel;
  66         struct drm_bridge *bridge;
  67
  68         struct device_node *child;
  69         struct i2c_adapter *ddc;
  70         int chno;
  71         void *edid;
  72         struct drm_display_mode mode;
  73         int mode_valid;
  74         u32 bus_format;
  75         u32 bus_flags;
  76 };
  77
  78 static inline struct imx_ldb_channel *con_to_imx_ldb_ch(struct drm_connector *c)
  79 {
  80         return container_of(c, struct imx_ldb_encoder, connector)->channel;
  81 }
  82
  83 static inline struct imx_ldb_channel *enc_to_imx_ldb_ch(struct drm_encoder *e)
  84 {
  85         return container_of(e, struct imx_ldb_encoder, encoder)->channel;
  86 }
  87
  88 struct bus_mux {
  89         int reg;
  90         int shift;
  91         int mask;
  92 };
  93
  94 struct imx_ldb {
  95         struct regmap *regmap;
  96         struct device *dev;
  97         struct imx_ldb_channel channel[2];
  98         struct clk *clk[2]; /* our own clock */
  99         struct clk *clk_sel[4]; /* parent of display clock */
 100         struct clk *clk_parent[4]; /* original parent of clk_sel */
 101         struct clk *clk_pll[2]; /* upstream clock we can adjust */
 102         u32 ldb_ctrl;
 103         const struct bus_mux *lvds_mux;
 104 };
 105
 106 static void imx_ldb_ch_set_bus_format(struct imx_ldb_channel *imx_ldb_ch,
 107                                       u32 bus_format)
 108 {
 109         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 110         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 111
 112         switch (bus_format) {
 113         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 114                 break;
 115         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 116                 if (imx_ldb_ch->chno == 0 || dual)
 117                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
 118                 if (imx_ldb_ch->chno == 1 || dual)
 119                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
 120                 break;
 121         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 122                 if (imx_ldb_ch->chno == 0 || dual)
 123                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
 124                                          LDB_BIT_MAP_CH0_JEIDA;
 125                 if (imx_ldb_ch->chno == 1 || dual)
 126                         ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
 127                                          LDB_BIT_MAP_CH1_JEIDA;
 128                 break;
 129         }
 130 }
 131
 132 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
 133 {
 134         struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
 135         int num_modes;
 136
 137         num_modes = drm_panel_get_modes(imx_ldb_ch->panel, connector);
 138         if (num_modes > 0)
 139                 return num_modes;
 140
 141         if (!imx_ldb_ch->edid && imx_ldb_ch->ddc)
 142                 imx_ldb_ch->edid = drm_get_edid(connector, imx_ldb_ch->ddc);
 143
 144         if (imx_ldb_ch->edid) {
 145                 drm_connector_update_edid_property(connector,
 146                                                         imx_ldb_ch->edid);
 147                 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
 148         }
 149
 150         if (imx_ldb_ch->mode_valid) {
 151                 struct drm_display_mode *mode;
 152
 153                 mode = drm_mode_create(connector->dev);
 154                 if (!mode)
 155                         return -EINVAL;
 156                 drm_mode_copy(mode, &imx_ldb_ch->mode);
 157                 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
 158                 drm_mode_probed_add(connector, mode);
 159                 num_modes++;
 160         }
 161
 162         return num_modes;
 163 }
 164
 165 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
 166                 unsigned long serial_clk, unsigned long di_clk)
 167 {
 168         int ret;
 169
 170         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 171                         clk_get_rate(ldb->clk_pll[chno]), serial_clk);
 172         clk_set_rate(ldb->clk_pll[chno], serial_clk);
 173
 174         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 175                         clk_get_rate(ldb->clk_pll[chno]));
 176
 177         dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
 178                         clk_get_rate(ldb->clk[chno]),
 179                         (long int)di_clk);
 180         clk_set_rate(ldb->clk[chno], di_clk);
 181
 182         dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
 183                         clk_get_rate(ldb->clk[chno]));
 184
 185         /* set display clock mux to LDB input clock */
 186         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
 187         if (ret)
 188                 dev_err(ldb->dev,
 189                         "unable to set di%d parent clock to ldb_di%d\n", mux,
 190                         chno);
 191 }
 192
 193 static void imx_ldb_encoder_enable(struct drm_encoder *encoder)
 194 {
 195         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 196         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 197         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 198         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 199
 200         if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) {
 201                 dev_warn(ldb->dev, "%s: invalid mux %d\n", __func__, mux);
 202                 return;
 203         }
 204
 205         drm_panel_prepare(imx_ldb_ch->panel);
 206
 207         if (dual) {
 208                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[0]);
 209                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[1]);
 210
 211                 clk_prepare_enable(ldb->clk[0]);
 212                 clk_prepare_enable(ldb->clk[1]);
 213         } else {
 214                 clk_set_parent(ldb->clk_sel[mux], ldb->clk[imx_ldb_ch->chno]);
 215         }
 216
 217         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 218                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 219                 if (mux == 0 || ldb->lvds_mux)
 220                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
 221                 else if (mux == 1)
 222                         ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
 223         }
 224         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 225                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 226                 if (mux == 1 || ldb->lvds_mux)
 227                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
 228                 else if (mux == 0)
 229                         ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
 230         }
 231
 232         if (ldb->lvds_mux) {
 233                 const struct bus_mux *lvds_mux = NULL;
 234
 235                 if (imx_ldb_ch == &ldb->channel[0])
 236                         lvds_mux = &ldb->lvds_mux[0];
 237                 else if (imx_ldb_ch == &ldb->channel[1])
 238                         lvds_mux = &ldb->lvds_mux[1];
 239
 240                 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
 241                                    mux << lvds_mux->shift);
 242         }
 243
 244         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 245
 246         drm_panel_enable(imx_ldb_ch->panel);
 247 }
 248
 249 static void
 250 imx_ldb_encoder_atomic_mode_set(struct drm_encoder *encoder,
 251                                 struct drm_crtc_state *crtc_state,
 252                                 struct drm_connector_state *connector_state)
 253 {
 254         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 255         struct drm_display_mode *mode = &crtc_state->adjusted_mode;
 256         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 257         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 258         unsigned long serial_clk;
 259         unsigned long di_clk = mode->clock * 1000;
 260         int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder);
 261         u32 bus_format = imx_ldb_ch->bus_format;
 262
 263         if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) {
 264                 dev_warn(ldb->dev, "%s: invalid mux %d\n", __func__, mux);
 265                 return;
 266         }
 267
 268         if (mode->clock > 170000) {
 269                 dev_warn(ldb->dev,
 270                          "%s: mode exceeds 170 MHz pixel clock\n", __func__);
 271         }
 272         if (mode->clock > 85000 && !dual) {
 273                 dev_warn(ldb->dev,
 274                          "%s: mode exceeds 85 MHz pixel clock\n", __func__);
 275         }
 276
 277         if (dual) {
 278                 serial_clk = 3500UL * mode->clock;
 279                 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
 280                 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
 281         } else {
 282                 serial_clk = 7000UL * mode->clock;
 283                 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
 284                                   di_clk);
 285         }
 286
 287         /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
 288         if (imx_ldb_ch == &ldb->channel[0] || dual) {
 289                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 290                         ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
 291                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 292                         ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
 293         }
 294         if (imx_ldb_ch == &ldb->channel[1] || dual) {
 295                 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 296                         ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
 297                 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 298                         ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
 299         }
 300
 301         if (!bus_format) {
 302                 struct drm_connector *connector = connector_state->connector;
 303                 struct drm_display_info *di = &connector->display_info;
 304
 305                 if (di->num_bus_formats)
 306                         bus_format = di->bus_formats[0];
 307         }
 308         imx_ldb_ch_set_bus_format(imx_ldb_ch, bus_format);
 309 }
 310
 311 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
 312 {
 313         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 314         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 315         int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
 316         int mux, ret;
 317
 318         drm_panel_disable(imx_ldb_ch->panel);
 319
 320         if (imx_ldb_ch == &ldb->channel[0] || dual)
 321                 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
 322         if (imx_ldb_ch == &ldb->channel[1] || dual)
 323                 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
 324
 325         regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
 326
 327         if (dual) {
 328                 clk_disable_unprepare(ldb->clk[0]);
 329                 clk_disable_unprepare(ldb->clk[1]);
 330         }
 331
 332         if (ldb->lvds_mux) {
 333                 const struct bus_mux *lvds_mux = NULL;
 334
 335                 if (imx_ldb_ch == &ldb->channel[0])
 336                         lvds_mux = &ldb->lvds_mux[0];
 337                 else if (imx_ldb_ch == &ldb->channel[1])
 338                         lvds_mux = &ldb->lvds_mux[1];
 339
 340                 regmap_read(ldb->regmap, lvds_mux->reg, &mux);
 341                 mux &= lvds_mux->mask;
 342                 mux >>= lvds_mux->shift;
 343         } else {
 344                 mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;
 345         }
 346
 347         /* set display clock mux back to original input clock */
 348         ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
 349         if (ret)
 350                 dev_err(ldb->dev,
 351                         "unable to set di%d parent clock to original parent\n",
 352                         mux);
 353
 354         drm_panel_unprepare(imx_ldb_ch->panel);
 355 }
 356
 357 static int imx_ldb_encoder_atomic_check(struct drm_encoder *encoder,
 358                                         struct drm_crtc_state *crtc_state,
 359                                         struct drm_connector_state *conn_state)
 360 {
 361         struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state);
 362         struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
 363         struct drm_display_info *di = &conn_state->connector->display_info;
 364         u32 bus_format = imx_ldb_ch->bus_format;
 365
 366         /* Bus format description in DT overrides connector display info. */
 367         if (!bus_format && di->num_bus_formats) {
 368                 bus_format = di->bus_formats[0];
 369                 imx_crtc_state->bus_flags = di->bus_flags;
 370         } else {
 371                 bus_format = imx_ldb_ch->bus_format;
 372                 imx_crtc_state->bus_flags = imx_ldb_ch->bus_flags;
 373         }
 374         switch (bus_format) {
 375         case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
 376                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB666_1X18;
 377                 break;
 378         case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
 379         case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
 380                 imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
 381                 break;
 382         default:
 383                 return -EINVAL;
 384         }
 385
 386         imx_crtc_state->di_hsync_pin = 2;
 387         imx_crtc_state->di_vsync_pin = 3;
 388
 389         return 0;
 390 }
 391
 392
 393 static const struct drm_connector_funcs imx_ldb_connector_funcs = {
 394         .fill_modes = drm_helper_probe_single_connector_modes,
 395         .destroy = imx_drm_connector_destroy,
 396         .reset = drm_atomic_helper_connector_reset,
 397         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 398         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 399 };
 400
 401 static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
 402         .get_modes = imx_ldb_connector_get_modes,
 403 };
 404
 405 static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
 406         .atomic_mode_set = imx_ldb_encoder_atomic_mode_set,
 407         .enable = imx_ldb_encoder_enable,
 408         .disable = imx_ldb_encoder_disable,
 409         .atomic_check = imx_ldb_encoder_atomic_check,
 410 };
 411
 412 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
 413 {
 414         char clkname[16];
 415
 416         snprintf(clkname, sizeof(clkname), "di%d", chno);
 417         ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
 418         if (IS_ERR(ldb->clk[chno]))
 419                 return PTR_ERR(ldb->clk[chno]);
 420
 421         snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
 422         ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
 423
 424         return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
 425 }
 426
 427 static int imx_ldb_register(struct drm_device *drm,
 428         struct imx_ldb_channel *imx_ldb_ch)
 429 {
 430         struct imx_ldb *ldb = imx_ldb_ch->ldb;
 431         struct imx_ldb_encoder *ldb_encoder;
 432         struct drm_connector *connector;
 433         struct drm_encoder *encoder;
 434         int ret;
 435
 436         ldb_encoder = drmm_simple_encoder_alloc(drm, struct imx_ldb_encoder,
 437                                                 encoder, DRM_MODE_ENCODER_LVDS);
 438         if (IS_ERR(ldb_encoder))
 439                 return PTR_ERR(ldb_encoder);
 440
 441         ldb_encoder->channel = imx_ldb_ch;
 442         connector = &ldb_encoder->connector;
 443         encoder = &ldb_encoder->encoder;
 444
 445         ret = imx_drm_encoder_parse_of(drm, encoder, imx_ldb_ch->child);
 446         if (ret)
 447                 return ret;
 448
 449         ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
 450         if (ret)
 451                 return ret;
 452
 453         if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
 454                 ret = imx_ldb_get_clk(ldb, 1);
 455                 if (ret)
 456                         return ret;
 457         }
 458
 459         drm_encoder_helper_add(encoder, &imx_ldb_encoder_helper_funcs);
 460
 461         if (imx_ldb_ch->bridge) {
 462                 ret = drm_bridge_attach(encoder, imx_ldb_ch->bridge, NULL, 0);
 463                 if (ret) {
 464                         DRM_ERROR("Failed to initialize bridge with drm\n");
 465                         return ret;
 466                 }
 467         } else {
 468                 /*
 469                  * We want to add the connector whenever there is no bridge
 470                  * that brings its own, not only when there is a panel. For
 471                  * historical reasons, the ldb driver can also work without
 472                  * a panel.
 473                  */
 474                 drm_connector_helper_add(connector,
 475                                          &imx_ldb_connector_helper_funcs);
 476                 drm_connector_init_with_ddc(drm, connector,
 477                                             &imx_ldb_connector_funcs,
 478                                             DRM_MODE_CONNECTOR_LVDS,
 479                                             imx_ldb_ch->ddc);
 480                 drm_connector_attach_encoder(connector, encoder);
 481         }
 482
 483         return 0;
 484 }
 485
 486 struct imx_ldb_bit_mapping {
 487         u32 bus_format;
 488         u32 datawidth;
 489         const char * const mapping;
 490 };
 491
 492 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings[] = {
 493         { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,  18, "spwg" },
 494         { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,  24, "spwg" },
 495         { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, "jeida" },
 496 };
 497
 498 static u32 of_get_bus_format(struct device *dev, struct device_node *np)
 499 {
 500         const char *bm;
 501         u32 datawidth = 0;
 502         int ret, i;
 503
 504         ret = of_property_read_string(np, "fsl,data-mapping", &bm);
 505         if (ret < 0)
 506                 return ret;
 507
 508         of_property_read_u32(np, "fsl,data-width", &datawidth);
 509
 510         for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++) {
 511                 if (!strcasecmp(bm, imx_ldb_bit_mappings[i].mapping) &&
 512                     datawidth == imx_ldb_bit_mappings[i].datawidth)
 513                         return imx_ldb_bit_mappings[i].bus_format;
 514         }
 515
 516         dev_err(dev, "invalid data mapping: %d-bit \"%s\"\n", datawidth, bm);
 517
 518         return -ENOENT;
 519 }
 520
 521 static struct bus_mux imx6q_lvds_mux[2] = {
 522         {
 523                 .reg = IOMUXC_GPR3,
 524                 .shift = 6,
 525                 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
 526         }, {
 527                 .reg = IOMUXC_GPR3,
 528                 .shift = 8,
 529                 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
 530         }
 531 };
 532
 533 /*
 534  * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
 535  * of_match_device will walk through this list and take the first entry
 536  * matching any of its compatible values. Therefore, the more generic
 537  * entries (in this case fsl,imx53-ldb) need to be ordered last.
 538  */
 539 static const struct of_device_id imx_ldb_dt_ids[] = {
 540         { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
 541         { .compatible = "fsl,imx53-ldb", .data = NULL, },
 542         { }
 543 };
 544 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
 545
 546 static int imx_ldb_panel_ddc(struct device *dev,
 547                 struct imx_ldb_channel *channel, struct device_node *child)
 548 {
 549         struct device_node *ddc_node;
 550         const u8 *edidp;
 551         int ret;
 552
 553         ddc_node = of_parse_phandle(child, "ddc-i2c-bus", 0);
 554         if (ddc_node) {
 555                 channel->ddc = of_find_i2c_adapter_by_node(ddc_node);
 556                 of_node_put(ddc_node);
 557                 if (!channel->ddc) {
 558                         dev_warn(dev, "failed to get ddc i2c adapter\n");
 559                         return -EPROBE_DEFER;
 560                 }
 561         }
 562
 563         if (!channel->ddc) {
 564                 int edid_len;
 565
 566                 /* if no DDC available, fallback to hardcoded EDID */
 567                 dev_dbg(dev, "no ddc available\n");
 568
 569                 edidp = of_get_property(child, "edid", &edid_len);
 570                 if (edidp) {
 571                         channel->edid = kmemdup(edidp, edid_len, GFP_KERNEL);
 572                 } else if (!channel->panel) {
 573                         /* fallback to display-timings node */
 574                         ret = of_get_drm_display_mode(child,
 575                                                       &channel->mode,
 576                                                       &channel->bus_flags,
 577                                                       OF_USE_NATIVE_MODE);
 578                         if (!ret)
 579                                 channel->mode_valid = 1;
 580                 }
 581         }
 582         return 0;
 583 }
 584
 585 static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
 586 {
 587         struct drm_device *drm = data;
 588         struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
 589         int ret;
 590         int i;
 591
 592         for (i = 0; i < 2; i++) {
 593                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 594
 595                 if (!channel->ldb)
 596                         continue;
 597
 598                 ret = imx_ldb_register(drm, channel);
 599                 if (ret)
 600                         return ret;
 601         }
 602
 603         return 0;
 604 }
 605
 606 static const struct component_ops imx_ldb_ops = {
 607         .bind   = imx_ldb_bind,
 608 };
 609
 610 static int imx_ldb_probe(struct platform_device *pdev)
 611 {
 612         struct device *dev = &pdev->dev;
 613         struct device_node *np = dev->of_node;
 614         const struct of_device_id *of_id = of_match_device(imx_ldb_dt_ids, dev);
 615         struct device_node *child;
 616         struct imx_ldb *imx_ldb;
 617         int dual;
 618         int ret;
 619         int i;
 620
 621         imx_ldb = devm_kzalloc(dev, sizeof(*imx_ldb), GFP_KERNEL);
 622         if (!imx_ldb)
 623                 return -ENOMEM;
 624
 625         imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
 626         if (IS_ERR(imx_ldb->regmap)) {
 627                 dev_err(dev, "failed to get parent regmap\n");
 628                 return PTR_ERR(imx_ldb->regmap);
 629         }
 630
 631         /* disable LDB by resetting the control register to POR default */
 632         regmap_write(imx_ldb->regmap, IOMUXC_GPR2, 0);
 633
 634         imx_ldb->dev = dev;
 635
 636         if (of_id)
 637                 imx_ldb->lvds_mux = of_id->data;
 638
 639         dual = of_property_read_bool(np, "fsl,dual-channel");
 640         if (dual)
 641                 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
 642
 643         /*
 644          * There are three different possible clock mux configurations:
 645          * i.MX53:  ipu1_di0_sel, ipu1_di1_sel
 646          * i.MX6q:  ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
 647          * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
 648          * Map them all to di0_sel...di3_sel.
 649          */
 650         for (i = 0; i < 4; i++) {
 651                 char clkname[16];
 652
 653                 sprintf(clkname, "di%d_sel", i);
 654                 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
 655                 if (IS_ERR(imx_ldb->clk_sel[i])) {
 656                         ret = PTR_ERR(imx_ldb->clk_sel[i]);
 657                         imx_ldb->clk_sel[i] = NULL;
 658                         break;
 659                 }
 660
 661                 imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]);
 662         }
 663         if (i == 0)
 664                 return ret;
 665
 666         for_each_child_of_node(np, child) {
 667                 struct imx_ldb_channel *channel;
 668                 int bus_format;
 669
 670                 ret = of_property_read_u32(child, "reg", &i);
 671                 if (ret || i < 0 || i > 1) {
 672                         ret = -EINVAL;
 673                         goto free_child;
 674                 }
 675
 676                 if (!of_device_is_available(child))
 677                         continue;
 678
 679                 if (dual && i > 0) {
 680                         dev_warn(dev, "dual-channel mode, ignoring second output\n");
 681                         continue;
 682                 }
 683
 684                 channel = &imx_ldb->channel[i];
 685                 channel->ldb = imx_ldb;
 686                 channel->chno = i;
 687
 688                 /*
 689                  * The output port is port@4 with an external 4-port mux or
 690                  * port@2 with the internal 2-port mux.
 691                  */
 692                 ret = drm_of_find_panel_or_bridge(child,
 693                                                   imx_ldb->lvds_mux ? 4 : 2, 0,
 694                                                   &channel->panel, &channel->bridge);
 695                 if (ret && ret != -ENODEV)
 696                         goto free_child;
 697
 698                 /* panel ddc only if there is no bridge */
 699                 if (!channel->bridge) {
 700                         ret = imx_ldb_panel_ddc(dev, channel, child);
 701                         if (ret)
 702                                 goto free_child;
 703                 }
 704
 705                 bus_format = of_get_bus_format(dev, child);
 706                 if (bus_format == -EINVAL) {
 707                         /*
 708                          * If no bus format was specified in the device tree,
 709                          * we can still get it from the connected panel later.
 710                          */
 711                         if (channel->panel && channel->panel->funcs &&
 712                             channel->panel->funcs->get_modes)
 713                                 bus_format = 0;
 714                 }
 715                 if (bus_format < 0) {
 716                         dev_err(dev, "could not determine data mapping: %d\n",
 717                                 bus_format);
 718                         ret = bus_format;
 719                         goto free_child;
 720                 }
 721                 channel->bus_format = bus_format;
 722                 channel->child = child;
 723         }
 724
 725         platform_set_drvdata(pdev, imx_ldb);
 726
 727         return component_add(&pdev->dev, &imx_ldb_ops);
 728
 729 free_child:
 730         of_node_put(child);
 731         return ret;
 732 }
 733
 734 static int imx_ldb_remove(struct platform_device *pdev)
 735 {
 736         struct imx_ldb *imx_ldb = platform_get_drvdata(pdev);
 737         int i;
 738
 739         for (i = 0; i < 2; i++) {
 740                 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
 741
 742                 kfree(channel->edid);
 743                 i2c_put_adapter(channel->ddc);
 744         }
 745
 746         component_del(&pdev->dev, &imx_ldb_ops);
 747         return 0;
 748 }
 749
 750 static struct platform_driver imx_ldb_driver = {
 751         .probe          = imx_ldb_probe,
 752         .remove         = imx_ldb_remove,
 753         .driver         = {
 754                 .of_match_table = imx_ldb_dt_ids,
 755                 .name   = DRIVER_NAME,
 756         },
 757 };
 758
 759 module_platform_driver(imx_ldb_driver);
 760
 761 MODULE_DESCRIPTION("i.MX LVDS driver");
 762 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
 763 MODULE_LICENSE("GPL");
 764 MODULE_ALIAS("platform:" DRIVER_NAME);