1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 Cadence Design Systems Inc.
8 #include <linux/atomic.h>
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/export.h>
13 #include <linux/kernel.h>
14 #include <linux/list.h>
16 #include <linux/slab.h>
17 #include <linux/spinlock.h>
18 #include <linux/workqueue.h>
20 #include "internals.h"
22 static DEFINE_IDR(i3c_bus_idr);
23 static DEFINE_MUTEX(i3c_core_lock);
24 static int __i3c_first_dynamic_bus_num;
25 static BLOCKING_NOTIFIER_HEAD(i3c_bus_notifier);
28 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
29 * @bus: I3C bus to take the lock on
31 * This function takes the bus lock so that no other operations can occur on
32 * the bus. This is needed for all kind of bus maintenance operation, like
33 * - enabling/disabling slave events
35 * - changing the dynamic address of a device
36 * - relinquishing mastership
39 * The reason for this kind of locking is that we don't want drivers and core
40 * logic to rely on I3C device information that could be changed behind their
43 static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
45 down_write(&bus->lock);
49 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
51 * @bus: I3C bus to release the lock on
53 * Should be called when the bus maintenance operation is done. See
54 * i3c_bus_maintenance_lock() for more details on what these maintenance
57 static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
63 * i3c_bus_normaluse_lock - Lock the bus for a normal operation
64 * @bus: I3C bus to take the lock on
66 * This function takes the bus lock for any operation that is not a maintenance
67 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
68 * maintenance operations). Basically all communications with I3C devices are
69 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
70 * state or I3C dynamic address).
72 * Note that this lock is not guaranteeing serialization of normal operations.
73 * In other words, transfer requests passed to the I3C master can be submitted
74 * in parallel and I3C master drivers have to use their own locking to make
75 * sure two different communications are not inter-mixed, or access to the
76 * output/input queue is not done while the engine is busy.
78 void i3c_bus_normaluse_lock(struct i3c_bus *bus)
80 down_read(&bus->lock);
84 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
85 * @bus: I3C bus to release the lock on
87 * Should be called when a normal operation is done. See
88 * i3c_bus_normaluse_lock() for more details on what these normal operations
91 void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
96 static struct i3c_master_controller *
97 i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
99 return container_of(i3cbus, struct i3c_master_controller, bus);
102 static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
104 return container_of(dev, struct i3c_master_controller, dev);
107 static const struct device_type i3c_device_type;
109 static struct i3c_bus *dev_to_i3cbus(struct device *dev)
111 struct i3c_master_controller *master;
113 if (dev->type == &i3c_device_type)
114 return dev_to_i3cdev(dev)->bus;
116 master = dev_to_i3cmaster(dev);
121 static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
123 struct i3c_master_controller *master;
125 if (dev->type == &i3c_device_type)
126 return dev_to_i3cdev(dev)->desc;
128 master = dev_to_i3cmaster(dev);
133 static ssize_t bcr_show(struct device *dev,
134 struct device_attribute *da,
137 struct i3c_bus *bus = dev_to_i3cbus(dev);
138 struct i3c_dev_desc *desc;
141 i3c_bus_normaluse_lock(bus);
142 desc = dev_to_i3cdesc(dev);
143 ret = sprintf(buf, "%x\n", desc->info.bcr);
144 i3c_bus_normaluse_unlock(bus);
148 static DEVICE_ATTR_RO(bcr);
150 static ssize_t dcr_show(struct device *dev,
151 struct device_attribute *da,
154 struct i3c_bus *bus = dev_to_i3cbus(dev);
155 struct i3c_dev_desc *desc;
158 i3c_bus_normaluse_lock(bus);
159 desc = dev_to_i3cdesc(dev);
160 ret = sprintf(buf, "%x\n", desc->info.dcr);
161 i3c_bus_normaluse_unlock(bus);
165 static DEVICE_ATTR_RO(dcr);
167 static ssize_t pid_show(struct device *dev,
168 struct device_attribute *da,
171 struct i3c_bus *bus = dev_to_i3cbus(dev);
172 struct i3c_dev_desc *desc;
175 i3c_bus_normaluse_lock(bus);
176 desc = dev_to_i3cdesc(dev);
177 ret = sprintf(buf, "%llx\n", desc->info.pid);
178 i3c_bus_normaluse_unlock(bus);
182 static DEVICE_ATTR_RO(pid);
184 static ssize_t dynamic_address_show(struct device *dev,
185 struct device_attribute *da,
188 struct i3c_bus *bus = dev_to_i3cbus(dev);
189 struct i3c_dev_desc *desc;
192 i3c_bus_normaluse_lock(bus);
193 desc = dev_to_i3cdesc(dev);
194 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
195 i3c_bus_normaluse_unlock(bus);
199 static DEVICE_ATTR_RO(dynamic_address);
201 static const char * const hdrcap_strings[] = {
202 "hdr-ddr", "hdr-tsp", "hdr-tsl",
205 static ssize_t hdrcap_show(struct device *dev,
206 struct device_attribute *da,
209 struct i3c_bus *bus = dev_to_i3cbus(dev);
210 struct i3c_dev_desc *desc;
211 ssize_t offset = 0, ret;
215 i3c_bus_normaluse_lock(bus);
216 desc = dev_to_i3cdesc(dev);
217 caps = desc->info.hdr_cap;
218 for_each_set_bit(mode, &caps, 8) {
219 if (mode >= ARRAY_SIZE(hdrcap_strings))
222 if (!hdrcap_strings[mode])
225 ret = sprintf(buf + offset, offset ? " %s" : "%s",
226 hdrcap_strings[mode]);
233 ret = sprintf(buf + offset, "\n");
240 i3c_bus_normaluse_unlock(bus);
244 static DEVICE_ATTR_RO(hdrcap);
246 static ssize_t modalias_show(struct device *dev,
247 struct device_attribute *da, char *buf)
249 struct i3c_device *i3c = dev_to_i3cdev(dev);
250 struct i3c_device_info devinfo;
251 u16 manuf, part, ext;
253 i3c_device_get_info(i3c, &devinfo);
254 manuf = I3C_PID_MANUF_ID(devinfo.pid);
255 part = I3C_PID_PART_ID(devinfo.pid);
256 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
258 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
259 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
262 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
263 devinfo.dcr, manuf, part, ext);
265 static DEVICE_ATTR_RO(modalias);
267 static struct attribute *i3c_device_attrs[] = {
271 &dev_attr_dynamic_address.attr,
272 &dev_attr_hdrcap.attr,
273 &dev_attr_modalias.attr,
276 ATTRIBUTE_GROUPS(i3c_device);
278 static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env)
280 const struct i3c_device *i3cdev = dev_to_i3cdev(dev);
281 struct i3c_device_info devinfo;
282 u16 manuf, part, ext;
284 i3c_device_get_info(i3cdev, &devinfo);
285 manuf = I3C_PID_MANUF_ID(devinfo.pid);
286 part = I3C_PID_PART_ID(devinfo.pid);
287 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
289 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
290 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
293 return add_uevent_var(env,
294 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
295 devinfo.dcr, manuf, part, ext);
298 static const struct device_type i3c_device_type = {
299 .groups = i3c_device_groups,
300 .uevent = i3c_device_uevent,
303 static int i3c_device_match(struct device *dev, struct device_driver *drv)
305 struct i3c_device *i3cdev;
306 struct i3c_driver *i3cdrv;
308 if (dev->type != &i3c_device_type)
311 i3cdev = dev_to_i3cdev(dev);
312 i3cdrv = drv_to_i3cdrv(drv);
313 if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
319 static int i3c_device_probe(struct device *dev)
321 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
322 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
324 return driver->probe(i3cdev);
327 static void i3c_device_remove(struct device *dev)
329 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
330 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
333 driver->remove(i3cdev);
335 i3c_device_free_ibi(i3cdev);
338 const struct bus_type i3c_bus_type = {
340 .match = i3c_device_match,
341 .probe = i3c_device_probe,
342 .remove = i3c_device_remove,
345 static enum i3c_addr_slot_status
346 i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
348 unsigned long status;
349 int bitpos = addr * 2;
351 if (addr > I2C_MAX_ADDR)
352 return I3C_ADDR_SLOT_RSVD;
354 status = bus->addrslots[bitpos / BITS_PER_LONG];
355 status >>= bitpos % BITS_PER_LONG;
357 return status & I3C_ADDR_SLOT_STATUS_MASK;
360 static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
361 enum i3c_addr_slot_status status)
363 int bitpos = addr * 2;
366 if (addr > I2C_MAX_ADDR)
369 ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
370 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
371 (bitpos % BITS_PER_LONG));
372 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
375 static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
377 enum i3c_addr_slot_status status;
379 status = i3c_bus_get_addr_slot_status(bus, addr);
381 return status == I3C_ADDR_SLOT_FREE;
384 static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
386 enum i3c_addr_slot_status status;
389 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
390 status = i3c_bus_get_addr_slot_status(bus, addr);
391 if (status == I3C_ADDR_SLOT_FREE)
398 static void i3c_bus_init_addrslots(struct i3c_bus *bus)
402 /* Addresses 0 to 7 are reserved. */
403 for (i = 0; i < 8; i++)
404 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
407 * Reserve broadcast address and all addresses that might collide
408 * with the broadcast address when facing a single bit error.
410 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
412 for (i = 0; i < 7; i++)
413 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
417 static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
419 mutex_lock(&i3c_core_lock);
420 idr_remove(&i3c_bus_idr, i3cbus->id);
421 mutex_unlock(&i3c_core_lock);
424 static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np)
426 int ret, start, end, id = -1;
428 init_rwsem(&i3cbus->lock);
429 INIT_LIST_HEAD(&i3cbus->devs.i2c);
430 INIT_LIST_HEAD(&i3cbus->devs.i3c);
431 i3c_bus_init_addrslots(i3cbus);
432 i3cbus->mode = I3C_BUS_MODE_PURE;
435 id = of_alias_get_id(np, "i3c");
437 mutex_lock(&i3c_core_lock);
442 start = __i3c_first_dynamic_bus_num;
446 ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL);
447 mutex_unlock(&i3c_core_lock);
457 void i3c_for_each_bus_locked(int (*fn)(struct i3c_bus *bus, void *data),
463 mutex_lock(&i3c_core_lock);
464 idr_for_each_entry(&i3c_bus_idr, bus, id)
466 mutex_unlock(&i3c_core_lock);
468 EXPORT_SYMBOL_GPL(i3c_for_each_bus_locked);
470 int i3c_register_notifier(struct notifier_block *nb)
472 return blocking_notifier_chain_register(&i3c_bus_notifier, nb);
474 EXPORT_SYMBOL_GPL(i3c_register_notifier);
476 int i3c_unregister_notifier(struct notifier_block *nb)
478 return blocking_notifier_chain_unregister(&i3c_bus_notifier, nb);
480 EXPORT_SYMBOL_GPL(i3c_unregister_notifier);
482 static void i3c_bus_notify(struct i3c_bus *bus, unsigned int action)
484 blocking_notifier_call_chain(&i3c_bus_notifier, action, bus);
487 static const char * const i3c_bus_mode_strings[] = {
488 [I3C_BUS_MODE_PURE] = "pure",
489 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
490 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
491 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
494 static ssize_t mode_show(struct device *dev,
495 struct device_attribute *da,
498 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
501 i3c_bus_normaluse_lock(i3cbus);
502 if (i3cbus->mode < 0 ||
503 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
504 !i3c_bus_mode_strings[i3cbus->mode])
505 ret = sprintf(buf, "unknown\n");
507 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
508 i3c_bus_normaluse_unlock(i3cbus);
512 static DEVICE_ATTR_RO(mode);
514 static ssize_t current_master_show(struct device *dev,
515 struct device_attribute *da,
518 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
521 i3c_bus_normaluse_lock(i3cbus);
522 ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
523 i3cbus->cur_master->info.pid);
524 i3c_bus_normaluse_unlock(i3cbus);
528 static DEVICE_ATTR_RO(current_master);
530 static ssize_t i3c_scl_frequency_show(struct device *dev,
531 struct device_attribute *da,
534 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
537 i3c_bus_normaluse_lock(i3cbus);
538 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
539 i3c_bus_normaluse_unlock(i3cbus);
543 static DEVICE_ATTR_RO(i3c_scl_frequency);
545 static ssize_t i2c_scl_frequency_show(struct device *dev,
546 struct device_attribute *da,
549 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
552 i3c_bus_normaluse_lock(i3cbus);
553 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
554 i3c_bus_normaluse_unlock(i3cbus);
558 static DEVICE_ATTR_RO(i2c_scl_frequency);
560 static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable)
564 if (!master || !master->ops)
567 if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin)
570 i3c_bus_normaluse_lock(&master->bus);
573 ret = master->ops->enable_hotjoin(master);
575 ret = master->ops->disable_hotjoin(master);
577 master->hotjoin = enable;
579 i3c_bus_normaluse_unlock(&master->bus);
584 static ssize_t hotjoin_store(struct device *dev, struct device_attribute *attr,
585 const char *buf, size_t count)
587 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
591 if (!i3cbus->cur_master)
594 if (kstrtobool(buf, &res))
597 ret = i3c_set_hotjoin(i3cbus->cur_master->common.master, res);
605 * i3c_master_enable_hotjoin - Enable hotjoin
606 * @master: I3C master object
608 * Return: a 0 in case of success, an negative error code otherwise.
610 int i3c_master_enable_hotjoin(struct i3c_master_controller *master)
612 return i3c_set_hotjoin(master, true);
614 EXPORT_SYMBOL_GPL(i3c_master_enable_hotjoin);
617 * i3c_master_disable_hotjoin - Disable hotjoin
618 * @master: I3C master object
620 * Return: a 0 in case of success, an negative error code otherwise.
622 int i3c_master_disable_hotjoin(struct i3c_master_controller *master)
624 return i3c_set_hotjoin(master, false);
626 EXPORT_SYMBOL_GPL(i3c_master_disable_hotjoin);
628 static ssize_t hotjoin_show(struct device *dev, struct device_attribute *da, char *buf)
630 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
633 i3c_bus_normaluse_lock(i3cbus);
634 ret = sysfs_emit(buf, "%d\n", i3cbus->cur_master->common.master->hotjoin);
635 i3c_bus_normaluse_unlock(i3cbus);
640 static DEVICE_ATTR_RW(hotjoin);
642 static struct attribute *i3c_masterdev_attrs[] = {
644 &dev_attr_current_master.attr,
645 &dev_attr_i3c_scl_frequency.attr,
646 &dev_attr_i2c_scl_frequency.attr,
650 &dev_attr_dynamic_address.attr,
651 &dev_attr_hdrcap.attr,
652 &dev_attr_hotjoin.attr,
655 ATTRIBUTE_GROUPS(i3c_masterdev);
657 static void i3c_masterdev_release(struct device *dev)
659 struct i3c_master_controller *master = dev_to_i3cmaster(dev);
660 struct i3c_bus *bus = dev_to_i3cbus(dev);
663 destroy_workqueue(master->wq);
665 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
666 i3c_bus_cleanup(bus);
668 of_node_put(dev->of_node);
671 static const struct device_type i3c_masterdev_type = {
672 .groups = i3c_masterdev_groups,
675 static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
676 unsigned long max_i2c_scl_rate)
678 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
682 switch (i3cbus->mode) {
683 case I3C_BUS_MODE_PURE:
684 if (!i3cbus->scl_rate.i3c)
685 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
687 case I3C_BUS_MODE_MIXED_FAST:
688 case I3C_BUS_MODE_MIXED_LIMITED:
689 if (!i3cbus->scl_rate.i3c)
690 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
691 if (!i3cbus->scl_rate.i2c)
692 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
694 case I3C_BUS_MODE_MIXED_SLOW:
695 if (!i3cbus->scl_rate.i2c)
696 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
697 if (!i3cbus->scl_rate.i3c ||
698 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
699 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
705 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
706 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
709 * I3C/I2C frequency may have been overridden, check that user-provided
710 * values are not exceeding max possible frequency.
712 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
713 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
719 static struct i3c_master_controller *
720 i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
722 return container_of(adap, struct i3c_master_controller, i2c);
725 static struct i2c_adapter *
726 i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
731 static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
736 static struct i2c_dev_desc *
737 i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
740 struct i2c_dev_desc *dev;
742 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
744 return ERR_PTR(-ENOMEM);
746 dev->common.master = master;
753 static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
757 dest->payload.len = payloadlen;
759 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
761 dest->payload.data = NULL;
763 return dest->payload.data;
766 static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
768 kfree(dest->payload.data);
771 static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
772 struct i3c_ccc_cmd_dest *dests,
775 cmd->rnw = rnw ? 1 : 0;
778 cmd->ndests = ndests;
779 cmd->err = I3C_ERROR_UNKNOWN;
782 static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
783 struct i3c_ccc_cmd *cmd)
790 if (WARN_ON(master->init_done &&
791 !rwsem_is_locked(&master->bus.lock)))
794 if (!master->ops->send_ccc_cmd)
797 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
800 if (master->ops->supports_ccc_cmd &&
801 !master->ops->supports_ccc_cmd(master, cmd))
804 ret = master->ops->send_ccc_cmd(master, cmd);
806 if (cmd->err != I3C_ERROR_UNKNOWN)
815 static struct i2c_dev_desc *
816 i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
819 struct i2c_dev_desc *dev;
821 i3c_bus_for_each_i2cdev(&master->bus, dev) {
822 if (dev->addr == addr)
830 * i3c_master_get_free_addr() - get a free address on the bus
831 * @master: I3C master object
832 * @start_addr: where to start searching
834 * This function must be called with the bus lock held in write mode.
836 * Return: the first free address starting at @start_addr (included) or -ENOMEM
837 * if there's no more address available.
839 int i3c_master_get_free_addr(struct i3c_master_controller *master,
842 return i3c_bus_get_free_addr(&master->bus, start_addr);
844 EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
846 static void i3c_device_release(struct device *dev)
848 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
850 WARN_ON(i3cdev->desc);
852 of_node_put(i3cdev->dev.of_node);
856 static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
861 static struct i3c_dev_desc *
862 i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
863 const struct i3c_device_info *info)
865 struct i3c_dev_desc *dev;
867 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
869 return ERR_PTR(-ENOMEM);
871 dev->common.master = master;
873 mutex_init(&dev->ibi_lock);
878 static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
881 enum i3c_addr_slot_status addrstat;
882 struct i3c_ccc_cmd_dest dest;
883 struct i3c_ccc_cmd cmd;
889 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
890 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
893 i3c_ccc_cmd_dest_init(&dest, addr, 0);
894 i3c_ccc_cmd_init(&cmd, false,
895 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
897 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
898 i3c_ccc_cmd_dest_cleanup(&dest);
904 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
906 * @master: master used to send frames on the bus
908 * Send a ENTDAA CCC command to start a DAA procedure.
910 * Note that this function only sends the ENTDAA CCC command, all the logic
911 * behind dynamic address assignment has to be handled in the I3C master
914 * This function must be called with the bus lock held in write mode.
916 * Return: 0 in case of success, a positive I3C error code if the error is
917 * one of the official Mx error codes, and a negative error code otherwise.
919 int i3c_master_entdaa_locked(struct i3c_master_controller *master)
921 struct i3c_ccc_cmd_dest dest;
922 struct i3c_ccc_cmd cmd;
925 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
926 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
927 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
928 i3c_ccc_cmd_dest_cleanup(&dest);
932 EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
934 static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
935 u8 addr, bool enable, u8 evts)
937 struct i3c_ccc_events *events;
938 struct i3c_ccc_cmd_dest dest;
939 struct i3c_ccc_cmd cmd;
942 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
946 events->events = evts;
947 i3c_ccc_cmd_init(&cmd, false,
949 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
950 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
952 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
953 i3c_ccc_cmd_dest_cleanup(&dest);
959 * i3c_master_disec_locked() - send a DISEC CCC command
960 * @master: master used to send frames on the bus
961 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
962 * @evts: events to disable
964 * Send a DISEC CCC command to disable some or all events coming from a
965 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
967 * This function must be called with the bus lock held in write mode.
969 * Return: 0 in case of success, a positive I3C error code if the error is
970 * one of the official Mx error codes, and a negative error code otherwise.
972 int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
975 return i3c_master_enec_disec_locked(master, addr, false, evts);
977 EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
980 * i3c_master_enec_locked() - send an ENEC CCC command
981 * @master: master used to send frames on the bus
982 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
983 * @evts: events to disable
985 * Sends an ENEC CCC command to enable some or all events coming from a
986 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
988 * This function must be called with the bus lock held in write mode.
990 * Return: 0 in case of success, a positive I3C error code if the error is
991 * one of the official Mx error codes, and a negative error code otherwise.
993 int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
996 return i3c_master_enec_disec_locked(master, addr, true, evts);
998 EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
1001 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
1002 * @master: master used to send frames on the bus
1004 * Send a DEFSLVS CCC command containing all the devices known to the @master.
1005 * This is useful when you have secondary masters on the bus to propagate
1006 * device information.
1008 * This should be called after all I3C devices have been discovered (in other
1009 * words, after the DAA procedure has finished) and instantiated in
1010 * &i3c_master_controller_ops->bus_init().
1011 * It should also be called if a master ACKed an Hot-Join request and assigned
1012 * a dynamic address to the device joining the bus.
1014 * This function must be called with the bus lock held in write mode.
1016 * Return: 0 in case of success, a positive I3C error code if the error is
1017 * one of the official Mx error codes, and a negative error code otherwise.
1019 int i3c_master_defslvs_locked(struct i3c_master_controller *master)
1021 struct i3c_ccc_defslvs *defslvs;
1022 struct i3c_ccc_dev_desc *desc;
1023 struct i3c_ccc_cmd_dest dest;
1024 struct i3c_dev_desc *i3cdev;
1025 struct i2c_dev_desc *i2cdev;
1026 struct i3c_ccc_cmd cmd;
1027 struct i3c_bus *bus;
1034 bus = i3c_master_get_bus(master);
1035 i3c_bus_for_each_i3cdev(bus, i3cdev) {
1038 if (i3cdev == master->this)
1041 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
1046 /* No other master on the bus, skip DEFSLVS. */
1050 i3c_bus_for_each_i2cdev(bus, i2cdev)
1053 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
1054 struct_size(defslvs, slaves,
1059 defslvs->count = ndevs;
1060 defslvs->master.bcr = master->this->info.bcr;
1061 defslvs->master.dcr = master->this->info.dcr;
1062 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
1063 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
1065 desc = defslvs->slaves;
1066 i3c_bus_for_each_i2cdev(bus, i2cdev) {
1067 desc->lvr = i2cdev->lvr;
1068 desc->static_addr = i2cdev->addr << 1;
1072 i3c_bus_for_each_i3cdev(bus, i3cdev) {
1073 /* Skip the I3C dev representing this master. */
1074 if (i3cdev == master->this)
1077 desc->bcr = i3cdev->info.bcr;
1078 desc->dcr = i3cdev->info.dcr;
1079 desc->dyn_addr = i3cdev->info.dyn_addr << 1;
1080 desc->static_addr = i3cdev->info.static_addr << 1;
1084 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
1085 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1086 i3c_ccc_cmd_dest_cleanup(&dest);
1090 EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
1092 static int i3c_master_setda_locked(struct i3c_master_controller *master,
1093 u8 oldaddr, u8 newaddr, bool setdasa)
1095 struct i3c_ccc_cmd_dest dest;
1096 struct i3c_ccc_setda *setda;
1097 struct i3c_ccc_cmd cmd;
1100 if (!oldaddr || !newaddr)
1103 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
1107 setda->addr = newaddr << 1;
1108 i3c_ccc_cmd_init(&cmd, false,
1109 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
1111 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1112 i3c_ccc_cmd_dest_cleanup(&dest);
1117 static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
1118 u8 static_addr, u8 dyn_addr)
1120 return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
1123 static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1124 u8 oldaddr, u8 newaddr)
1126 return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1129 static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1130 struct i3c_device_info *info)
1132 struct i3c_ccc_cmd_dest dest;
1133 struct i3c_ccc_mrl *mrl;
1134 struct i3c_ccc_cmd cmd;
1137 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1142 * When the device does not have IBI payload GETMRL only returns 2
1145 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1146 dest.payload.len -= 1;
1148 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1149 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1153 switch (dest.payload.len) {
1155 info->max_ibi_len = mrl->ibi_len;
1158 info->max_read_len = be16_to_cpu(mrl->read_len);
1166 i3c_ccc_cmd_dest_cleanup(&dest);
1171 static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1172 struct i3c_device_info *info)
1174 struct i3c_ccc_cmd_dest dest;
1175 struct i3c_ccc_mwl *mwl;
1176 struct i3c_ccc_cmd cmd;
1179 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1183 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1184 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1188 if (dest.payload.len != sizeof(*mwl)) {
1193 info->max_write_len = be16_to_cpu(mwl->len);
1196 i3c_ccc_cmd_dest_cleanup(&dest);
1201 static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1202 struct i3c_device_info *info)
1204 struct i3c_ccc_getmxds *getmaxds;
1205 struct i3c_ccc_cmd_dest dest;
1206 struct i3c_ccc_cmd cmd;
1209 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1214 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1215 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1218 * Retry when the device does not support max read turnaround
1219 * while expecting shorter length from this CCC command.
1221 dest.payload.len -= 3;
1222 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1227 if (dest.payload.len != 2 && dest.payload.len != 5) {
1232 info->max_read_ds = getmaxds->maxrd;
1233 info->max_write_ds = getmaxds->maxwr;
1234 if (dest.payload.len == 5)
1235 info->max_read_turnaround = getmaxds->maxrdturn[0] |
1236 ((u32)getmaxds->maxrdturn[1] << 8) |
1237 ((u32)getmaxds->maxrdturn[2] << 16);
1240 i3c_ccc_cmd_dest_cleanup(&dest);
1245 static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1246 struct i3c_device_info *info)
1248 struct i3c_ccc_gethdrcap *gethdrcap;
1249 struct i3c_ccc_cmd_dest dest;
1250 struct i3c_ccc_cmd cmd;
1253 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1254 sizeof(*gethdrcap));
1258 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1259 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1263 if (dest.payload.len != 1) {
1268 info->hdr_cap = gethdrcap->modes;
1271 i3c_ccc_cmd_dest_cleanup(&dest);
1276 static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1277 struct i3c_device_info *info)
1279 struct i3c_ccc_getpid *getpid;
1280 struct i3c_ccc_cmd_dest dest;
1281 struct i3c_ccc_cmd cmd;
1284 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1288 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1289 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1294 for (i = 0; i < sizeof(getpid->pid); i++) {
1295 int sft = (sizeof(getpid->pid) - i - 1) * 8;
1297 info->pid |= (u64)getpid->pid[i] << sft;
1301 i3c_ccc_cmd_dest_cleanup(&dest);
1306 static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1307 struct i3c_device_info *info)
1309 struct i3c_ccc_getbcr *getbcr;
1310 struct i3c_ccc_cmd_dest dest;
1311 struct i3c_ccc_cmd cmd;
1314 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1318 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1319 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1323 info->bcr = getbcr->bcr;
1326 i3c_ccc_cmd_dest_cleanup(&dest);
1331 static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1332 struct i3c_device_info *info)
1334 struct i3c_ccc_getdcr *getdcr;
1335 struct i3c_ccc_cmd_dest dest;
1336 struct i3c_ccc_cmd cmd;
1339 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1343 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1344 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1348 info->dcr = getdcr->dcr;
1351 i3c_ccc_cmd_dest_cleanup(&dest);
1356 static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1358 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1359 enum i3c_addr_slot_status slot_status;
1362 if (!dev->info.dyn_addr)
1365 slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1366 dev->info.dyn_addr);
1367 if (slot_status == I3C_ADDR_SLOT_RSVD ||
1368 slot_status == I3C_ADDR_SLOT_I2C_DEV)
1371 ret = i3c_master_getpid_locked(master, &dev->info);
1375 ret = i3c_master_getbcr_locked(master, &dev->info);
1379 ret = i3c_master_getdcr_locked(master, &dev->info);
1383 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1384 ret = i3c_master_getmxds_locked(master, &dev->info);
1389 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1390 dev->info.max_ibi_len = 1;
1392 i3c_master_getmrl_locked(master, &dev->info);
1393 i3c_master_getmwl_locked(master, &dev->info);
1395 if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1396 ret = i3c_master_gethdrcap_locked(master, &dev->info);
1404 static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1406 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1408 if (dev->info.static_addr)
1409 i3c_bus_set_addr_slot_status(&master->bus,
1410 dev->info.static_addr,
1411 I3C_ADDR_SLOT_FREE);
1413 if (dev->info.dyn_addr)
1414 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1415 I3C_ADDR_SLOT_FREE);
1417 if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1418 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1419 I3C_ADDR_SLOT_FREE);
1422 static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1424 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1425 enum i3c_addr_slot_status status;
1427 if (!dev->info.static_addr && !dev->info.dyn_addr)
1430 if (dev->info.static_addr) {
1431 status = i3c_bus_get_addr_slot_status(&master->bus,
1432 dev->info.static_addr);
1433 /* Since static address and assigned dynamic address can be
1434 * equal, allow this case to pass.
1436 if (status != I3C_ADDR_SLOT_FREE &&
1437 dev->info.static_addr != dev->boardinfo->init_dyn_addr)
1440 i3c_bus_set_addr_slot_status(&master->bus,
1441 dev->info.static_addr,
1442 I3C_ADDR_SLOT_I3C_DEV);
1446 * ->init_dyn_addr should have been reserved before that, so, if we're
1447 * trying to apply a pre-reserved dynamic address, we should not try
1448 * to reserve the address slot a second time.
1450 if (dev->info.dyn_addr &&
1452 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1453 status = i3c_bus_get_addr_slot_status(&master->bus,
1454 dev->info.dyn_addr);
1455 if (status != I3C_ADDR_SLOT_FREE)
1456 goto err_release_static_addr;
1458 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1459 I3C_ADDR_SLOT_I3C_DEV);
1464 err_release_static_addr:
1465 if (dev->info.static_addr)
1466 i3c_bus_set_addr_slot_status(&master->bus,
1467 dev->info.static_addr,
1468 I3C_ADDR_SLOT_FREE);
1473 static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1474 struct i3c_dev_desc *dev)
1479 * We don't attach devices to the controller until they are
1480 * addressable on the bus.
1482 if (!dev->info.static_addr && !dev->info.dyn_addr)
1485 ret = i3c_master_get_i3c_addrs(dev);
1489 /* Do not attach the master device itself. */
1490 if (master->this != dev && master->ops->attach_i3c_dev) {
1491 ret = master->ops->attach_i3c_dev(dev);
1493 i3c_master_put_i3c_addrs(dev);
1498 list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1503 static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1506 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1507 enum i3c_addr_slot_status status;
1510 if (dev->info.dyn_addr != old_dyn_addr &&
1512 dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) {
1513 status = i3c_bus_get_addr_slot_status(&master->bus,
1514 dev->info.dyn_addr);
1515 if (status != I3C_ADDR_SLOT_FREE)
1517 i3c_bus_set_addr_slot_status(&master->bus,
1519 I3C_ADDR_SLOT_I3C_DEV);
1521 i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr,
1522 I3C_ADDR_SLOT_FREE);
1525 if (master->ops->reattach_i3c_dev) {
1526 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1528 i3c_master_put_i3c_addrs(dev);
1536 static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1538 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1540 /* Do not detach the master device itself. */
1541 if (master->this != dev && master->ops->detach_i3c_dev)
1542 master->ops->detach_i3c_dev(dev);
1544 i3c_master_put_i3c_addrs(dev);
1545 list_del(&dev->common.node);
1548 static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1549 struct i2c_dev_desc *dev)
1553 if (master->ops->attach_i2c_dev) {
1554 ret = master->ops->attach_i2c_dev(dev);
1559 list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1564 static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1566 struct i3c_master_controller *master = i2c_dev_get_master(dev);
1568 list_del(&dev->common.node);
1570 if (master->ops->detach_i2c_dev)
1571 master->ops->detach_i2c_dev(dev);
1574 static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1575 struct i3c_dev_boardinfo *boardinfo)
1577 struct i3c_device_info info = {
1578 .static_addr = boardinfo->static_addr,
1579 .pid = boardinfo->pid,
1581 struct i3c_dev_desc *i3cdev;
1584 i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1588 i3cdev->boardinfo = boardinfo;
1590 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1594 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1595 i3cdev->boardinfo->init_dyn_addr);
1597 goto err_detach_dev;
1599 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1600 ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
1604 ret = i3c_master_retrieve_dev_info(i3cdev);
1611 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1613 i3c_master_detach_i3c_dev(i3cdev);
1615 i3c_master_free_i3c_dev(i3cdev);
1621 i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1623 struct i3c_dev_desc *desc;
1626 if (!master->init_done)
1629 i3c_bus_for_each_i3cdev(&master->bus, desc) {
1630 if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1633 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1637 desc->dev->bus = &master->bus;
1638 desc->dev->desc = desc;
1639 desc->dev->dev.parent = &master->dev;
1640 desc->dev->dev.type = &i3c_device_type;
1641 desc->dev->dev.bus = &i3c_bus_type;
1642 desc->dev->dev.release = i3c_device_release;
1643 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1646 if (desc->boardinfo)
1647 desc->dev->dev.of_node = desc->boardinfo->of_node;
1649 ret = device_register(&desc->dev->dev);
1651 dev_err(&master->dev,
1652 "Failed to add I3C device (err = %d)\n", ret);
1653 put_device(&desc->dev->dev);
1659 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1660 * @master: master doing the DAA
1662 * This function is instantiating an I3C device object and adding it to the
1663 * I3C device list. All device information are automatically retrieved using
1664 * standard CCC commands.
1666 * The I3C device object is returned in case the master wants to attach
1667 * private data to it using i3c_dev_set_master_data().
1669 * This function must be called with the bus lock held in write mode.
1671 * Return: a 0 in case of success, an negative error code otherwise.
1673 int i3c_master_do_daa(struct i3c_master_controller *master)
1677 i3c_bus_maintenance_lock(&master->bus);
1678 ret = master->ops->do_daa(master);
1679 i3c_bus_maintenance_unlock(&master->bus);
1684 i3c_bus_normaluse_lock(&master->bus);
1685 i3c_master_register_new_i3c_devs(master);
1686 i3c_bus_normaluse_unlock(&master->bus);
1690 EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1693 * i3c_master_set_info() - set master device information
1694 * @master: master used to send frames on the bus
1695 * @info: I3C device information
1697 * Set master device info. This should be called from
1698 * &i3c_master_controller_ops->bus_init().
1700 * Not all &i3c_device_info fields are meaningful for a master device.
1701 * Here is a list of fields that should be properly filled:
1703 * - &i3c_device_info->dyn_addr
1704 * - &i3c_device_info->bcr
1705 * - &i3c_device_info->dcr
1706 * - &i3c_device_info->pid
1707 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1708 * &i3c_device_info->bcr
1710 * This function must be called with the bus lock held in maintenance mode.
1712 * Return: 0 if @info contains valid information (not every piece of
1713 * information can be checked, but we can at least make sure @info->dyn_addr
1714 * and @info->bcr are correct), -EINVAL otherwise.
1716 int i3c_master_set_info(struct i3c_master_controller *master,
1717 const struct i3c_device_info *info)
1719 struct i3c_dev_desc *i3cdev;
1722 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1725 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1732 i3cdev = i3c_master_alloc_i3c_dev(master, info);
1734 return PTR_ERR(i3cdev);
1736 master->this = i3cdev;
1737 master->bus.cur_master = master->this;
1739 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1746 i3c_master_free_i3c_dev(i3cdev);
1750 EXPORT_SYMBOL_GPL(i3c_master_set_info);
1752 static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1754 struct i3c_dev_desc *i3cdev, *i3ctmp;
1755 struct i2c_dev_desc *i2cdev, *i2ctmp;
1757 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1759 i3c_master_detach_i3c_dev(i3cdev);
1761 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1762 i3c_bus_set_addr_slot_status(&master->bus,
1763 i3cdev->boardinfo->init_dyn_addr,
1764 I3C_ADDR_SLOT_FREE);
1766 i3c_master_free_i3c_dev(i3cdev);
1769 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1771 i3c_master_detach_i2c_dev(i2cdev);
1772 i3c_bus_set_addr_slot_status(&master->bus,
1774 I3C_ADDR_SLOT_FREE);
1775 i3c_master_free_i2c_dev(i2cdev);
1780 * i3c_master_bus_init() - initialize an I3C bus
1781 * @master: main master initializing the bus
1783 * This function is following all initialisation steps described in the I3C
1786 * 1. Attach I2C devs to the master so that the master can fill its internal
1787 * device table appropriately
1789 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1790 * the master controller. That's usually where the bus mode is selected
1791 * (pure bus or mixed fast/slow bus)
1793 * 3. Instruct all devices on the bus to drop their dynamic address. This is
1794 * particularly important when the bus was previously configured by someone
1795 * else (for example the bootloader)
1797 * 4. Disable all slave events.
1799 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1800 * also have static_addr, try to pre-assign dynamic addresses requested by
1801 * the FW with SETDASA and attach corresponding statically defined I3C
1802 * devices to the master.
1804 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1805 * remaining I3C devices
1807 * Once this is done, all I3C and I2C devices should be usable.
1809 * Return: a 0 in case of success, an negative error code otherwise.
1811 static int i3c_master_bus_init(struct i3c_master_controller *master)
1813 enum i3c_addr_slot_status status;
1814 struct i2c_dev_boardinfo *i2cboardinfo;
1815 struct i3c_dev_boardinfo *i3cboardinfo;
1816 struct i2c_dev_desc *i2cdev;
1820 * First attach all devices with static definitions provided by the
1823 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1824 status = i3c_bus_get_addr_slot_status(&master->bus,
1825 i2cboardinfo->base.addr);
1826 if (status != I3C_ADDR_SLOT_FREE) {
1828 goto err_detach_devs;
1831 i3c_bus_set_addr_slot_status(&master->bus,
1832 i2cboardinfo->base.addr,
1833 I3C_ADDR_SLOT_I2C_DEV);
1835 i2cdev = i3c_master_alloc_i2c_dev(master,
1836 i2cboardinfo->base.addr,
1838 if (IS_ERR(i2cdev)) {
1839 ret = PTR_ERR(i2cdev);
1840 goto err_detach_devs;
1843 ret = i3c_master_attach_i2c_dev(master, i2cdev);
1845 i3c_master_free_i2c_dev(i2cdev);
1846 goto err_detach_devs;
1851 * Now execute the controller specific ->bus_init() routine, which
1852 * might configure its internal logic to match the bus limitations.
1854 ret = master->ops->bus_init(master);
1856 goto err_detach_devs;
1859 * The master device should have been instantiated in ->bus_init(),
1860 * complain if this was not the case.
1862 if (!master->this) {
1863 dev_err(&master->dev,
1864 "master_set_info() was not called in ->bus_init()\n");
1866 goto err_bus_cleanup;
1870 * Reset all dynamic address that may have been assigned before
1871 * (assigned by the bootloader for example).
1873 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1874 if (ret && ret != I3C_ERROR_M2)
1875 goto err_bus_cleanup;
1877 /* Disable all slave events before starting DAA. */
1878 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1879 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1881 if (ret && ret != I3C_ERROR_M2)
1882 goto err_bus_cleanup;
1885 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1886 * address and retrieve device information if needed.
1887 * In case pre-assign dynamic address fails, setting dynamic address to
1888 * the requested init_dyn_addr is retried after DAA is done in
1889 * i3c_master_add_i3c_dev_locked().
1891 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1894 * We don't reserve a dynamic address for devices that
1895 * don't explicitly request one.
1897 if (!i3cboardinfo->init_dyn_addr)
1900 ret = i3c_bus_get_addr_slot_status(&master->bus,
1901 i3cboardinfo->init_dyn_addr);
1902 if (ret != I3C_ADDR_SLOT_FREE) {
1907 i3c_bus_set_addr_slot_status(&master->bus,
1908 i3cboardinfo->init_dyn_addr,
1909 I3C_ADDR_SLOT_I3C_DEV);
1912 * Only try to create/attach devices that have a static
1913 * address. Other devices will be created/attached when
1914 * DAA happens, and the requested dynamic address will
1915 * be set using SETNEWDA once those devices become
1919 if (i3cboardinfo->static_addr)
1920 i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1923 ret = i3c_master_do_daa(master);
1930 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1933 if (master->ops->bus_cleanup)
1934 master->ops->bus_cleanup(master);
1937 i3c_master_detach_free_devs(master);
1942 static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1944 if (master->ops->bus_cleanup)
1945 master->ops->bus_cleanup(master);
1947 i3c_master_detach_free_devs(master);
1950 static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
1952 struct i3c_master_controller *master = i3cdev->common.master;
1953 struct i3c_dev_boardinfo *i3cboardinfo;
1955 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1956 if (i3cdev->info.pid != i3cboardinfo->pid)
1959 i3cdev->boardinfo = i3cboardinfo;
1960 i3cdev->info.static_addr = i3cboardinfo->static_addr;
1965 static struct i3c_dev_desc *
1966 i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1968 struct i3c_master_controller *master = i3c_dev_get_master(refdev);
1969 struct i3c_dev_desc *i3cdev;
1971 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1972 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1980 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1981 * @master: master used to send frames on the bus
1982 * @addr: I3C slave dynamic address assigned to the device
1984 * This function is instantiating an I3C device object and adding it to the
1985 * I3C device list. All device information are automatically retrieved using
1986 * standard CCC commands.
1988 * The I3C device object is returned in case the master wants to attach
1989 * private data to it using i3c_dev_set_master_data().
1991 * This function must be called with the bus lock held in write mode.
1993 * Return: a 0 in case of success, an negative error code otherwise.
1995 int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1998 struct i3c_device_info info = { .dyn_addr = addr };
1999 struct i3c_dev_desc *newdev, *olddev;
2000 u8 old_dyn_addr = addr, expected_dyn_addr;
2001 struct i3c_ibi_setup ibireq = { };
2002 bool enable_ibi = false;
2008 newdev = i3c_master_alloc_i3c_dev(master, &info);
2010 return PTR_ERR(newdev);
2012 ret = i3c_master_attach_i3c_dev(master, newdev);
2016 ret = i3c_master_retrieve_dev_info(newdev);
2018 goto err_detach_dev;
2020 i3c_master_attach_boardinfo(newdev);
2022 olddev = i3c_master_search_i3c_dev_duplicate(newdev);
2024 newdev->dev = olddev->dev;
2026 newdev->dev->desc = newdev;
2029 * We need to restore the IBI state too, so let's save the
2030 * IBI information and try to restore them after olddev has
2031 * been detached+released and its IBI has been stopped and
2032 * the associated resources have been freed.
2034 mutex_lock(&olddev->ibi_lock);
2036 ibireq.handler = olddev->ibi->handler;
2037 ibireq.max_payload_len = olddev->ibi->max_payload_len;
2038 ibireq.num_slots = olddev->ibi->num_slots;
2040 if (olddev->ibi->enabled) {
2042 i3c_dev_disable_ibi_locked(olddev);
2045 i3c_dev_free_ibi_locked(olddev);
2047 mutex_unlock(&olddev->ibi_lock);
2049 old_dyn_addr = olddev->info.dyn_addr;
2051 i3c_master_detach_i3c_dev(olddev);
2052 i3c_master_free_i3c_dev(olddev);
2056 * Depending on our previous state, the expected dynamic address might
2058 * - if the device already had a dynamic address assigned, let's try to
2060 * - if the device did not have a dynamic address and the firmware
2061 * requested a specific address, pick this one
2062 * - in any other case, keep the address automatically assigned by the
2065 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
2066 expected_dyn_addr = old_dyn_addr;
2067 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
2068 expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
2070 expected_dyn_addr = newdev->info.dyn_addr;
2072 if (newdev->info.dyn_addr != expected_dyn_addr) {
2074 * Try to apply the expected dynamic address. If it fails, keep
2075 * the address assigned by the master.
2077 ret = i3c_master_setnewda_locked(master,
2078 newdev->info.dyn_addr,
2081 old_dyn_addr = newdev->info.dyn_addr;
2082 newdev->info.dyn_addr = expected_dyn_addr;
2083 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
2085 dev_err(&master->dev,
2086 "Failed to assign reserved/old address to device %d%llx",
2087 master->bus.id, newdev->info.pid);
2092 * Now is time to try to restore the IBI setup. If we're lucky,
2093 * everything works as before, otherwise, all we can do is complain.
2094 * FIXME: maybe we should add callback to inform the driver that it
2095 * should request the IBI again instead of trying to hide that from
2098 if (ibireq.handler) {
2099 mutex_lock(&newdev->ibi_lock);
2100 ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
2102 dev_err(&master->dev,
2103 "Failed to request IBI on device %d-%llx",
2104 master->bus.id, newdev->info.pid);
2105 } else if (enable_ibi) {
2106 ret = i3c_dev_enable_ibi_locked(newdev);
2108 dev_err(&master->dev,
2109 "Failed to re-enable IBI on device %d-%llx",
2110 master->bus.id, newdev->info.pid);
2112 mutex_unlock(&newdev->ibi_lock);
2118 if (newdev->dev && newdev->dev->desc)
2119 newdev->dev->desc = NULL;
2121 i3c_master_detach_i3c_dev(newdev);
2124 i3c_master_free_i3c_dev(newdev);
2128 EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
2130 #define OF_I3C_REG1_IS_I2C_DEV BIT(31)
2133 of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
2134 struct device_node *node, u32 *reg)
2136 struct i2c_dev_boardinfo *boardinfo;
2137 struct device *dev = &master->dev;
2140 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2144 ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2149 * The I3C Specification does not clearly say I2C devices with 10-bit
2150 * address are supported. These devices can't be passed properly through
2153 if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2154 dev_err(dev, "I2C device with 10 bit address not supported.");
2158 /* LVR is encoded in reg[2]. */
2159 boardinfo->lvr = reg[2];
2161 list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2168 of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2169 struct device_node *node, u32 *reg)
2171 struct i3c_dev_boardinfo *boardinfo;
2172 struct device *dev = &master->dev;
2173 enum i3c_addr_slot_status addrstatus;
2174 u32 init_dyn_addr = 0;
2176 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2181 if (reg[0] > I3C_MAX_ADDR)
2184 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2186 if (addrstatus != I3C_ADDR_SLOT_FREE)
2190 boardinfo->static_addr = reg[0];
2192 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2193 if (init_dyn_addr > I3C_MAX_ADDR)
2196 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2198 if (addrstatus != I3C_ADDR_SLOT_FREE)
2202 boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2204 if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2205 I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2208 boardinfo->init_dyn_addr = init_dyn_addr;
2209 boardinfo->of_node = of_node_get(node);
2210 list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2215 static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2216 struct device_node *node)
2221 if (!master || !node)
2224 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2229 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2230 * dealing with an I2C device.
2233 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2235 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2240 static int of_populate_i3c_bus(struct i3c_master_controller *master)
2242 struct device *dev = &master->dev;
2243 struct device_node *i3cbus_np = dev->of_node;
2244 struct device_node *node;
2251 for_each_available_child_of_node(i3cbus_np, node) {
2252 ret = of_i3c_master_add_dev(master, node);
2260 * The user might want to limit I2C and I3C speed in case some devices
2261 * on the bus are not supporting typical rates, or if the bus topology
2262 * prevents it from using max possible rate.
2264 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2265 master->bus.scl_rate.i2c = val;
2267 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2268 master->bus.scl_rate.i3c = val;
2273 static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2274 struct i2c_msg *xfers, int nxfers)
2276 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2277 struct i2c_dev_desc *dev;
2281 if (!xfers || !master || nxfers <= 0)
2284 if (!master->ops->i2c_xfers)
2287 /* Doing transfers to different devices is not supported. */
2288 addr = xfers[0].addr;
2289 for (i = 1; i < nxfers; i++) {
2290 if (addr != xfers[i].addr)
2294 i3c_bus_normaluse_lock(&master->bus);
2295 dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2299 ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2300 i3c_bus_normaluse_unlock(&master->bus);
2302 return ret ? ret : nxfers;
2305 static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2307 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2310 static u8 i3c_master_i2c_get_lvr(struct i2c_client *client)
2312 /* Fall back to no spike filters and FM bus mode. */
2313 u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE;
2315 if (client->dev.of_node) {
2318 if (!of_property_read_u32_array(client->dev.of_node, "reg",
2319 reg, ARRAY_SIZE(reg)))
2326 static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client)
2328 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2329 enum i3c_addr_slot_status status;
2330 struct i2c_dev_desc *i2cdev;
2333 /* Already added by board info? */
2334 if (i3c_master_find_i2c_dev_by_addr(master, client->addr))
2337 status = i3c_bus_get_addr_slot_status(&master->bus, client->addr);
2338 if (status != I3C_ADDR_SLOT_FREE)
2341 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2342 I3C_ADDR_SLOT_I2C_DEV);
2344 i2cdev = i3c_master_alloc_i2c_dev(master, client->addr,
2345 i3c_master_i2c_get_lvr(client));
2346 if (IS_ERR(i2cdev)) {
2347 ret = PTR_ERR(i2cdev);
2348 goto out_clear_status;
2351 ret = i3c_master_attach_i2c_dev(master, i2cdev);
2358 i3c_master_free_i2c_dev(i2cdev);
2360 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2361 I3C_ADDR_SLOT_FREE);
2366 static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client)
2368 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2369 struct i2c_dev_desc *dev;
2371 dev = i3c_master_find_i2c_dev_by_addr(master, client->addr);
2375 i3c_master_detach_i2c_dev(dev);
2376 i3c_bus_set_addr_slot_status(&master->bus, dev->addr,
2377 I3C_ADDR_SLOT_FREE);
2378 i3c_master_free_i2c_dev(dev);
2383 static const struct i2c_algorithm i3c_master_i2c_algo = {
2384 .master_xfer = i3c_master_i2c_adapter_xfer,
2385 .functionality = i3c_master_i2c_funcs,
2388 static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action,
2391 struct i2c_adapter *adap;
2392 struct i2c_client *client;
2393 struct device *dev = data;
2394 struct i3c_master_controller *master;
2397 if (dev->type != &i2c_client_type)
2400 client = to_i2c_client(dev);
2401 adap = client->adapter;
2403 if (adap->algo != &i3c_master_i2c_algo)
2406 master = i2c_adapter_to_i3c_master(adap);
2408 i3c_bus_maintenance_lock(&master->bus);
2410 case BUS_NOTIFY_ADD_DEVICE:
2411 ret = i3c_master_i2c_attach(adap, client);
2413 case BUS_NOTIFY_DEL_DEVICE:
2414 ret = i3c_master_i2c_detach(adap, client);
2417 i3c_bus_maintenance_unlock(&master->bus);
2422 static struct notifier_block i2cdev_notifier = {
2423 .notifier_call = i3c_i2c_notifier_call,
2426 static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2428 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2429 struct i2c_dev_desc *i2cdev;
2430 struct i2c_dev_boardinfo *i2cboardinfo;
2433 adap->dev.parent = master->dev.parent;
2434 adap->owner = master->dev.parent->driver->owner;
2435 adap->algo = &i3c_master_i2c_algo;
2436 strscpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2438 /* FIXME: Should we allow i3c masters to override these values? */
2439 adap->timeout = 1000;
2442 ret = i2c_add_adapter(adap);
2447 * We silently ignore failures here. The bus should keep working
2448 * correctly even if one or more i2c devices are not registered.
2450 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
2451 i2cdev = i3c_master_find_i2c_dev_by_addr(master,
2452 i2cboardinfo->base.addr);
2453 if (WARN_ON(!i2cdev))
2455 i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base);
2461 static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2463 struct i2c_dev_desc *i2cdev;
2465 i2c_del_adapter(&master->i2c);
2467 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2471 static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2473 struct i3c_dev_desc *i3cdev;
2475 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2479 i3cdev->dev->desc = NULL;
2480 if (device_is_registered(&i3cdev->dev->dev))
2481 device_unregister(&i3cdev->dev->dev);
2483 put_device(&i3cdev->dev->dev);
2489 * i3c_master_queue_ibi() - Queue an IBI
2490 * @dev: the device this IBI is coming from
2491 * @slot: the IBI slot used to store the payload
2493 * Queue an IBI to the controller workqueue. The IBI handler attached to
2494 * the dev will be called from a workqueue context.
2496 void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2498 atomic_inc(&dev->ibi->pending_ibis);
2499 queue_work(dev->ibi->wq, &slot->work);
2501 EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2503 static void i3c_master_handle_ibi(struct work_struct *work)
2505 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2507 struct i3c_dev_desc *dev = slot->dev;
2508 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2509 struct i3c_ibi_payload payload;
2511 payload.data = slot->data;
2512 payload.len = slot->len;
2515 dev->ibi->handler(dev->dev, &payload);
2517 master->ops->recycle_ibi_slot(dev, slot);
2518 if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2519 complete(&dev->ibi->all_ibis_handled);
2522 static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2523 struct i3c_ibi_slot *slot)
2526 INIT_WORK(&slot->work, i3c_master_handle_ibi);
2529 struct i3c_generic_ibi_slot {
2530 struct list_head node;
2531 struct i3c_ibi_slot base;
2534 struct i3c_generic_ibi_pool {
2536 unsigned int num_slots;
2537 struct i3c_generic_ibi_slot *slots;
2539 struct list_head free_slots;
2540 struct list_head pending;
2544 * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2545 * @pool: the IBI pool to free
2547 * Free all IBI slots allated by a generic IBI pool.
2549 void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2551 struct i3c_generic_ibi_slot *slot;
2552 unsigned int nslots = 0;
2554 while (!list_empty(&pool->free_slots)) {
2555 slot = list_first_entry(&pool->free_slots,
2556 struct i3c_generic_ibi_slot, node);
2557 list_del(&slot->node);
2562 * If the number of freed slots is not equal to the number of allocated
2563 * slots we have a leak somewhere.
2565 WARN_ON(nslots != pool->num_slots);
2567 kfree(pool->payload_buf);
2571 EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2574 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2575 * @dev: the device this pool will be used for
2576 * @req: IBI setup request describing what the device driver expects
2578 * Create a generic IBI pool based on the information provided in @req.
2580 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2582 struct i3c_generic_ibi_pool *
2583 i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2584 const struct i3c_ibi_setup *req)
2586 struct i3c_generic_ibi_pool *pool;
2587 struct i3c_generic_ibi_slot *slot;
2591 pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2593 return ERR_PTR(-ENOMEM);
2595 spin_lock_init(&pool->lock);
2596 INIT_LIST_HEAD(&pool->free_slots);
2597 INIT_LIST_HEAD(&pool->pending);
2599 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2605 if (req->max_payload_len) {
2606 pool->payload_buf = kcalloc(req->num_slots,
2607 req->max_payload_len, GFP_KERNEL);
2608 if (!pool->payload_buf) {
2614 for (i = 0; i < req->num_slots; i++) {
2615 slot = &pool->slots[i];
2616 i3c_master_init_ibi_slot(dev, &slot->base);
2618 if (req->max_payload_len)
2619 slot->base.data = pool->payload_buf +
2620 (i * req->max_payload_len);
2622 list_add_tail(&slot->node, &pool->free_slots);
2629 i3c_generic_ibi_free_pool(pool);
2630 return ERR_PTR(ret);
2632 EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2635 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2636 * @pool: the pool to query an IBI slot on
2638 * Search for a free slot in a generic IBI pool.
2639 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2640 * when it's no longer needed.
2642 * Return: a pointer to a free slot, or NULL if there's no free slot available.
2644 struct i3c_ibi_slot *
2645 i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2647 struct i3c_generic_ibi_slot *slot;
2648 unsigned long flags;
2650 spin_lock_irqsave(&pool->lock, flags);
2651 slot = list_first_entry_or_null(&pool->free_slots,
2652 struct i3c_generic_ibi_slot, node);
2654 list_del(&slot->node);
2655 spin_unlock_irqrestore(&pool->lock, flags);
2657 return slot ? &slot->base : NULL;
2659 EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2662 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2663 * @pool: the pool to return the IBI slot to
2664 * @s: IBI slot to recycle
2666 * Add an IBI slot back to its generic IBI pool. Should be called from the
2667 * master driver struct_master_controller_ops->recycle_ibi() method.
2669 void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2670 struct i3c_ibi_slot *s)
2672 struct i3c_generic_ibi_slot *slot;
2673 unsigned long flags;
2678 slot = container_of(s, struct i3c_generic_ibi_slot, base);
2679 spin_lock_irqsave(&pool->lock, flags);
2680 list_add_tail(&slot->node, &pool->free_slots);
2681 spin_unlock_irqrestore(&pool->lock, flags);
2683 EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2685 static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2687 if (!ops || !ops->bus_init || !ops->priv_xfers ||
2688 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2691 if (ops->request_ibi &&
2692 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2693 !ops->recycle_ibi_slot))
2700 * i3c_master_register() - register an I3C master
2701 * @master: master used to send frames on the bus
2702 * @parent: the parent device (the one that provides this I3C master
2704 * @ops: the master controller operations
2705 * @secondary: true if you are registering a secondary master. Will return
2706 * -ENOTSUPP if set to true since secondary masters are not yet
2709 * This function takes care of everything for you:
2711 * - creates and initializes the I3C bus
2712 * - populates the bus with static I2C devs if @parent->of_node is not
2714 * - registers all I3C devices added by the controller during bus
2716 * - registers the I2C adapter and all I2C devices
2718 * Return: 0 in case of success, a negative error code otherwise.
2720 int i3c_master_register(struct i3c_master_controller *master,
2721 struct device *parent,
2722 const struct i3c_master_controller_ops *ops,
2725 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2726 struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2727 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2728 struct i2c_dev_boardinfo *i2cbi;
2731 /* We do not support secondary masters yet. */
2735 ret = i3c_master_check_ops(ops);
2739 master->dev.parent = parent;
2740 master->dev.of_node = of_node_get(parent->of_node);
2741 master->dev.bus = &i3c_bus_type;
2742 master->dev.type = &i3c_masterdev_type;
2743 master->dev.release = i3c_masterdev_release;
2745 master->secondary = secondary;
2746 INIT_LIST_HEAD(&master->boardinfo.i2c);
2747 INIT_LIST_HEAD(&master->boardinfo.i3c);
2749 ret = i3c_bus_init(i3cbus, master->dev.of_node);
2753 device_initialize(&master->dev);
2754 dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2756 master->dev.dma_mask = parent->dma_mask;
2757 master->dev.coherent_dma_mask = parent->coherent_dma_mask;
2758 master->dev.dma_parms = parent->dma_parms;
2760 ret = of_populate_i3c_bus(master);
2764 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2765 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2766 case I3C_LVR_I2C_INDEX(0):
2767 if (mode < I3C_BUS_MODE_MIXED_FAST)
2768 mode = I3C_BUS_MODE_MIXED_FAST;
2770 case I3C_LVR_I2C_INDEX(1):
2771 if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2772 mode = I3C_BUS_MODE_MIXED_LIMITED;
2774 case I3C_LVR_I2C_INDEX(2):
2775 if (mode < I3C_BUS_MODE_MIXED_SLOW)
2776 mode = I3C_BUS_MODE_MIXED_SLOW;
2783 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2784 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2787 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2791 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2797 ret = i3c_master_bus_init(master);
2801 ret = device_add(&master->dev);
2803 goto err_cleanup_bus;
2806 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2807 * through the I2C subsystem.
2809 ret = i3c_master_i2c_adapter_init(master);
2813 i3c_bus_notify(i3cbus, I3C_NOTIFY_BUS_ADD);
2816 * We're done initializing the bus and the controller, we can now
2817 * register I3C devices discovered during the initial DAA.
2819 master->init_done = true;
2820 i3c_bus_normaluse_lock(&master->bus);
2821 i3c_master_register_new_i3c_devs(master);
2822 i3c_bus_normaluse_unlock(&master->bus);
2827 device_del(&master->dev);
2830 i3c_master_bus_cleanup(master);
2833 put_device(&master->dev);
2837 EXPORT_SYMBOL_GPL(i3c_master_register);
2840 * i3c_master_unregister() - unregister an I3C master
2841 * @master: master used to send frames on the bus
2843 * Basically undo everything done in i3c_master_register().
2845 void i3c_master_unregister(struct i3c_master_controller *master)
2847 i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE);
2849 i3c_master_i2c_adapter_cleanup(master);
2850 i3c_master_unregister_i3c_devs(master);
2851 i3c_master_bus_cleanup(master);
2852 device_unregister(&master->dev);
2854 EXPORT_SYMBOL_GPL(i3c_master_unregister);
2856 int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev)
2858 struct i3c_master_controller *master;
2863 master = i3c_dev_get_master(dev);
2867 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
2868 !dev->boardinfo->static_addr)
2871 return i3c_master_setdasa_locked(master, dev->info.static_addr,
2872 dev->boardinfo->init_dyn_addr);
2875 int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2876 struct i3c_priv_xfer *xfers,
2879 struct i3c_master_controller *master;
2884 master = i3c_dev_get_master(dev);
2885 if (!master || !xfers)
2888 if (!master->ops->priv_xfers)
2891 return master->ops->priv_xfers(dev, xfers, nxfers);
2894 int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2896 struct i3c_master_controller *master;
2902 master = i3c_dev_get_master(dev);
2903 ret = master->ops->disable_ibi(dev);
2907 reinit_completion(&dev->ibi->all_ibis_handled);
2908 if (atomic_read(&dev->ibi->pending_ibis))
2909 wait_for_completion(&dev->ibi->all_ibis_handled);
2911 dev->ibi->enabled = false;
2916 int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2918 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2924 ret = master->ops->enable_ibi(dev);
2926 dev->ibi->enabled = true;
2931 int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2932 const struct i3c_ibi_setup *req)
2934 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2935 struct i3c_device_ibi_info *ibi;
2938 if (!master->ops->request_ibi)
2944 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2948 ibi->wq = alloc_ordered_workqueue(dev_name(i3cdev_to_dev(dev->dev)), WQ_MEM_RECLAIM);
2954 atomic_set(&ibi->pending_ibis, 0);
2955 init_completion(&ibi->all_ibis_handled);
2956 ibi->handler = req->handler;
2957 ibi->max_payload_len = req->max_payload_len;
2958 ibi->num_slots = req->num_slots;
2961 ret = master->ops->request_ibi(dev, req);
2970 void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2972 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2977 if (WARN_ON(dev->ibi->enabled))
2978 WARN_ON(i3c_dev_disable_ibi_locked(dev));
2980 master->ops->free_ibi(dev);
2983 destroy_workqueue(dev->ibi->wq);
2984 dev->ibi->wq = NULL;
2991 static int __init i3c_init(void)
2995 res = of_alias_get_highest_id("i3c");
2997 mutex_lock(&i3c_core_lock);
2998 __i3c_first_dynamic_bus_num = res + 1;
2999 mutex_unlock(&i3c_core_lock);
3002 res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
3006 res = bus_register(&i3c_bus_type);
3008 goto out_unreg_notifier;
3013 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
3017 subsys_initcall(i3c_init);
3019 static void __exit i3c_exit(void)
3021 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
3022 idr_destroy(&i3c_bus_idr);
3023 bus_unregister(&i3c_bus_type);
3025 module_exit(i3c_exit);
3028 MODULE_DESCRIPTION("I3C core");
3029 MODULE_LICENSE("GPL v2");