1 // SPDX-License-Identifier: MIT
3 * Copyright 2023, Intel Corporation.
8 #include "intel_display_types.h"
9 #include "intel_dsb_buffer.h"
13 u32 intel_dsb_buffer_ggtt_offset(struct intel_dsb_buffer *dsb_buf)
15 return xe_bo_ggtt_addr(dsb_buf->vma->bo);
18 void intel_dsb_buffer_write(struct intel_dsb_buffer *dsb_buf, u32 idx, u32 val)
20 iosys_map_wr(&dsb_buf->vma->bo->vmap, idx * 4, u32, val);
23 u32 intel_dsb_buffer_read(struct intel_dsb_buffer *dsb_buf, u32 idx)
25 return iosys_map_rd(&dsb_buf->vma->bo->vmap, idx * 4, u32);
28 void intel_dsb_buffer_memset(struct intel_dsb_buffer *dsb_buf, u32 idx, u32 val, size_t size)
30 WARN_ON(idx > (dsb_buf->buf_size - size) / sizeof(*dsb_buf->cmd_buf));
32 iosys_map_memset(&dsb_buf->vma->bo->vmap, idx * 4, val, size);
35 bool intel_dsb_buffer_create(struct intel_crtc *crtc, struct intel_dsb_buffer *dsb_buf, size_t size)
37 struct drm_i915_private *i915 = to_i915(crtc->base.dev);
38 struct drm_i915_gem_object *obj;
41 vma = kzalloc(sizeof(*vma), GFP_KERNEL);
45 obj = xe_bo_create_pin_map(i915, xe_device_get_root_tile(i915),
46 NULL, PAGE_ALIGN(size),
48 XE_BO_FLAG_VRAM_IF_DGFX(xe_device_get_root_tile(i915)) |
57 dsb_buf->buf_size = size;
62 void intel_dsb_buffer_cleanup(struct intel_dsb_buffer *dsb_buf)
64 xe_bo_unpin_map_no_vm(dsb_buf->vma->bo);
68 void intel_dsb_buffer_flush_map(struct intel_dsb_buffer *dsb_buf)
70 /* TODO: add xe specific flush_map() for dsb buffer object. */