drivers/gpu/drm/nouveau/nouveau_dp.c

   1 /*
   2  * Copyright 2009 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24
  25 #include <drm/display/drm_dp_helper.h>
  26
  27 #include "nouveau_drv.h"
  28 #include "nouveau_connector.h"
  29 #include "nouveau_encoder.h"
  30 #include "nouveau_crtc.h"
  31
  32 #include <nvif/if0011.h>
  33
  34 MODULE_PARM_DESC(mst, "Enable DisplayPort multi-stream (default: enabled)");
  35 static int nouveau_mst = 1;
  36 module_param_named(mst, nouveau_mst, int, 0400);
  37
  38 static bool
  39 nouveau_dp_has_sink_count(struct drm_connector *connector,
  40                           struct nouveau_encoder *outp)
  41 {
  42         return drm_dp_read_sink_count_cap(connector, outp->dp.dpcd, &outp->dp.desc);
  43 }
  44
  45 static bool
  46 nouveau_dp_probe_lttpr(struct nouveau_encoder *outp)
  47 {
  48         u8 rev, size = sizeof(rev);
  49         int ret;
  50
  51         ret = nvif_outp_dp_aux_xfer(&outp->outp, DP_AUX_NATIVE_READ, &size,
  52                                     DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV,
  53                                     &rev);
  54         if (ret || size < sizeof(rev) || rev < 0x14)
  55                 return false;
  56
  57         return true;
  58 }
  59
  60 static enum drm_connector_status
  61 nouveau_dp_probe_dpcd(struct nouveau_connector *nv_connector,
  62                       struct nouveau_encoder *outp)
  63 {
  64         struct drm_connector *connector = &nv_connector->base;
  65         struct drm_dp_aux *aux = &nv_connector->aux;
  66         struct nv50_mstm *mstm = NULL;
  67         enum drm_connector_status status = connector_status_disconnected;
  68         int ret;
  69         u8 *dpcd = outp->dp.dpcd;
  70
  71         outp->dp.lttpr.nr = 0;
  72         outp->dp.rate_nr  = 0;
  73         outp->dp.link_nr  = 0;
  74         outp->dp.link_bw  = 0;
  75
  76         if (connector->connector_type != DRM_MODE_CONNECTOR_eDP &&
  77             nouveau_dp_probe_lttpr(outp) &&
  78             !drm_dp_read_dpcd_caps(aux, dpcd) &&
  79             !drm_dp_read_lttpr_common_caps(aux, dpcd, outp->dp.lttpr.caps)) {
  80                 int nr = drm_dp_lttpr_count(outp->dp.lttpr.caps);
  81
  82                 if (nr) {
  83                         drm_dp_dpcd_writeb(aux, DP_PHY_REPEATER_MODE,
  84                                                 DP_PHY_REPEATER_MODE_TRANSPARENT);
  85
  86                         if (nr > 0) {
  87                                 ret = drm_dp_dpcd_writeb(aux, DP_PHY_REPEATER_MODE,
  88                                                               DP_PHY_REPEATER_MODE_NON_TRANSPARENT);
  89                                 if (ret != 1) {
  90                                         drm_dp_dpcd_writeb(aux, DP_PHY_REPEATER_MODE,
  91                                                                 DP_PHY_REPEATER_MODE_TRANSPARENT);
  92                                 } else {
  93                                         outp->dp.lttpr.nr = nr;
  94                                 }
  95                         }
  96                 }
  97         }
  98
  99         ret = drm_dp_read_dpcd_caps(aux, dpcd);
 100         if (ret < 0)
 101                 goto out;
 102
 103         outp->dp.link_nr = dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK;
 104         if (outp->dcb->dpconf.link_nr < outp->dp.link_nr)
 105                 outp->dp.link_nr = outp->dcb->dpconf.link_nr;
 106
 107         if (outp->dp.lttpr.nr) {
 108                 int links = drm_dp_lttpr_max_lane_count(outp->dp.lttpr.caps);
 109
 110                 if (links && links < outp->dp.link_nr)
 111                         outp->dp.link_nr = links;
 112         }
 113
 114         if (connector->connector_type == DRM_MODE_CONNECTOR_eDP && dpcd[DP_DPCD_REV] >= 0x13) {
 115                 __le16 rates[DP_MAX_SUPPORTED_RATES];
 116
 117                 ret = drm_dp_dpcd_read(aux, DP_SUPPORTED_LINK_RATES, rates, sizeof(rates));
 118                 if (ret == sizeof(rates)) {
 119                         for (int i = 0; i < ARRAY_SIZE(rates); i++) {
 120                                 u32 rate = (le16_to_cpu(rates[i]) * 200) / 10;
 121                                 int j;
 122
 123                                 if (!rate)
 124                                         break;
 125
 126                                 for (j = 0; j < outp->dp.rate_nr; j++) {
 127                                         if (rate > outp->dp.rate[j].rate) {
 128                                                 for (int k = outp->dp.rate_nr; k > j; k--)
 129                                                         outp->dp.rate[k] = outp->dp.rate[k - 1];
 130                                                 break;
 131                                         }
 132                                 }
 133
 134                                 outp->dp.rate[j].dpcd = i;
 135                                 outp->dp.rate[j].rate = rate;
 136                                 outp->dp.rate_nr++;
 137                         }
 138                 }
 139         }
 140
 141         if (!outp->dp.rate_nr) {
 142                 const u32 rates[] = { 810000, 540000, 270000, 162000 };
 143                 u32 max_rate = dpcd[DP_MAX_LINK_RATE] * 27000;
 144
 145                 if (outp->dp.lttpr.nr) {
 146                         int rate = drm_dp_lttpr_max_link_rate(outp->dp.lttpr.caps);
 147
 148                         if (rate && rate < max_rate)
 149                                 max_rate = rate;
 150                 }
 151
 152                 max_rate = min_t(int, max_rate, outp->dcb->dpconf.link_bw);
 153
 154                 for (int i = 0; i < ARRAY_SIZE(rates); i++) {
 155                         if (rates[i] <= max_rate) {
 156                                 outp->dp.rate[outp->dp.rate_nr].dpcd = -1;
 157                                 outp->dp.rate[outp->dp.rate_nr].rate = rates[i];
 158                                 outp->dp.rate_nr++;
 159                         }
 160                 }
 161
 162                 if (WARN_ON(!outp->dp.rate_nr))
 163                         goto out;
 164         }
 165
 166         ret = nvif_outp_dp_rates(&outp->outp, outp->dp.rate, outp->dp.rate_nr);
 167         if (ret)
 168                 goto out;
 169
 170         for (int i = 0; i < outp->dp.rate_nr; i++) {
 171                 u32 link_bw = outp->dp.rate[i].rate;
 172
 173                 if (link_bw > outp->dp.link_bw)
 174                         outp->dp.link_bw = link_bw;
 175         }
 176
 177         ret = drm_dp_read_desc(aux, &outp->dp.desc, drm_dp_is_branch(dpcd));
 178         if (ret < 0)
 179                 goto out;
 180
 181         if (nouveau_mst) {
 182                 mstm = outp->dp.mstm;
 183                 if (mstm)
 184                         mstm->can_mst = drm_dp_read_mst_cap(aux, dpcd) == DRM_DP_MST;
 185         }
 186
 187         if (nouveau_dp_has_sink_count(connector, outp)) {
 188                 ret = drm_dp_read_sink_count(aux);
 189                 if (ret < 0)
 190                         goto out;
 191
 192                 outp->dp.sink_count = ret;
 193
 194                 /*
 195                  * Dongle connected, but no display. Don't bother reading
 196                  * downstream port info
 197                  */
 198                 if (!outp->dp.sink_count)
 199                         return connector_status_disconnected;
 200         }
 201
 202         ret = drm_dp_read_downstream_info(aux, dpcd,
 203                                           outp->dp.downstream_ports);
 204         if (ret < 0)
 205                 goto out;
 206
 207         status = connector_status_connected;
 208 out:
 209         if (status != connector_status_connected) {
 210                 /* Clear any cached info */
 211                 outp->dp.sink_count = 0;
 212         }
 213         return status;
 214 }
 215
 216 int
 217 nouveau_dp_detect(struct nouveau_connector *nv_connector,
 218                   struct nouveau_encoder *nv_encoder)
 219 {
 220         struct drm_device *dev = nv_encoder->base.base.dev;
 221         struct nouveau_drm *drm = nouveau_drm(dev);
 222         struct drm_connector *connector = &nv_connector->base;
 223         struct nv50_mstm *mstm = nv_encoder->dp.mstm;
 224         enum drm_connector_status status;
 225         u8 *dpcd = nv_encoder->dp.dpcd;
 226         int ret = NOUVEAU_DP_NONE, hpd;
 227
 228         /* eDP ports don't support hotplugging - so there's no point in probing eDP ports unless we
 229          * haven't probed them once before.
 230          */
 231         if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
 232                 if (connector->status == connector_status_connected)
 233                         return NOUVEAU_DP_SST;
 234                 else if (connector->status == connector_status_disconnected)
 235                         return NOUVEAU_DP_NONE;
 236         }
 237
 238         // Ensure that the aux bus is enabled for probing
 239         drm_dp_dpcd_set_powered(&nv_connector->aux, true);
 240
 241         mutex_lock(&nv_encoder->dp.hpd_irq_lock);
 242         if (mstm) {
 243                 /* If we're not ready to handle MST state changes yet, just
 244                  * report the last status of the connector. We'll reprobe it
 245                  * once we've resumed.
 246                  */
 247                 if (mstm->suspended) {
 248                         if (mstm->is_mst)
 249                                 ret = NOUVEAU_DP_MST;
 250                         else if (connector->status ==
 251                                  connector_status_connected)
 252                                 ret = NOUVEAU_DP_SST;
 253
 254                         goto out;
 255                 }
 256         }
 257
 258         hpd = nvif_outp_detect(&nv_encoder->outp);
 259         if (hpd == NOT_PRESENT) {
 260                 nvif_outp_dp_aux_pwr(&nv_encoder->outp, false);
 261                 goto out;
 262         }
 263         nvif_outp_dp_aux_pwr(&nv_encoder->outp, true);
 264
 265         status = nouveau_dp_probe_dpcd(nv_connector, nv_encoder);
 266         if (status == connector_status_disconnected) {
 267                 nvif_outp_dp_aux_pwr(&nv_encoder->outp, false);
 268                 goto out;
 269         }
 270
 271         /* If we're in MST mode, we're done here */
 272         if (mstm && mstm->can_mst && mstm->is_mst) {
 273                 ret = NOUVEAU_DP_MST;
 274                 goto out;
 275         }
 276
 277         NV_DEBUG(drm, "sink dpcd version: 0x%02x\n", dpcd[DP_DPCD_REV]);
 278         for (int i = 0; i < nv_encoder->dp.rate_nr; i++)
 279                 NV_DEBUG(drm, "sink rate %d: %d\n", i, nv_encoder->dp.rate[i].rate);
 280
 281         NV_DEBUG(drm, "encoder: %dx%d\n", nv_encoder->dcb->dpconf.link_nr,
 282                                           nv_encoder->dcb->dpconf.link_bw);
 283         NV_DEBUG(drm, "maximum: %dx%d\n", nv_encoder->dp.link_nr,
 284                                           nv_encoder->dp.link_bw);
 285
 286         if (mstm && mstm->can_mst) {
 287                 ret = nv50_mstm_detect(nv_encoder);
 288                 if (ret == 1) {
 289                         ret = NOUVEAU_DP_MST;
 290                         goto out;
 291                 } else if (ret != 0) {
 292                         nvif_outp_dp_aux_pwr(&nv_encoder->outp, false);
 293                         goto out;
 294                 }
 295         }
 296         ret = NOUVEAU_DP_SST;
 297
 298 out:
 299         if (mstm && !mstm->suspended && ret != NOUVEAU_DP_MST)
 300                 nv50_mstm_remove(mstm);
 301
 302         /* GSP doesn't like when we try to do aux transactions on a port it considers disconnected,
 303          * and since we don't really have a usecase for that anyway - just disable the aux bus here
 304          * if we've decided the connector is disconnected
 305          */
 306         if (ret == NOUVEAU_DP_NONE)
 307                 drm_dp_dpcd_set_powered(&nv_connector->aux, false);
 308
 309         mutex_unlock(&nv_encoder->dp.hpd_irq_lock);
 310         return ret;
 311 }
 312
 313 void
 314 nouveau_dp_power_down(struct nouveau_encoder *outp)
 315 {
 316         struct drm_dp_aux *aux = &outp->conn->aux;
 317         int ret;
 318         u8 pwr;
 319
 320         mutex_lock(&outp->dp.hpd_irq_lock);
 321
 322         ret = drm_dp_dpcd_readb(aux, DP_SET_POWER, &pwr);
 323         if (ret == 1) {
 324                 pwr &= ~DP_SET_POWER_MASK;
 325                 pwr |=  DP_SET_POWER_D3;
 326                 drm_dp_dpcd_writeb(aux, DP_SET_POWER, pwr);
 327         }
 328
 329         outp->dp.lt.nr = 0;
 330         mutex_unlock(&outp->dp.hpd_irq_lock);
 331 }
 332
 333 static bool
 334 nouveau_dp_train_link(struct nouveau_encoder *outp, bool retrain)
 335 {
 336         struct drm_dp_aux *aux = &outp->conn->aux;
 337         bool post_lt = false;
 338         int ret, retries = 0;
 339
 340         if ( (outp->dp.dpcd[DP_MAX_LANE_COUNT] & 0x20) &&
 341             !(outp->dp.dpcd[DP_MAX_DOWNSPREAD] & DP_TPS4_SUPPORTED))
 342             post_lt = true;
 343
 344 retry:
 345         ret = nvif_outp_dp_train(&outp->outp, outp->dp.dpcd,
 346                                               outp->dp.lttpr.nr,
 347                                               outp->dp.lt.nr,
 348                                               outp->dp.lt.bw,
 349                                               outp->dp.lt.mst,
 350                                               post_lt,
 351                                               retrain);
 352         if (ret)
 353                 return false;
 354
 355         if (post_lt) {
 356                 u8 stat[DP_LINK_STATUS_SIZE];
 357                 u8 prev[2];
 358                 u8 time = 0, adjusts = 0, tmp;
 359
 360                 ret = drm_dp_dpcd_read_phy_link_status(aux, DP_PHY_DPRX, stat);
 361                 if (ret)
 362                         return false;
 363
 364                 for (;;) {
 365                         if (!drm_dp_channel_eq_ok(stat, outp->dp.lt.nr)) {
 366                                 ret = 1;
 367                                 break;
 368                         }
 369
 370                         if (!(stat[2] & 0x02))
 371                                 break;
 372
 373                         msleep(5);
 374                         time += 5;
 375
 376                         memcpy(prev, &stat[4], sizeof(prev));
 377                         ret = drm_dp_dpcd_read_phy_link_status(aux, DP_PHY_DPRX, stat);
 378                         if (ret)
 379                                 break;
 380
 381                         if (!memcmp(prev, &stat[4], sizeof(prev))) {
 382                                 if (time > 200)
 383                                         break;
 384                         } else {
 385                                 u8 pe[4], vs[4];
 386
 387                                 if (adjusts++ == 6)
 388                                         break;
 389
 390                                 for (int i = 0; i < outp->dp.lt.nr; i++) {
 391                                         pe[i] = drm_dp_get_adjust_request_pre_emphasis(stat, i) >>
 392                                                         DP_TRAIN_PRE_EMPHASIS_SHIFT;
 393                                         vs[i] = drm_dp_get_adjust_request_voltage(stat, i) >>
 394                                                         DP_TRAIN_VOLTAGE_SWING_SHIFT;
 395                                 }
 396
 397                                 ret = nvif_outp_dp_drive(&outp->outp, outp->dp.lt.nr, pe, vs);
 398                                 if (ret)
 399                                         break;
 400
 401                                 time = 0;
 402                         }
 403                 }
 404
 405                 if (drm_dp_dpcd_readb(aux, DP_LANE_COUNT_SET, &tmp) == 1) {
 406                         tmp &= ~0x20;
 407                         drm_dp_dpcd_writeb(aux, DP_LANE_COUNT_SET, tmp);
 408                 }
 409         }
 410
 411         if (ret == 1 && retries++ < 3)
 412                 goto retry;
 413
 414         return ret == 0;
 415 }
 416
 417 bool
 418 nouveau_dp_train(struct nouveau_encoder *outp, bool mst, u32 khz, u8 bpc)
 419 {
 420         struct nouveau_drm *drm = nouveau_drm(outp->base.base.dev);
 421         struct drm_dp_aux *aux = &outp->conn->aux;
 422         u32 min_rate;
 423         u8 pwr;
 424         bool ret = true;
 425
 426         if (mst)
 427                 min_rate = outp->dp.link_nr * outp->dp.rate[0].rate;
 428         else
 429                 min_rate = DIV_ROUND_UP(khz * bpc * 3, 8);
 430
 431         NV_DEBUG(drm, "%s link training (mst:%d min_rate:%d)\n",
 432                  outp->base.base.name, mst, min_rate);
 433
 434         mutex_lock(&outp->dp.hpd_irq_lock);
 435
 436         if (drm_dp_dpcd_readb(aux, DP_SET_POWER, &pwr) == 1) {
 437                 if ((pwr & DP_SET_POWER_MASK) != DP_SET_POWER_D0) {
 438                         pwr &= ~DP_SET_POWER_MASK;
 439                         pwr |=  DP_SET_POWER_D0;
 440                         drm_dp_dpcd_writeb(aux, DP_SET_POWER, pwr);
 441                 }
 442         }
 443
 444         for (int nr = outp->dp.link_nr; nr; nr >>= 1) {
 445                 for (int rate = 0; rate < outp->dp.rate_nr; rate++) {
 446                         if (outp->dp.rate[rate].rate * nr >= min_rate) {
 447                                 outp->dp.lt.nr = nr;
 448                                 outp->dp.lt.bw = outp->dp.rate[rate].rate;
 449                                 outp->dp.lt.mst = mst;
 450                                 if (nouveau_dp_train_link(outp, false))
 451                                         goto done;
 452                         }
 453                 }
 454         }
 455
 456         ret = false;
 457 done:
 458         mutex_unlock(&outp->dp.hpd_irq_lock);
 459         return ret;
 460 }
 461
 462 static bool
 463 nouveau_dp_link_check_locked(struct nouveau_encoder *outp)
 464 {
 465         u8 link_status[DP_LINK_STATUS_SIZE];
 466
 467         if (!outp || !outp->dp.lt.nr)
 468                 return true;
 469
 470         if (drm_dp_dpcd_read_phy_link_status(&outp->conn->aux, DP_PHY_DPRX, link_status) < 0)
 471                 return false;
 472
 473         if (drm_dp_channel_eq_ok(link_status, outp->dp.lt.nr))
 474                 return true;
 475
 476         return nouveau_dp_train_link(outp, true);
 477 }
 478
 479 bool
 480 nouveau_dp_link_check(struct nouveau_connector *nv_connector)
 481 {
 482         struct nouveau_encoder *outp = nv_connector->dp_encoder;
 483         bool link_ok = true;
 484
 485         if (outp) {
 486                 mutex_lock(&outp->dp.hpd_irq_lock);
 487                 if (outp->dp.lt.nr)
 488                         link_ok = nouveau_dp_link_check_locked(outp);
 489                 mutex_unlock(&outp->dp.hpd_irq_lock);
 490         }
 491
 492         return link_ok;
 493 }
 494
 495 void
 496 nouveau_dp_irq(struct work_struct *work)
 497 {
 498         struct nouveau_connector *nv_connector =
 499                 container_of(work, typeof(*nv_connector), irq_work);
 500         struct drm_connector *connector = &nv_connector->base;
 501         struct nouveau_encoder *outp = find_encoder(connector, DCB_OUTPUT_DP);
 502         struct nouveau_drm *drm = nouveau_drm(outp->base.base.dev);
 503         struct nv50_mstm *mstm;
 504         u64 hpd = 0;
 505         int ret;
 506
 507         if (!outp)
 508                 return;
 509
 510         mstm = outp->dp.mstm;
 511         NV_DEBUG(drm, "service %s\n", connector->name);
 512
 513         mutex_lock(&outp->dp.hpd_irq_lock);
 514
 515         if (mstm && mstm->is_mst) {
 516                 if (!nv50_mstm_service(drm, nv_connector, mstm))
 517                         hpd |= NVIF_CONN_EVENT_V0_UNPLUG;
 518         } else {
 519                 drm_dp_cec_irq(&nv_connector->aux);
 520
 521                 if (nouveau_dp_has_sink_count(connector, outp)) {
 522                         ret = drm_dp_read_sink_count(&nv_connector->aux);
 523                         if (ret != outp->dp.sink_count)
 524                                 hpd |= NVIF_CONN_EVENT_V0_PLUG;
 525                         if (ret >= 0)
 526                                 outp->dp.sink_count = ret;
 527                 }
 528         }
 529
 530         mutex_unlock(&outp->dp.hpd_irq_lock);
 531
 532         nouveau_connector_hpd(nv_connector, NVIF_CONN_EVENT_V0_IRQ | hpd);
 533 }
 534
 535 /* TODO:
 536  * - Validate against the DP caps advertised by the GPU (we don't check these
 537  *   yet)
 538  */
 539 enum drm_mode_status
 540 nv50_dp_mode_valid(struct nouveau_encoder *outp,
 541                    const struct drm_display_mode *mode,
 542                    unsigned *out_clock)
 543 {
 544         const unsigned int min_clock = 25000;
 545         unsigned int max_rate, mode_rate, ds_max_dotclock, clock = mode->clock;
 546         /* Check with the minmum bpc always, so we can advertise better modes.
 547          * In particlar not doing this causes modes to be dropped on HDR
 548          * displays as we might check with a bpc of 16 even.
 549          */
 550         const u8 bpp = 6 * 3;
 551
 552         if (mode->flags & DRM_MODE_FLAG_INTERLACE && !outp->caps.dp_interlace)
 553                 return MODE_NO_INTERLACE;
 554
 555         if ((mode->flags & DRM_MODE_FLAG_3D_MASK) == DRM_MODE_FLAG_3D_FRAME_PACKING)
 556                 clock *= 2;
 557
 558         max_rate = outp->dp.link_nr * outp->dp.link_bw;
 559         mode_rate = DIV_ROUND_UP(clock * bpp, 8);
 560         if (mode_rate > max_rate)
 561                 return MODE_CLOCK_HIGH;
 562
 563         ds_max_dotclock = drm_dp_downstream_max_dotclock(outp->dp.dpcd, outp->dp.downstream_ports);
 564         if (ds_max_dotclock && clock > ds_max_dotclock)
 565                 return MODE_CLOCK_HIGH;
 566
 567         if (clock < min_clock)
 568                 return MODE_CLOCK_LOW;
 569
 570         if (out_clock)
 571                 *out_clock = clock;
 572
 573         return MODE_OK;
 574 }