drivers/gpu/drm/meson/meson_drv.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * Copyright (C) 2016 BayLibre, SAS
   4  * Author: Neil Armstrong <[email protected]>
   5  * Copyright (C) 2014 Endless Mobile
   6  *
   7  * Written by:
   8  *     Jasper St. Pierre <[email protected]>
   9  */
  10
  11 #include <linux/component.h>
  12 #include <linux/module.h>
  13 #include <linux/of_graph.h>
  14 #include <linux/sys_soc.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/soc/amlogic/meson-canvas.h>
  17
  18 #include <drm/drm_aperture.h>
  19 #include <drm/drm_atomic_helper.h>
  20 #include <drm/drm_drv.h>
  21 #include <drm/drm_fbdev_dma.h>
  22 #include <drm/drm_gem_dma_helper.h>
  23 #include <drm/drm_gem_framebuffer_helper.h>
  24 #include <drm/drm_modeset_helper_vtables.h>
  25 #include <drm/drm_module.h>
  26 #include <drm/drm_probe_helper.h>
  27 #include <drm/drm_vblank.h>
  28
  29 #include "meson_crtc.h"
  30 #include "meson_drv.h"
  31 #include "meson_overlay.h"
  32 #include "meson_plane.h"
  33 #include "meson_osd_afbcd.h"
  34 #include "meson_registers.h"
  35 #include "meson_encoder_cvbs.h"
  36 #include "meson_encoder_hdmi.h"
  37 #include "meson_encoder_dsi.h"
  38 #include "meson_viu.h"
  39 #include "meson_vpp.h"
  40 #include "meson_rdma.h"
  41
  42 #define DRIVER_NAME "meson"
  43 #define DRIVER_DESC "Amlogic Meson DRM driver"
  44
  45 /**
  46  * DOC: Video Processing Unit
  47  *
  48  * VPU Handles the Global Video Processing, it includes management of the
  49  * clocks gates, blocks reset lines and power domains.
  50  *
  51  * What is missing :
  52  *
  53  * - Full reset of entire video processing HW blocks
  54  * - Scaling and setup of the VPU clock
  55  * - Bus clock gates
  56  * - Powering up video processing HW blocks
  57  * - Powering Up HDMI controller and PHY
  58  */
  59
  60 static const struct drm_mode_config_funcs meson_mode_config_funcs = {
  61         .atomic_check        = drm_atomic_helper_check,
  62         .atomic_commit       = drm_atomic_helper_commit,
  63         .fb_create           = drm_gem_fb_create,
  64 };
  65
  66 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = {
  67         .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
  68 };
  69
  70 static irqreturn_t meson_irq(int irq, void *arg)
  71 {
  72         struct drm_device *dev = arg;
  73         struct meson_drm *priv = dev->dev_private;
  74
  75         (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
  76
  77         meson_crtc_irq(priv);
  78
  79         return IRQ_HANDLED;
  80 }
  81
  82 static int meson_dumb_create(struct drm_file *file, struct drm_device *dev,
  83                              struct drm_mode_create_dumb *args)
  84 {
  85         /*
  86          * We need 64bytes aligned stride, and PAGE aligned size
  87          */
  88         args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64);
  89         args->size = PAGE_ALIGN(args->pitch * args->height);
  90
  91         return drm_gem_dma_dumb_create_internal(file, dev, args);
  92 }
  93
  94 DEFINE_DRM_GEM_DMA_FOPS(fops);
  95
  96 static const struct drm_driver meson_driver = {
  97         .driver_features        = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
  98
  99         /* DMA Ops */
 100         DRM_GEM_DMA_DRIVER_OPS_WITH_DUMB_CREATE(meson_dumb_create),
 101
 102         /* Misc */
 103         .fops                   = &fops,
 104         .name                   = DRIVER_NAME,
 105         .desc                   = DRIVER_DESC,
 106         .date                   = "20161109",
 107         .major                  = 1,
 108         .minor                  = 0,
 109 };
 110
 111 static bool meson_vpu_has_available_connectors(struct device *dev)
 112 {
 113         struct device_node *ep, *remote;
 114
 115         /* Parses each endpoint and check if remote exists */
 116         for_each_endpoint_of_node(dev->of_node, ep) {
 117                 /* If the endpoint node exists, consider it enabled */
 118                 remote = of_graph_get_remote_port(ep);
 119                 if (remote) {
 120                         of_node_put(remote);
 121                         of_node_put(ep);
 122                         return true;
 123                 }
 124         }
 125
 126         return false;
 127 }
 128
 129 static struct regmap_config meson_regmap_config = {
 130         .reg_bits       = 32,
 131         .val_bits       = 32,
 132         .reg_stride     = 4,
 133         .max_register   = 0x1000,
 134 };
 135
 136 static void meson_vpu_init(struct meson_drm *priv)
 137 {
 138         u32 value;
 139
 140         /*
 141          * Slave dc0 and dc5 connected to master port 1.
 142          * By default other slaves are connected to master port 0.
 143          */
 144         value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1) |
 145                 VPU_RDARB_SLAVE_TO_MASTER_PORT(5, 1);
 146         writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
 147
 148         /* Slave dc0 connected to master port 1 */
 149         value = VPU_RDARB_SLAVE_TO_MASTER_PORT(0, 1);
 150         writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
 151
 152         /* Slave dc4 and dc7 connected to master port 1 */
 153         value = VPU_RDARB_SLAVE_TO_MASTER_PORT(4, 1) |
 154                 VPU_RDARB_SLAVE_TO_MASTER_PORT(7, 1);
 155         writel_relaxed(value, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
 156
 157         /* Slave dc1 connected to master port 1 */
 158         value = VPU_RDARB_SLAVE_TO_MASTER_PORT(1, 1);
 159         writel_relaxed(value, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
 160 }
 161
 162 struct meson_drm_soc_attr {
 163         struct meson_drm_soc_limits limits;
 164         const struct soc_device_attribute *attrs;
 165 };
 166
 167 static const struct meson_drm_soc_attr meson_drm_soc_attrs[] = {
 168         /* S805X/S805Y HDMI PLL won't lock for HDMI PHY freq > 1,65GHz */
 169         {
 170                 .limits = {
 171                         .max_hdmi_phy_freq = 1650000,
 172                 },
 173                 .attrs = (const struct soc_device_attribute []) {
 174                         { .soc_id = "GXL (S805*)", },
 175                         { /* sentinel */ }
 176                 }
 177         },
 178 };
 179
 180 static int meson_drv_bind_master(struct device *dev, bool has_components)
 181 {
 182         struct platform_device *pdev = to_platform_device(dev);
 183         const struct meson_drm_match_data *match;
 184         struct meson_drm *priv;
 185         struct drm_device *drm;
 186         struct resource *res;
 187         void __iomem *regs;
 188         int ret, i;
 189
 190         /* Checks if an output connector is available */
 191         if (!meson_vpu_has_available_connectors(dev)) {
 192                 dev_err(dev, "No output connector available\n");
 193                 return -ENODEV;
 194         }
 195
 196         match = of_device_get_match_data(dev);
 197         if (!match)
 198                 return -ENODEV;
 199
 200         drm = drm_dev_alloc(&meson_driver, dev);
 201         if (IS_ERR(drm))
 202                 return PTR_ERR(drm);
 203
 204         priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
 205         if (!priv) {
 206                 ret = -ENOMEM;
 207                 goto free_drm;
 208         }
 209         drm->dev_private = priv;
 210         priv->drm = drm;
 211         priv->dev = dev;
 212         priv->compat = match->compat;
 213         priv->afbcd.ops = match->afbcd_ops;
 214
 215         regs = devm_platform_ioremap_resource_byname(pdev, "vpu");
 216         if (IS_ERR(regs)) {
 217                 ret = PTR_ERR(regs);
 218                 goto free_drm;
 219         }
 220
 221         priv->io_base = regs;
 222
 223         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
 224         if (!res) {
 225                 ret = -EINVAL;
 226                 goto free_drm;
 227         }
 228         /* Simply ioremap since it may be a shared register zone */
 229         regs = devm_ioremap(dev, res->start, resource_size(res));
 230         if (!regs) {
 231                 ret = -EADDRNOTAVAIL;
 232                 goto free_drm;
 233         }
 234
 235         priv->hhi = devm_regmap_init_mmio(dev, regs,
 236                                           &meson_regmap_config);
 237         if (IS_ERR(priv->hhi)) {
 238                 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
 239                 ret = PTR_ERR(priv->hhi);
 240                 goto free_drm;
 241         }
 242
 243         priv->canvas = meson_canvas_get(dev);
 244         if (IS_ERR(priv->canvas)) {
 245                 ret = PTR_ERR(priv->canvas);
 246                 goto free_drm;
 247         }
 248
 249         ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
 250         if (ret)
 251                 goto free_drm;
 252         ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
 253         if (ret) {
 254                 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
 255                 goto free_drm;
 256         }
 257         ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
 258         if (ret) {
 259                 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
 260                 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
 261                 goto free_drm;
 262         }
 263         ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
 264         if (ret) {
 265                 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
 266                 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
 267                 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
 268                 goto free_drm;
 269         }
 270
 271         priv->vsync_irq = platform_get_irq(pdev, 0);
 272
 273         ret = drm_vblank_init(drm, 1);
 274         if (ret)
 275                 goto free_drm;
 276
 277         /* Assign limits per soc revision/package */
 278         for (i = 0 ; i < ARRAY_SIZE(meson_drm_soc_attrs) ; ++i) {
 279                 if (soc_device_match(meson_drm_soc_attrs[i].attrs)) {
 280                         priv->limits = &meson_drm_soc_attrs[i].limits;
 281                         break;
 282                 }
 283         }
 284
 285         /*
 286          * Remove early framebuffers (ie. simplefb). The framebuffer can be
 287          * located anywhere in RAM
 288          */
 289         ret = drm_aperture_remove_framebuffers(&meson_driver);
 290         if (ret)
 291                 goto free_drm;
 292
 293         ret = drmm_mode_config_init(drm);
 294         if (ret)
 295                 goto free_drm;
 296         drm->mode_config.max_width = 3840;
 297         drm->mode_config.max_height = 2160;
 298         drm->mode_config.funcs = &meson_mode_config_funcs;
 299         drm->mode_config.helper_private = &meson_mode_config_helpers;
 300
 301         /* Hardware Initialization */
 302
 303         meson_vpu_init(priv);
 304         meson_venc_init(priv);
 305         meson_vpp_init(priv);
 306         meson_viu_init(priv);
 307         if (priv->afbcd.ops) {
 308                 ret = priv->afbcd.ops->init(priv);
 309                 if (ret)
 310                         goto free_drm;
 311         }
 312
 313         /* Encoder Initialization */
 314
 315         ret = meson_encoder_cvbs_probe(priv);
 316         if (ret)
 317                 goto exit_afbcd;
 318
 319         if (has_components) {
 320                 ret = component_bind_all(dev, drm);
 321                 if (ret) {
 322                         dev_err(drm->dev, "Couldn't bind all components\n");
 323                         /* Do not try to unbind */
 324                         has_components = false;
 325                         goto exit_afbcd;
 326                 }
 327         }
 328
 329         ret = meson_encoder_hdmi_probe(priv);
 330         if (ret)
 331                 goto exit_afbcd;
 332
 333         if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) {
 334                 ret = meson_encoder_dsi_probe(priv);
 335                 if (ret)
 336                         goto exit_afbcd;
 337         }
 338
 339         ret = meson_plane_create(priv);
 340         if (ret)
 341                 goto exit_afbcd;
 342
 343         ret = meson_overlay_create(priv);
 344         if (ret)
 345                 goto exit_afbcd;
 346
 347         ret = meson_crtc_create(priv);
 348         if (ret)
 349                 goto exit_afbcd;
 350
 351         ret = request_irq(priv->vsync_irq, meson_irq, 0, drm->driver->name, drm);
 352         if (ret)
 353                 goto exit_afbcd;
 354
 355         drm_mode_config_reset(drm);
 356
 357         drm_kms_helper_poll_init(drm);
 358
 359         platform_set_drvdata(pdev, priv);
 360
 361         ret = drm_dev_register(drm, 0);
 362         if (ret)
 363                 goto uninstall_irq;
 364
 365         drm_fbdev_dma_setup(drm, 32);
 366
 367         return 0;
 368
 369 uninstall_irq:
 370         free_irq(priv->vsync_irq, drm);
 371 exit_afbcd:
 372         if (priv->afbcd.ops)
 373                 priv->afbcd.ops->exit(priv);
 374 free_drm:
 375         drm_dev_put(drm);
 376
 377         meson_encoder_dsi_remove(priv);
 378         meson_encoder_hdmi_remove(priv);
 379         meson_encoder_cvbs_remove(priv);
 380
 381         if (has_components)
 382                 component_unbind_all(dev, drm);
 383
 384         return ret;
 385 }
 386
 387 static int meson_drv_bind(struct device *dev)
 388 {
 389         return meson_drv_bind_master(dev, true);
 390 }
 391
 392 static void meson_drv_unbind(struct device *dev)
 393 {
 394         struct meson_drm *priv = dev_get_drvdata(dev);
 395         struct drm_device *drm = priv->drm;
 396
 397         if (priv->canvas) {
 398                 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
 399                 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
 400                 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
 401                 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
 402         }
 403
 404         drm_dev_unregister(drm);
 405         drm_kms_helper_poll_fini(drm);
 406         drm_atomic_helper_shutdown(drm);
 407         free_irq(priv->vsync_irq, drm);
 408         drm_dev_put(drm);
 409
 410         meson_encoder_dsi_remove(priv);
 411         meson_encoder_hdmi_remove(priv);
 412         meson_encoder_cvbs_remove(priv);
 413
 414         component_unbind_all(dev, drm);
 415
 416         if (priv->afbcd.ops)
 417                 priv->afbcd.ops->exit(priv);
 418 }
 419
 420 static const struct component_master_ops meson_drv_master_ops = {
 421         .bind   = meson_drv_bind,
 422         .unbind = meson_drv_unbind,
 423 };
 424
 425 static int __maybe_unused meson_drv_pm_suspend(struct device *dev)
 426 {
 427         struct meson_drm *priv = dev_get_drvdata(dev);
 428
 429         if (!priv)
 430                 return 0;
 431
 432         return drm_mode_config_helper_suspend(priv->drm);
 433 }
 434
 435 static int __maybe_unused meson_drv_pm_resume(struct device *dev)
 436 {
 437         struct meson_drm *priv = dev_get_drvdata(dev);
 438
 439         if (!priv)
 440                 return 0;
 441
 442         meson_vpu_init(priv);
 443         meson_venc_init(priv);
 444         meson_vpp_init(priv);
 445         meson_viu_init(priv);
 446         if (priv->afbcd.ops)
 447                 priv->afbcd.ops->init(priv);
 448
 449         return drm_mode_config_helper_resume(priv->drm);
 450 }
 451
 452 static void meson_drv_shutdown(struct platform_device *pdev)
 453 {
 454         struct meson_drm *priv = dev_get_drvdata(&pdev->dev);
 455
 456         if (!priv)
 457                 return;
 458
 459         drm_kms_helper_poll_fini(priv->drm);
 460         drm_atomic_helper_shutdown(priv->drm);
 461 }
 462
 463 /*
 464  * Only devices to use as components
 465  * TOFIX: get rid of components when we can finally
 466  * get meson_dx_hdmi to stop using the meson_drm
 467  * private structure for HHI registers.
 468  */
 469 static const struct of_device_id components_dev_match[] = {
 470         { .compatible = "amlogic,meson-gxbb-dw-hdmi" },
 471         { .compatible = "amlogic,meson-gxl-dw-hdmi" },
 472         { .compatible = "amlogic,meson-gxm-dw-hdmi" },
 473         { .compatible = "amlogic,meson-g12a-dw-hdmi" },
 474         {}
 475 };
 476
 477 static int meson_drv_probe(struct platform_device *pdev)
 478 {
 479         struct component_match *match = NULL;
 480         struct device_node *np = pdev->dev.of_node;
 481         struct device_node *ep, *remote;
 482         int count = 0;
 483
 484         for_each_endpoint_of_node(np, ep) {
 485                 remote = of_graph_get_remote_port_parent(ep);
 486                 if (!remote || !of_device_is_available(remote)) {
 487                         of_node_put(remote);
 488                         continue;
 489                 }
 490
 491                 if (of_match_node(components_dev_match, remote)) {
 492                         component_match_add(&pdev->dev, &match, component_compare_of, remote);
 493
 494                         dev_dbg(&pdev->dev, "parent %pOF remote match add %pOF parent %s\n",
 495                                 np, remote, dev_name(&pdev->dev));
 496                 }
 497
 498                 of_node_put(remote);
 499
 500                 ++count;
 501         }
 502
 503         if (count && !match)
 504                 return meson_drv_bind_master(&pdev->dev, false);
 505
 506         /* If some endpoints were found, initialize the nodes */
 507         if (count) {
 508                 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);
 509
 510                 return component_master_add_with_match(&pdev->dev,
 511                                                        &meson_drv_master_ops,
 512                                                        match);
 513         }
 514
 515         /* If no output endpoints were available, simply bail out */
 516         return 0;
 517 };
 518
 519 static void meson_drv_remove(struct platform_device *pdev)
 520 {
 521         component_master_del(&pdev->dev, &meson_drv_master_ops);
 522 }
 523
 524 static struct meson_drm_match_data meson_drm_gxbb_data = {
 525         .compat = VPU_COMPATIBLE_GXBB,
 526 };
 527
 528 static struct meson_drm_match_data meson_drm_gxl_data = {
 529         .compat = VPU_COMPATIBLE_GXL,
 530 };
 531
 532 static struct meson_drm_match_data meson_drm_gxm_data = {
 533         .compat = VPU_COMPATIBLE_GXM,
 534         .afbcd_ops = &meson_afbcd_gxm_ops,
 535 };
 536
 537 static struct meson_drm_match_data meson_drm_g12a_data = {
 538         .compat = VPU_COMPATIBLE_G12A,
 539         .afbcd_ops = &meson_afbcd_g12a_ops,
 540 };
 541
 542 static const struct of_device_id dt_match[] = {
 543         { .compatible = "amlogic,meson-gxbb-vpu",
 544           .data       = (void *)&meson_drm_gxbb_data },
 545         { .compatible = "amlogic,meson-gxl-vpu",
 546           .data       = (void *)&meson_drm_gxl_data },
 547         { .compatible = "amlogic,meson-gxm-vpu",
 548           .data       = (void *)&meson_drm_gxm_data },
 549         { .compatible = "amlogic,meson-g12a-vpu",
 550           .data       = (void *)&meson_drm_g12a_data },
 551         {}
 552 };
 553 MODULE_DEVICE_TABLE(of, dt_match);
 554
 555 static const struct dev_pm_ops meson_drv_pm_ops = {
 556         SET_SYSTEM_SLEEP_PM_OPS(meson_drv_pm_suspend, meson_drv_pm_resume)
 557 };
 558
 559 static struct platform_driver meson_drm_platform_driver = {
 560         .probe      = meson_drv_probe,
 561         .remove_new = meson_drv_remove,
 562         .shutdown   = meson_drv_shutdown,
 563         .driver     = {
 564                 .name   = "meson-drm",
 565                 .of_match_table = dt_match,
 566                 .pm = &meson_drv_pm_ops,
 567         },
 568 };
 569
 570 drm_module_platform_driver(meson_drm_platform_driver);
 571
 572 MODULE_AUTHOR("Jasper St. Pierre <[email protected]>");
 573 MODULE_AUTHOR("Neil Armstrong <[email protected]>");
 574 MODULE_DESCRIPTION(DRIVER_DESC);
 575 MODULE_LICENSE("GPL");