]> Git Repo - linux.git/blob - drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
Merge patch series "riscv: Extension parsing fixes"
[linux.git] / drivers / gpu / drm / i915 / gem / i915_gem_execbuffer.c
1 /*
2  * SPDX-License-Identifier: MIT
3  *
4  * Copyright © 2008,2010 Intel Corporation
5  */
6
7 #include <linux/dma-resv.h>
8 #include <linux/highmem.h>
9 #include <linux/sync_file.h>
10 #include <linux/uaccess.h>
11
12 #include <drm/drm_auth.h>
13 #include <drm/drm_syncobj.h>
14
15 #include "display/intel_frontbuffer.h"
16
17 #include "gem/i915_gem_ioctls.h"
18 #include "gt/intel_context.h"
19 #include "gt/intel_gpu_commands.h"
20 #include "gt/intel_gt.h"
21 #include "gt/intel_gt_buffer_pool.h"
22 #include "gt/intel_gt_pm.h"
23 #include "gt/intel_ring.h"
24
25 #include "pxp/intel_pxp.h"
26
27 #include "i915_cmd_parser.h"
28 #include "i915_drv.h"
29 #include "i915_file_private.h"
30 #include "i915_gem_clflush.h"
31 #include "i915_gem_context.h"
32 #include "i915_gem_evict.h"
33 #include "i915_gem_ioctls.h"
34 #include "i915_reg.h"
35 #include "i915_trace.h"
36 #include "i915_user_extensions.h"
37
38 struct eb_vma {
39         struct i915_vma *vma;
40         unsigned int flags;
41
42         /** This vma's place in the execbuf reservation list */
43         struct drm_i915_gem_exec_object2 *exec;
44         struct list_head bind_link;
45         struct list_head reloc_link;
46
47         struct hlist_node node;
48         u32 handle;
49 };
50
51 enum {
52         FORCE_CPU_RELOC = 1,
53         FORCE_GTT_RELOC,
54         FORCE_GPU_RELOC,
55 #define DBG_FORCE_RELOC 0 /* choose one of the above! */
56 };
57
58 /* __EXEC_OBJECT_ flags > BIT(29) defined in i915_vma.h */
59 #define __EXEC_OBJECT_HAS_PIN           BIT(29)
60 #define __EXEC_OBJECT_HAS_FENCE         BIT(28)
61 #define __EXEC_OBJECT_USERPTR_INIT      BIT(27)
62 #define __EXEC_OBJECT_NEEDS_MAP         BIT(26)
63 #define __EXEC_OBJECT_NEEDS_BIAS        BIT(25)
64 #define __EXEC_OBJECT_INTERNAL_FLAGS    (~0u << 25) /* all of the above + */
65 #define __EXEC_OBJECT_RESERVED (__EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_FENCE)
66
67 #define __EXEC_HAS_RELOC        BIT(31)
68 #define __EXEC_ENGINE_PINNED    BIT(30)
69 #define __EXEC_USERPTR_USED     BIT(29)
70 #define __EXEC_INTERNAL_FLAGS   (~0u << 29)
71 #define UPDATE                  PIN_OFFSET_FIXED
72
73 #define BATCH_OFFSET_BIAS (256*1024)
74
75 #define __I915_EXEC_ILLEGAL_FLAGS \
76         (__I915_EXEC_UNKNOWN_FLAGS | \
77          I915_EXEC_CONSTANTS_MASK  | \
78          I915_EXEC_RESOURCE_STREAMER)
79
80 /* Catch emission of unexpected errors for CI! */
81 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)
82 #undef EINVAL
83 #define EINVAL ({ \
84         DRM_DEBUG_DRIVER("EINVAL at %s:%d\n", __func__, __LINE__); \
85         22; \
86 })
87 #endif
88
89 /**
90  * DOC: User command execution
91  *
92  * Userspace submits commands to be executed on the GPU as an instruction
93  * stream within a GEM object we call a batchbuffer. This instructions may
94  * refer to other GEM objects containing auxiliary state such as kernels,
95  * samplers, render targets and even secondary batchbuffers. Userspace does
96  * not know where in the GPU memory these objects reside and so before the
97  * batchbuffer is passed to the GPU for execution, those addresses in the
98  * batchbuffer and auxiliary objects are updated. This is known as relocation,
99  * or patching. To try and avoid having to relocate each object on the next
100  * execution, userspace is told the location of those objects in this pass,
101  * but this remains just a hint as the kernel may choose a new location for
102  * any object in the future.
103  *
104  * At the level of talking to the hardware, submitting a batchbuffer for the
105  * GPU to execute is to add content to a buffer from which the HW
106  * command streamer is reading.
107  *
108  * 1. Add a command to load the HW context. For Logical Ring Contexts, i.e.
109  *    Execlists, this command is not placed on the same buffer as the
110  *    remaining items.
111  *
112  * 2. Add a command to invalidate caches to the buffer.
113  *
114  * 3. Add a batchbuffer start command to the buffer; the start command is
115  *    essentially a token together with the GPU address of the batchbuffer
116  *    to be executed.
117  *
118  * 4. Add a pipeline flush to the buffer.
119  *
120  * 5. Add a memory write command to the buffer to record when the GPU
121  *    is done executing the batchbuffer. The memory write writes the
122  *    global sequence number of the request, ``i915_request::global_seqno``;
123  *    the i915 driver uses the current value in the register to determine
124  *    if the GPU has completed the batchbuffer.
125  *
126  * 6. Add a user interrupt command to the buffer. This command instructs
127  *    the GPU to issue an interrupt when the command, pipeline flush and
128  *    memory write are completed.
129  *
130  * 7. Inform the hardware of the additional commands added to the buffer
131  *    (by updating the tail pointer).
132  *
133  * Processing an execbuf ioctl is conceptually split up into a few phases.
134  *
135  * 1. Validation - Ensure all the pointers, handles and flags are valid.
136  * 2. Reservation - Assign GPU address space for every object
137  * 3. Relocation - Update any addresses to point to the final locations
138  * 4. Serialisation - Order the request with respect to its dependencies
139  * 5. Construction - Construct a request to execute the batchbuffer
140  * 6. Submission (at some point in the future execution)
141  *
142  * Reserving resources for the execbuf is the most complicated phase. We
143  * neither want to have to migrate the object in the address space, nor do
144  * we want to have to update any relocations pointing to this object. Ideally,
145  * we want to leave the object where it is and for all the existing relocations
146  * to match. If the object is given a new address, or if userspace thinks the
147  * object is elsewhere, we have to parse all the relocation entries and update
148  * the addresses. Userspace can set the I915_EXEC_NORELOC flag to hint that
149  * all the target addresses in all of its objects match the value in the
150  * relocation entries and that they all match the presumed offsets given by the
151  * list of execbuffer objects. Using this knowledge, we know that if we haven't
152  * moved any buffers, all the relocation entries are valid and we can skip
153  * the update. (If userspace is wrong, the likely outcome is an impromptu GPU
154  * hang.) The requirement for using I915_EXEC_NO_RELOC are:
155  *
156  *      The addresses written in the objects must match the corresponding
157  *      reloc.presumed_offset which in turn must match the corresponding
158  *      execobject.offset.
159  *
160  *      Any render targets written to in the batch must be flagged with
161  *      EXEC_OBJECT_WRITE.
162  *
163  *      To avoid stalling, execobject.offset should match the current
164  *      address of that object within the active context.
165  *
166  * The reservation is done is multiple phases. First we try and keep any
167  * object already bound in its current location - so as long as meets the
168  * constraints imposed by the new execbuffer. Any object left unbound after the
169  * first pass is then fitted into any available idle space. If an object does
170  * not fit, all objects are removed from the reservation and the process rerun
171  * after sorting the objects into a priority order (more difficult to fit
172  * objects are tried first). Failing that, the entire VM is cleared and we try
173  * to fit the execbuf once last time before concluding that it simply will not
174  * fit.
175  *
176  * A small complication to all of this is that we allow userspace not only to
177  * specify an alignment and a size for the object in the address space, but
178  * we also allow userspace to specify the exact offset. This objects are
179  * simpler to place (the location is known a priori) all we have to do is make
180  * sure the space is available.
181  *
182  * Once all the objects are in place, patching up the buried pointers to point
183  * to the final locations is a fairly simple job of walking over the relocation
184  * entry arrays, looking up the right address and rewriting the value into
185  * the object. Simple! ... The relocation entries are stored in user memory
186  * and so to access them we have to copy them into a local buffer. That copy
187  * has to avoid taking any pagefaults as they may lead back to a GEM object
188  * requiring the struct_mutex (i.e. recursive deadlock). So once again we split
189  * the relocation into multiple passes. First we try to do everything within an
190  * atomic context (avoid the pagefaults) which requires that we never wait. If
191  * we detect that we may wait, or if we need to fault, then we have to fallback
192  * to a slower path. The slowpath has to drop the mutex. (Can you hear alarm
193  * bells yet?) Dropping the mutex means that we lose all the state we have
194  * built up so far for the execbuf and we must reset any global data. However,
195  * we do leave the objects pinned in their final locations - which is a
196  * potential issue for concurrent execbufs. Once we have left the mutex, we can
197  * allocate and copy all the relocation entries into a large array at our
198  * leisure, reacquire the mutex, reclaim all the objects and other state and
199  * then proceed to update any incorrect addresses with the objects.
200  *
201  * As we process the relocation entries, we maintain a record of whether the
202  * object is being written to. Using NORELOC, we expect userspace to provide
203  * this information instead. We also check whether we can skip the relocation
204  * by comparing the expected value inside the relocation entry with the target's
205  * final address. If they differ, we have to map the current object and rewrite
206  * the 4 or 8 byte pointer within.
207  *
208  * Serialising an execbuf is quite simple according to the rules of the GEM
209  * ABI. Execution within each context is ordered by the order of submission.
210  * Writes to any GEM object are in order of submission and are exclusive. Reads
211  * from a GEM object are unordered with respect to other reads, but ordered by
212  * writes. A write submitted after a read cannot occur before the read, and
213  * similarly any read submitted after a write cannot occur before the write.
214  * Writes are ordered between engines such that only one write occurs at any
215  * time (completing any reads beforehand) - using semaphores where available
216  * and CPU serialisation otherwise. Other GEM access obey the same rules, any
217  * write (either via mmaps using set-domain, or via pwrite) must flush all GPU
218  * reads before starting, and any read (either using set-domain or pread) must
219  * flush all GPU writes before starting. (Note we only employ a barrier before,
220  * we currently rely on userspace not concurrently starting a new execution
221  * whilst reading or writing to an object. This may be an advantage or not
222  * depending on how much you trust userspace not to shoot themselves in the
223  * foot.) Serialisation may just result in the request being inserted into
224  * a DAG awaiting its turn, but most simple is to wait on the CPU until
225  * all dependencies are resolved.
226  *
227  * After all of that, is just a matter of closing the request and handing it to
228  * the hardware (well, leaving it in a queue to be executed). However, we also
229  * offer the ability for batchbuffers to be run with elevated privileges so
230  * that they access otherwise hidden registers. (Used to adjust L3 cache etc.)
231  * Before any batch is given extra privileges we first must check that it
232  * contains no nefarious instructions, we check that each instruction is from
233  * our whitelist and all registers are also from an allowed list. We first
234  * copy the user's batchbuffer to a shadow (so that the user doesn't have
235  * access to it, either by the CPU or GPU as we scan it) and then parse each
236  * instruction. If everything is ok, we set a flag telling the hardware to run
237  * the batchbuffer in trusted mode, otherwise the ioctl is rejected.
238  */
239
240 struct eb_fence {
241         struct drm_syncobj *syncobj; /* Use with ptr_mask_bits() */
242         struct dma_fence *dma_fence;
243         u64 value;
244         struct dma_fence_chain *chain_fence;
245 };
246
247 struct i915_execbuffer {
248         struct drm_i915_private *i915; /** i915 backpointer */
249         struct drm_file *file; /** per-file lookup tables and limits */
250         struct drm_i915_gem_execbuffer2 *args; /** ioctl parameters */
251         struct drm_i915_gem_exec_object2 *exec; /** ioctl execobj[] */
252         struct eb_vma *vma;
253
254         struct intel_gt *gt; /* gt for the execbuf */
255         struct intel_context *context; /* logical state for the request */
256         struct i915_gem_context *gem_context; /** caller's context */
257         intel_wakeref_t wakeref;
258
259         /** our requests to build */
260         struct i915_request *requests[MAX_ENGINE_INSTANCE + 1];
261         /** identity of the batch obj/vma */
262         struct eb_vma *batches[MAX_ENGINE_INSTANCE + 1];
263         struct i915_vma *trampoline; /** trampoline used for chaining */
264
265         /** used for excl fence in dma_resv objects when > 1 BB submitted */
266         struct dma_fence *composite_fence;
267
268         /** actual size of execobj[] as we may extend it for the cmdparser */
269         unsigned int buffer_count;
270
271         /* number of batches in execbuf IOCTL */
272         unsigned int num_batches;
273
274         /** list of vma not yet bound during reservation phase */
275         struct list_head unbound;
276
277         /** list of vma that have execobj.relocation_count */
278         struct list_head relocs;
279
280         struct i915_gem_ww_ctx ww;
281
282         /**
283          * Track the most recently used object for relocations, as we
284          * frequently have to perform multiple relocations within the same
285          * obj/page
286          */
287         struct reloc_cache {
288                 struct drm_mm_node node; /** temporary GTT binding */
289                 unsigned long vaddr; /** Current kmap address */
290                 unsigned long page; /** Currently mapped page index */
291                 unsigned int graphics_ver; /** Cached value of GRAPHICS_VER */
292                 bool use_64bit_reloc : 1;
293                 bool has_llc : 1;
294                 bool has_fence : 1;
295                 bool needs_unfenced : 1;
296         } reloc_cache;
297
298         u64 invalid_flags; /** Set of execobj.flags that are invalid */
299
300         /** Length of batch within object */
301         u64 batch_len[MAX_ENGINE_INSTANCE + 1];
302         u32 batch_start_offset; /** Location within object of batch */
303         u32 batch_flags; /** Flags composed for emit_bb_start() */
304         struct intel_gt_buffer_pool_node *batch_pool; /** pool node for batch buffer */
305
306         /**
307          * Indicate either the size of the hastable used to resolve
308          * relocation handles, or if negative that we are using a direct
309          * index into the execobj[].
310          */
311         int lut_size;
312         struct hlist_head *buckets; /** ht for relocation handles */
313
314         struct eb_fence *fences;
315         unsigned long num_fences;
316 #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
317         struct i915_capture_list *capture_lists[MAX_ENGINE_INSTANCE + 1];
318 #endif
319 };
320
321 static int eb_parse(struct i915_execbuffer *eb);
322 static int eb_pin_engine(struct i915_execbuffer *eb, bool throttle);
323 static void eb_unpin_engine(struct i915_execbuffer *eb);
324 static void eb_capture_release(struct i915_execbuffer *eb);
325
326 static bool eb_use_cmdparser(const struct i915_execbuffer *eb)
327 {
328         return intel_engine_requires_cmd_parser(eb->context->engine) ||
329                 (intel_engine_using_cmd_parser(eb->context->engine) &&
330                  eb->args->batch_len);
331 }
332
333 static int eb_create(struct i915_execbuffer *eb)
334 {
335         if (!(eb->args->flags & I915_EXEC_HANDLE_LUT)) {
336                 unsigned int size = 1 + ilog2(eb->buffer_count);
337
338                 /*
339                  * Without a 1:1 association between relocation handles and
340                  * the execobject[] index, we instead create a hashtable.
341                  * We size it dynamically based on available memory, starting
342                  * first with 1:1 assocative hash and scaling back until
343                  * the allocation succeeds.
344                  *
345                  * Later on we use a positive lut_size to indicate we are
346                  * using this hashtable, and a negative value to indicate a
347                  * direct lookup.
348                  */
349                 do {
350                         gfp_t flags;
351
352                         /* While we can still reduce the allocation size, don't
353                          * raise a warning and allow the allocation to fail.
354                          * On the last pass though, we want to try as hard
355                          * as possible to perform the allocation and warn
356                          * if it fails.
357                          */
358                         flags = GFP_KERNEL;
359                         if (size > 1)
360                                 flags |= __GFP_NORETRY | __GFP_NOWARN;
361
362                         eb->buckets = kzalloc(sizeof(struct hlist_head) << size,
363                                               flags);
364                         if (eb->buckets)
365                                 break;
366                 } while (--size);
367
368                 if (unlikely(!size))
369                         return -ENOMEM;
370
371                 eb->lut_size = size;
372         } else {
373                 eb->lut_size = -eb->buffer_count;
374         }
375
376         return 0;
377 }
378
379 static bool
380 eb_vma_misplaced(const struct drm_i915_gem_exec_object2 *entry,
381                  const struct i915_vma *vma,
382                  unsigned int flags)
383 {
384         const u64 start = i915_vma_offset(vma);
385         const u64 size = i915_vma_size(vma);
386
387         if (size < entry->pad_to_size)
388                 return true;
389
390         if (entry->alignment && !IS_ALIGNED(start, entry->alignment))
391                 return true;
392
393         if (flags & EXEC_OBJECT_PINNED &&
394             start != entry->offset)
395                 return true;
396
397         if (flags & __EXEC_OBJECT_NEEDS_BIAS &&
398             start < BATCH_OFFSET_BIAS)
399                 return true;
400
401         if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) &&
402             (start + size + 4095) >> 32)
403                 return true;
404
405         if (flags & __EXEC_OBJECT_NEEDS_MAP &&
406             !i915_vma_is_map_and_fenceable(vma))
407                 return true;
408
409         return false;
410 }
411
412 static u64 eb_pin_flags(const struct drm_i915_gem_exec_object2 *entry,
413                         unsigned int exec_flags)
414 {
415         u64 pin_flags = 0;
416
417         if (exec_flags & EXEC_OBJECT_NEEDS_GTT)
418                 pin_flags |= PIN_GLOBAL;
419
420         /*
421          * Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset,
422          * limit address to the first 4GBs for unflagged objects.
423          */
424         if (!(exec_flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS))
425                 pin_flags |= PIN_ZONE_4G;
426
427         if (exec_flags & __EXEC_OBJECT_NEEDS_MAP)
428                 pin_flags |= PIN_MAPPABLE;
429
430         if (exec_flags & EXEC_OBJECT_PINNED)
431                 pin_flags |= entry->offset | PIN_OFFSET_FIXED;
432         else if (exec_flags & __EXEC_OBJECT_NEEDS_BIAS)
433                 pin_flags |= BATCH_OFFSET_BIAS | PIN_OFFSET_BIAS;
434
435         return pin_flags;
436 }
437
438 static int
439 eb_pin_vma(struct i915_execbuffer *eb,
440            const struct drm_i915_gem_exec_object2 *entry,
441            struct eb_vma *ev)
442 {
443         struct i915_vma *vma = ev->vma;
444         u64 pin_flags;
445         int err;
446
447         if (vma->node.size)
448                 pin_flags =  __i915_vma_offset(vma);
449         else
450                 pin_flags = entry->offset & PIN_OFFSET_MASK;
451
452         pin_flags |= PIN_USER | PIN_NOEVICT | PIN_OFFSET_FIXED | PIN_VALIDATE;
453         if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_GTT))
454                 pin_flags |= PIN_GLOBAL;
455
456         /* Attempt to reuse the current location if available */
457         err = i915_vma_pin_ww(vma, &eb->ww, 0, 0, pin_flags);
458         if (err == -EDEADLK)
459                 return err;
460
461         if (unlikely(err)) {
462                 if (entry->flags & EXEC_OBJECT_PINNED)
463                         return err;
464
465                 /* Failing that pick any _free_ space if suitable */
466                 err = i915_vma_pin_ww(vma, &eb->ww,
467                                              entry->pad_to_size,
468                                              entry->alignment,
469                                              eb_pin_flags(entry, ev->flags) |
470                                              PIN_USER | PIN_NOEVICT | PIN_VALIDATE);
471                 if (unlikely(err))
472                         return err;
473         }
474
475         if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_FENCE)) {
476                 err = i915_vma_pin_fence(vma);
477                 if (unlikely(err))
478                         return err;
479
480                 if (vma->fence)
481                         ev->flags |= __EXEC_OBJECT_HAS_FENCE;
482         }
483
484         ev->flags |= __EXEC_OBJECT_HAS_PIN;
485         if (eb_vma_misplaced(entry, vma, ev->flags))
486                 return -EBADSLT;
487
488         return 0;
489 }
490
491 static void
492 eb_unreserve_vma(struct eb_vma *ev)
493 {
494         if (unlikely(ev->flags & __EXEC_OBJECT_HAS_FENCE))
495                 __i915_vma_unpin_fence(ev->vma);
496
497         ev->flags &= ~__EXEC_OBJECT_RESERVED;
498 }
499
500 static int
501 eb_validate_vma(struct i915_execbuffer *eb,
502                 struct drm_i915_gem_exec_object2 *entry,
503                 struct i915_vma *vma)
504 {
505         /* Relocations are disallowed for all platforms after TGL-LP.  This
506          * also covers all platforms with local memory.
507          */
508         if (entry->relocation_count &&
509             GRAPHICS_VER(eb->i915) >= 12 && !IS_TIGERLAKE(eb->i915))
510                 return -EINVAL;
511
512         if (unlikely(entry->flags & eb->invalid_flags))
513                 return -EINVAL;
514
515         if (unlikely(entry->alignment &&
516                      !is_power_of_2_u64(entry->alignment)))
517                 return -EINVAL;
518
519         /*
520          * Offset can be used as input (EXEC_OBJECT_PINNED), reject
521          * any non-page-aligned or non-canonical addresses.
522          */
523         if (unlikely(entry->flags & EXEC_OBJECT_PINNED &&
524                      entry->offset != gen8_canonical_addr(entry->offset & I915_GTT_PAGE_MASK)))
525                 return -EINVAL;
526
527         /* pad_to_size was once a reserved field, so sanitize it */
528         if (entry->flags & EXEC_OBJECT_PAD_TO_SIZE) {
529                 if (unlikely(offset_in_page(entry->pad_to_size)))
530                         return -EINVAL;
531         } else {
532                 entry->pad_to_size = 0;
533         }
534         /*
535          * From drm_mm perspective address space is continuous,
536          * so from this point we're always using non-canonical
537          * form internally.
538          */
539         entry->offset = gen8_noncanonical_addr(entry->offset);
540
541         if (!eb->reloc_cache.has_fence) {
542                 entry->flags &= ~EXEC_OBJECT_NEEDS_FENCE;
543         } else {
544                 if ((entry->flags & EXEC_OBJECT_NEEDS_FENCE ||
545                      eb->reloc_cache.needs_unfenced) &&
546                     i915_gem_object_is_tiled(vma->obj))
547                         entry->flags |= EXEC_OBJECT_NEEDS_GTT | __EXEC_OBJECT_NEEDS_MAP;
548         }
549
550         return 0;
551 }
552
553 static bool
554 is_batch_buffer(struct i915_execbuffer *eb, unsigned int buffer_idx)
555 {
556         return eb->args->flags & I915_EXEC_BATCH_FIRST ?
557                 buffer_idx < eb->num_batches :
558                 buffer_idx >= eb->args->buffer_count - eb->num_batches;
559 }
560
561 static int
562 eb_add_vma(struct i915_execbuffer *eb,
563            unsigned int *current_batch,
564            unsigned int i,
565            struct i915_vma *vma)
566 {
567         struct drm_i915_private *i915 = eb->i915;
568         struct drm_i915_gem_exec_object2 *entry = &eb->exec[i];
569         struct eb_vma *ev = &eb->vma[i];
570
571         ev->vma = vma;
572         ev->exec = entry;
573         ev->flags = entry->flags;
574
575         if (eb->lut_size > 0) {
576                 ev->handle = entry->handle;
577                 hlist_add_head(&ev->node,
578                                &eb->buckets[hash_32(entry->handle,
579                                                     eb->lut_size)]);
580         }
581
582         if (entry->relocation_count)
583                 list_add_tail(&ev->reloc_link, &eb->relocs);
584
585         /*
586          * SNA is doing fancy tricks with compressing batch buffers, which leads
587          * to negative relocation deltas. Usually that works out ok since the
588          * relocate address is still positive, except when the batch is placed
589          * very low in the GTT. Ensure this doesn't happen.
590          *
591          * Note that actual hangs have only been observed on gen7, but for
592          * paranoia do it everywhere.
593          */
594         if (is_batch_buffer(eb, i)) {
595                 if (entry->relocation_count &&
596                     !(ev->flags & EXEC_OBJECT_PINNED))
597                         ev->flags |= __EXEC_OBJECT_NEEDS_BIAS;
598                 if (eb->reloc_cache.has_fence)
599                         ev->flags |= EXEC_OBJECT_NEEDS_FENCE;
600
601                 eb->batches[*current_batch] = ev;
602
603                 if (unlikely(ev->flags & EXEC_OBJECT_WRITE)) {
604                         drm_dbg(&i915->drm,
605                                 "Attempting to use self-modifying batch buffer\n");
606                         return -EINVAL;
607                 }
608
609                 if (range_overflows_t(u64,
610                                       eb->batch_start_offset,
611                                       eb->args->batch_len,
612                                       ev->vma->size)) {
613                         drm_dbg(&i915->drm, "Attempting to use out-of-bounds batch\n");
614                         return -EINVAL;
615                 }
616
617                 if (eb->args->batch_len == 0)
618                         eb->batch_len[*current_batch] = ev->vma->size -
619                                 eb->batch_start_offset;
620                 else
621                         eb->batch_len[*current_batch] = eb->args->batch_len;
622                 if (unlikely(eb->batch_len[*current_batch] == 0)) { /* impossible! */
623                         drm_dbg(&i915->drm, "Invalid batch length\n");
624                         return -EINVAL;
625                 }
626
627                 ++*current_batch;
628         }
629
630         return 0;
631 }
632
633 static int use_cpu_reloc(const struct reloc_cache *cache,
634                          const struct drm_i915_gem_object *obj)
635 {
636         if (!i915_gem_object_has_struct_page(obj))
637                 return false;
638
639         if (DBG_FORCE_RELOC == FORCE_CPU_RELOC)
640                 return true;
641
642         if (DBG_FORCE_RELOC == FORCE_GTT_RELOC)
643                 return false;
644
645         /*
646          * For objects created by userspace through GEM_CREATE with pat_index
647          * set by set_pat extension, i915_gem_object_has_cache_level() always
648          * return true, otherwise the call would fall back to checking whether
649          * the object is un-cached.
650          */
651         return (cache->has_llc ||
652                 obj->cache_dirty ||
653                 !i915_gem_object_has_cache_level(obj, I915_CACHE_NONE));
654 }
655
656 static int eb_reserve_vma(struct i915_execbuffer *eb,
657                           struct eb_vma *ev,
658                           u64 pin_flags)
659 {
660         struct drm_i915_gem_exec_object2 *entry = ev->exec;
661         struct i915_vma *vma = ev->vma;
662         int err;
663
664         if (drm_mm_node_allocated(&vma->node) &&
665             eb_vma_misplaced(entry, vma, ev->flags)) {
666                 err = i915_vma_unbind(vma);
667                 if (err)
668                         return err;
669         }
670
671         err = i915_vma_pin_ww(vma, &eb->ww,
672                            entry->pad_to_size, entry->alignment,
673                            eb_pin_flags(entry, ev->flags) | pin_flags);
674         if (err)
675                 return err;
676
677         if (entry->offset != i915_vma_offset(vma)) {
678                 entry->offset = i915_vma_offset(vma) | UPDATE;
679                 eb->args->flags |= __EXEC_HAS_RELOC;
680         }
681
682         if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_FENCE)) {
683                 err = i915_vma_pin_fence(vma);
684                 if (unlikely(err))
685                         return err;
686
687                 if (vma->fence)
688                         ev->flags |= __EXEC_OBJECT_HAS_FENCE;
689         }
690
691         ev->flags |= __EXEC_OBJECT_HAS_PIN;
692         GEM_BUG_ON(eb_vma_misplaced(entry, vma, ev->flags));
693
694         return 0;
695 }
696
697 static bool eb_unbind(struct i915_execbuffer *eb, bool force)
698 {
699         const unsigned int count = eb->buffer_count;
700         unsigned int i;
701         struct list_head last;
702         bool unpinned = false;
703
704         /* Resort *all* the objects into priority order */
705         INIT_LIST_HEAD(&eb->unbound);
706         INIT_LIST_HEAD(&last);
707
708         for (i = 0; i < count; i++) {
709                 struct eb_vma *ev = &eb->vma[i];
710                 unsigned int flags = ev->flags;
711
712                 if (!force && flags & EXEC_OBJECT_PINNED &&
713                     flags & __EXEC_OBJECT_HAS_PIN)
714                         continue;
715
716                 unpinned = true;
717                 eb_unreserve_vma(ev);
718
719                 if (flags & EXEC_OBJECT_PINNED)
720                         /* Pinned must have their slot */
721                         list_add(&ev->bind_link, &eb->unbound);
722                 else if (flags & __EXEC_OBJECT_NEEDS_MAP)
723                         /* Map require the lowest 256MiB (aperture) */
724                         list_add_tail(&ev->bind_link, &eb->unbound);
725                 else if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS))
726                         /* Prioritise 4GiB region for restricted bo */
727                         list_add(&ev->bind_link, &last);
728                 else
729                         list_add_tail(&ev->bind_link, &last);
730         }
731
732         list_splice_tail(&last, &eb->unbound);
733         return unpinned;
734 }
735
736 static int eb_reserve(struct i915_execbuffer *eb)
737 {
738         struct eb_vma *ev;
739         unsigned int pass;
740         int err = 0;
741
742         /*
743          * We have one more buffers that we couldn't bind, which could be due to
744          * various reasons. To resolve this we have 4 passes, with every next
745          * level turning the screws tighter:
746          *
747          * 0. Unbind all objects that do not match the GTT constraints for the
748          * execbuffer (fenceable, mappable, alignment etc). Bind all new
749          * objects.  This avoids unnecessary unbinding of later objects in order
750          * to make room for the earlier objects *unless* we need to defragment.
751          *
752          * 1. Reorder the buffers, where objects with the most restrictive
753          * placement requirements go first (ignoring fixed location buffers for
754          * now).  For example, objects needing the mappable aperture (the first
755          * 256M of GTT), should go first vs objects that can be placed just
756          * about anywhere. Repeat the previous pass.
757          *
758          * 2. Consider buffers that are pinned at a fixed location. Also try to
759          * evict the entire VM this time, leaving only objects that we were
760          * unable to lock. Try again to bind the buffers. (still using the new
761          * buffer order).
762          *
763          * 3. We likely have object lock contention for one or more stubborn
764          * objects in the VM, for which we need to evict to make forward
765          * progress (perhaps we are fighting the shrinker?). When evicting the
766          * VM this time around, anything that we can't lock we now track using
767          * the busy_bo, using the full lock (after dropping the vm->mutex to
768          * prevent deadlocks), instead of trylock. We then continue to evict the
769          * VM, this time with the stubborn object locked, which we can now
770          * hopefully unbind (if still bound in the VM). Repeat until the VM is
771          * evicted. Finally we should be able bind everything.
772          */
773         for (pass = 0; pass <= 3; pass++) {
774                 int pin_flags = PIN_USER | PIN_VALIDATE;
775
776                 if (pass == 0)
777                         pin_flags |= PIN_NONBLOCK;
778
779                 if (pass >= 1)
780                         eb_unbind(eb, pass >= 2);
781
782                 if (pass == 2) {
783                         err = mutex_lock_interruptible(&eb->context->vm->mutex);
784                         if (!err) {
785                                 err = i915_gem_evict_vm(eb->context->vm, &eb->ww, NULL);
786                                 mutex_unlock(&eb->context->vm->mutex);
787                         }
788                         if (err)
789                                 return err;
790                 }
791
792                 if (pass == 3) {
793 retry:
794                         err = mutex_lock_interruptible(&eb->context->vm->mutex);
795                         if (!err) {
796                                 struct drm_i915_gem_object *busy_bo = NULL;
797
798                                 err = i915_gem_evict_vm(eb->context->vm, &eb->ww, &busy_bo);
799                                 mutex_unlock(&eb->context->vm->mutex);
800                                 if (err && busy_bo) {
801                                         err = i915_gem_object_lock(busy_bo, &eb->ww);
802                                         i915_gem_object_put(busy_bo);
803                                         if (!err)
804                                                 goto retry;
805                                 }
806                         }
807                         if (err)
808                                 return err;
809                 }
810
811                 list_for_each_entry(ev, &eb->unbound, bind_link) {
812                         err = eb_reserve_vma(eb, ev, pin_flags);
813                         if (err)
814                                 break;
815                 }
816
817                 if (err != -ENOSPC)
818                         break;
819         }
820
821         return err;
822 }
823
824 static int eb_select_context(struct i915_execbuffer *eb)
825 {
826         struct i915_gem_context *ctx;
827
828         ctx = i915_gem_context_lookup(eb->file->driver_priv, eb->args->rsvd1);
829         if (unlikely(IS_ERR(ctx)))
830                 return PTR_ERR(ctx);
831
832         eb->gem_context = ctx;
833         if (i915_gem_context_has_full_ppgtt(ctx))
834                 eb->invalid_flags |= EXEC_OBJECT_NEEDS_GTT;
835
836         return 0;
837 }
838
839 static int __eb_add_lut(struct i915_execbuffer *eb,
840                         u32 handle, struct i915_vma *vma)
841 {
842         struct i915_gem_context *ctx = eb->gem_context;
843         struct i915_lut_handle *lut;
844         int err;
845
846         lut = i915_lut_handle_alloc();
847         if (unlikely(!lut))
848                 return -ENOMEM;
849
850         i915_vma_get(vma);
851         if (!atomic_fetch_inc(&vma->open_count))
852                 i915_vma_reopen(vma);
853         lut->handle = handle;
854         lut->ctx = ctx;
855
856         /* Check that the context hasn't been closed in the meantime */
857         err = -EINTR;
858         if (!mutex_lock_interruptible(&ctx->lut_mutex)) {
859                 if (likely(!i915_gem_context_is_closed(ctx)))
860                         err = radix_tree_insert(&ctx->handles_vma, handle, vma);
861                 else
862                         err = -ENOENT;
863                 if (err == 0) { /* And nor has this handle */
864                         struct drm_i915_gem_object *obj = vma->obj;
865
866                         spin_lock(&obj->lut_lock);
867                         if (idr_find(&eb->file->object_idr, handle) == obj) {
868                                 list_add(&lut->obj_link, &obj->lut_list);
869                         } else {
870                                 radix_tree_delete(&ctx->handles_vma, handle);
871                                 err = -ENOENT;
872                         }
873                         spin_unlock(&obj->lut_lock);
874                 }
875                 mutex_unlock(&ctx->lut_mutex);
876         }
877         if (unlikely(err))
878                 goto err;
879
880         return 0;
881
882 err:
883         i915_vma_close(vma);
884         i915_vma_put(vma);
885         i915_lut_handle_free(lut);
886         return err;
887 }
888
889 static struct i915_vma *eb_lookup_vma(struct i915_execbuffer *eb, u32 handle)
890 {
891         struct i915_address_space *vm = eb->context->vm;
892
893         do {
894                 struct drm_i915_gem_object *obj;
895                 struct i915_vma *vma;
896                 int err;
897
898                 rcu_read_lock();
899                 vma = radix_tree_lookup(&eb->gem_context->handles_vma, handle);
900                 if (likely(vma && vma->vm == vm))
901                         vma = i915_vma_tryget(vma);
902                 rcu_read_unlock();
903                 if (likely(vma))
904                         return vma;
905
906                 obj = i915_gem_object_lookup(eb->file, handle);
907                 if (unlikely(!obj))
908                         return ERR_PTR(-ENOENT);
909
910                 /*
911                  * If the user has opted-in for protected-object tracking, make
912                  * sure the object encryption can be used.
913                  * We only need to do this when the object is first used with
914                  * this context, because the context itself will be banned when
915                  * the protected objects become invalid.
916                  */
917                 if (i915_gem_context_uses_protected_content(eb->gem_context) &&
918                     i915_gem_object_is_protected(obj)) {
919                         err = intel_pxp_key_check(eb->i915->pxp, obj, true);
920                         if (err) {
921                                 i915_gem_object_put(obj);
922                                 return ERR_PTR(err);
923                         }
924                 }
925
926                 vma = i915_vma_instance(obj, vm, NULL);
927                 if (IS_ERR(vma)) {
928                         i915_gem_object_put(obj);
929                         return vma;
930                 }
931
932                 err = __eb_add_lut(eb, handle, vma);
933                 if (likely(!err))
934                         return vma;
935
936                 i915_gem_object_put(obj);
937                 if (err != -EEXIST)
938                         return ERR_PTR(err);
939         } while (1);
940 }
941
942 static int eb_lookup_vmas(struct i915_execbuffer *eb)
943 {
944         unsigned int i, current_batch = 0;
945         int err = 0;
946
947         INIT_LIST_HEAD(&eb->relocs);
948
949         for (i = 0; i < eb->buffer_count; i++) {
950                 struct i915_vma *vma;
951
952                 vma = eb_lookup_vma(eb, eb->exec[i].handle);
953                 if (IS_ERR(vma)) {
954                         err = PTR_ERR(vma);
955                         goto err;
956                 }
957
958                 err = eb_validate_vma(eb, &eb->exec[i], vma);
959                 if (unlikely(err)) {
960                         i915_vma_put(vma);
961                         goto err;
962                 }
963
964                 err = eb_add_vma(eb, &current_batch, i, vma);
965                 if (err)
966                         return err;
967
968                 if (i915_gem_object_is_userptr(vma->obj)) {
969                         err = i915_gem_object_userptr_submit_init(vma->obj);
970                         if (err) {
971                                 if (i + 1 < eb->buffer_count) {
972                                         /*
973                                          * Execbuffer code expects last vma entry to be NULL,
974                                          * since we already initialized this entry,
975                                          * set the next value to NULL or we mess up
976                                          * cleanup handling.
977                                          */
978                                         eb->vma[i + 1].vma = NULL;
979                                 }
980
981                                 return err;
982                         }
983
984                         eb->vma[i].flags |= __EXEC_OBJECT_USERPTR_INIT;
985                         eb->args->flags |= __EXEC_USERPTR_USED;
986                 }
987         }
988
989         return 0;
990
991 err:
992         eb->vma[i].vma = NULL;
993         return err;
994 }
995
996 static int eb_lock_vmas(struct i915_execbuffer *eb)
997 {
998         unsigned int i;
999         int err;
1000
1001         for (i = 0; i < eb->buffer_count; i++) {
1002                 struct eb_vma *ev = &eb->vma[i];
1003                 struct i915_vma *vma = ev->vma;
1004
1005                 err = i915_gem_object_lock(vma->obj, &eb->ww);
1006                 if (err)
1007                         return err;
1008         }
1009
1010         return 0;
1011 }
1012
1013 static int eb_validate_vmas(struct i915_execbuffer *eb)
1014 {
1015         unsigned int i;
1016         int err;
1017
1018         INIT_LIST_HEAD(&eb->unbound);
1019
1020         err = eb_lock_vmas(eb);
1021         if (err)
1022                 return err;
1023
1024         for (i = 0; i < eb->buffer_count; i++) {
1025                 struct drm_i915_gem_exec_object2 *entry = &eb->exec[i];
1026                 struct eb_vma *ev = &eb->vma[i];
1027                 struct i915_vma *vma = ev->vma;
1028
1029                 err = eb_pin_vma(eb, entry, ev);
1030                 if (err == -EDEADLK)
1031                         return err;
1032
1033                 if (!err) {
1034                         if (entry->offset != i915_vma_offset(vma)) {
1035                                 entry->offset = i915_vma_offset(vma) | UPDATE;
1036                                 eb->args->flags |= __EXEC_HAS_RELOC;
1037                         }
1038                 } else {
1039                         eb_unreserve_vma(ev);
1040
1041                         list_add_tail(&ev->bind_link, &eb->unbound);
1042                         if (drm_mm_node_allocated(&vma->node)) {
1043                                 err = i915_vma_unbind(vma);
1044                                 if (err)
1045                                         return err;
1046                         }
1047                 }
1048
1049                 /* Reserve enough slots to accommodate composite fences */
1050                 err = dma_resv_reserve_fences(vma->obj->base.resv, eb->num_batches);
1051                 if (err)
1052                         return err;
1053
1054                 GEM_BUG_ON(drm_mm_node_allocated(&vma->node) &&
1055                            eb_vma_misplaced(&eb->exec[i], vma, ev->flags));
1056         }
1057
1058         if (!list_empty(&eb->unbound))
1059                 return eb_reserve(eb);
1060
1061         return 0;
1062 }
1063
1064 static struct eb_vma *
1065 eb_get_vma(const struct i915_execbuffer *eb, unsigned long handle)
1066 {
1067         if (eb->lut_size < 0) {
1068                 if (handle >= -eb->lut_size)
1069                         return NULL;
1070                 return &eb->vma[handle];
1071         } else {
1072                 struct hlist_head *head;
1073                 struct eb_vma *ev;
1074
1075                 head = &eb->buckets[hash_32(handle, eb->lut_size)];
1076                 hlist_for_each_entry(ev, head, node) {
1077                         if (ev->handle == handle)
1078                                 return ev;
1079                 }
1080                 return NULL;
1081         }
1082 }
1083
1084 static void eb_release_vmas(struct i915_execbuffer *eb, bool final)
1085 {
1086         const unsigned int count = eb->buffer_count;
1087         unsigned int i;
1088
1089         for (i = 0; i < count; i++) {
1090                 struct eb_vma *ev = &eb->vma[i];
1091                 struct i915_vma *vma = ev->vma;
1092
1093                 if (!vma)
1094                         break;
1095
1096                 eb_unreserve_vma(ev);
1097
1098                 if (final)
1099                         i915_vma_put(vma);
1100         }
1101
1102         eb_capture_release(eb);
1103         eb_unpin_engine(eb);
1104 }
1105
1106 static void eb_destroy(const struct i915_execbuffer *eb)
1107 {
1108         if (eb->lut_size > 0)
1109                 kfree(eb->buckets);
1110 }
1111
1112 static u64
1113 relocation_target(const struct drm_i915_gem_relocation_entry *reloc,
1114                   const struct i915_vma *target)
1115 {
1116         return gen8_canonical_addr((int)reloc->delta + i915_vma_offset(target));
1117 }
1118
1119 static void reloc_cache_init(struct reloc_cache *cache,
1120                              struct drm_i915_private *i915)
1121 {
1122         cache->page = -1;
1123         cache->vaddr = 0;
1124         /* Must be a variable in the struct to allow GCC to unroll. */
1125         cache->graphics_ver = GRAPHICS_VER(i915);
1126         cache->has_llc = HAS_LLC(i915);
1127         cache->use_64bit_reloc = HAS_64BIT_RELOC(i915);
1128         cache->has_fence = cache->graphics_ver < 4;
1129         cache->needs_unfenced = INTEL_INFO(i915)->unfenced_needs_alignment;
1130         cache->node.flags = 0;
1131 }
1132
1133 static void *unmask_page(unsigned long p)
1134 {
1135         return (void *)(uintptr_t)(p & PAGE_MASK);
1136 }
1137
1138 static unsigned int unmask_flags(unsigned long p)
1139 {
1140         return p & ~PAGE_MASK;
1141 }
1142
1143 #define KMAP 0x4 /* after CLFLUSH_FLAGS */
1144
1145 static struct i915_ggtt *cache_to_ggtt(struct reloc_cache *cache)
1146 {
1147         struct drm_i915_private *i915 =
1148                 container_of(cache, struct i915_execbuffer, reloc_cache)->i915;
1149         return to_gt(i915)->ggtt;
1150 }
1151
1152 static void reloc_cache_unmap(struct reloc_cache *cache)
1153 {
1154         void *vaddr;
1155
1156         if (!cache->vaddr)
1157                 return;
1158
1159         vaddr = unmask_page(cache->vaddr);
1160         if (cache->vaddr & KMAP)
1161                 kunmap_local(vaddr);
1162         else
1163                 io_mapping_unmap_atomic((void __iomem *)vaddr);
1164 }
1165
1166 static void reloc_cache_remap(struct reloc_cache *cache,
1167                               struct drm_i915_gem_object *obj)
1168 {
1169         void *vaddr;
1170
1171         if (!cache->vaddr)
1172                 return;
1173
1174         if (cache->vaddr & KMAP) {
1175                 struct page *page = i915_gem_object_get_page(obj, cache->page);
1176
1177                 vaddr = kmap_local_page(page);
1178                 cache->vaddr = unmask_flags(cache->vaddr) |
1179                         (unsigned long)vaddr;
1180         } else {
1181                 struct i915_ggtt *ggtt = cache_to_ggtt(cache);
1182                 unsigned long offset;
1183
1184                 offset = cache->node.start;
1185                 if (!drm_mm_node_allocated(&cache->node))
1186                         offset += cache->page << PAGE_SHIFT;
1187
1188                 cache->vaddr = (unsigned long)
1189                         io_mapping_map_atomic_wc(&ggtt->iomap, offset);
1190         }
1191 }
1192
1193 static void reloc_cache_reset(struct reloc_cache *cache, struct i915_execbuffer *eb)
1194 {
1195         void *vaddr;
1196
1197         if (!cache->vaddr)
1198                 return;
1199
1200         vaddr = unmask_page(cache->vaddr);
1201         if (cache->vaddr & KMAP) {
1202                 struct drm_i915_gem_object *obj =
1203                         (struct drm_i915_gem_object *)cache->node.mm;
1204                 if (cache->vaddr & CLFLUSH_AFTER)
1205                         mb();
1206
1207                 kunmap_local(vaddr);
1208                 i915_gem_object_finish_access(obj);
1209         } else {
1210                 struct i915_ggtt *ggtt = cache_to_ggtt(cache);
1211
1212                 intel_gt_flush_ggtt_writes(ggtt->vm.gt);
1213                 io_mapping_unmap_atomic((void __iomem *)vaddr);
1214
1215                 if (drm_mm_node_allocated(&cache->node)) {
1216                         ggtt->vm.clear_range(&ggtt->vm,
1217                                              cache->node.start,
1218                                              cache->node.size);
1219                         mutex_lock(&ggtt->vm.mutex);
1220                         drm_mm_remove_node(&cache->node);
1221                         mutex_unlock(&ggtt->vm.mutex);
1222                 } else {
1223                         i915_vma_unpin((struct i915_vma *)cache->node.mm);
1224                 }
1225         }
1226
1227         cache->vaddr = 0;
1228         cache->page = -1;
1229 }
1230
1231 static void *reloc_kmap(struct drm_i915_gem_object *obj,
1232                         struct reloc_cache *cache,
1233                         unsigned long pageno)
1234 {
1235         void *vaddr;
1236         struct page *page;
1237
1238         if (cache->vaddr) {
1239                 kunmap_local(unmask_page(cache->vaddr));
1240         } else {
1241                 unsigned int flushes;
1242                 int err;
1243
1244                 err = i915_gem_object_prepare_write(obj, &flushes);
1245                 if (err)
1246                         return ERR_PTR(err);
1247
1248                 BUILD_BUG_ON(KMAP & CLFLUSH_FLAGS);
1249                 BUILD_BUG_ON((KMAP | CLFLUSH_FLAGS) & PAGE_MASK);
1250
1251                 cache->vaddr = flushes | KMAP;
1252                 cache->node.mm = (void *)obj;
1253                 if (flushes)
1254                         mb();
1255         }
1256
1257         page = i915_gem_object_get_page(obj, pageno);
1258         if (!obj->mm.dirty)
1259                 set_page_dirty(page);
1260
1261         vaddr = kmap_local_page(page);
1262         cache->vaddr = unmask_flags(cache->vaddr) | (unsigned long)vaddr;
1263         cache->page = pageno;
1264
1265         return vaddr;
1266 }
1267
1268 static void *reloc_iomap(struct i915_vma *batch,
1269                          struct i915_execbuffer *eb,
1270                          unsigned long page)
1271 {
1272         struct drm_i915_gem_object *obj = batch->obj;
1273         struct reloc_cache *cache = &eb->reloc_cache;
1274         struct i915_ggtt *ggtt = cache_to_ggtt(cache);
1275         unsigned long offset;
1276         void *vaddr;
1277
1278         if (cache->vaddr) {
1279                 intel_gt_flush_ggtt_writes(ggtt->vm.gt);
1280                 io_mapping_unmap_atomic((void __force __iomem *) unmask_page(cache->vaddr));
1281         } else {
1282                 struct i915_vma *vma = ERR_PTR(-ENODEV);
1283                 int err;
1284
1285                 if (i915_gem_object_is_tiled(obj))
1286                         return ERR_PTR(-EINVAL);
1287
1288                 if (use_cpu_reloc(cache, obj))
1289                         return NULL;
1290
1291                 err = i915_gem_object_set_to_gtt_domain(obj, true);
1292                 if (err)
1293                         return ERR_PTR(err);
1294
1295                 /*
1296                  * i915_gem_object_ggtt_pin_ww may attempt to remove the batch
1297                  * VMA from the object list because we no longer pin.
1298                  *
1299                  * Only attempt to pin the batch buffer to ggtt if the current batch
1300                  * is not inside ggtt, or the batch buffer is not misplaced.
1301                  */
1302                 if (!i915_is_ggtt(batch->vm) ||
1303                     !i915_vma_misplaced(batch, 0, 0, PIN_MAPPABLE)) {
1304                         vma = i915_gem_object_ggtt_pin_ww(obj, &eb->ww, NULL, 0, 0,
1305                                                           PIN_MAPPABLE |
1306                                                           PIN_NONBLOCK /* NOWARN */ |
1307                                                           PIN_NOEVICT);
1308                 }
1309
1310                 if (vma == ERR_PTR(-EDEADLK))
1311                         return vma;
1312
1313                 if (IS_ERR(vma)) {
1314                         memset(&cache->node, 0, sizeof(cache->node));
1315                         mutex_lock(&ggtt->vm.mutex);
1316                         err = drm_mm_insert_node_in_range
1317                                 (&ggtt->vm.mm, &cache->node,
1318                                  PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE,
1319                                  0, ggtt->mappable_end,
1320                                  DRM_MM_INSERT_LOW);
1321                         mutex_unlock(&ggtt->vm.mutex);
1322                         if (err) /* no inactive aperture space, use cpu reloc */
1323                                 return NULL;
1324                 } else {
1325                         cache->node.start = i915_ggtt_offset(vma);
1326                         cache->node.mm = (void *)vma;
1327                 }
1328         }
1329
1330         offset = cache->node.start;
1331         if (drm_mm_node_allocated(&cache->node)) {
1332                 ggtt->vm.insert_page(&ggtt->vm,
1333                                      i915_gem_object_get_dma_address(obj, page),
1334                                      offset,
1335                                      i915_gem_get_pat_index(ggtt->vm.i915,
1336                                                             I915_CACHE_NONE),
1337                                      0);
1338         } else {
1339                 offset += page << PAGE_SHIFT;
1340         }
1341
1342         vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->iomap,
1343                                                          offset);
1344         cache->page = page;
1345         cache->vaddr = (unsigned long)vaddr;
1346
1347         return vaddr;
1348 }
1349
1350 static void *reloc_vaddr(struct i915_vma *vma,
1351                          struct i915_execbuffer *eb,
1352                          unsigned long page)
1353 {
1354         struct reloc_cache *cache = &eb->reloc_cache;
1355         void *vaddr;
1356
1357         if (cache->page == page) {
1358                 vaddr = unmask_page(cache->vaddr);
1359         } else {
1360                 vaddr = NULL;
1361                 if ((cache->vaddr & KMAP) == 0)
1362                         vaddr = reloc_iomap(vma, eb, page);
1363                 if (!vaddr)
1364                         vaddr = reloc_kmap(vma->obj, cache, page);
1365         }
1366
1367         return vaddr;
1368 }
1369
1370 static void clflush_write32(u32 *addr, u32 value, unsigned int flushes)
1371 {
1372         if (unlikely(flushes & (CLFLUSH_BEFORE | CLFLUSH_AFTER))) {
1373                 if (flushes & CLFLUSH_BEFORE)
1374                         drm_clflush_virt_range(addr, sizeof(*addr));
1375
1376                 *addr = value;
1377
1378                 /*
1379                  * Writes to the same cacheline are serialised by the CPU
1380                  * (including clflush). On the write path, we only require
1381                  * that it hits memory in an orderly fashion and place
1382                  * mb barriers at the start and end of the relocation phase
1383                  * to ensure ordering of clflush wrt to the system.
1384                  */
1385                 if (flushes & CLFLUSH_AFTER)
1386                         drm_clflush_virt_range(addr, sizeof(*addr));
1387         } else
1388                 *addr = value;
1389 }
1390
1391 static u64
1392 relocate_entry(struct i915_vma *vma,
1393                const struct drm_i915_gem_relocation_entry *reloc,
1394                struct i915_execbuffer *eb,
1395                const struct i915_vma *target)
1396 {
1397         u64 target_addr = relocation_target(reloc, target);
1398         u64 offset = reloc->offset;
1399         bool wide = eb->reloc_cache.use_64bit_reloc;
1400         void *vaddr;
1401
1402 repeat:
1403         vaddr = reloc_vaddr(vma, eb,
1404                             offset >> PAGE_SHIFT);
1405         if (IS_ERR(vaddr))
1406                 return PTR_ERR(vaddr);
1407
1408         GEM_BUG_ON(!IS_ALIGNED(offset, sizeof(u32)));
1409         clflush_write32(vaddr + offset_in_page(offset),
1410                         lower_32_bits(target_addr),
1411                         eb->reloc_cache.vaddr);
1412
1413         if (wide) {
1414                 offset += sizeof(u32);
1415                 target_addr >>= 32;
1416                 wide = false;
1417                 goto repeat;
1418         }
1419
1420         return target->node.start | UPDATE;
1421 }
1422
1423 static u64
1424 eb_relocate_entry(struct i915_execbuffer *eb,
1425                   struct eb_vma *ev,
1426                   const struct drm_i915_gem_relocation_entry *reloc)
1427 {
1428         struct drm_i915_private *i915 = eb->i915;
1429         struct eb_vma *target;
1430         int err;
1431
1432         /* we've already hold a reference to all valid objects */
1433         target = eb_get_vma(eb, reloc->target_handle);
1434         if (unlikely(!target))
1435                 return -ENOENT;
1436
1437         /* Validate that the target is in a valid r/w GPU domain */
1438         if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {
1439                 drm_dbg(&i915->drm, "reloc with multiple write domains: "
1440                           "target %d offset %d "
1441                           "read %08x write %08x\n",
1442                           reloc->target_handle,
1443                           (int) reloc->offset,
1444                           reloc->read_domains,
1445                           reloc->write_domain);
1446                 return -EINVAL;
1447         }
1448         if (unlikely((reloc->write_domain | reloc->read_domains)
1449                      & ~I915_GEM_GPU_DOMAINS)) {
1450                 drm_dbg(&i915->drm, "reloc with read/write non-GPU domains: "
1451                           "target %d offset %d "
1452                           "read %08x write %08x\n",
1453                           reloc->target_handle,
1454                           (int) reloc->offset,
1455                           reloc->read_domains,
1456                           reloc->write_domain);
1457                 return -EINVAL;
1458         }
1459
1460         if (reloc->write_domain) {
1461                 target->flags |= EXEC_OBJECT_WRITE;
1462
1463                 /*
1464                  * Sandybridge PPGTT errata: We need a global gtt mapping
1465                  * for MI and pipe_control writes because the gpu doesn't
1466                  * properly redirect them through the ppgtt for non_secure
1467                  * batchbuffers.
1468                  */
1469                 if (reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
1470                     GRAPHICS_VER(eb->i915) == 6 &&
1471                     !i915_vma_is_bound(target->vma, I915_VMA_GLOBAL_BIND)) {
1472                         struct i915_vma *vma = target->vma;
1473
1474                         reloc_cache_unmap(&eb->reloc_cache);
1475                         mutex_lock(&vma->vm->mutex);
1476                         err = i915_vma_bind(target->vma,
1477                                             target->vma->obj->pat_index,
1478                                             PIN_GLOBAL, NULL, NULL);
1479                         mutex_unlock(&vma->vm->mutex);
1480                         reloc_cache_remap(&eb->reloc_cache, ev->vma->obj);
1481                         if (err)
1482                                 return err;
1483                 }
1484         }
1485
1486         /*
1487          * If the relocation already has the right value in it, no
1488          * more work needs to be done.
1489          */
1490         if (!DBG_FORCE_RELOC &&
1491             gen8_canonical_addr(i915_vma_offset(target->vma)) == reloc->presumed_offset)
1492                 return 0;
1493
1494         /* Check that the relocation address is valid... */
1495         if (unlikely(reloc->offset >
1496                      ev->vma->size - (eb->reloc_cache.use_64bit_reloc ? 8 : 4))) {
1497                 drm_dbg(&i915->drm, "Relocation beyond object bounds: "
1498                           "target %d offset %d size %d.\n",
1499                           reloc->target_handle,
1500                           (int)reloc->offset,
1501                           (int)ev->vma->size);
1502                 return -EINVAL;
1503         }
1504         if (unlikely(reloc->offset & 3)) {
1505                 drm_dbg(&i915->drm, "Relocation not 4-byte aligned: "
1506                           "target %d offset %d.\n",
1507                           reloc->target_handle,
1508                           (int)reloc->offset);
1509                 return -EINVAL;
1510         }
1511
1512         /*
1513          * If we write into the object, we need to force the synchronisation
1514          * barrier, either with an asynchronous clflush or if we executed the
1515          * patching using the GPU (though that should be serialised by the
1516          * timeline). To be completely sure, and since we are required to
1517          * do relocations we are already stalling, disable the user's opt
1518          * out of our synchronisation.
1519          */
1520         ev->flags &= ~EXEC_OBJECT_ASYNC;
1521
1522         /* and update the user's relocation entry */
1523         return relocate_entry(ev->vma, reloc, eb, target->vma);
1524 }
1525
1526 static int eb_relocate_vma(struct i915_execbuffer *eb, struct eb_vma *ev)
1527 {
1528 #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
1529         struct drm_i915_gem_relocation_entry stack[N_RELOC(512)];
1530         const struct drm_i915_gem_exec_object2 *entry = ev->exec;
1531         struct drm_i915_gem_relocation_entry __user *urelocs =
1532                 u64_to_user_ptr(entry->relocs_ptr);
1533         unsigned long remain = entry->relocation_count;
1534
1535         if (unlikely(remain > N_RELOC(ULONG_MAX)))
1536                 return -EINVAL;
1537
1538         /*
1539          * We must check that the entire relocation array is safe
1540          * to read. However, if the array is not writable the user loses
1541          * the updated relocation values.
1542          */
1543         if (unlikely(!access_ok(urelocs, remain * sizeof(*urelocs))))
1544                 return -EFAULT;
1545
1546         do {
1547                 struct drm_i915_gem_relocation_entry *r = stack;
1548                 unsigned int count =
1549                         min_t(unsigned long, remain, ARRAY_SIZE(stack));
1550                 unsigned int copied;
1551
1552                 /*
1553                  * This is the fast path and we cannot handle a pagefault
1554                  * whilst holding the struct mutex lest the user pass in the
1555                  * relocations contained within a mmaped bo. For in such a case
1556                  * we, the page fault handler would call i915_gem_fault() and
1557                  * we would try to acquire the struct mutex again. Obviously
1558                  * this is bad and so lockdep complains vehemently.
1559                  */
1560                 pagefault_disable();
1561                 copied = __copy_from_user_inatomic(r, urelocs, count * sizeof(r[0]));
1562                 pagefault_enable();
1563                 if (unlikely(copied)) {
1564                         remain = -EFAULT;
1565                         goto out;
1566                 }
1567
1568                 remain -= count;
1569                 do {
1570                         u64 offset = eb_relocate_entry(eb, ev, r);
1571
1572                         if (likely(offset == 0)) {
1573                         } else if ((s64)offset < 0) {
1574                                 remain = (int)offset;
1575                                 goto out;
1576                         } else {
1577                                 /*
1578                                  * Note that reporting an error now
1579                                  * leaves everything in an inconsistent
1580                                  * state as we have *already* changed
1581                                  * the relocation value inside the
1582                                  * object. As we have not changed the
1583                                  * reloc.presumed_offset or will not
1584                                  * change the execobject.offset, on the
1585                                  * call we may not rewrite the value
1586                                  * inside the object, leaving it
1587                                  * dangling and causing a GPU hang. Unless
1588                                  * userspace dynamically rebuilds the
1589                                  * relocations on each execbuf rather than
1590                                  * presume a static tree.
1591                                  *
1592                                  * We did previously check if the relocations
1593                                  * were writable (access_ok), an error now
1594                                  * would be a strange race with mprotect,
1595                                  * having already demonstrated that we
1596                                  * can read from this userspace address.
1597                                  */
1598                                 offset = gen8_canonical_addr(offset & ~UPDATE);
1599                                 __put_user(offset,
1600                                            &urelocs[r - stack].presumed_offset);
1601                         }
1602                 } while (r++, --count);
1603                 urelocs += ARRAY_SIZE(stack);
1604         } while (remain);
1605 out:
1606         reloc_cache_reset(&eb->reloc_cache, eb);
1607         return remain;
1608 }
1609
1610 static int
1611 eb_relocate_vma_slow(struct i915_execbuffer *eb, struct eb_vma *ev)
1612 {
1613         const struct drm_i915_gem_exec_object2 *entry = ev->exec;
1614         struct drm_i915_gem_relocation_entry *relocs =
1615                 u64_to_ptr(typeof(*relocs), entry->relocs_ptr);
1616         unsigned int i;
1617         int err;
1618
1619         for (i = 0; i < entry->relocation_count; i++) {
1620                 u64 offset = eb_relocate_entry(eb, ev, &relocs[i]);
1621
1622                 if ((s64)offset < 0) {
1623                         err = (int)offset;
1624                         goto err;
1625                 }
1626         }
1627         err = 0;
1628 err:
1629         reloc_cache_reset(&eb->reloc_cache, eb);
1630         return err;
1631 }
1632
1633 static int check_relocations(const struct drm_i915_gem_exec_object2 *entry)
1634 {
1635         const char __user *addr, *end;
1636         unsigned long size;
1637         char __maybe_unused c;
1638
1639         size = entry->relocation_count;
1640         if (size == 0)
1641                 return 0;
1642
1643         if (size > N_RELOC(ULONG_MAX))
1644                 return -EINVAL;
1645
1646         addr = u64_to_user_ptr(entry->relocs_ptr);
1647         size *= sizeof(struct drm_i915_gem_relocation_entry);
1648         if (!access_ok(addr, size))
1649                 return -EFAULT;
1650
1651         end = addr + size;
1652         for (; addr < end; addr += PAGE_SIZE) {
1653                 int err = __get_user(c, addr);
1654                 if (err)
1655                         return err;
1656         }
1657         return __get_user(c, end - 1);
1658 }
1659
1660 static int eb_copy_relocations(const struct i915_execbuffer *eb)
1661 {
1662         struct drm_i915_gem_relocation_entry *relocs;
1663         const unsigned int count = eb->buffer_count;
1664         unsigned int i;
1665         int err;
1666
1667         for (i = 0; i < count; i++) {
1668                 const unsigned int nreloc = eb->exec[i].relocation_count;
1669                 struct drm_i915_gem_relocation_entry __user *urelocs;
1670                 unsigned long size;
1671                 unsigned long copied;
1672
1673                 if (nreloc == 0)
1674                         continue;
1675
1676                 err = check_relocations(&eb->exec[i]);
1677                 if (err)
1678                         goto err;
1679
1680                 urelocs = u64_to_user_ptr(eb->exec[i].relocs_ptr);
1681                 size = nreloc * sizeof(*relocs);
1682
1683                 relocs = kvmalloc_array(1, size, GFP_KERNEL);
1684                 if (!relocs) {
1685                         err = -ENOMEM;
1686                         goto err;
1687                 }
1688
1689                 /* copy_from_user is limited to < 4GiB */
1690                 copied = 0;
1691                 do {
1692                         unsigned int len =
1693                                 min_t(u64, BIT_ULL(31), size - copied);
1694
1695                         if (__copy_from_user((char *)relocs + copied,
1696                                              (char __user *)urelocs + copied,
1697                                              len))
1698                                 goto end;
1699
1700                         copied += len;
1701                 } while (copied < size);
1702
1703                 /*
1704                  * As we do not update the known relocation offsets after
1705                  * relocating (due to the complexities in lock handling),
1706                  * we need to mark them as invalid now so that we force the
1707                  * relocation processing next time. Just in case the target
1708                  * object is evicted and then rebound into its old
1709                  * presumed_offset before the next execbuffer - if that
1710                  * happened we would make the mistake of assuming that the
1711                  * relocations were valid.
1712                  */
1713                 if (!user_access_begin(urelocs, size))
1714                         goto end;
1715
1716                 for (copied = 0; copied < nreloc; copied++)
1717                         unsafe_put_user(-1,
1718                                         &urelocs[copied].presumed_offset,
1719                                         end_user);
1720                 user_access_end();
1721
1722                 eb->exec[i].relocs_ptr = (uintptr_t)relocs;
1723         }
1724
1725         return 0;
1726
1727 end_user:
1728         user_access_end();
1729 end:
1730         kvfree(relocs);
1731         err = -EFAULT;
1732 err:
1733         while (i--) {
1734                 relocs = u64_to_ptr(typeof(*relocs), eb->exec[i].relocs_ptr);
1735                 if (eb->exec[i].relocation_count)
1736                         kvfree(relocs);
1737         }
1738         return err;
1739 }
1740
1741 static int eb_prefault_relocations(const struct i915_execbuffer *eb)
1742 {
1743         const unsigned int count = eb->buffer_count;
1744         unsigned int i;
1745
1746         for (i = 0; i < count; i++) {
1747                 int err;
1748
1749                 err = check_relocations(&eb->exec[i]);
1750                 if (err)
1751                         return err;
1752         }
1753
1754         return 0;
1755 }
1756
1757 static int eb_reinit_userptr(struct i915_execbuffer *eb)
1758 {
1759         const unsigned int count = eb->buffer_count;
1760         unsigned int i;
1761         int ret;
1762
1763         if (likely(!(eb->args->flags & __EXEC_USERPTR_USED)))
1764                 return 0;
1765
1766         for (i = 0; i < count; i++) {
1767                 struct eb_vma *ev = &eb->vma[i];
1768
1769                 if (!i915_gem_object_is_userptr(ev->vma->obj))
1770                         continue;
1771
1772                 ret = i915_gem_object_userptr_submit_init(ev->vma->obj);
1773                 if (ret)
1774                         return ret;
1775
1776                 ev->flags |= __EXEC_OBJECT_USERPTR_INIT;
1777         }
1778
1779         return 0;
1780 }
1781
1782 static noinline int eb_relocate_parse_slow(struct i915_execbuffer *eb)
1783 {
1784         bool have_copy = false;
1785         struct eb_vma *ev;
1786         int err = 0;
1787
1788 repeat:
1789         if (signal_pending(current)) {
1790                 err = -ERESTARTSYS;
1791                 goto out;
1792         }
1793
1794         /* We may process another execbuffer during the unlock... */
1795         eb_release_vmas(eb, false);
1796         i915_gem_ww_ctx_fini(&eb->ww);
1797
1798         /*
1799          * We take 3 passes through the slowpatch.
1800          *
1801          * 1 - we try to just prefault all the user relocation entries and
1802          * then attempt to reuse the atomic pagefault disabled fast path again.
1803          *
1804          * 2 - we copy the user entries to a local buffer here outside of the
1805          * local and allow ourselves to wait upon any rendering before
1806          * relocations
1807          *
1808          * 3 - we already have a local copy of the relocation entries, but
1809          * were interrupted (EAGAIN) whilst waiting for the objects, try again.
1810          */
1811         if (!err) {
1812                 err = eb_prefault_relocations(eb);
1813         } else if (!have_copy) {
1814                 err = eb_copy_relocations(eb);
1815                 have_copy = err == 0;
1816         } else {
1817                 cond_resched();
1818                 err = 0;
1819         }
1820
1821         if (!err)
1822                 err = eb_reinit_userptr(eb);
1823
1824         i915_gem_ww_ctx_init(&eb->ww, true);
1825         if (err)
1826                 goto out;
1827
1828         /* reacquire the objects */
1829 repeat_validate:
1830         err = eb_pin_engine(eb, false);
1831         if (err)
1832                 goto err;
1833
1834         err = eb_validate_vmas(eb);
1835         if (err)
1836                 goto err;
1837
1838         GEM_BUG_ON(!eb->batches[0]);
1839
1840         list_for_each_entry(ev, &eb->relocs, reloc_link) {
1841                 if (!have_copy) {
1842                         err = eb_relocate_vma(eb, ev);
1843                         if (err)
1844                                 break;
1845                 } else {
1846                         err = eb_relocate_vma_slow(eb, ev);
1847                         if (err)
1848                                 break;
1849                 }
1850         }
1851
1852         if (err == -EDEADLK)
1853                 goto err;
1854
1855         if (err && !have_copy)
1856                 goto repeat;
1857
1858         if (err)
1859                 goto err;
1860
1861         /* as last step, parse the command buffer */
1862         err = eb_parse(eb);
1863         if (err)
1864                 goto err;
1865
1866         /*
1867          * Leave the user relocations as are, this is the painfully slow path,
1868          * and we want to avoid the complication of dropping the lock whilst
1869          * having buffers reserved in the aperture and so causing spurious
1870          * ENOSPC for random operations.
1871          */
1872
1873 err:
1874         if (err == -EDEADLK) {
1875                 eb_release_vmas(eb, false);
1876                 err = i915_gem_ww_ctx_backoff(&eb->ww);
1877                 if (!err)
1878                         goto repeat_validate;
1879         }
1880
1881         if (err == -EAGAIN)
1882                 goto repeat;
1883
1884 out:
1885         if (have_copy) {
1886                 const unsigned int count = eb->buffer_count;
1887                 unsigned int i;
1888
1889                 for (i = 0; i < count; i++) {
1890                         const struct drm_i915_gem_exec_object2 *entry =
1891                                 &eb->exec[i];
1892                         struct drm_i915_gem_relocation_entry *relocs;
1893
1894                         if (!entry->relocation_count)
1895                                 continue;
1896
1897                         relocs = u64_to_ptr(typeof(*relocs), entry->relocs_ptr);
1898                         kvfree(relocs);
1899                 }
1900         }
1901
1902         return err;
1903 }
1904
1905 static int eb_relocate_parse(struct i915_execbuffer *eb)
1906 {
1907         int err;
1908         bool throttle = true;
1909
1910 retry:
1911         err = eb_pin_engine(eb, throttle);
1912         if (err) {
1913                 if (err != -EDEADLK)
1914                         return err;
1915
1916                 goto err;
1917         }
1918
1919         /* only throttle once, even if we didn't need to throttle */
1920         throttle = false;
1921
1922         err = eb_validate_vmas(eb);
1923         if (err == -EAGAIN)
1924                 goto slow;
1925         else if (err)
1926                 goto err;
1927
1928         /* The objects are in their final locations, apply the relocations. */
1929         if (eb->args->flags & __EXEC_HAS_RELOC) {
1930                 struct eb_vma *ev;
1931
1932                 list_for_each_entry(ev, &eb->relocs, reloc_link) {
1933                         err = eb_relocate_vma(eb, ev);
1934                         if (err)
1935                                 break;
1936                 }
1937
1938                 if (err == -EDEADLK)
1939                         goto err;
1940                 else if (err)
1941                         goto slow;
1942         }
1943
1944         if (!err)
1945                 err = eb_parse(eb);
1946
1947 err:
1948         if (err == -EDEADLK) {
1949                 eb_release_vmas(eb, false);
1950                 err = i915_gem_ww_ctx_backoff(&eb->ww);
1951                 if (!err)
1952                         goto retry;
1953         }
1954
1955         return err;
1956
1957 slow:
1958         err = eb_relocate_parse_slow(eb);
1959         if (err)
1960                 /*
1961                  * If the user expects the execobject.offset and
1962                  * reloc.presumed_offset to be an exact match,
1963                  * as for using NO_RELOC, then we cannot update
1964                  * the execobject.offset until we have completed
1965                  * relocation.
1966                  */
1967                 eb->args->flags &= ~__EXEC_HAS_RELOC;
1968
1969         return err;
1970 }
1971
1972 /*
1973  * Using two helper loops for the order of which requests / batches are created
1974  * and added the to backend. Requests are created in order from the parent to
1975  * the last child. Requests are added in the reverse order, from the last child
1976  * to parent. This is done for locking reasons as the timeline lock is acquired
1977  * during request creation and released when the request is added to the
1978  * backend. To make lockdep happy (see intel_context_timeline_lock) this must be
1979  * the ordering.
1980  */
1981 #define for_each_batch_create_order(_eb, _i) \
1982         for ((_i) = 0; (_i) < (_eb)->num_batches; ++(_i))
1983 #define for_each_batch_add_order(_eb, _i) \
1984         BUILD_BUG_ON(!typecheck(int, _i)); \
1985         for ((_i) = (_eb)->num_batches - 1; (_i) >= 0; --(_i))
1986
1987 static struct i915_request *
1988 eb_find_first_request_added(struct i915_execbuffer *eb)
1989 {
1990         int i;
1991
1992         for_each_batch_add_order(eb, i)
1993                 if (eb->requests[i])
1994                         return eb->requests[i];
1995
1996         GEM_BUG_ON("Request not found");
1997
1998         return NULL;
1999 }
2000
2001 #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
2002
2003 /* Stage with GFP_KERNEL allocations before we enter the signaling critical path */
2004 static int eb_capture_stage(struct i915_execbuffer *eb)
2005 {
2006         const unsigned int count = eb->buffer_count;
2007         unsigned int i = count, j;
2008
2009         while (i--) {
2010                 struct eb_vma *ev = &eb->vma[i];
2011                 struct i915_vma *vma = ev->vma;
2012                 unsigned int flags = ev->flags;
2013
2014                 if (!(flags & EXEC_OBJECT_CAPTURE))
2015                         continue;
2016
2017                 if (i915_gem_context_is_recoverable(eb->gem_context) &&
2018                     (IS_DGFX(eb->i915) || GRAPHICS_VER_FULL(eb->i915) > IP_VER(12, 0)))
2019                         return -EINVAL;
2020
2021                 for_each_batch_create_order(eb, j) {
2022                         struct i915_capture_list *capture;
2023
2024                         capture = kmalloc(sizeof(*capture), GFP_KERNEL);
2025                         if (!capture)
2026                                 continue;
2027
2028                         capture->next = eb->capture_lists[j];
2029                         capture->vma_res = i915_vma_resource_get(vma->resource);
2030                         eb->capture_lists[j] = capture;
2031                 }
2032         }
2033
2034         return 0;
2035 }
2036
2037 /* Commit once we're in the critical path */
2038 static void eb_capture_commit(struct i915_execbuffer *eb)
2039 {
2040         unsigned int j;
2041
2042         for_each_batch_create_order(eb, j) {
2043                 struct i915_request *rq = eb->requests[j];
2044
2045                 if (!rq)
2046                         break;
2047
2048                 rq->capture_list = eb->capture_lists[j];
2049                 eb->capture_lists[j] = NULL;
2050         }
2051 }
2052
2053 /*
2054  * Release anything that didn't get committed due to errors.
2055  * The capture_list will otherwise be freed at request retire.
2056  */
2057 static void eb_capture_release(struct i915_execbuffer *eb)
2058 {
2059         unsigned int j;
2060
2061         for_each_batch_create_order(eb, j) {
2062                 if (eb->capture_lists[j]) {
2063                         i915_request_free_capture_list(eb->capture_lists[j]);
2064                         eb->capture_lists[j] = NULL;
2065                 }
2066         }
2067 }
2068
2069 static void eb_capture_list_clear(struct i915_execbuffer *eb)
2070 {
2071         memset(eb->capture_lists, 0, sizeof(eb->capture_lists));
2072 }
2073
2074 #else
2075
2076 static int eb_capture_stage(struct i915_execbuffer *eb)
2077 {
2078         return 0;
2079 }
2080
2081 static void eb_capture_commit(struct i915_execbuffer *eb)
2082 {
2083 }
2084
2085 static void eb_capture_release(struct i915_execbuffer *eb)
2086 {
2087 }
2088
2089 static void eb_capture_list_clear(struct i915_execbuffer *eb)
2090 {
2091 }
2092
2093 #endif
2094
2095 static int eb_move_to_gpu(struct i915_execbuffer *eb)
2096 {
2097         const unsigned int count = eb->buffer_count;
2098         unsigned int i = count;
2099         int err = 0, j;
2100
2101         while (i--) {
2102                 struct eb_vma *ev = &eb->vma[i];
2103                 struct i915_vma *vma = ev->vma;
2104                 unsigned int flags = ev->flags;
2105                 struct drm_i915_gem_object *obj = vma->obj;
2106
2107                 assert_vma_held(vma);
2108
2109                 /*
2110                  * If the GPU is not _reading_ through the CPU cache, we need
2111                  * to make sure that any writes (both previous GPU writes from
2112                  * before a change in snooping levels and normal CPU writes)
2113                  * caught in that cache are flushed to main memory.
2114                  *
2115                  * We want to say
2116                  *   obj->cache_dirty &&
2117                  *   !(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ)
2118                  * but gcc's optimiser doesn't handle that as well and emits
2119                  * two jumps instead of one. Maybe one day...
2120                  *
2121                  * FIXME: There is also sync flushing in set_pages(), which
2122                  * serves a different purpose(some of the time at least).
2123                  *
2124                  * We should consider:
2125                  *
2126                  *   1. Rip out the async flush code.
2127                  *
2128                  *   2. Or make the sync flushing use the async clflush path
2129                  *   using mandatory fences underneath. Currently the below
2130                  *   async flush happens after we bind the object.
2131                  */
2132                 if (unlikely(obj->cache_dirty & ~obj->cache_coherent)) {
2133                         if (i915_gem_clflush_object(obj, 0))
2134                                 flags &= ~EXEC_OBJECT_ASYNC;
2135                 }
2136
2137                 /* We only need to await on the first request */
2138                 if (err == 0 && !(flags & EXEC_OBJECT_ASYNC)) {
2139                         err = i915_request_await_object
2140                                 (eb_find_first_request_added(eb), obj,
2141                                  flags & EXEC_OBJECT_WRITE);
2142                 }
2143
2144                 for_each_batch_add_order(eb, j) {
2145                         if (err)
2146                                 break;
2147                         if (!eb->requests[j])
2148                                 continue;
2149
2150                         err = _i915_vma_move_to_active(vma, eb->requests[j],
2151                                                        j ? NULL :
2152                                                        eb->composite_fence ?
2153                                                        eb->composite_fence :
2154                                                        &eb->requests[j]->fence,
2155                                                        flags | __EXEC_OBJECT_NO_RESERVE |
2156                                                        __EXEC_OBJECT_NO_REQUEST_AWAIT);
2157                 }
2158         }
2159
2160 #ifdef CONFIG_MMU_NOTIFIER
2161         if (!err && (eb->args->flags & __EXEC_USERPTR_USED)) {
2162                 for (i = 0; i < count; i++) {
2163                         struct eb_vma *ev = &eb->vma[i];
2164                         struct drm_i915_gem_object *obj = ev->vma->obj;
2165
2166                         if (!i915_gem_object_is_userptr(obj))
2167                                 continue;
2168
2169                         err = i915_gem_object_userptr_submit_done(obj);
2170                         if (err)
2171                                 break;
2172                 }
2173         }
2174 #endif
2175
2176         if (unlikely(err))
2177                 goto err_skip;
2178
2179         /* Unconditionally flush any chipset caches (for streaming writes). */
2180         intel_gt_chipset_flush(eb->gt);
2181         eb_capture_commit(eb);
2182
2183         return 0;
2184
2185 err_skip:
2186         for_each_batch_create_order(eb, j) {
2187                 if (!eb->requests[j])
2188                         break;
2189
2190                 i915_request_set_error_once(eb->requests[j], err);
2191         }
2192         return err;
2193 }
2194
2195 static int i915_gem_check_execbuffer(struct drm_i915_private *i915,
2196                                      struct drm_i915_gem_execbuffer2 *exec)
2197 {
2198         if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
2199                 return -EINVAL;
2200
2201         /* Kernel clipping was a DRI1 misfeature */
2202         if (!(exec->flags & (I915_EXEC_FENCE_ARRAY |
2203                              I915_EXEC_USE_EXTENSIONS))) {
2204                 if (exec->num_cliprects || exec->cliprects_ptr)
2205                         return -EINVAL;
2206         }
2207
2208         if (exec->DR4 == 0xffffffff) {
2209                 drm_dbg(&i915->drm, "UXA submitting garbage DR4, fixing up\n");
2210                 exec->DR4 = 0;
2211         }
2212         if (exec->DR1 || exec->DR4)
2213                 return -EINVAL;
2214
2215         if ((exec->batch_start_offset | exec->batch_len) & 0x7)
2216                 return -EINVAL;
2217
2218         return 0;
2219 }
2220
2221 static int i915_reset_gen7_sol_offsets(struct i915_request *rq)
2222 {
2223         u32 *cs;
2224         int i;
2225
2226         if (GRAPHICS_VER(rq->i915) != 7 || rq->engine->id != RCS0) {
2227                 drm_dbg(&rq->i915->drm, "sol reset is gen7/rcs only\n");
2228                 return -EINVAL;
2229         }
2230
2231         cs = intel_ring_begin(rq, 4 * 2 + 2);
2232         if (IS_ERR(cs))
2233                 return PTR_ERR(cs);
2234
2235         *cs++ = MI_LOAD_REGISTER_IMM(4);
2236         for (i = 0; i < 4; i++) {
2237                 *cs++ = i915_mmio_reg_offset(GEN7_SO_WRITE_OFFSET(i));
2238                 *cs++ = 0;
2239         }
2240         *cs++ = MI_NOOP;
2241         intel_ring_advance(rq, cs);
2242
2243         return 0;
2244 }
2245
2246 static struct i915_vma *
2247 shadow_batch_pin(struct i915_execbuffer *eb,
2248                  struct drm_i915_gem_object *obj,
2249                  struct i915_address_space *vm,
2250                  unsigned int flags)
2251 {
2252         struct i915_vma *vma;
2253         int err;
2254
2255         vma = i915_vma_instance(obj, vm, NULL);
2256         if (IS_ERR(vma))
2257                 return vma;
2258
2259         err = i915_vma_pin_ww(vma, &eb->ww, 0, 0, flags | PIN_VALIDATE);
2260         if (err)
2261                 return ERR_PTR(err);
2262
2263         return vma;
2264 }
2265
2266 static struct i915_vma *eb_dispatch_secure(struct i915_execbuffer *eb, struct i915_vma *vma)
2267 {
2268         /*
2269          * snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
2270          * batch" bit. Hence we need to pin secure batches into the global gtt.
2271          * hsw should have this fixed, but bdw mucks it up again. */
2272         if (eb->batch_flags & I915_DISPATCH_SECURE)
2273                 return i915_gem_object_ggtt_pin_ww(vma->obj, &eb->ww, NULL, 0, 0, PIN_VALIDATE);
2274
2275         return NULL;
2276 }
2277
2278 static int eb_parse(struct i915_execbuffer *eb)
2279 {
2280         struct drm_i915_private *i915 = eb->i915;
2281         struct intel_gt_buffer_pool_node *pool = eb->batch_pool;
2282         struct i915_vma *shadow, *trampoline, *batch;
2283         unsigned long len;
2284         int err;
2285
2286         if (!eb_use_cmdparser(eb)) {
2287                 batch = eb_dispatch_secure(eb, eb->batches[0]->vma);
2288                 if (IS_ERR(batch))
2289                         return PTR_ERR(batch);
2290
2291                 goto secure_batch;
2292         }
2293
2294         if (intel_context_is_parallel(eb->context))
2295                 return -EINVAL;
2296
2297         len = eb->batch_len[0];
2298         if (!CMDPARSER_USES_GGTT(eb->i915)) {
2299                 /*
2300                  * ppGTT backed shadow buffers must be mapped RO, to prevent
2301                  * post-scan tampering
2302                  */
2303                 if (!eb->context->vm->has_read_only) {
2304                         drm_dbg(&i915->drm,
2305                                 "Cannot prevent post-scan tampering without RO capable vm\n");
2306                         return -EINVAL;
2307                 }
2308         } else {
2309                 len += I915_CMD_PARSER_TRAMPOLINE_SIZE;
2310         }
2311         if (unlikely(len < eb->batch_len[0])) /* last paranoid check of overflow */
2312                 return -EINVAL;
2313
2314         if (!pool) {
2315                 pool = intel_gt_get_buffer_pool(eb->gt, len,
2316                                                 I915_MAP_WB);
2317                 if (IS_ERR(pool))
2318                         return PTR_ERR(pool);
2319                 eb->batch_pool = pool;
2320         }
2321
2322         err = i915_gem_object_lock(pool->obj, &eb->ww);
2323         if (err)
2324                 return err;
2325
2326         shadow = shadow_batch_pin(eb, pool->obj, eb->context->vm, PIN_USER);
2327         if (IS_ERR(shadow))
2328                 return PTR_ERR(shadow);
2329
2330         intel_gt_buffer_pool_mark_used(pool);
2331         i915_gem_object_set_readonly(shadow->obj);
2332         shadow->private = pool;
2333
2334         trampoline = NULL;
2335         if (CMDPARSER_USES_GGTT(eb->i915)) {
2336                 trampoline = shadow;
2337
2338                 shadow = shadow_batch_pin(eb, pool->obj,
2339                                           &eb->gt->ggtt->vm,
2340                                           PIN_GLOBAL);
2341                 if (IS_ERR(shadow))
2342                         return PTR_ERR(shadow);
2343
2344                 shadow->private = pool;
2345
2346                 eb->batch_flags |= I915_DISPATCH_SECURE;
2347         }
2348
2349         batch = eb_dispatch_secure(eb, shadow);
2350         if (IS_ERR(batch))
2351                 return PTR_ERR(batch);
2352
2353         err = dma_resv_reserve_fences(shadow->obj->base.resv, 1);
2354         if (err)
2355                 return err;
2356
2357         err = intel_engine_cmd_parser(eb->context->engine,
2358                                       eb->batches[0]->vma,
2359                                       eb->batch_start_offset,
2360                                       eb->batch_len[0],
2361                                       shadow, trampoline);
2362         if (err)
2363                 return err;
2364
2365         eb->batches[0] = &eb->vma[eb->buffer_count++];
2366         eb->batches[0]->vma = i915_vma_get(shadow);
2367         eb->batches[0]->flags = __EXEC_OBJECT_HAS_PIN;
2368
2369         eb->trampoline = trampoline;
2370         eb->batch_start_offset = 0;
2371
2372 secure_batch:
2373         if (batch) {
2374                 if (intel_context_is_parallel(eb->context))
2375                         return -EINVAL;
2376
2377                 eb->batches[0] = &eb->vma[eb->buffer_count++];
2378                 eb->batches[0]->flags = __EXEC_OBJECT_HAS_PIN;
2379                 eb->batches[0]->vma = i915_vma_get(batch);
2380         }
2381         return 0;
2382 }
2383
2384 static int eb_request_submit(struct i915_execbuffer *eb,
2385                              struct i915_request *rq,
2386                              struct i915_vma *batch,
2387                              u64 batch_len)
2388 {
2389         int err;
2390
2391         if (intel_context_nopreempt(rq->context))
2392                 __set_bit(I915_FENCE_FLAG_NOPREEMPT, &rq->fence.flags);
2393
2394         if (eb->args->flags & I915_EXEC_GEN7_SOL_RESET) {
2395                 err = i915_reset_gen7_sol_offsets(rq);
2396                 if (err)
2397                         return err;
2398         }
2399
2400         /*
2401          * After we completed waiting for other engines (using HW semaphores)
2402          * then we can signal that this request/batch is ready to run. This
2403          * allows us to determine if the batch is still waiting on the GPU
2404          * or actually running by checking the breadcrumb.
2405          */
2406         if (rq->context->engine->emit_init_breadcrumb) {
2407                 err = rq->context->engine->emit_init_breadcrumb(rq);
2408                 if (err)
2409                         return err;
2410         }
2411
2412         err = rq->context->engine->emit_bb_start(rq,
2413                                                  i915_vma_offset(batch) +
2414                                                  eb->batch_start_offset,
2415                                                  batch_len,
2416                                                  eb->batch_flags);
2417         if (err)
2418                 return err;
2419
2420         if (eb->trampoline) {
2421                 GEM_BUG_ON(intel_context_is_parallel(rq->context));
2422                 GEM_BUG_ON(eb->batch_start_offset);
2423                 err = rq->context->engine->emit_bb_start(rq,
2424                                                          i915_vma_offset(eb->trampoline) +
2425                                                          batch_len, 0, 0);
2426                 if (err)
2427                         return err;
2428         }
2429
2430         return 0;
2431 }
2432
2433 static int eb_submit(struct i915_execbuffer *eb)
2434 {
2435         unsigned int i;
2436         int err;
2437
2438         err = eb_move_to_gpu(eb);
2439
2440         for_each_batch_create_order(eb, i) {
2441                 if (!eb->requests[i])
2442                         break;
2443
2444                 trace_i915_request_queue(eb->requests[i], eb->batch_flags);
2445                 if (!err)
2446                         err = eb_request_submit(eb, eb->requests[i],
2447                                                 eb->batches[i]->vma,
2448                                                 eb->batch_len[i]);
2449         }
2450
2451         return err;
2452 }
2453
2454 /*
2455  * Find one BSD ring to dispatch the corresponding BSD command.
2456  * The engine index is returned.
2457  */
2458 static unsigned int
2459 gen8_dispatch_bsd_engine(struct drm_i915_private *i915,
2460                          struct drm_file *file)
2461 {
2462         struct drm_i915_file_private *file_priv = file->driver_priv;
2463
2464         /* Check whether the file_priv has already selected one ring. */
2465         if ((int)file_priv->bsd_engine < 0)
2466                 file_priv->bsd_engine =
2467                         get_random_u32_below(i915->engine_uabi_class_count[I915_ENGINE_CLASS_VIDEO]);
2468
2469         return file_priv->bsd_engine;
2470 }
2471
2472 static const enum intel_engine_id user_ring_map[] = {
2473         [I915_EXEC_DEFAULT]     = RCS0,
2474         [I915_EXEC_RENDER]      = RCS0,
2475         [I915_EXEC_BLT]         = BCS0,
2476         [I915_EXEC_BSD]         = VCS0,
2477         [I915_EXEC_VEBOX]       = VECS0
2478 };
2479
2480 static struct i915_request *eb_throttle(struct i915_execbuffer *eb, struct intel_context *ce)
2481 {
2482         struct intel_ring *ring = ce->ring;
2483         struct intel_timeline *tl = ce->timeline;
2484         struct i915_request *rq;
2485
2486         /*
2487          * Completely unscientific finger-in-the-air estimates for suitable
2488          * maximum user request size (to avoid blocking) and then backoff.
2489          */
2490         if (intel_ring_update_space(ring) >= PAGE_SIZE)
2491                 return NULL;
2492
2493         /*
2494          * Find a request that after waiting upon, there will be at least half
2495          * the ring available. The hysteresis allows us to compete for the
2496          * shared ring and should mean that we sleep less often prior to
2497          * claiming our resources, but not so long that the ring completely
2498          * drains before we can submit our next request.
2499          */
2500         list_for_each_entry(rq, &tl->requests, link) {
2501                 if (rq->ring != ring)
2502                         continue;
2503
2504                 if (__intel_ring_space(rq->postfix,
2505                                        ring->emit, ring->size) > ring->size / 2)
2506                         break;
2507         }
2508         if (&rq->link == &tl->requests)
2509                 return NULL; /* weird, we will check again later for real */
2510
2511         return i915_request_get(rq);
2512 }
2513
2514 static int eb_pin_timeline(struct i915_execbuffer *eb, struct intel_context *ce,
2515                            bool throttle)
2516 {
2517         struct intel_timeline *tl;
2518         struct i915_request *rq = NULL;
2519
2520         /*
2521          * Take a local wakeref for preparing to dispatch the execbuf as
2522          * we expect to access the hardware fairly frequently in the
2523          * process, and require the engine to be kept awake between accesses.
2524          * Upon dispatch, we acquire another prolonged wakeref that we hold
2525          * until the timeline is idle, which in turn releases the wakeref
2526          * taken on the engine, and the parent device.
2527          */
2528         tl = intel_context_timeline_lock(ce);
2529         if (IS_ERR(tl))
2530                 return PTR_ERR(tl);
2531
2532         intel_context_enter(ce);
2533         if (throttle)
2534                 rq = eb_throttle(eb, ce);
2535         intel_context_timeline_unlock(tl);
2536
2537         if (rq) {
2538                 bool nonblock = eb->file->filp->f_flags & O_NONBLOCK;
2539                 long timeout = nonblock ? 0 : MAX_SCHEDULE_TIMEOUT;
2540
2541                 if (i915_request_wait(rq, I915_WAIT_INTERRUPTIBLE,
2542                                       timeout) < 0) {
2543                         i915_request_put(rq);
2544
2545                         /*
2546                          * Error path, cannot use intel_context_timeline_lock as
2547                          * that is user interruptable and this clean up step
2548                          * must be done.
2549                          */
2550                         mutex_lock(&ce->timeline->mutex);
2551                         intel_context_exit(ce);
2552                         mutex_unlock(&ce->timeline->mutex);
2553
2554                         if (nonblock)
2555                                 return -EWOULDBLOCK;
2556                         else
2557                                 return -EINTR;
2558                 }
2559                 i915_request_put(rq);
2560         }
2561
2562         return 0;
2563 }
2564
2565 static int eb_pin_engine(struct i915_execbuffer *eb, bool throttle)
2566 {
2567         struct intel_context *ce = eb->context, *child;
2568         int err;
2569         int i = 0, j = 0;
2570
2571         GEM_BUG_ON(eb->args->flags & __EXEC_ENGINE_PINNED);
2572
2573         if (unlikely(intel_context_is_banned(ce)))
2574                 return -EIO;
2575
2576         /*
2577          * Pinning the contexts may generate requests in order to acquire
2578          * GGTT space, so do this first before we reserve a seqno for
2579          * ourselves.
2580          */
2581         err = intel_context_pin_ww(ce, &eb->ww);
2582         if (err)
2583                 return err;
2584         for_each_child(ce, child) {
2585                 err = intel_context_pin_ww(child, &eb->ww);
2586                 GEM_BUG_ON(err);        /* perma-pinned should incr a counter */
2587         }
2588
2589         for_each_child(ce, child) {
2590                 err = eb_pin_timeline(eb, child, throttle);
2591                 if (err)
2592                         goto unwind;
2593                 ++i;
2594         }
2595         err = eb_pin_timeline(eb, ce, throttle);
2596         if (err)
2597                 goto unwind;
2598
2599         eb->args->flags |= __EXEC_ENGINE_PINNED;
2600         return 0;
2601
2602 unwind:
2603         for_each_child(ce, child) {
2604                 if (j++ < i) {
2605                         mutex_lock(&child->timeline->mutex);
2606                         intel_context_exit(child);
2607                         mutex_unlock(&child->timeline->mutex);
2608                 }
2609         }
2610         for_each_child(ce, child)
2611                 intel_context_unpin(child);
2612         intel_context_unpin(ce);
2613         return err;
2614 }
2615
2616 static void eb_unpin_engine(struct i915_execbuffer *eb)
2617 {
2618         struct intel_context *ce = eb->context, *child;
2619
2620         if (!(eb->args->flags & __EXEC_ENGINE_PINNED))
2621                 return;
2622
2623         eb->args->flags &= ~__EXEC_ENGINE_PINNED;
2624
2625         for_each_child(ce, child) {
2626                 mutex_lock(&child->timeline->mutex);
2627                 intel_context_exit(child);
2628                 mutex_unlock(&child->timeline->mutex);
2629
2630                 intel_context_unpin(child);
2631         }
2632
2633         mutex_lock(&ce->timeline->mutex);
2634         intel_context_exit(ce);
2635         mutex_unlock(&ce->timeline->mutex);
2636
2637         intel_context_unpin(ce);
2638 }
2639
2640 static unsigned int
2641 eb_select_legacy_ring(struct i915_execbuffer *eb)
2642 {
2643         struct drm_i915_private *i915 = eb->i915;
2644         struct drm_i915_gem_execbuffer2 *args = eb->args;
2645         unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK;
2646
2647         if (user_ring_id != I915_EXEC_BSD &&
2648             (args->flags & I915_EXEC_BSD_MASK)) {
2649                 drm_dbg(&i915->drm,
2650                         "execbuf with non bsd ring but with invalid "
2651                         "bsd dispatch flags: %d\n", (int)(args->flags));
2652                 return -1;
2653         }
2654
2655         if (user_ring_id == I915_EXEC_BSD &&
2656             i915->engine_uabi_class_count[I915_ENGINE_CLASS_VIDEO] > 1) {
2657                 unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK;
2658
2659                 if (bsd_idx == I915_EXEC_BSD_DEFAULT) {
2660                         bsd_idx = gen8_dispatch_bsd_engine(i915, eb->file);
2661                 } else if (bsd_idx >= I915_EXEC_BSD_RING1 &&
2662                            bsd_idx <= I915_EXEC_BSD_RING2) {
2663                         bsd_idx >>= I915_EXEC_BSD_SHIFT;
2664                         bsd_idx--;
2665                 } else {
2666                         drm_dbg(&i915->drm,
2667                                 "execbuf with unknown bsd ring: %u\n",
2668                                 bsd_idx);
2669                         return -1;
2670                 }
2671
2672                 return _VCS(bsd_idx);
2673         }
2674
2675         if (user_ring_id >= ARRAY_SIZE(user_ring_map)) {
2676                 drm_dbg(&i915->drm, "execbuf with unknown ring: %u\n",
2677                         user_ring_id);
2678                 return -1;
2679         }
2680
2681         return user_ring_map[user_ring_id];
2682 }
2683
2684 static int
2685 eb_select_engine(struct i915_execbuffer *eb)
2686 {
2687         struct intel_context *ce, *child;
2688         unsigned int idx;
2689         int err;
2690
2691         if (i915_gem_context_user_engines(eb->gem_context))
2692                 idx = eb->args->flags & I915_EXEC_RING_MASK;
2693         else
2694                 idx = eb_select_legacy_ring(eb);
2695
2696         ce = i915_gem_context_get_engine(eb->gem_context, idx);
2697         if (IS_ERR(ce))
2698                 return PTR_ERR(ce);
2699
2700         if (intel_context_is_parallel(ce)) {
2701                 if (eb->buffer_count < ce->parallel.number_children + 1) {
2702                         intel_context_put(ce);
2703                         return -EINVAL;
2704                 }
2705                 if (eb->batch_start_offset || eb->args->batch_len) {
2706                         intel_context_put(ce);
2707                         return -EINVAL;
2708                 }
2709         }
2710         eb->num_batches = ce->parallel.number_children + 1;
2711
2712         for_each_child(ce, child)
2713                 intel_context_get(child);
2714         eb->wakeref = intel_gt_pm_get(ce->engine->gt);
2715
2716         if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) {
2717                 err = intel_context_alloc_state(ce);
2718                 if (err)
2719                         goto err;
2720         }
2721         for_each_child(ce, child) {
2722                 if (!test_bit(CONTEXT_ALLOC_BIT, &child->flags)) {
2723                         err = intel_context_alloc_state(child);
2724                         if (err)
2725                                 goto err;
2726                 }
2727         }
2728
2729         /*
2730          * ABI: Before userspace accesses the GPU (e.g. execbuffer), report
2731          * EIO if the GPU is already wedged.
2732          */
2733         err = intel_gt_terminally_wedged(ce->engine->gt);
2734         if (err)
2735                 goto err;
2736
2737         if (!i915_vm_tryget(ce->vm)) {
2738                 err = -ENOENT;
2739                 goto err;
2740         }
2741
2742         eb->context = ce;
2743         eb->gt = ce->engine->gt;
2744
2745         /*
2746          * Make sure engine pool stays alive even if we call intel_context_put
2747          * during ww handling. The pool is destroyed when last pm reference
2748          * is dropped, which breaks our -EDEADLK handling.
2749          */
2750         return err;
2751
2752 err:
2753         intel_gt_pm_put(ce->engine->gt, eb->wakeref);
2754         for_each_child(ce, child)
2755                 intel_context_put(child);
2756         intel_context_put(ce);
2757         return err;
2758 }
2759
2760 static void
2761 eb_put_engine(struct i915_execbuffer *eb)
2762 {
2763         struct intel_context *child;
2764
2765         i915_vm_put(eb->context->vm);
2766         intel_gt_pm_put(eb->context->engine->gt, eb->wakeref);
2767         for_each_child(eb->context, child)
2768                 intel_context_put(child);
2769         intel_context_put(eb->context);
2770 }
2771
2772 static void
2773 __free_fence_array(struct eb_fence *fences, unsigned int n)
2774 {
2775         while (n--) {
2776                 drm_syncobj_put(ptr_mask_bits(fences[n].syncobj, 2));
2777                 dma_fence_put(fences[n].dma_fence);
2778                 dma_fence_chain_free(fences[n].chain_fence);
2779         }
2780         kvfree(fences);
2781 }
2782
2783 static int
2784 add_timeline_fence_array(struct i915_execbuffer *eb,
2785                          const struct drm_i915_gem_execbuffer_ext_timeline_fences *timeline_fences)
2786 {
2787         struct drm_i915_gem_exec_fence __user *user_fences;
2788         u64 __user *user_values;
2789         struct eb_fence *f;
2790         u64 nfences;
2791         int err = 0;
2792
2793         nfences = timeline_fences->fence_count;
2794         if (!nfences)
2795                 return 0;
2796
2797         /* Check multiplication overflow for access_ok() and kvmalloc_array() */
2798         BUILD_BUG_ON(sizeof(size_t) > sizeof(unsigned long));
2799         if (nfences > min_t(unsigned long,
2800                             ULONG_MAX / sizeof(*user_fences),
2801                             SIZE_MAX / sizeof(*f)) - eb->num_fences)
2802                 return -EINVAL;
2803
2804         user_fences = u64_to_user_ptr(timeline_fences->handles_ptr);
2805         if (!access_ok(user_fences, nfences * sizeof(*user_fences)))
2806                 return -EFAULT;
2807
2808         user_values = u64_to_user_ptr(timeline_fences->values_ptr);
2809         if (!access_ok(user_values, nfences * sizeof(*user_values)))
2810                 return -EFAULT;
2811
2812         f = krealloc(eb->fences,
2813                      (eb->num_fences + nfences) * sizeof(*f),
2814                      __GFP_NOWARN | GFP_KERNEL);
2815         if (!f)
2816                 return -ENOMEM;
2817
2818         eb->fences = f;
2819         f += eb->num_fences;
2820
2821         BUILD_BUG_ON(~(ARCH_KMALLOC_MINALIGN - 1) &
2822                      ~__I915_EXEC_FENCE_UNKNOWN_FLAGS);
2823
2824         while (nfences--) {
2825                 struct drm_i915_gem_exec_fence user_fence;
2826                 struct drm_syncobj *syncobj;
2827                 struct dma_fence *fence = NULL;
2828                 u64 point;
2829
2830                 if (__copy_from_user(&user_fence,
2831                                      user_fences++,
2832                                      sizeof(user_fence)))
2833                         return -EFAULT;
2834
2835                 if (user_fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS)
2836                         return -EINVAL;
2837
2838                 if (__get_user(point, user_values++))
2839                         return -EFAULT;
2840
2841                 syncobj = drm_syncobj_find(eb->file, user_fence.handle);
2842                 if (!syncobj) {
2843                         drm_dbg(&eb->i915->drm,
2844                                 "Invalid syncobj handle provided\n");
2845                         return -ENOENT;
2846                 }
2847
2848                 fence = drm_syncobj_fence_get(syncobj);
2849
2850                 if (!fence && user_fence.flags &&
2851                     !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
2852                         drm_dbg(&eb->i915->drm,
2853                                 "Syncobj handle has no fence\n");
2854                         drm_syncobj_put(syncobj);
2855                         return -EINVAL;
2856                 }
2857
2858                 if (fence)
2859                         err = dma_fence_chain_find_seqno(&fence, point);
2860
2861                 if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
2862                         drm_dbg(&eb->i915->drm,
2863                                 "Syncobj handle missing requested point %llu\n",
2864                                 point);
2865                         dma_fence_put(fence);
2866                         drm_syncobj_put(syncobj);
2867                         return err;
2868                 }
2869
2870                 /*
2871                  * A point might have been signaled already and
2872                  * garbage collected from the timeline. In this case
2873                  * just ignore the point and carry on.
2874                  */
2875                 if (!fence && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
2876                         drm_syncobj_put(syncobj);
2877                         continue;
2878                 }
2879
2880                 /*
2881                  * For timeline syncobjs we need to preallocate chains for
2882                  * later signaling.
2883                  */
2884                 if (point != 0 && user_fence.flags & I915_EXEC_FENCE_SIGNAL) {
2885                         /*
2886                          * Waiting and signaling the same point (when point !=
2887                          * 0) would break the timeline.
2888                          */
2889                         if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
2890                                 drm_dbg(&eb->i915->drm,
2891                                         "Trying to wait & signal the same timeline point.\n");
2892                                 dma_fence_put(fence);
2893                                 drm_syncobj_put(syncobj);
2894                                 return -EINVAL;
2895                         }
2896
2897                         f->chain_fence = dma_fence_chain_alloc();
2898                         if (!f->chain_fence) {
2899                                 drm_syncobj_put(syncobj);
2900                                 dma_fence_put(fence);
2901                                 return -ENOMEM;
2902                         }
2903                 } else {
2904                         f->chain_fence = NULL;
2905                 }
2906
2907                 f->syncobj = ptr_pack_bits(syncobj, user_fence.flags, 2);
2908                 f->dma_fence = fence;
2909                 f->value = point;
2910                 f++;
2911                 eb->num_fences++;
2912         }
2913
2914         return 0;
2915 }
2916
2917 static int add_fence_array(struct i915_execbuffer *eb)
2918 {
2919         struct drm_i915_gem_execbuffer2 *args = eb->args;
2920         struct drm_i915_gem_exec_fence __user *user;
2921         unsigned long num_fences = args->num_cliprects;
2922         struct eb_fence *f;
2923
2924         if (!(args->flags & I915_EXEC_FENCE_ARRAY))
2925                 return 0;
2926
2927         if (!num_fences)
2928                 return 0;
2929
2930         /* Check multiplication overflow for access_ok() and kvmalloc_array() */
2931         BUILD_BUG_ON(sizeof(size_t) > sizeof(unsigned long));
2932         if (num_fences > min_t(unsigned long,
2933                                ULONG_MAX / sizeof(*user),
2934                                SIZE_MAX / sizeof(*f) - eb->num_fences))
2935                 return -EINVAL;
2936
2937         user = u64_to_user_ptr(args->cliprects_ptr);
2938         if (!access_ok(user, num_fences * sizeof(*user)))
2939                 return -EFAULT;
2940
2941         f = krealloc(eb->fences,
2942                      (eb->num_fences + num_fences) * sizeof(*f),
2943                      __GFP_NOWARN | GFP_KERNEL);
2944         if (!f)
2945                 return -ENOMEM;
2946
2947         eb->fences = f;
2948         f += eb->num_fences;
2949         while (num_fences--) {
2950                 struct drm_i915_gem_exec_fence user_fence;
2951                 struct drm_syncobj *syncobj;
2952                 struct dma_fence *fence = NULL;
2953
2954                 if (__copy_from_user(&user_fence, user++, sizeof(user_fence)))
2955                         return -EFAULT;
2956
2957                 if (user_fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS)
2958                         return -EINVAL;
2959
2960                 syncobj = drm_syncobj_find(eb->file, user_fence.handle);
2961                 if (!syncobj) {
2962                         drm_dbg(&eb->i915->drm,
2963                                 "Invalid syncobj handle provided\n");
2964                         return -ENOENT;
2965                 }
2966
2967                 if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
2968                         fence = drm_syncobj_fence_get(syncobj);
2969                         if (!fence) {
2970                                 drm_dbg(&eb->i915->drm,
2971                                         "Syncobj handle has no fence\n");
2972                                 drm_syncobj_put(syncobj);
2973                                 return -EINVAL;
2974                         }
2975                 }
2976
2977                 BUILD_BUG_ON(~(ARCH_KMALLOC_MINALIGN - 1) &
2978                              ~__I915_EXEC_FENCE_UNKNOWN_FLAGS);
2979
2980                 f->syncobj = ptr_pack_bits(syncobj, user_fence.flags, 2);
2981                 f->dma_fence = fence;
2982                 f->value = 0;
2983                 f->chain_fence = NULL;
2984                 f++;
2985                 eb->num_fences++;
2986         }
2987
2988         return 0;
2989 }
2990
2991 static void put_fence_array(struct eb_fence *fences, int num_fences)
2992 {
2993         if (fences)
2994                 __free_fence_array(fences, num_fences);
2995 }
2996
2997 static int
2998 await_fence_array(struct i915_execbuffer *eb,
2999                   struct i915_request *rq)
3000 {
3001         unsigned int n;
3002         int err;
3003
3004         for (n = 0; n < eb->num_fences; n++) {
3005                 if (!eb->fences[n].dma_fence)
3006                         continue;
3007
3008                 err = i915_request_await_dma_fence(rq, eb->fences[n].dma_fence);
3009                 if (err < 0)
3010                         return err;
3011         }
3012
3013         return 0;
3014 }
3015
3016 static void signal_fence_array(const struct i915_execbuffer *eb,
3017                                struct dma_fence * const fence)
3018 {
3019         unsigned int n;
3020
3021         for (n = 0; n < eb->num_fences; n++) {
3022                 struct drm_syncobj *syncobj;
3023                 unsigned int flags;
3024
3025                 syncobj = ptr_unpack_bits(eb->fences[n].syncobj, &flags, 2);
3026                 if (!(flags & I915_EXEC_FENCE_SIGNAL))
3027                         continue;
3028
3029                 if (eb->fences[n].chain_fence) {
3030                         drm_syncobj_add_point(syncobj,
3031                                               eb->fences[n].chain_fence,
3032                                               fence,
3033                                               eb->fences[n].value);
3034                         /*
3035                          * The chain's ownership is transferred to the
3036                          * timeline.
3037                          */
3038                         eb->fences[n].chain_fence = NULL;
3039                 } else {
3040                         drm_syncobj_replace_fence(syncobj, fence);
3041                 }
3042         }
3043 }
3044
3045 static int
3046 parse_timeline_fences(struct i915_user_extension __user *ext, void *data)
3047 {
3048         struct i915_execbuffer *eb = data;
3049         struct drm_i915_gem_execbuffer_ext_timeline_fences timeline_fences;
3050
3051         if (copy_from_user(&timeline_fences, ext, sizeof(timeline_fences)))
3052                 return -EFAULT;
3053
3054         return add_timeline_fence_array(eb, &timeline_fences);
3055 }
3056
3057 static void retire_requests(struct intel_timeline *tl, struct i915_request *end)
3058 {
3059         struct i915_request *rq, *rn;
3060
3061         list_for_each_entry_safe(rq, rn, &tl->requests, link)
3062                 if (rq == end || !i915_request_retire(rq))
3063                         break;
3064 }
3065
3066 static int eb_request_add(struct i915_execbuffer *eb, struct i915_request *rq,
3067                           int err, bool last_parallel)
3068 {
3069         struct intel_timeline * const tl = i915_request_timeline(rq);
3070         struct i915_sched_attr attr = {};
3071         struct i915_request *prev;
3072
3073         lockdep_assert_held(&tl->mutex);
3074         lockdep_unpin_lock(&tl->mutex, rq->cookie);
3075
3076         trace_i915_request_add(rq);
3077
3078         prev = __i915_request_commit(rq);
3079
3080         /* Check that the context wasn't destroyed before submission */
3081         if (likely(!intel_context_is_closed(eb->context))) {
3082                 attr = eb->gem_context->sched;
3083         } else {
3084                 /* Serialise with context_close via the add_to_timeline */
3085                 i915_request_set_error_once(rq, -ENOENT);
3086                 __i915_request_skip(rq);
3087                 err = -ENOENT; /* override any transient errors */
3088         }
3089
3090         if (intel_context_is_parallel(eb->context)) {
3091                 if (err) {
3092                         __i915_request_skip(rq);
3093                         set_bit(I915_FENCE_FLAG_SKIP_PARALLEL,
3094                                 &rq->fence.flags);
3095                 }
3096                 if (last_parallel)
3097                         set_bit(I915_FENCE_FLAG_SUBMIT_PARALLEL,
3098                                 &rq->fence.flags);
3099         }
3100
3101         __i915_request_queue(rq, &attr);
3102
3103         /* Try to clean up the client's timeline after submitting the request */
3104         if (prev)
3105                 retire_requests(tl, prev);
3106
3107         mutex_unlock(&tl->mutex);
3108
3109         return err;
3110 }
3111
3112 static int eb_requests_add(struct i915_execbuffer *eb, int err)
3113 {
3114         int i;
3115
3116         /*
3117          * We iterate in reverse order of creation to release timeline mutexes in
3118          * same order.
3119          */
3120         for_each_batch_add_order(eb, i) {
3121                 struct i915_request *rq = eb->requests[i];
3122
3123                 if (!rq)
3124                         continue;
3125                 err |= eb_request_add(eb, rq, err, i == 0);
3126         }
3127
3128         return err;
3129 }
3130
3131 static const i915_user_extension_fn execbuf_extensions[] = {
3132         [DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES] = parse_timeline_fences,
3133 };
3134
3135 static int
3136 parse_execbuf2_extensions(struct drm_i915_gem_execbuffer2 *args,
3137                           struct i915_execbuffer *eb)
3138 {
3139         if (!(args->flags & I915_EXEC_USE_EXTENSIONS))
3140                 return 0;
3141
3142         /* The execbuf2 extension mechanism reuses cliprects_ptr. So we cannot
3143          * have another flag also using it at the same time.
3144          */
3145         if (eb->args->flags & I915_EXEC_FENCE_ARRAY)
3146                 return -EINVAL;
3147
3148         if (args->num_cliprects != 0)
3149                 return -EINVAL;
3150
3151         return i915_user_extensions(u64_to_user_ptr(args->cliprects_ptr),
3152                                     execbuf_extensions,
3153                                     ARRAY_SIZE(execbuf_extensions),
3154                                     eb);
3155 }
3156
3157 static void eb_requests_get(struct i915_execbuffer *eb)
3158 {
3159         unsigned int i;
3160
3161         for_each_batch_create_order(eb, i) {
3162                 if (!eb->requests[i])
3163                         break;
3164
3165                 i915_request_get(eb->requests[i]);
3166         }
3167 }
3168
3169 static void eb_requests_put(struct i915_execbuffer *eb)
3170 {
3171         unsigned int i;
3172
3173         for_each_batch_create_order(eb, i) {
3174                 if (!eb->requests[i])
3175                         break;
3176
3177                 i915_request_put(eb->requests[i]);
3178         }
3179 }
3180
3181 static struct sync_file *
3182 eb_composite_fence_create(struct i915_execbuffer *eb, int out_fence_fd)
3183 {
3184         struct sync_file *out_fence = NULL;
3185         struct dma_fence_array *fence_array;
3186         struct dma_fence **fences;
3187         unsigned int i;
3188
3189         GEM_BUG_ON(!intel_context_is_parent(eb->context));
3190
3191         fences = kmalloc_array(eb->num_batches, sizeof(*fences), GFP_KERNEL);
3192         if (!fences)
3193                 return ERR_PTR(-ENOMEM);
3194
3195         for_each_batch_create_order(eb, i) {
3196                 fences[i] = &eb->requests[i]->fence;
3197                 __set_bit(I915_FENCE_FLAG_COMPOSITE,
3198                           &eb->requests[i]->fence.flags);
3199         }
3200
3201         fence_array = dma_fence_array_create(eb->num_batches,
3202                                              fences,
3203                                              eb->context->parallel.fence_context,
3204                                              eb->context->parallel.seqno++,
3205                                              false);
3206         if (!fence_array) {
3207                 kfree(fences);
3208                 return ERR_PTR(-ENOMEM);
3209         }
3210
3211         /* Move ownership to the dma_fence_array created above */
3212         for_each_batch_create_order(eb, i)
3213                 dma_fence_get(fences[i]);
3214
3215         if (out_fence_fd != -1) {
3216                 out_fence = sync_file_create(&fence_array->base);
3217                 /* sync_file now owns fence_arry, drop creation ref */
3218                 dma_fence_put(&fence_array->base);
3219                 if (!out_fence)
3220                         return ERR_PTR(-ENOMEM);
3221         }
3222
3223         eb->composite_fence = &fence_array->base;
3224
3225         return out_fence;
3226 }
3227
3228 static struct sync_file *
3229 eb_fences_add(struct i915_execbuffer *eb, struct i915_request *rq,
3230               struct dma_fence *in_fence, int out_fence_fd)
3231 {
3232         struct sync_file *out_fence = NULL;
3233         int err;
3234
3235         if (unlikely(eb->gem_context->syncobj)) {
3236                 struct dma_fence *fence;
3237
3238                 fence = drm_syncobj_fence_get(eb->gem_context->syncobj);
3239                 err = i915_request_await_dma_fence(rq, fence);
3240                 dma_fence_put(fence);
3241                 if (err)
3242                         return ERR_PTR(err);
3243         }
3244
3245         if (in_fence) {
3246                 if (eb->args->flags & I915_EXEC_FENCE_SUBMIT)
3247                         err = i915_request_await_execution(rq, in_fence);
3248                 else
3249                         err = i915_request_await_dma_fence(rq, in_fence);
3250                 if (err < 0)
3251                         return ERR_PTR(err);
3252         }
3253
3254         if (eb->fences) {
3255                 err = await_fence_array(eb, rq);
3256                 if (err)
3257                         return ERR_PTR(err);
3258         }
3259
3260         if (intel_context_is_parallel(eb->context)) {
3261                 out_fence = eb_composite_fence_create(eb, out_fence_fd);
3262                 if (IS_ERR(out_fence))
3263                         return ERR_PTR(-ENOMEM);
3264         } else if (out_fence_fd != -1) {
3265                 out_fence = sync_file_create(&rq->fence);
3266                 if (!out_fence)
3267                         return ERR_PTR(-ENOMEM);
3268         }
3269
3270         return out_fence;
3271 }
3272
3273 static struct intel_context *
3274 eb_find_context(struct i915_execbuffer *eb, unsigned int context_number)
3275 {
3276         struct intel_context *child;
3277
3278         if (likely(context_number == 0))
3279                 return eb->context;
3280
3281         for_each_child(eb->context, child)
3282                 if (!--context_number)
3283                         return child;
3284
3285         GEM_BUG_ON("Context not found");
3286
3287         return NULL;
3288 }
3289
3290 static struct sync_file *
3291 eb_requests_create(struct i915_execbuffer *eb, struct dma_fence *in_fence,
3292                    int out_fence_fd)
3293 {
3294         struct sync_file *out_fence = NULL;
3295         unsigned int i;
3296
3297         for_each_batch_create_order(eb, i) {
3298                 /* Allocate a request for this batch buffer nice and early. */
3299                 eb->requests[i] = i915_request_create(eb_find_context(eb, i));
3300                 if (IS_ERR(eb->requests[i])) {
3301                         out_fence = ERR_CAST(eb->requests[i]);
3302                         eb->requests[i] = NULL;
3303                         return out_fence;
3304                 }
3305
3306                 /*
3307                  * Only the first request added (committed to backend) has to
3308                  * take the in fences into account as all subsequent requests
3309                  * will have fences inserted inbetween them.
3310                  */
3311                 if (i + 1 == eb->num_batches) {
3312                         out_fence = eb_fences_add(eb, eb->requests[i],
3313                                                   in_fence, out_fence_fd);
3314                         if (IS_ERR(out_fence))
3315                                 return out_fence;
3316                 }
3317
3318                 /*
3319                  * Not really on stack, but we don't want to call
3320                  * kfree on the batch_snapshot when we put it, so use the
3321                  * _onstack interface.
3322                  */
3323                 if (eb->batches[i]->vma)
3324                         eb->requests[i]->batch_res =
3325                                 i915_vma_resource_get(eb->batches[i]->vma->resource);
3326                 if (eb->batch_pool) {
3327                         GEM_BUG_ON(intel_context_is_parallel(eb->context));
3328                         intel_gt_buffer_pool_mark_active(eb->batch_pool,
3329                                                          eb->requests[i]);
3330                 }
3331         }
3332
3333         return out_fence;
3334 }
3335
3336 static int
3337 i915_gem_do_execbuffer(struct drm_device *dev,
3338                        struct drm_file *file,
3339                        struct drm_i915_gem_execbuffer2 *args,
3340                        struct drm_i915_gem_exec_object2 *exec)
3341 {
3342         struct drm_i915_private *i915 = to_i915(dev);
3343         struct i915_execbuffer eb;
3344         struct dma_fence *in_fence = NULL;
3345         struct sync_file *out_fence = NULL;
3346         int out_fence_fd = -1;
3347         int err;
3348
3349         BUILD_BUG_ON(__EXEC_INTERNAL_FLAGS & ~__I915_EXEC_ILLEGAL_FLAGS);
3350         BUILD_BUG_ON(__EXEC_OBJECT_INTERNAL_FLAGS &
3351                      ~__EXEC_OBJECT_UNKNOWN_FLAGS);
3352
3353         eb.i915 = i915;
3354         eb.file = file;
3355         eb.args = args;
3356         if (DBG_FORCE_RELOC || !(args->flags & I915_EXEC_NO_RELOC))
3357                 args->flags |= __EXEC_HAS_RELOC;
3358
3359         eb.exec = exec;
3360         eb.vma = (struct eb_vma *)(exec + args->buffer_count + 1);
3361         eb.vma[0].vma = NULL;
3362         eb.batch_pool = NULL;
3363
3364         eb.invalid_flags = __EXEC_OBJECT_UNKNOWN_FLAGS;
3365         reloc_cache_init(&eb.reloc_cache, eb.i915);
3366
3367         eb.buffer_count = args->buffer_count;
3368         eb.batch_start_offset = args->batch_start_offset;
3369         eb.trampoline = NULL;
3370
3371         eb.fences = NULL;
3372         eb.num_fences = 0;
3373
3374         eb_capture_list_clear(&eb);
3375
3376         memset(eb.requests, 0, sizeof(struct i915_request *) *
3377                ARRAY_SIZE(eb.requests));
3378         eb.composite_fence = NULL;
3379
3380         eb.batch_flags = 0;
3381         if (args->flags & I915_EXEC_SECURE) {
3382                 if (GRAPHICS_VER(i915) >= 11)
3383                         return -ENODEV;
3384
3385                 /* Return -EPERM to trigger fallback code on old binaries. */
3386                 if (!HAS_SECURE_BATCHES(i915))
3387                         return -EPERM;
3388
3389                 if (!drm_is_current_master(file) || !capable(CAP_SYS_ADMIN))
3390                         return -EPERM;
3391
3392                 eb.batch_flags |= I915_DISPATCH_SECURE;
3393         }
3394         if (args->flags & I915_EXEC_IS_PINNED)
3395                 eb.batch_flags |= I915_DISPATCH_PINNED;
3396
3397         err = parse_execbuf2_extensions(args, &eb);
3398         if (err)
3399                 goto err_ext;
3400
3401         err = add_fence_array(&eb);
3402         if (err)
3403                 goto err_ext;
3404
3405 #define IN_FENCES (I915_EXEC_FENCE_IN | I915_EXEC_FENCE_SUBMIT)
3406         if (args->flags & IN_FENCES) {
3407                 if ((args->flags & IN_FENCES) == IN_FENCES)
3408                         return -EINVAL;
3409
3410                 in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2));
3411                 if (!in_fence) {
3412                         err = -EINVAL;
3413                         goto err_ext;
3414                 }
3415         }
3416 #undef IN_FENCES
3417
3418         if (args->flags & I915_EXEC_FENCE_OUT) {
3419                 out_fence_fd = get_unused_fd_flags(O_CLOEXEC);
3420                 if (out_fence_fd < 0) {
3421                         err = out_fence_fd;
3422                         goto err_in_fence;
3423                 }
3424         }
3425
3426         err = eb_create(&eb);
3427         if (err)
3428                 goto err_out_fence;
3429
3430         GEM_BUG_ON(!eb.lut_size);
3431
3432         err = eb_select_context(&eb);
3433         if (unlikely(err))
3434                 goto err_destroy;
3435
3436         err = eb_select_engine(&eb);
3437         if (unlikely(err))
3438                 goto err_context;
3439
3440         err = eb_lookup_vmas(&eb);
3441         if (err) {
3442                 eb_release_vmas(&eb, true);
3443                 goto err_engine;
3444         }
3445
3446         i915_gem_ww_ctx_init(&eb.ww, true);
3447
3448         err = eb_relocate_parse(&eb);
3449         if (err) {
3450                 /*
3451                  * If the user expects the execobject.offset and
3452                  * reloc.presumed_offset to be an exact match,
3453                  * as for using NO_RELOC, then we cannot update
3454                  * the execobject.offset until we have completed
3455                  * relocation.
3456                  */
3457                 args->flags &= ~__EXEC_HAS_RELOC;
3458                 goto err_vma;
3459         }
3460
3461         ww_acquire_done(&eb.ww.ctx);
3462         err = eb_capture_stage(&eb);
3463         if (err)
3464                 goto err_vma;
3465
3466         out_fence = eb_requests_create(&eb, in_fence, out_fence_fd);
3467         if (IS_ERR(out_fence)) {
3468                 err = PTR_ERR(out_fence);
3469                 out_fence = NULL;
3470                 if (eb.requests[0])
3471                         goto err_request;
3472                 else
3473                         goto err_vma;
3474         }
3475
3476         err = eb_submit(&eb);
3477
3478 err_request:
3479         eb_requests_get(&eb);
3480         err = eb_requests_add(&eb, err);
3481
3482         if (eb.fences)
3483                 signal_fence_array(&eb, eb.composite_fence ?
3484                                    eb.composite_fence :
3485                                    &eb.requests[0]->fence);
3486
3487         if (unlikely(eb.gem_context->syncobj)) {
3488                 drm_syncobj_replace_fence(eb.gem_context->syncobj,
3489                                           eb.composite_fence ?
3490                                           eb.composite_fence :
3491                                           &eb.requests[0]->fence);
3492         }
3493
3494         if (out_fence) {
3495                 if (err == 0) {
3496                         fd_install(out_fence_fd, out_fence->file);
3497                         args->rsvd2 &= GENMASK_ULL(31, 0); /* keep in-fence */
3498                         args->rsvd2 |= (u64)out_fence_fd << 32;
3499                         out_fence_fd = -1;
3500                 } else {
3501                         fput(out_fence->file);
3502                 }
3503         }
3504
3505         if (!out_fence && eb.composite_fence)
3506                 dma_fence_put(eb.composite_fence);
3507
3508         eb_requests_put(&eb);
3509
3510 err_vma:
3511         eb_release_vmas(&eb, true);
3512         WARN_ON(err == -EDEADLK);
3513         i915_gem_ww_ctx_fini(&eb.ww);
3514
3515         if (eb.batch_pool)
3516                 intel_gt_buffer_pool_put(eb.batch_pool);
3517 err_engine:
3518         eb_put_engine(&eb);
3519 err_context:
3520         i915_gem_context_put(eb.gem_context);
3521 err_destroy:
3522         eb_destroy(&eb);
3523 err_out_fence:
3524         if (out_fence_fd != -1)
3525                 put_unused_fd(out_fence_fd);
3526 err_in_fence:
3527         dma_fence_put(in_fence);
3528 err_ext:
3529         put_fence_array(eb.fences, eb.num_fences);
3530         return err;
3531 }
3532
3533 static size_t eb_element_size(void)
3534 {
3535         return sizeof(struct drm_i915_gem_exec_object2) + sizeof(struct eb_vma);
3536 }
3537
3538 static bool check_buffer_count(size_t count)
3539 {
3540         const size_t sz = eb_element_size();
3541
3542         /*
3543          * When using LUT_HANDLE, we impose a limit of INT_MAX for the lookup
3544          * array size (see eb_create()). Otherwise, we can accept an array as
3545          * large as can be addressed (though use large arrays at your peril)!
3546          */
3547
3548         return !(count < 1 || count > INT_MAX || count > SIZE_MAX / sz - 1);
3549 }
3550
3551 int
3552 i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
3553                            struct drm_file *file)
3554 {
3555         struct drm_i915_private *i915 = to_i915(dev);
3556         struct drm_i915_gem_execbuffer2 *args = data;
3557         struct drm_i915_gem_exec_object2 *exec2_list;
3558         const size_t count = args->buffer_count;
3559         int err;
3560
3561         if (!check_buffer_count(count)) {
3562                 drm_dbg(&i915->drm, "execbuf2 with %zd buffers\n", count);
3563                 return -EINVAL;
3564         }
3565
3566         err = i915_gem_check_execbuffer(i915, args);
3567         if (err)
3568                 return err;
3569
3570         /* Allocate extra slots for use by the command parser */
3571         exec2_list = kvmalloc_array(count + 2, eb_element_size(),
3572                                     __GFP_NOWARN | GFP_KERNEL);
3573         if (exec2_list == NULL) {
3574                 drm_dbg(&i915->drm, "Failed to allocate exec list for %zd buffers\n",
3575                         count);
3576                 return -ENOMEM;
3577         }
3578         if (copy_from_user(exec2_list,
3579                            u64_to_user_ptr(args->buffers_ptr),
3580                            sizeof(*exec2_list) * count)) {
3581                 drm_dbg(&i915->drm, "copy %zd exec entries failed\n", count);
3582                 kvfree(exec2_list);
3583                 return -EFAULT;
3584         }
3585
3586         err = i915_gem_do_execbuffer(dev, file, args, exec2_list);
3587
3588         /*
3589          * Now that we have begun execution of the batchbuffer, we ignore
3590          * any new error after this point. Also given that we have already
3591          * updated the associated relocations, we try to write out the current
3592          * object locations irrespective of any error.
3593          */
3594         if (args->flags & __EXEC_HAS_RELOC) {
3595                 struct drm_i915_gem_exec_object2 __user *user_exec_list =
3596                         u64_to_user_ptr(args->buffers_ptr);
3597                 unsigned int i;
3598
3599                 /* Copy the new buffer offsets back to the user's exec list. */
3600                 /*
3601                  * Note: count * sizeof(*user_exec_list) does not overflow,
3602                  * because we checked 'count' in check_buffer_count().
3603                  *
3604                  * And this range already got effectively checked earlier
3605                  * when we did the "copy_from_user()" above.
3606                  */
3607                 if (!user_write_access_begin(user_exec_list,
3608                                              count * sizeof(*user_exec_list)))
3609                         goto end;
3610
3611                 for (i = 0; i < args->buffer_count; i++) {
3612                         if (!(exec2_list[i].offset & UPDATE))
3613                                 continue;
3614
3615                         exec2_list[i].offset =
3616                                 gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK);
3617                         unsafe_put_user(exec2_list[i].offset,
3618                                         &user_exec_list[i].offset,
3619                                         end_user);
3620                 }
3621 end_user:
3622                 user_write_access_end();
3623 end:;
3624         }
3625
3626         args->flags &= ~__I915_EXEC_UNKNOWN_FLAGS;
3627         kvfree(exec2_list);
3628         return err;
3629 }
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