drivers/gpu/drm/i915/display/intel_fb_bo.c

   1 /* SPDX-License-Identifier: MIT */
   2 /*
   3  * Copyright © 2021 Intel Corporation
   4  */
   5
   6 #include <drm/drm_framebuffer.h>
   7
   8 #include "gem/i915_gem_object.h"
   9
  10 #include "i915_drv.h"
  11 #include "intel_fb.h"
  12 #include "intel_fb_bo.h"
  13
  14 void intel_fb_bo_framebuffer_fini(struct drm_i915_gem_object *obj)
  15 {
  16         /* Nothing to do for i915 */
  17 }
  18
  19 int intel_fb_bo_framebuffer_init(struct intel_framebuffer *intel_fb,
  20                                  struct drm_i915_gem_object *obj,
  21                                  struct drm_mode_fb_cmd2 *mode_cmd)
  22 {
  23         struct drm_i915_private *i915 = to_i915(obj->base.dev);
  24         unsigned int tiling, stride;
  25
  26         i915_gem_object_lock(obj, NULL);
  27         tiling = i915_gem_object_get_tiling(obj);
  28         stride = i915_gem_object_get_stride(obj);
  29         i915_gem_object_unlock(obj);
  30
  31         if (mode_cmd->flags & DRM_MODE_FB_MODIFIERS) {
  32                 /*
  33                  * If there's a fence, enforce that
  34                  * the fb modifier and tiling mode match.
  35                  */
  36                 if (tiling != I915_TILING_NONE &&
  37                     tiling != intel_fb_modifier_to_tiling(mode_cmd->modifier[0])) {
  38                         drm_dbg_kms(&i915->drm,
  39                                     "tiling_mode doesn't match fb modifier\n");
  40                         return -EINVAL;
  41                 }
  42         } else {
  43                 if (tiling == I915_TILING_X) {
  44                         mode_cmd->modifier[0] = I915_FORMAT_MOD_X_TILED;
  45                 } else if (tiling == I915_TILING_Y) {
  46                         drm_dbg_kms(&i915->drm,
  47                                     "No Y tiling for legacy addfb\n");
  48                         return -EINVAL;
  49                 }
  50         }
  51
  52         /*
  53          * gen2/3 display engine uses the fence if present,
  54          * so the tiling mode must match the fb modifier exactly.
  55          */
  56         if (DISPLAY_VER(i915) < 4 &&
  57             tiling != intel_fb_modifier_to_tiling(mode_cmd->modifier[0])) {
  58                 drm_dbg_kms(&i915->drm,
  59                             "tiling_mode must match fb modifier exactly on gen2/3\n");
  60                 return -EINVAL;
  61         }
  62
  63         /*
  64          * If there's a fence, enforce that
  65          * the fb pitch and fence stride match.
  66          */
  67         if (tiling != I915_TILING_NONE && mode_cmd->pitches[0] != stride) {
  68                 drm_dbg_kms(&i915->drm,
  69                             "pitch (%d) must match tiling stride (%d)\n",
  70                             mode_cmd->pitches[0], stride);
  71                 return -EINVAL;
  72         }
  73
  74         return 0;
  75 }
  76
  77 struct drm_i915_gem_object *
  78 intel_fb_bo_lookup_valid_bo(struct drm_i915_private *i915,
  79                             struct drm_file *filp,
  80                             const struct drm_mode_fb_cmd2 *mode_cmd)
  81 {
  82         struct drm_i915_gem_object *obj;
  83
  84         obj = i915_gem_object_lookup(filp, mode_cmd->handles[0]);
  85         if (!obj)
  86                 return ERR_PTR(-ENOENT);
  87
  88         /* object is backed with LMEM for discrete */
  89         if (HAS_LMEM(i915) && !i915_gem_object_can_migrate(obj, INTEL_REGION_LMEM_0)) {
  90                 /* object is "remote", not in local memory */
  91                 i915_gem_object_put(obj);
  92                 drm_dbg_kms(&i915->drm, "framebuffer must reside in local memory\n");
  93                 return ERR_PTR(-EREMOTE);
  94         }
  95
  96         return obj;
  97 }