]> Git Repo - linux.git/blob - drivers/gpu/drm/i915/display/intel_dpll.h
Merge patch series "riscv: Extension parsing fixes"
[linux.git] / drivers / gpu / drm / i915 / display / intel_dpll.h
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2020 Intel Corporation
4  */
5
6 #ifndef _INTEL_DPLL_H_
7 #define _INTEL_DPLL_H_
8
9 #include <linux/types.h>
10
11 struct dpll;
12 struct drm_i915_private;
13 struct intel_atomic_state;
14 struct intel_crtc;
15 struct intel_crtc_state;
16 struct intel_dpll_hw_state;
17 enum pipe;
18
19 void intel_dpll_init_clock_hook(struct drm_i915_private *dev_priv);
20 int intel_dpll_crtc_compute_clock(struct intel_atomic_state *state,
21                                   struct intel_crtc *crtc);
22 int intel_dpll_crtc_get_shared_dpll(struct intel_atomic_state *state,
23                                     struct intel_crtc *crtc);
24 int i9xx_calc_dpll_params(int refclk, struct dpll *clock);
25 u32 i9xx_dpll_compute_fp(const struct dpll *dpll);
26 void i9xx_dpll_get_hw_state(struct intel_crtc *crtc,
27                             struct intel_dpll_hw_state *dpll_hw_state);
28 void vlv_compute_dpll(struct intel_crtc_state *crtc_state);
29 void chv_compute_dpll(struct intel_crtc_state *crtc_state);
30
31 int vlv_force_pll_on(struct drm_i915_private *dev_priv, enum pipe pipe,
32                      const struct dpll *dpll);
33 void vlv_force_pll_off(struct drm_i915_private *dev_priv, enum pipe pipe);
34
35 void chv_enable_pll(const struct intel_crtc_state *crtc_state);
36 void chv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe);
37 void vlv_enable_pll(const struct intel_crtc_state *crtc_state);
38 void vlv_disable_pll(struct drm_i915_private *dev_priv, enum pipe pipe);
39 void i9xx_enable_pll(const struct intel_crtc_state *crtc_state);
40 void i9xx_disable_pll(const struct intel_crtc_state *crtc_state);
41 bool bxt_find_best_dpll(struct intel_crtc_state *crtc_state,
42                         struct dpll *best_clock);
43 int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
44
45 void i9xx_crtc_clock_get(struct intel_crtc_state *crtc_state);
46 void vlv_crtc_clock_get(struct intel_crtc_state *crtc_state);
47 void chv_crtc_clock_get(struct intel_crtc_state *crtc_state);
48
49 void assert_pll_enabled(struct drm_i915_private *i915, enum pipe pipe);
50 void assert_pll_disabled(struct drm_i915_private *i915, enum pipe pipe);
51
52 #endif
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