1 // SPDX-License-Identifier: GPL-2.0-only
5 * Device driver supporting CBR for IDT 77201/77211 "NICStAR" based cards.
7 * IMPORTANT: The included file nicstarmac.c was NOT WRITTEN BY ME.
8 * It was taken from the frle-0.22 device driver.
9 * As the file doesn't have a copyright notice, in the file
10 * nicstarmac.copyright I put the copyright notice from the
11 * frle-0.22 device driver.
12 * Some code is based on the nicstar driver by M. Welsh.
22 * IMPORTANT INFORMATION
24 * There are currently three types of spinlocks:
26 * 1 - Per card interrupt spinlock (to protect structures and such)
27 * 2 - Per SCQ scq spinlock
28 * 3 - Per card resource spinlock (to access registers, etc.)
30 * These must NEVER be grabbed in reverse order.
36 #include <linux/module.h>
37 #include <linux/kernel.h>
38 #include <linux/skbuff.h>
39 #include <linux/atmdev.h>
40 #include <linux/atm.h>
41 #include <linux/pci.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/types.h>
44 #include <linux/string.h>
45 #include <linux/delay.h>
46 #include <linux/init.h>
47 #include <linux/sched.h>
48 #include <linux/timer.h>
49 #include <linux/interrupt.h>
50 #include <linux/bitops.h>
51 #include <linux/slab.h>
52 #include <linux/idr.h>
54 #include <linux/uaccess.h>
55 #include <linux/atomic.h>
56 #include <linux/etherdevice.h>
58 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
60 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
61 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
63 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
67 #include "nicstarmac.c"
69 /* Configurable parameters */
77 /* Do not touch these */
80 #define TXPRINTK(args...) printk(args)
82 #define TXPRINTK(args...)
86 #define RXPRINTK(args...) printk(args)
88 #define RXPRINTK(args...)
92 #define PRINTK(args...) printk(args)
94 #define PRINTK(args...)
95 #endif /* GENERAL_DEBUG */
98 #define XPRINTK(args...) printk(args)
100 #define XPRINTK(args...)
101 #endif /* EXTRA_DEBUG */
105 #define CMD_BUSY(card) (readl((card)->membase + STAT) & NS_STAT_CMDBZ)
107 #define NS_DELAY mdelay(1)
109 #define PTR_DIFF(a, b) ((u32)((unsigned long)(a) - (unsigned long)(b)))
112 #define ATM_SKB(s) (&(s)->atm)
115 #define scq_virt_to_bus(scq, p) \
116 (scq->dma + ((unsigned long)(p) - (unsigned long)(scq)->org))
118 /* Function declarations */
120 static u32 ns_read_sram(ns_dev * card, u32 sram_address);
121 static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
123 static int ns_init_card(int i, struct pci_dev *pcidev);
124 static void ns_init_card_error(ns_dev * card, int error);
125 static scq_info *get_scq(ns_dev *card, int size, u32 scd);
126 static void free_scq(ns_dev *card, scq_info * scq, struct atm_vcc *vcc);
127 static void push_rxbufs(ns_dev *, struct sk_buff *);
128 static irqreturn_t ns_irq_handler(int irq, void *dev_id);
129 static int ns_open(struct atm_vcc *vcc);
130 static void ns_close(struct atm_vcc *vcc);
131 static void fill_tst(ns_dev * card, int n, vc_map * vc);
132 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb);
133 static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
134 struct sk_buff *skb);
135 static void process_tsq(ns_dev * card);
136 static void drain_scq(ns_dev * card, scq_info * scq, int pos);
137 static void process_rsq(ns_dev * card);
138 static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe);
139 static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb);
140 static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count);
141 static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb);
142 static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb);
143 static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb);
144 static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page);
145 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg);
147 static void which_list(ns_dev * card, struct sk_buff *skb);
149 static void ns_poll(struct timer_list *unused);
150 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
152 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr);
154 /* Global variables */
156 static struct ns_dev *cards[NS_MAX_CARDS];
157 static unsigned num_cards;
158 static const struct atmdev_ops atm_ops = {
163 .phy_put = ns_phy_put,
164 .phy_get = ns_phy_get,
165 .proc_read = ns_proc_read,
166 .owner = THIS_MODULE,
169 static struct timer_list ns_timer;
170 static char *mac[NS_MAX_CARDS];
171 module_param_array(mac, charp, NULL, 0);
172 MODULE_LICENSE("GPL");
176 static int nicstar_init_one(struct pci_dev *pcidev,
177 const struct pci_device_id *ent)
179 static int index = -1;
185 error = ns_init_card(index, pcidev);
187 cards[index--] = NULL; /* don't increment index */
196 static void nicstar_remove_one(struct pci_dev *pcidev)
199 ns_dev *card = pci_get_drvdata(pcidev);
201 struct sk_buff *iovb;
207 if (cards[i] == NULL)
210 if (card->atmdev->phy && card->atmdev->phy->stop)
211 card->atmdev->phy->stop(card->atmdev);
213 /* Stop everything */
214 writel(0x00000000, card->membase + CFG);
216 /* De-register device */
217 atm_dev_deregister(card->atmdev);
219 /* Disable PCI device */
220 pci_disable_device(pcidev);
222 /* Free up resources */
224 PRINTK("nicstar%d: freeing %d huge buffers.\n", i, card->hbpool.count);
225 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL) {
226 dev_kfree_skb_any(hb);
229 PRINTK("nicstar%d: %d huge buffers freed.\n", i, j);
231 PRINTK("nicstar%d: freeing %d iovec buffers.\n", i,
232 card->iovpool.count);
233 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL) {
234 dev_kfree_skb_any(iovb);
237 PRINTK("nicstar%d: %d iovec buffers freed.\n", i, j);
238 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
239 dev_kfree_skb_any(lb);
240 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
241 dev_kfree_skb_any(sb);
242 free_scq(card, card->scq0, NULL);
243 for (j = 0; j < NS_FRSCD_NUM; j++) {
244 if (card->scd2vc[j] != NULL)
245 free_scq(card, card->scd2vc[j]->scq, card->scd2vc[j]->tx_vcc);
247 idr_destroy(&card->idr);
248 dma_free_coherent(&card->pcidev->dev, NS_RSQSIZE + NS_RSQ_ALIGNMENT,
249 card->rsq.org, card->rsq.dma);
250 dma_free_coherent(&card->pcidev->dev, NS_TSQSIZE + NS_TSQ_ALIGNMENT,
251 card->tsq.org, card->tsq.dma);
252 free_irq(card->pcidev->irq, card);
253 iounmap(card->membase);
257 static const struct pci_device_id nicstar_pci_tbl[] = {
258 { PCI_VDEVICE(IDT, PCI_DEVICE_ID_IDT_IDT77201), 0 },
259 {0,} /* terminate list */
262 MODULE_DEVICE_TABLE(pci, nicstar_pci_tbl);
264 static struct pci_driver nicstar_driver = {
266 .id_table = nicstar_pci_tbl,
267 .probe = nicstar_init_one,
268 .remove = nicstar_remove_one,
271 static int __init nicstar_init(void)
273 unsigned error = 0; /* Initialized to remove compile warning */
275 XPRINTK("nicstar: nicstar_init() called.\n");
277 error = pci_register_driver(&nicstar_driver);
279 TXPRINTK("nicstar: TX debug enabled.\n");
280 RXPRINTK("nicstar: RX debug enabled.\n");
281 PRINTK("nicstar: General debug enabled.\n");
283 printk("nicstar: using PHY loopback.\n");
284 #endif /* PHY_LOOPBACK */
285 XPRINTK("nicstar: nicstar_init() returned.\n");
288 timer_setup(&ns_timer, ns_poll, 0);
289 ns_timer.expires = jiffies + NS_POLL_PERIOD;
290 add_timer(&ns_timer);
296 static void __exit nicstar_cleanup(void)
298 XPRINTK("nicstar: nicstar_cleanup() called.\n");
300 del_timer(&ns_timer);
302 pci_unregister_driver(&nicstar_driver);
304 XPRINTK("nicstar: nicstar_cleanup() returned.\n");
307 static u32 ns_read_sram(ns_dev * card, u32 sram_address)
312 sram_address &= 0x0007FFFC; /* address must be dword aligned */
313 sram_address |= 0x50000000; /* SRAM read command */
314 spin_lock_irqsave(&card->res_lock, flags);
315 while (CMD_BUSY(card)) ;
316 writel(sram_address, card->membase + CMD);
317 while (CMD_BUSY(card)) ;
318 data = readl(card->membase + DR0);
319 spin_unlock_irqrestore(&card->res_lock, flags);
323 static void ns_write_sram(ns_dev * card, u32 sram_address, u32 * value,
328 count--; /* count range now is 0..3 instead of 1..4 */
330 c <<= 2; /* to use increments of 4 */
331 spin_lock_irqsave(&card->res_lock, flags);
332 while (CMD_BUSY(card)) ;
333 for (i = 0; i <= c; i += 4)
334 writel(*(value++), card->membase + i);
335 /* Note: DR# registers are the first 4 dwords in nicstar's memspace,
336 so card->membase + DR0 == card->membase */
338 sram_address &= 0x0007FFFC;
339 sram_address |= (0x40000000 | count);
340 writel(sram_address, card->membase + CMD);
341 spin_unlock_irqrestore(&card->res_lock, flags);
344 static int ns_init_card(int i, struct pci_dev *pcidev)
347 struct ns_dev *card = NULL;
348 unsigned char pci_latency;
354 unsigned long membase;
358 if (pci_enable_device(pcidev)) {
359 printk("nicstar%d: can't enable PCI device\n", i);
361 ns_init_card_error(card, error);
364 if (dma_set_mask_and_coherent(&pcidev->dev, DMA_BIT_MASK(32)) != 0) {
366 "nicstar%d: No suitable DMA available.\n", i);
368 ns_init_card_error(card, error);
372 card = kmalloc(sizeof(*card), GFP_KERNEL);
375 ("nicstar%d: can't allocate memory for device structure.\n",
378 ns_init_card_error(card, error);
382 spin_lock_init(&card->int_lock);
383 spin_lock_init(&card->res_lock);
385 pci_set_drvdata(pcidev, card);
389 card->pcidev = pcidev;
390 membase = pci_resource_start(pcidev, 1);
391 card->membase = ioremap(membase, NS_IOREMAP_SIZE);
392 if (!card->membase) {
393 printk("nicstar%d: can't ioremap() membase.\n", i);
395 ns_init_card_error(card, error);
398 PRINTK("nicstar%d: membase at 0x%p.\n", i, card->membase);
400 pci_set_master(pcidev);
402 if (pci_read_config_byte(pcidev, PCI_LATENCY_TIMER, &pci_latency) != 0) {
403 printk("nicstar%d: can't read PCI latency timer.\n", i);
405 ns_init_card_error(card, error);
408 #ifdef NS_PCI_LATENCY
409 if (pci_latency < NS_PCI_LATENCY) {
410 PRINTK("nicstar%d: setting PCI latency timer to %d.\n", i,
412 for (j = 1; j < 4; j++) {
413 if (pci_write_config_byte
414 (pcidev, PCI_LATENCY_TIMER, NS_PCI_LATENCY) != 0)
419 ("nicstar%d: can't set PCI latency timer to %d.\n",
422 ns_init_card_error(card, error);
426 #endif /* NS_PCI_LATENCY */
428 /* Clear timer overflow */
429 data = readl(card->membase + STAT);
430 if (data & NS_STAT_TMROF)
431 writel(NS_STAT_TMROF, card->membase + STAT);
434 writel(NS_CFG_SWRST, card->membase + CFG);
436 writel(0x00000000, card->membase + CFG);
439 writel(0x00000008, card->membase + GP);
441 writel(0x00000001, card->membase + GP);
443 while (CMD_BUSY(card)) ;
444 writel(NS_CMD_WRITE_UTILITY | 0x00000100, card->membase + CMD); /* Sync UTOPIA with SAR clock */
447 /* Detect PHY type */
448 while (CMD_BUSY(card)) ;
449 writel(NS_CMD_READ_UTILITY | 0x00000200, card->membase + CMD);
450 while (CMD_BUSY(card)) ;
451 data = readl(card->membase + DR0);
454 printk("nicstar%d: PHY seems to be 25 Mbps.\n", i);
455 card->max_pcr = ATM_25_PCR;
456 while (CMD_BUSY(card)) ;
457 writel(0x00000008, card->membase + DR0);
458 writel(NS_CMD_WRITE_UTILITY | 0x00000200, card->membase + CMD);
459 /* Clear an eventual pending interrupt */
460 writel(NS_STAT_SFBQF, card->membase + STAT);
462 while (CMD_BUSY(card)) ;
463 writel(0x00000022, card->membase + DR0);
464 writel(NS_CMD_WRITE_UTILITY | 0x00000202, card->membase + CMD);
465 #endif /* PHY_LOOPBACK */
469 printk("nicstar%d: PHY seems to be 155 Mbps.\n", i);
470 card->max_pcr = ATM_OC3_PCR;
472 while (CMD_BUSY(card)) ;
473 writel(0x00000002, card->membase + DR0);
474 writel(NS_CMD_WRITE_UTILITY | 0x00000205, card->membase + CMD);
475 #endif /* PHY_LOOPBACK */
478 printk("nicstar%d: unknown PHY type (0x%08X).\n", i, data);
480 ns_init_card_error(card, error);
483 writel(0x00000000, card->membase + GP);
485 /* Determine SRAM size */
487 ns_write_sram(card, 0x1C003, &data, 1);
489 ns_write_sram(card, 0x14003, &data, 1);
490 if (ns_read_sram(card, 0x14003) == 0x89ABCDEF &&
491 ns_read_sram(card, 0x1C003) == 0x76543210)
492 card->sram_size = 128;
494 card->sram_size = 32;
495 PRINTK("nicstar%d: %dK x 32bit SRAM size.\n", i, card->sram_size);
497 card->rct_size = NS_MAX_RCTSIZE;
499 #if (NS_MAX_RCTSIZE == 4096)
500 if (card->sram_size == 128)
502 ("nicstar%d: limiting maximum VCI. See NS_MAX_RCTSIZE in nicstar.h\n",
504 #elif (NS_MAX_RCTSIZE == 16384)
505 if (card->sram_size == 32) {
507 ("nicstar%d: wasting memory. See NS_MAX_RCTSIZE in nicstar.h\n",
509 card->rct_size = 4096;
512 #error NS_MAX_RCTSIZE must be either 4096 or 16384 in nicstar.c
515 card->vpibits = NS_VPIBITS;
516 if (card->rct_size == 4096)
517 card->vcibits = 12 - NS_VPIBITS;
518 else /* card->rct_size == 16384 */
519 card->vcibits = 14 - NS_VPIBITS;
521 /* Initialize the nicstar eeprom/eprom stuff, for the MAC addr */
523 nicstar_init_eprom(card->membase);
525 /* Set the VPI/VCI MSb mask to zero so we can receive OAM cells */
526 writel(0x00000000, card->membase + VPM);
529 card->tsq.org = dma_alloc_coherent(&card->pcidev->dev,
530 NS_TSQSIZE + NS_TSQ_ALIGNMENT,
531 &card->tsq.dma, GFP_KERNEL);
532 if (card->tsq.org == NULL) {
533 printk("nicstar%d: can't allocate TSQ.\n", i);
535 ns_init_card_error(card, error);
538 card->tsq.base = PTR_ALIGN(card->tsq.org, NS_TSQ_ALIGNMENT);
539 card->tsq.next = card->tsq.base;
540 card->tsq.last = card->tsq.base + (NS_TSQ_NUM_ENTRIES - 1);
541 for (j = 0; j < NS_TSQ_NUM_ENTRIES; j++)
542 ns_tsi_init(card->tsq.base + j);
543 writel(0x00000000, card->membase + TSQH);
544 writel(ALIGN(card->tsq.dma, NS_TSQ_ALIGNMENT), card->membase + TSQB);
545 PRINTK("nicstar%d: TSQ base at 0x%p.\n", i, card->tsq.base);
548 card->rsq.org = dma_alloc_coherent(&card->pcidev->dev,
549 NS_RSQSIZE + NS_RSQ_ALIGNMENT,
550 &card->rsq.dma, GFP_KERNEL);
551 if (card->rsq.org == NULL) {
552 printk("nicstar%d: can't allocate RSQ.\n", i);
554 ns_init_card_error(card, error);
557 card->rsq.base = PTR_ALIGN(card->rsq.org, NS_RSQ_ALIGNMENT);
558 card->rsq.next = card->rsq.base;
559 card->rsq.last = card->rsq.base + (NS_RSQ_NUM_ENTRIES - 1);
560 for (j = 0; j < NS_RSQ_NUM_ENTRIES; j++)
561 ns_rsqe_init(card->rsq.base + j);
562 writel(0x00000000, card->membase + RSQH);
563 writel(ALIGN(card->rsq.dma, NS_RSQ_ALIGNMENT), card->membase + RSQB);
564 PRINTK("nicstar%d: RSQ base at 0x%p.\n", i, card->rsq.base);
566 /* Initialize SCQ0, the only VBR SCQ used */
569 card->scq0 = get_scq(card, VBR_SCQSIZE, NS_VRSCD0);
570 if (card->scq0 == NULL) {
571 printk("nicstar%d: can't get SCQ0.\n", i);
573 ns_init_card_error(card, error);
576 u32d[0] = scq_virt_to_bus(card->scq0, card->scq0->base);
577 u32d[1] = (u32) 0x00000000;
578 u32d[2] = (u32) 0xffffffff;
579 u32d[3] = (u32) 0x00000000;
580 ns_write_sram(card, NS_VRSCD0, u32d, 4);
581 ns_write_sram(card, NS_VRSCD1, u32d, 4); /* These last two won't be used */
582 ns_write_sram(card, NS_VRSCD2, u32d, 4); /* but are initialized, just in case... */
583 card->scq0->scd = NS_VRSCD0;
584 PRINTK("nicstar%d: VBR-SCQ0 base at 0x%p.\n", i, card->scq0->base);
586 /* Initialize TSTs */
587 card->tst_addr = NS_TST0;
588 card->tst_free_entries = NS_TST_NUM_ENTRIES;
589 data = NS_TST_OPCODE_VARIABLE;
590 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
591 ns_write_sram(card, NS_TST0 + j, &data, 1);
592 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST0);
593 ns_write_sram(card, NS_TST0 + NS_TST_NUM_ENTRIES, &data, 1);
594 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
595 ns_write_sram(card, NS_TST1 + j, &data, 1);
596 data = ns_tste_make(NS_TST_OPCODE_END, NS_TST1);
597 ns_write_sram(card, NS_TST1 + NS_TST_NUM_ENTRIES, &data, 1);
598 for (j = 0; j < NS_TST_NUM_ENTRIES; j++)
599 card->tste2vc[j] = NULL;
600 writel(NS_TST0 << 2, card->membase + TSTB);
602 /* Initialize RCT. AAL type is set on opening the VC. */
604 u32d[0] = NS_RCTE_RAWCELLINTEN;
606 u32d[0] = 0x00000000;
607 #endif /* RCQ_SUPPORT */
608 u32d[1] = 0x00000000;
609 u32d[2] = 0x00000000;
610 u32d[3] = 0xFFFFFFFF;
611 for (j = 0; j < card->rct_size; j++)
612 ns_write_sram(card, j * 4, u32d, 4);
614 memset(card->vcmap, 0, sizeof(card->vcmap));
616 for (j = 0; j < NS_FRSCD_NUM; j++)
617 card->scd2vc[j] = NULL;
619 /* Initialize buffer levels */
620 card->sbnr.min = MIN_SB;
621 card->sbnr.init = NUM_SB;
622 card->sbnr.max = MAX_SB;
623 card->lbnr.min = MIN_LB;
624 card->lbnr.init = NUM_LB;
625 card->lbnr.max = MAX_LB;
626 card->iovnr.min = MIN_IOVB;
627 card->iovnr.init = NUM_IOVB;
628 card->iovnr.max = MAX_IOVB;
629 card->hbnr.min = MIN_HB;
630 card->hbnr.init = NUM_HB;
631 card->hbnr.max = MAX_HB;
633 card->sm_handle = NULL;
634 card->sm_addr = 0x00000000;
635 card->lg_handle = NULL;
636 card->lg_addr = 0x00000000;
638 card->efbie = 1; /* To prevent push_rxbufs from enabling the interrupt */
640 idr_init(&card->idr);
642 /* Pre-allocate some huge buffers */
643 skb_queue_head_init(&card->hbpool.queue);
644 card->hbpool.count = 0;
645 for (j = 0; j < NUM_HB; j++) {
647 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
650 ("nicstar%d: can't allocate %dth of %d huge buffers.\n",
653 ns_init_card_error(card, error);
656 NS_PRV_BUFTYPE(hb) = BUF_NONE;
657 skb_queue_tail(&card->hbpool.queue, hb);
658 card->hbpool.count++;
661 /* Allocate large buffers */
662 skb_queue_head_init(&card->lbpool.queue);
663 card->lbpool.count = 0; /* Not used */
664 for (j = 0; j < NUM_LB; j++) {
666 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
669 ("nicstar%d: can't allocate %dth of %d large buffers.\n",
672 ns_init_card_error(card, error);
675 NS_PRV_BUFTYPE(lb) = BUF_LG;
676 skb_queue_tail(&card->lbpool.queue, lb);
677 skb_reserve(lb, NS_SMBUFSIZE);
678 push_rxbufs(card, lb);
679 /* Due to the implementation of push_rxbufs() this is 1, not 0 */
682 card->rawcell = (struct ns_rcqe *) lb->data;
683 card->rawch = NS_PRV_DMA(lb);
686 /* Test for strange behaviour which leads to crashes */
688 ns_stat_lfbqc_get(readl(card->membase + STAT))) < card->lbnr.min) {
690 ("nicstar%d: Strange... Just allocated %d large buffers and lfbqc = %d.\n",
693 ns_init_card_error(card, error);
697 /* Allocate small buffers */
698 skb_queue_head_init(&card->sbpool.queue);
699 card->sbpool.count = 0; /* Not used */
700 for (j = 0; j < NUM_SB; j++) {
702 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
705 ("nicstar%d: can't allocate %dth of %d small buffers.\n",
708 ns_init_card_error(card, error);
711 NS_PRV_BUFTYPE(sb) = BUF_SM;
712 skb_queue_tail(&card->sbpool.queue, sb);
713 skb_reserve(sb, NS_AAL0_HEADER);
714 push_rxbufs(card, sb);
716 /* Test for strange behaviour which leads to crashes */
718 ns_stat_sfbqc_get(readl(card->membase + STAT))) < card->sbnr.min) {
720 ("nicstar%d: Strange... Just allocated %d small buffers and sfbqc = %d.\n",
723 ns_init_card_error(card, error);
727 /* Allocate iovec buffers */
728 skb_queue_head_init(&card->iovpool.queue);
729 card->iovpool.count = 0;
730 for (j = 0; j < NUM_IOVB; j++) {
731 struct sk_buff *iovb;
732 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
735 ("nicstar%d: can't allocate %dth of %d iovec buffers.\n",
738 ns_init_card_error(card, error);
741 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
742 skb_queue_tail(&card->iovpool.queue, iovb);
743 card->iovpool.count++;
746 /* Configure NICStAR */
747 if (card->rct_size == 4096)
748 ns_cfg_rctsize = NS_CFG_RCTSIZE_4096_ENTRIES;
749 else /* (card->rct_size == 16384) */
750 ns_cfg_rctsize = NS_CFG_RCTSIZE_16384_ENTRIES;
756 (pcidev->irq, &ns_irq_handler, IRQF_SHARED, "nicstar", card) != 0) {
757 printk("nicstar%d: can't allocate IRQ %d.\n", i, pcidev->irq);
759 ns_init_card_error(card, error);
763 /* Register device */
764 card->atmdev = atm_dev_register("nicstar", &card->pcidev->dev, &atm_ops,
766 if (card->atmdev == NULL) {
767 printk("nicstar%d: can't register device.\n", i);
769 ns_init_card_error(card, error);
773 if (mac[i] == NULL || !mac_pton(mac[i], card->atmdev->esi)) {
774 nicstar_read_eprom(card->membase, NICSTAR_EPROM_MAC_ADDR_OFFSET,
775 card->atmdev->esi, 6);
776 if (ether_addr_equal(card->atmdev->esi, "\x00\x00\x00\x00\x00\x00")) {
777 nicstar_read_eprom(card->membase,
778 NICSTAR_EPROM_MAC_ADDR_OFFSET_ALT,
779 card->atmdev->esi, 6);
783 printk("nicstar%d: MAC address %pM\n", i, card->atmdev->esi);
785 card->atmdev->dev_data = card;
786 card->atmdev->ci_range.vpi_bits = card->vpibits;
787 card->atmdev->ci_range.vci_bits = card->vcibits;
788 card->atmdev->link_rate = card->max_pcr;
789 card->atmdev->phy = NULL;
791 #ifdef CONFIG_ATM_NICSTAR_USE_SUNI
792 if (card->max_pcr == ATM_OC3_PCR)
793 suni_init(card->atmdev);
794 #endif /* CONFIG_ATM_NICSTAR_USE_SUNI */
796 #ifdef CONFIG_ATM_NICSTAR_USE_IDT77105
797 if (card->max_pcr == ATM_25_PCR)
798 idt77105_init(card->atmdev);
799 #endif /* CONFIG_ATM_NICSTAR_USE_IDT77105 */
801 if (card->atmdev->phy && card->atmdev->phy->start)
802 card->atmdev->phy->start(card->atmdev);
804 writel(NS_CFG_RXPATH | NS_CFG_SMBUFSIZE | NS_CFG_LGBUFSIZE | NS_CFG_EFBIE | NS_CFG_RSQSIZE | NS_CFG_VPIBITS | ns_cfg_rctsize | NS_CFG_RXINT_NODELAY | NS_CFG_RAWIE | /* Only enabled if RCQ_SUPPORT */
805 NS_CFG_RSQAFIE | NS_CFG_TXEN | NS_CFG_TXIE | NS_CFG_TSQFIE_OPT | /* Only enabled if ENABLE_TSQFIE */
806 NS_CFG_PHYIE, card->membase + CFG);
813 static void ns_init_card_error(ns_dev *card, int error)
816 writel(0x00000000, card->membase + CFG);
819 struct sk_buff *iovb;
820 while ((iovb = skb_dequeue(&card->iovpool.queue)) != NULL)
821 dev_kfree_skb_any(iovb);
825 while ((sb = skb_dequeue(&card->sbpool.queue)) != NULL)
826 dev_kfree_skb_any(sb);
827 free_scq(card, card->scq0, NULL);
831 while ((lb = skb_dequeue(&card->lbpool.queue)) != NULL)
832 dev_kfree_skb_any(lb);
836 while ((hb = skb_dequeue(&card->hbpool.queue)) != NULL)
837 dev_kfree_skb_any(hb);
840 kfree(card->rsq.org);
843 kfree(card->tsq.org);
846 free_irq(card->pcidev->irq, card);
849 iounmap(card->membase);
852 pci_disable_device(card->pcidev);
857 static scq_info *get_scq(ns_dev *card, int size, u32 scd)
862 if (size != VBR_SCQSIZE && size != CBR_SCQSIZE)
865 scq = kmalloc(sizeof(*scq), GFP_KERNEL);
868 scq->org = dma_alloc_coherent(&card->pcidev->dev,
869 2 * size, &scq->dma, GFP_KERNEL);
874 scq->skb = kmalloc_array(size / NS_SCQE_SIZE,
878 dma_free_coherent(&card->pcidev->dev,
879 2 * size, scq->org, scq->dma);
883 scq->num_entries = size / NS_SCQE_SIZE;
884 scq->base = PTR_ALIGN(scq->org, size);
885 scq->next = scq->base;
886 scq->last = scq->base + (scq->num_entries - 1);
887 scq->tail = scq->last;
889 scq->num_entries = size / NS_SCQE_SIZE;
891 init_waitqueue_head(&scq->scqfull_waitq);
893 spin_lock_init(&scq->lock);
895 for (i = 0; i < scq->num_entries; i++)
901 /* For variable rate SCQ vcc must be NULL */
902 static void free_scq(ns_dev *card, scq_info *scq, struct atm_vcc *vcc)
906 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES)
907 for (i = 0; i < scq->num_entries; i++) {
908 if (scq->skb[i] != NULL) {
909 vcc = ATM_SKB(scq->skb[i])->vcc;
910 if (vcc->pop != NULL)
911 vcc->pop(vcc, scq->skb[i]);
913 dev_kfree_skb_any(scq->skb[i]);
915 } else { /* vcc must be != NULL */
919 ("nicstar: free_scq() called with vcc == NULL for fixed rate scq.");
920 for (i = 0; i < scq->num_entries; i++)
921 dev_kfree_skb_any(scq->skb[i]);
923 for (i = 0; i < scq->num_entries; i++) {
924 if (scq->skb[i] != NULL) {
925 if (vcc->pop != NULL)
926 vcc->pop(vcc, scq->skb[i]);
928 dev_kfree_skb_any(scq->skb[i]);
933 dma_free_coherent(&card->pcidev->dev,
934 2 * (scq->num_entries == VBR_SCQ_NUM_ENTRIES ?
935 VBR_SCQSIZE : CBR_SCQSIZE),
940 /* The handles passed must be pointers to the sk_buff containing the small
941 or large buffer(s) cast to u32. */
942 static void push_rxbufs(ns_dev * card, struct sk_buff *skb)
944 struct sk_buff *handle1, *handle2;
954 addr1 = dma_map_single(&card->pcidev->dev,
956 (NS_PRV_BUFTYPE(skb) == BUF_SM
957 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
959 NS_PRV_DMA(skb) = addr1; /* save so we can unmap later */
963 printk("nicstar%d: push_rxbufs called with addr1 = 0.\n",
965 #endif /* GENERAL_DEBUG */
967 stat = readl(card->membase + STAT);
968 card->sbfqc = ns_stat_sfbqc_get(stat);
969 card->lbfqc = ns_stat_lfbqc_get(stat);
970 if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
973 addr2 = card->sm_addr;
974 handle2 = card->sm_handle;
975 card->sm_addr = 0x00000000;
976 card->sm_handle = NULL;
977 } else { /* (!sm_addr) */
979 card->sm_addr = addr1;
980 card->sm_handle = handle1;
983 } else { /* buf_type == BUF_LG */
987 addr2 = card->lg_addr;
988 handle2 = card->lg_handle;
989 card->lg_addr = 0x00000000;
990 card->lg_handle = NULL;
991 } else { /* (!lg_addr) */
993 card->lg_addr = addr1;
994 card->lg_handle = handle1;
1000 if (NS_PRV_BUFTYPE(skb) == BUF_SM) {
1001 if (card->sbfqc >= card->sbnr.max) {
1002 skb_unlink(handle1, &card->sbpool.queue);
1003 dev_kfree_skb_any(handle1);
1004 skb_unlink(handle2, &card->sbpool.queue);
1005 dev_kfree_skb_any(handle2);
1009 } else { /* (buf_type == BUF_LG) */
1011 if (card->lbfqc >= card->lbnr.max) {
1012 skb_unlink(handle1, &card->lbpool.queue);
1013 dev_kfree_skb_any(handle1);
1014 skb_unlink(handle2, &card->lbpool.queue);
1015 dev_kfree_skb_any(handle2);
1021 id1 = idr_alloc(&card->idr, handle1, 0, 0, GFP_ATOMIC);
1025 id2 = idr_alloc(&card->idr, handle2, 0, 0, GFP_ATOMIC);
1029 spin_lock_irqsave(&card->res_lock, flags);
1030 while (CMD_BUSY(card)) ;
1031 writel(addr2, card->membase + DR3);
1032 writel(id2, card->membase + DR2);
1033 writel(addr1, card->membase + DR1);
1034 writel(id1, card->membase + DR0);
1035 writel(NS_CMD_WRITE_FREEBUFQ | NS_PRV_BUFTYPE(skb),
1036 card->membase + CMD);
1037 spin_unlock_irqrestore(&card->res_lock, flags);
1039 XPRINTK("nicstar%d: Pushing %s buffers at 0x%x and 0x%x.\n",
1041 (NS_PRV_BUFTYPE(skb) == BUF_SM ? "small" : "large"),
1045 if (!card->efbie && card->sbfqc >= card->sbnr.min &&
1046 card->lbfqc >= card->lbnr.min) {
1048 writel((readl(card->membase + CFG) | NS_CFG_EFBIE),
1049 card->membase + CFG);
1056 static irqreturn_t ns_irq_handler(int irq, void *dev_id)
1060 struct atm_dev *dev;
1061 unsigned long flags;
1063 card = (ns_dev *) dev_id;
1067 PRINTK("nicstar%d: NICStAR generated an interrupt\n", card->index);
1069 spin_lock_irqsave(&card->int_lock, flags);
1071 stat_r = readl(card->membase + STAT);
1073 /* Transmit Status Indicator has been written to T. S. Queue */
1074 if (stat_r & NS_STAT_TSIF) {
1075 TXPRINTK("nicstar%d: TSI interrupt\n", card->index);
1077 writel(NS_STAT_TSIF, card->membase + STAT);
1080 /* Incomplete CS-PDU has been transmitted */
1081 if (stat_r & NS_STAT_TXICP) {
1082 writel(NS_STAT_TXICP, card->membase + STAT);
1083 TXPRINTK("nicstar%d: Incomplete CS-PDU transmitted.\n",
1087 /* Transmit Status Queue 7/8 full */
1088 if (stat_r & NS_STAT_TSQF) {
1089 writel(NS_STAT_TSQF, card->membase + STAT);
1090 PRINTK("nicstar%d: TSQ full.\n", card->index);
1094 /* Timer overflow */
1095 if (stat_r & NS_STAT_TMROF) {
1096 writel(NS_STAT_TMROF, card->membase + STAT);
1097 PRINTK("nicstar%d: Timer overflow.\n", card->index);
1100 /* PHY device interrupt signal active */
1101 if (stat_r & NS_STAT_PHYI) {
1102 writel(NS_STAT_PHYI, card->membase + STAT);
1103 PRINTK("nicstar%d: PHY interrupt.\n", card->index);
1104 if (dev->phy && dev->phy->interrupt) {
1105 dev->phy->interrupt(dev);
1109 /* Small Buffer Queue is full */
1110 if (stat_r & NS_STAT_SFBQF) {
1111 writel(NS_STAT_SFBQF, card->membase + STAT);
1112 printk("nicstar%d: Small free buffer queue is full.\n",
1116 /* Large Buffer Queue is full */
1117 if (stat_r & NS_STAT_LFBQF) {
1118 writel(NS_STAT_LFBQF, card->membase + STAT);
1119 printk("nicstar%d: Large free buffer queue is full.\n",
1123 /* Receive Status Queue is full */
1124 if (stat_r & NS_STAT_RSQF) {
1125 writel(NS_STAT_RSQF, card->membase + STAT);
1126 printk("nicstar%d: RSQ full.\n", card->index);
1130 /* Complete CS-PDU received */
1131 if (stat_r & NS_STAT_EOPDU) {
1132 RXPRINTK("nicstar%d: End of CS-PDU received.\n", card->index);
1134 writel(NS_STAT_EOPDU, card->membase + STAT);
1137 /* Raw cell received */
1138 if (stat_r & NS_STAT_RAWCF) {
1139 writel(NS_STAT_RAWCF, card->membase + STAT);
1141 printk("nicstar%d: Raw cell received and no support yet...\n",
1143 #endif /* RCQ_SUPPORT */
1144 /* NOTE: the following procedure may keep a raw cell pending until the
1145 next interrupt. As this preliminary support is only meant to
1146 avoid buffer leakage, this is not an issue. */
1147 while (readl(card->membase + RAWCT) != card->rawch) {
1149 if (ns_rcqe_islast(card->rawcell)) {
1150 struct sk_buff *oldbuf;
1152 oldbuf = card->rcbuf;
1153 card->rcbuf = idr_find(&card->idr,
1154 ns_rcqe_nextbufhandle(card->rawcell));
1155 card->rawch = NS_PRV_DMA(card->rcbuf);
1156 card->rawcell = (struct ns_rcqe *)
1158 recycle_rx_buf(card, oldbuf);
1160 card->rawch += NS_RCQE_SIZE;
1166 /* Small buffer queue is empty */
1167 if (stat_r & NS_STAT_SFBQE) {
1171 writel(NS_STAT_SFBQE, card->membase + STAT);
1172 printk("nicstar%d: Small free buffer queue empty.\n",
1174 for (i = 0; i < card->sbnr.min; i++) {
1175 sb = dev_alloc_skb(NS_SMSKBSIZE);
1177 writel(readl(card->membase + CFG) &
1178 ~NS_CFG_EFBIE, card->membase + CFG);
1182 NS_PRV_BUFTYPE(sb) = BUF_SM;
1183 skb_queue_tail(&card->sbpool.queue, sb);
1184 skb_reserve(sb, NS_AAL0_HEADER);
1185 push_rxbufs(card, sb);
1191 /* Large buffer queue empty */
1192 if (stat_r & NS_STAT_LFBQE) {
1196 writel(NS_STAT_LFBQE, card->membase + STAT);
1197 printk("nicstar%d: Large free buffer queue empty.\n",
1199 for (i = 0; i < card->lbnr.min; i++) {
1200 lb = dev_alloc_skb(NS_LGSKBSIZE);
1202 writel(readl(card->membase + CFG) &
1203 ~NS_CFG_EFBIE, card->membase + CFG);
1207 NS_PRV_BUFTYPE(lb) = BUF_LG;
1208 skb_queue_tail(&card->lbpool.queue, lb);
1209 skb_reserve(lb, NS_SMBUFSIZE);
1210 push_rxbufs(card, lb);
1216 /* Receive Status Queue is 7/8 full */
1217 if (stat_r & NS_STAT_RSQAF) {
1218 writel(NS_STAT_RSQAF, card->membase + STAT);
1219 RXPRINTK("nicstar%d: RSQ almost full.\n", card->index);
1223 spin_unlock_irqrestore(&card->int_lock, flags);
1224 PRINTK("nicstar%d: end of interrupt service\n", card->index);
1228 static int ns_open(struct atm_vcc *vcc)
1232 unsigned long tmpl, modl;
1233 int tcr, tcra; /* target cell rate, and absolute value */
1234 int n = 0; /* Number of entries in the TST. Initialized to remove
1235 the compiler warning. */
1237 int frscdi = 0; /* Index of the SCD. Initialized to remove the compiler
1238 warning. How I wish compilers were clever enough to
1239 tell which variables can truly be used
1241 int inuse; /* tx or rx vc already in use by another vcc */
1242 short vpi = vcc->vpi;
1245 card = (ns_dev *) vcc->dev->dev_data;
1246 PRINTK("nicstar%d: opening vpi.vci %d.%d \n", card->index, (int)vpi,
1248 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1249 PRINTK("nicstar%d: unsupported AAL.\n", card->index);
1253 vc = &(card->vcmap[vpi << card->vcibits | vci]);
1257 if (vcc->qos.txtp.traffic_class != ATM_NONE && vc->tx)
1259 if (vcc->qos.rxtp.traffic_class != ATM_NONE && vc->rx)
1262 printk("nicstar%d: %s vci already in use.\n", card->index,
1263 inuse == 1 ? "tx" : inuse == 2 ? "rx" : "tx and rx");
1267 set_bit(ATM_VF_ADDR, &vcc->flags);
1269 /* NOTE: You are not allowed to modify an open connection's QOS. To change
1270 that, remove the ATM_VF_PARTIAL flag checking. There may be other changes
1271 needed to do that. */
1272 if (!test_bit(ATM_VF_PARTIAL, &vcc->flags)) {
1275 set_bit(ATM_VF_PARTIAL, &vcc->flags);
1276 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1277 /* Check requested cell rate and availability of SCD */
1278 if (vcc->qos.txtp.max_pcr == 0 && vcc->qos.txtp.pcr == 0
1279 && vcc->qos.txtp.min_pcr == 0) {
1281 ("nicstar%d: trying to open a CBR vc with cell rate = 0 \n",
1283 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1284 clear_bit(ATM_VF_ADDR, &vcc->flags);
1288 tcr = atm_pcr_goal(&(vcc->qos.txtp));
1289 tcra = tcr >= 0 ? tcr : -tcr;
1291 PRINTK("nicstar%d: target cell rate = %d.\n",
1292 card->index, vcc->qos.txtp.max_pcr);
1295 (unsigned long)tcra *(unsigned long)
1297 modl = tmpl % card->max_pcr;
1299 n = (int)(tmpl / card->max_pcr);
1303 } else if (tcr == 0) {
1305 (card->tst_free_entries -
1306 NS_TST_RESERVED)) <= 0) {
1308 ("nicstar%d: no CBR bandwidth free.\n",
1310 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1311 clear_bit(ATM_VF_ADDR, &vcc->flags);
1318 ("nicstar%d: selected bandwidth < granularity.\n",
1320 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1321 clear_bit(ATM_VF_ADDR, &vcc->flags);
1325 if (n > (card->tst_free_entries - NS_TST_RESERVED)) {
1327 ("nicstar%d: not enough free CBR bandwidth.\n",
1329 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1330 clear_bit(ATM_VF_ADDR, &vcc->flags);
1333 card->tst_free_entries -= n;
1335 XPRINTK("nicstar%d: writing %d tst entries.\n",
1337 for (frscdi = 0; frscdi < NS_FRSCD_NUM; frscdi++) {
1338 if (card->scd2vc[frscdi] == NULL) {
1339 card->scd2vc[frscdi] = vc;
1343 if (frscdi == NS_FRSCD_NUM) {
1345 ("nicstar%d: no SCD available for CBR channel.\n",
1347 card->tst_free_entries += n;
1348 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1349 clear_bit(ATM_VF_ADDR, &vcc->flags);
1353 vc->cbr_scd = NS_FRSCD + frscdi * NS_FRSCD_SIZE;
1355 scq = get_scq(card, CBR_SCQSIZE, vc->cbr_scd);
1357 PRINTK("nicstar%d: can't get fixed rate SCQ.\n",
1359 card->scd2vc[frscdi] = NULL;
1360 card->tst_free_entries += n;
1361 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1362 clear_bit(ATM_VF_ADDR, &vcc->flags);
1366 u32d[0] = scq_virt_to_bus(scq, scq->base);
1367 u32d[1] = (u32) 0x00000000;
1368 u32d[2] = (u32) 0xffffffff;
1369 u32d[3] = (u32) 0x00000000;
1370 ns_write_sram(card, vc->cbr_scd, u32d, 4);
1372 fill_tst(card, n, vc);
1373 } else if (vcc->qos.txtp.traffic_class == ATM_UBR) {
1374 vc->cbr_scd = 0x00000000;
1375 vc->scq = card->scq0;
1378 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1383 if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1390 /* Open the connection in hardware */
1391 if (vcc->qos.aal == ATM_AAL5)
1392 status = NS_RCTE_AAL5 | NS_RCTE_CONNECTOPEN;
1393 else /* vcc->qos.aal == ATM_AAL0 */
1394 status = NS_RCTE_AAL0 | NS_RCTE_CONNECTOPEN;
1396 status |= NS_RCTE_RAWCELLINTEN;
1397 #endif /* RCQ_SUPPORT */
1400 (vpi << card->vcibits | vci) *
1401 NS_RCT_ENTRY_SIZE, &status, 1);
1406 set_bit(ATM_VF_READY, &vcc->flags);
1410 static void ns_close(struct atm_vcc *vcc)
1418 card = vcc->dev->dev_data;
1419 PRINTK("nicstar%d: closing vpi.vci %d.%d \n", card->index,
1420 (int)vcc->vpi, vcc->vci);
1422 clear_bit(ATM_VF_READY, &vcc->flags);
1424 if (vcc->qos.rxtp.traffic_class != ATM_NONE) {
1426 unsigned long flags;
1430 (vcc->vpi << card->vcibits | vcc->vci) * NS_RCT_ENTRY_SIZE;
1431 spin_lock_irqsave(&card->res_lock, flags);
1432 while (CMD_BUSY(card)) ;
1433 writel(NS_CMD_CLOSE_CONNECTION | addr << 2,
1434 card->membase + CMD);
1435 spin_unlock_irqrestore(&card->res_lock, flags);
1438 if (vc->rx_iov != NULL) {
1439 struct sk_buff *iovb;
1442 stat = readl(card->membase + STAT);
1443 card->sbfqc = ns_stat_sfbqc_get(stat);
1444 card->lbfqc = ns_stat_lfbqc_get(stat);
1447 ("nicstar%d: closing a VC with pending rx buffers.\n",
1450 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
1451 NS_PRV_IOVCNT(iovb));
1452 NS_PRV_IOVCNT(iovb) = 0;
1453 spin_lock_irqsave(&card->int_lock, flags);
1454 recycle_iov_buf(card, iovb);
1455 spin_unlock_irqrestore(&card->int_lock, flags);
1460 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1464 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1465 unsigned long flags;
1472 spin_lock_irqsave(&scq->lock, flags);
1474 if (scqep == scq->base)
1478 if (scqep == scq->tail) {
1479 spin_unlock_irqrestore(&scq->lock, flags);
1482 /* If the last entry is not a TSR, place one in the SCQ in order to
1483 be able to completely drain it and then close. */
1484 if (!ns_scqe_is_tsr(scqep) && scq->tail != scq->next) {
1490 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1491 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1492 scqi = scq->next - scq->base;
1493 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1494 tsr.word_3 = 0x00000000;
1495 tsr.word_4 = 0x00000000;
1498 scq->skb[index] = NULL;
1499 if (scq->next == scq->last)
1500 scq->next = scq->base;
1503 data = scq_virt_to_bus(scq, scq->next);
1504 ns_write_sram(card, scq->scd, &data, 1);
1506 spin_unlock_irqrestore(&scq->lock, flags);
1510 /* Free all TST entries */
1511 data = NS_TST_OPCODE_VARIABLE;
1512 for (i = 0; i < NS_TST_NUM_ENTRIES; i++) {
1513 if (card->tste2vc[i] == vc) {
1514 ns_write_sram(card, card->tst_addr + i, &data,
1516 card->tste2vc[i] = NULL;
1517 card->tst_free_entries++;
1521 card->scd2vc[(vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE] = NULL;
1522 free_scq(card, vc->scq, vcc);
1525 /* remove all references to vcc before deleting it */
1526 if (vcc->qos.txtp.traffic_class != ATM_NONE) {
1527 unsigned long flags;
1528 scq_info *scq = card->scq0;
1530 spin_lock_irqsave(&scq->lock, flags);
1532 for (i = 0; i < scq->num_entries; i++) {
1533 if (scq->skb[i] && ATM_SKB(scq->skb[i])->vcc == vcc) {
1534 ATM_SKB(scq->skb[i])->vcc = NULL;
1535 atm_return(vcc, scq->skb[i]->truesize);
1537 ("nicstar: deleted pending vcc mapping\n");
1541 spin_unlock_irqrestore(&scq->lock, flags);
1544 vcc->dev_data = NULL;
1545 clear_bit(ATM_VF_PARTIAL, &vcc->flags);
1546 clear_bit(ATM_VF_ADDR, &vcc->flags);
1551 stat = readl(card->membase + STAT);
1552 cfg = readl(card->membase + CFG);
1553 printk("STAT = 0x%08X CFG = 0x%08X \n", stat, cfg);
1555 ("TSQ: base = 0x%p next = 0x%p last = 0x%p TSQT = 0x%08X \n",
1556 card->tsq.base, card->tsq.next,
1557 card->tsq.last, readl(card->membase + TSQT));
1559 ("RSQ: base = 0x%p next = 0x%p last = 0x%p RSQT = 0x%08X \n",
1560 card->rsq.base, card->rsq.next,
1561 card->rsq.last, readl(card->membase + RSQT));
1562 printk("Empty free buffer queue interrupt %s \n",
1563 card->efbie ? "enabled" : "disabled");
1564 printk("SBCNT = %d count = %d LBCNT = %d count = %d \n",
1565 ns_stat_sfbqc_get(stat), card->sbpool.count,
1566 ns_stat_lfbqc_get(stat), card->lbpool.count);
1567 printk("hbpool.count = %d iovpool.count = %d \n",
1568 card->hbpool.count, card->iovpool.count);
1570 #endif /* RX_DEBUG */
1573 static void fill_tst(ns_dev * card, int n, vc_map * vc)
1580 /* It would be very complicated to keep the two TSTs synchronized while
1581 assuring that writes are only made to the inactive TST. So, for now I
1582 will use only one TST. If problems occur, I will change this again */
1584 new_tst = card->tst_addr;
1586 /* Fill procedure */
1588 for (e = 0; e < NS_TST_NUM_ENTRIES; e++) {
1589 if (card->tste2vc[e] == NULL)
1592 if (e == NS_TST_NUM_ENTRIES) {
1593 printk("nicstar%d: No free TST entries found. \n", card->index);
1598 cl = NS_TST_NUM_ENTRIES;
1599 data = ns_tste_make(NS_TST_OPCODE_FIXED, vc->cbr_scd);
1602 if (cl >= NS_TST_NUM_ENTRIES && card->tste2vc[e] == NULL) {
1603 card->tste2vc[e] = vc;
1604 ns_write_sram(card, new_tst + e, &data, 1);
1605 cl -= NS_TST_NUM_ENTRIES;
1609 if (++e == NS_TST_NUM_ENTRIES) {
1615 /* End of fill procedure */
1617 data = ns_tste_make(NS_TST_OPCODE_END, new_tst);
1618 ns_write_sram(card, new_tst + NS_TST_NUM_ENTRIES, &data, 1);
1619 ns_write_sram(card, card->tst_addr + NS_TST_NUM_ENTRIES, &data, 1);
1620 card->tst_addr = new_tst;
1623 static int ns_send(struct atm_vcc *vcc, struct sk_buff *skb)
1628 unsigned long buflen;
1630 u32 flags; /* TBD flags, not CPU flags */
1632 card = vcc->dev->dev_data;
1633 TXPRINTK("nicstar%d: ns_send() called.\n", card->index);
1634 if ((vc = (vc_map *) vcc->dev_data) == NULL) {
1635 printk("nicstar%d: vcc->dev_data == NULL on ns_send().\n",
1637 atomic_inc(&vcc->stats->tx_err);
1638 dev_kfree_skb_any(skb);
1643 printk("nicstar%d: Trying to transmit on a non-tx VC.\n",
1645 atomic_inc(&vcc->stats->tx_err);
1646 dev_kfree_skb_any(skb);
1650 if (vcc->qos.aal != ATM_AAL5 && vcc->qos.aal != ATM_AAL0) {
1651 printk("nicstar%d: Only AAL0 and AAL5 are supported.\n",
1653 atomic_inc(&vcc->stats->tx_err);
1654 dev_kfree_skb_any(skb);
1658 if (skb_shinfo(skb)->nr_frags != 0) {
1659 printk("nicstar%d: No scatter-gather yet.\n", card->index);
1660 atomic_inc(&vcc->stats->tx_err);
1661 dev_kfree_skb_any(skb);
1665 ATM_SKB(skb)->vcc = vcc;
1667 NS_PRV_DMA(skb) = dma_map_single(&card->pcidev->dev, skb->data,
1668 skb->len, DMA_TO_DEVICE);
1670 if (vcc->qos.aal == ATM_AAL5) {
1671 buflen = (skb->len + 47 + 8) / 48 * 48; /* Multiple of 48 */
1672 flags = NS_TBD_AAL5;
1673 scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb));
1674 scqe.word_3 = cpu_to_le32(skb->len);
1676 ns_tbd_mkword_4(0, (u32) vcc->vpi, (u32) vcc->vci, 0,
1678 atm_options & ATM_ATMOPT_CLP ? 1 : 0);
1679 flags |= NS_TBD_EOPDU;
1680 } else { /* (vcc->qos.aal == ATM_AAL0) */
1682 buflen = ATM_CELL_PAYLOAD; /* i.e., 48 bytes */
1683 flags = NS_TBD_AAL0;
1684 scqe.word_2 = cpu_to_le32(NS_PRV_DMA(skb) + NS_AAL0_HEADER);
1685 scqe.word_3 = cpu_to_le32(0x00000000);
1686 if (*skb->data & 0x02) /* Payload type 1 - end of pdu */
1687 flags |= NS_TBD_EOPDU;
1689 cpu_to_le32(*((u32 *) skb->data) & ~NS_TBD_VC_MASK);
1690 /* Force the VPI/VCI to be the same as in VCC struct */
1692 cpu_to_le32((((u32) vcc->
1693 vpi) << NS_TBD_VPI_SHIFT | ((u32) vcc->
1695 NS_TBD_VCI_SHIFT) & NS_TBD_VC_MASK);
1698 if (vcc->qos.txtp.traffic_class == ATM_CBR) {
1699 scqe.word_1 = ns_tbd_mkword_1_novbr(flags, (u32) buflen);
1700 scq = ((vc_map *) vcc->dev_data)->scq;
1703 ns_tbd_mkword_1(flags, (u32) 1, (u32) 1, (u32) buflen);
1707 if (push_scqe(card, vc, scq, &scqe, skb) != 0) {
1708 atomic_inc(&vcc->stats->tx_err);
1709 dev_kfree_skb_any(skb);
1712 atomic_inc(&vcc->stats->tx);
1717 static int push_scqe(ns_dev * card, vc_map * vc, scq_info * scq, ns_scqe * tbd,
1718 struct sk_buff *skb)
1720 unsigned long flags;
1727 spin_lock_irqsave(&scq->lock, flags);
1728 while (scq->tail == scq->next) {
1729 if (in_interrupt()) {
1730 spin_unlock_irqrestore(&scq->lock, flags);
1731 printk("nicstar%d: Error pushing TBD.\n", card->index);
1736 wait_event_interruptible_lock_irq_timeout(scq->scqfull_waitq,
1737 scq->tail != scq->next,
1742 spin_unlock_irqrestore(&scq->lock, flags);
1743 printk("nicstar%d: Timeout pushing TBD.\n",
1749 index = (int)(scq->next - scq->base);
1750 scq->skb[index] = skb;
1751 XPRINTK("nicstar%d: sending skb at 0x%p (pos %d).\n",
1752 card->index, skb, index);
1753 XPRINTK("nicstar%d: TBD written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
1754 card->index, le32_to_cpu(tbd->word_1), le32_to_cpu(tbd->word_2),
1755 le32_to_cpu(tbd->word_3), le32_to_cpu(tbd->word_4),
1757 if (scq->next == scq->last)
1758 scq->next = scq->base;
1763 if (scq->num_entries == VBR_SCQ_NUM_ENTRIES) {
1769 if (vc->tbd_count >= MAX_TBD_PER_VC
1770 || scq->tbd_count >= MAX_TBD_PER_SCQ) {
1773 while (scq->tail == scq->next) {
1774 if (in_interrupt()) {
1775 data = scq_virt_to_bus(scq, scq->next);
1776 ns_write_sram(card, scq->scd, &data, 1);
1777 spin_unlock_irqrestore(&scq->lock, flags);
1778 printk("nicstar%d: Error pushing TSR.\n",
1786 wait_event_interruptible_lock_irq_timeout(scq->scqfull_waitq,
1787 scq->tail != scq->next,
1793 tsr.word_1 = ns_tsr_mkword_1(NS_TSR_INTENABLE);
1795 scdi = NS_TSR_SCDISVBR;
1797 scdi = (vc->cbr_scd - NS_FRSCD) / NS_FRSCD_SIZE;
1798 scqi = scq->next - scq->base;
1799 tsr.word_2 = ns_tsr_mkword_2(scdi, scqi);
1800 tsr.word_3 = 0x00000000;
1801 tsr.word_4 = 0x00000000;
1805 scq->skb[index] = NULL;
1807 ("nicstar%d: TSR written:\n0x%x\n0x%x\n0x%x\n0x%x\n at 0x%p.\n",
1808 card->index, le32_to_cpu(tsr.word_1),
1809 le32_to_cpu(tsr.word_2), le32_to_cpu(tsr.word_3),
1810 le32_to_cpu(tsr.word_4), scq->next);
1811 if (scq->next == scq->last)
1812 scq->next = scq->base;
1818 PRINTK("nicstar%d: Timeout pushing TSR.\n",
1821 data = scq_virt_to_bus(scq, scq->next);
1822 ns_write_sram(card, scq->scd, &data, 1);
1824 spin_unlock_irqrestore(&scq->lock, flags);
1829 static void process_tsq(ns_dev * card)
1833 ns_tsi *previous = NULL, *one_ahead, *two_ahead;
1834 int serviced_entries; /* flag indicating at least on entry was serviced */
1836 serviced_entries = 0;
1838 if (card->tsq.next == card->tsq.last)
1839 one_ahead = card->tsq.base;
1841 one_ahead = card->tsq.next + 1;
1843 if (one_ahead == card->tsq.last)
1844 two_ahead = card->tsq.base;
1846 two_ahead = one_ahead + 1;
1848 while (!ns_tsi_isempty(card->tsq.next) || !ns_tsi_isempty(one_ahead) ||
1849 !ns_tsi_isempty(two_ahead))
1850 /* At most two empty, as stated in the 77201 errata */
1852 serviced_entries = 1;
1854 /* Skip the one or two possible empty entries */
1855 while (ns_tsi_isempty(card->tsq.next)) {
1856 if (card->tsq.next == card->tsq.last)
1857 card->tsq.next = card->tsq.base;
1862 if (!ns_tsi_tmrof(card->tsq.next)) {
1863 scdi = ns_tsi_getscdindex(card->tsq.next);
1864 if (scdi == NS_TSI_SCDISVBR)
1867 if (card->scd2vc[scdi] == NULL) {
1869 ("nicstar%d: could not find VC from SCD index.\n",
1871 ns_tsi_init(card->tsq.next);
1874 scq = card->scd2vc[scdi]->scq;
1876 drain_scq(card, scq, ns_tsi_getscqpos(card->tsq.next));
1878 wake_up_interruptible(&(scq->scqfull_waitq));
1881 ns_tsi_init(card->tsq.next);
1882 previous = card->tsq.next;
1883 if (card->tsq.next == card->tsq.last)
1884 card->tsq.next = card->tsq.base;
1888 if (card->tsq.next == card->tsq.last)
1889 one_ahead = card->tsq.base;
1891 one_ahead = card->tsq.next + 1;
1893 if (one_ahead == card->tsq.last)
1894 two_ahead = card->tsq.base;
1896 two_ahead = one_ahead + 1;
1899 if (serviced_entries)
1900 writel(PTR_DIFF(previous, card->tsq.base),
1901 card->membase + TSQH);
1904 static void drain_scq(ns_dev * card, scq_info * scq, int pos)
1906 struct atm_vcc *vcc;
1907 struct sk_buff *skb;
1909 unsigned long flags;
1911 XPRINTK("nicstar%d: drain_scq() called, scq at 0x%p, pos %d.\n",
1912 card->index, scq, pos);
1913 if (pos >= scq->num_entries) {
1914 printk("nicstar%d: Bad index on drain_scq().\n", card->index);
1918 spin_lock_irqsave(&scq->lock, flags);
1919 i = (int)(scq->tail - scq->base);
1920 if (++i == scq->num_entries)
1924 XPRINTK("nicstar%d: freeing skb at 0x%p (index %d).\n",
1925 card->index, skb, i);
1927 dma_unmap_single(&card->pcidev->dev,
1931 vcc = ATM_SKB(skb)->vcc;
1932 if (vcc && vcc->pop != NULL) {
1935 dev_kfree_skb_irq(skb);
1939 if (++i == scq->num_entries)
1942 scq->tail = scq->base + pos;
1943 spin_unlock_irqrestore(&scq->lock, flags);
1946 static void process_rsq(ns_dev * card)
1950 if (!ns_rsqe_valid(card->rsq.next))
1953 dequeue_rx(card, card->rsq.next);
1954 ns_rsqe_init(card->rsq.next);
1955 previous = card->rsq.next;
1956 if (card->rsq.next == card->rsq.last)
1957 card->rsq.next = card->rsq.base;
1960 } while (ns_rsqe_valid(card->rsq.next));
1961 writel(PTR_DIFF(previous, card->rsq.base), card->membase + RSQH);
1964 static void dequeue_rx(ns_dev * card, ns_rsqe * rsqe)
1968 struct sk_buff *iovb;
1970 struct atm_vcc *vcc;
1971 struct sk_buff *skb;
1972 unsigned short aal5_len;
1977 stat = readl(card->membase + STAT);
1978 card->sbfqc = ns_stat_sfbqc_get(stat);
1979 card->lbfqc = ns_stat_lfbqc_get(stat);
1981 id = le32_to_cpu(rsqe->buffer_handle);
1982 skb = idr_remove(&card->idr, id);
1985 "nicstar%d: skb not found!\n", card->index);
1988 dma_sync_single_for_cpu(&card->pcidev->dev,
1990 (NS_PRV_BUFTYPE(skb) == BUF_SM
1991 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
1993 dma_unmap_single(&card->pcidev->dev,
1995 (NS_PRV_BUFTYPE(skb) == BUF_SM
1996 ? NS_SMSKBSIZE : NS_LGSKBSIZE),
1998 vpi = ns_rsqe_vpi(rsqe);
1999 vci = ns_rsqe_vci(rsqe);
2000 if (vpi >= 1UL << card->vpibits || vci >= 1UL << card->vcibits) {
2001 printk("nicstar%d: SDU received for out-of-range vc %d.%d.\n",
2002 card->index, vpi, vci);
2003 recycle_rx_buf(card, skb);
2007 vc = &(card->vcmap[vpi << card->vcibits | vci]);
2009 RXPRINTK("nicstar%d: SDU received on non-rx vc %d.%d.\n",
2010 card->index, vpi, vci);
2011 recycle_rx_buf(card, skb);
2017 if (vcc->qos.aal == ATM_AAL0) {
2019 unsigned char *cell;
2023 for (i = ns_rsqe_cellcount(rsqe); i; i--) {
2024 sb = dev_alloc_skb(NS_SMSKBSIZE);
2027 ("nicstar%d: Can't allocate buffers for aal0.\n",
2029 atomic_add(i, &vcc->stats->rx_drop);
2032 if (!atm_charge(vcc, sb->truesize)) {
2034 ("nicstar%d: atm_charge() dropped aal0 packets.\n",
2036 atomic_add(i - 1, &vcc->stats->rx_drop); /* already increased by 1 */
2037 dev_kfree_skb_any(sb);
2040 /* Rebuild the header */
2041 *((u32 *) sb->data) = le32_to_cpu(rsqe->word_1) << 4 |
2042 (ns_rsqe_clp(rsqe) ? 0x00000001 : 0x00000000);
2043 if (i == 1 && ns_rsqe_eopdu(rsqe))
2044 *((u32 *) sb->data) |= 0x00000002;
2045 skb_put(sb, NS_AAL0_HEADER);
2046 memcpy(skb_tail_pointer(sb), cell, ATM_CELL_PAYLOAD);
2047 skb_put(sb, ATM_CELL_PAYLOAD);
2048 ATM_SKB(sb)->vcc = vcc;
2049 __net_timestamp(sb);
2051 atomic_inc(&vcc->stats->rx);
2052 cell += ATM_CELL_PAYLOAD;
2055 recycle_rx_buf(card, skb);
2059 /* To reach this point, the AAL layer can only be AAL5 */
2061 if ((iovb = vc->rx_iov) == NULL) {
2062 iovb = skb_dequeue(&(card->iovpool.queue));
2063 if (iovb == NULL) { /* No buffers in the queue */
2064 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC);
2066 printk("nicstar%d: Out of iovec buffers.\n",
2068 atomic_inc(&vcc->stats->rx_drop);
2069 recycle_rx_buf(card, skb);
2072 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2073 } else if (--card->iovpool.count < card->iovnr.min) {
2074 struct sk_buff *new_iovb;
2076 alloc_skb(NS_IOVBUFSIZE, GFP_ATOMIC)) != NULL) {
2077 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2078 skb_queue_tail(&card->iovpool.queue, new_iovb);
2079 card->iovpool.count++;
2083 NS_PRV_IOVCNT(iovb) = 0;
2085 iovb->data = iovb->head;
2086 skb_reset_tail_pointer(iovb);
2087 /* IMPORTANT: a pointer to the sk_buff containing the small or large
2088 buffer is stored as iovec base, NOT a pointer to the
2089 small or large buffer itself. */
2090 } else if (NS_PRV_IOVCNT(iovb) >= NS_MAX_IOVECS) {
2091 printk("nicstar%d: received too big AAL5 SDU.\n", card->index);
2092 atomic_inc(&vcc->stats->rx_err);
2093 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2095 NS_PRV_IOVCNT(iovb) = 0;
2097 iovb->data = iovb->head;
2098 skb_reset_tail_pointer(iovb);
2100 iov = &((struct iovec *)iovb->data)[NS_PRV_IOVCNT(iovb)++];
2101 iov->iov_base = (void *)skb;
2102 iov->iov_len = ns_rsqe_cellcount(rsqe) * 48;
2103 iovb->len += iov->iov_len;
2106 if (NS_PRV_IOVCNT(iovb) == 1) {
2107 if (NS_PRV_BUFTYPE(skb) != BUF_SM) {
2109 ("nicstar%d: Expected a small buffer, and this is not one.\n",
2111 which_list(card, skb);
2112 atomic_inc(&vcc->stats->rx_err);
2113 recycle_rx_buf(card, skb);
2115 recycle_iov_buf(card, iovb);
2118 } else { /* NS_PRV_IOVCNT(iovb) >= 2 */
2120 if (NS_PRV_BUFTYPE(skb) != BUF_LG) {
2122 ("nicstar%d: Expected a large buffer, and this is not one.\n",
2124 which_list(card, skb);
2125 atomic_inc(&vcc->stats->rx_err);
2126 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2127 NS_PRV_IOVCNT(iovb));
2129 recycle_iov_buf(card, iovb);
2133 #endif /* EXTRA_DEBUG */
2135 if (ns_rsqe_eopdu(rsqe)) {
2136 /* This works correctly regardless of the endianness of the host */
2137 unsigned char *L1L2 = (unsigned char *)
2138 (skb->data + iov->iov_len - 6);
2139 aal5_len = L1L2[0] << 8 | L1L2[1];
2140 len = (aal5_len == 0x0000) ? 0x10000 : aal5_len;
2141 if (ns_rsqe_crcerr(rsqe) ||
2142 len + 8 > iovb->len || len + (47 + 8) < iovb->len) {
2143 printk("nicstar%d: AAL5 CRC error", card->index);
2144 if (len + 8 > iovb->len || len + (47 + 8) < iovb->len)
2145 printk(" - PDU size mismatch.\n");
2148 atomic_inc(&vcc->stats->rx_err);
2149 recycle_iovec_rx_bufs(card, (struct iovec *)iovb->data,
2150 NS_PRV_IOVCNT(iovb));
2152 recycle_iov_buf(card, iovb);
2156 /* By this point we (hopefully) have a complete SDU without errors. */
2158 if (NS_PRV_IOVCNT(iovb) == 1) { /* Just a small buffer */
2159 /* skb points to a small buffer */
2160 if (!atm_charge(vcc, skb->truesize)) {
2161 push_rxbufs(card, skb);
2162 atomic_inc(&vcc->stats->rx_drop);
2165 dequeue_sm_buf(card, skb);
2166 ATM_SKB(skb)->vcc = vcc;
2167 __net_timestamp(skb);
2168 vcc->push(vcc, skb);
2169 atomic_inc(&vcc->stats->rx);
2171 } else if (NS_PRV_IOVCNT(iovb) == 2) { /* One small plus one large buffer */
2174 sb = (struct sk_buff *)(iov - 1)->iov_base;
2175 /* skb points to a large buffer */
2177 if (len <= NS_SMBUFSIZE) {
2178 if (!atm_charge(vcc, sb->truesize)) {
2179 push_rxbufs(card, sb);
2180 atomic_inc(&vcc->stats->rx_drop);
2183 dequeue_sm_buf(card, sb);
2184 ATM_SKB(sb)->vcc = vcc;
2185 __net_timestamp(sb);
2187 atomic_inc(&vcc->stats->rx);
2190 push_rxbufs(card, skb);
2192 } else { /* len > NS_SMBUFSIZE, the usual case */
2194 if (!atm_charge(vcc, skb->truesize)) {
2195 push_rxbufs(card, skb);
2196 atomic_inc(&vcc->stats->rx_drop);
2198 dequeue_lg_buf(card, skb);
2199 skb_push(skb, NS_SMBUFSIZE);
2200 skb_copy_from_linear_data(sb, skb->data,
2202 skb_put(skb, len - NS_SMBUFSIZE);
2203 ATM_SKB(skb)->vcc = vcc;
2204 __net_timestamp(skb);
2205 vcc->push(vcc, skb);
2206 atomic_inc(&vcc->stats->rx);
2209 push_rxbufs(card, sb);
2213 } else { /* Must push a huge buffer */
2215 struct sk_buff *hb, *sb, *lb;
2216 int remaining, tocopy;
2219 hb = skb_dequeue(&(card->hbpool.queue));
2220 if (hb == NULL) { /* No buffers in the queue */
2222 hb = dev_alloc_skb(NS_HBUFSIZE);
2225 ("nicstar%d: Out of huge buffers.\n",
2227 atomic_inc(&vcc->stats->rx_drop);
2228 recycle_iovec_rx_bufs(card,
2231 NS_PRV_IOVCNT(iovb));
2233 recycle_iov_buf(card, iovb);
2235 } else if (card->hbpool.count < card->hbnr.min) {
2236 struct sk_buff *new_hb;
2238 dev_alloc_skb(NS_HBUFSIZE)) !=
2240 skb_queue_tail(&card->hbpool.
2242 card->hbpool.count++;
2245 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2246 } else if (--card->hbpool.count < card->hbnr.min) {
2247 struct sk_buff *new_hb;
2249 dev_alloc_skb(NS_HBUFSIZE)) != NULL) {
2250 NS_PRV_BUFTYPE(new_hb) = BUF_NONE;
2251 skb_queue_tail(&card->hbpool.queue,
2253 card->hbpool.count++;
2255 if (card->hbpool.count < card->hbnr.min) {
2257 dev_alloc_skb(NS_HBUFSIZE)) !=
2259 NS_PRV_BUFTYPE(new_hb) =
2261 skb_queue_tail(&card->hbpool.
2263 card->hbpool.count++;
2268 iov = (struct iovec *)iovb->data;
2270 if (!atm_charge(vcc, hb->truesize)) {
2271 recycle_iovec_rx_bufs(card, iov,
2272 NS_PRV_IOVCNT(iovb));
2273 if (card->hbpool.count < card->hbnr.max) {
2274 skb_queue_tail(&card->hbpool.queue, hb);
2275 card->hbpool.count++;
2277 dev_kfree_skb_any(hb);
2278 atomic_inc(&vcc->stats->rx_drop);
2280 /* Copy the small buffer to the huge buffer */
2281 sb = (struct sk_buff *)iov->iov_base;
2282 skb_copy_from_linear_data(sb, hb->data,
2284 skb_put(hb, iov->iov_len);
2285 remaining = len - iov->iov_len;
2287 /* Free the small buffer */
2288 push_rxbufs(card, sb);
2290 /* Copy all large buffers to the huge buffer and free them */
2291 for (j = 1; j < NS_PRV_IOVCNT(iovb); j++) {
2292 lb = (struct sk_buff *)iov->iov_base;
2294 min_t(int, remaining, iov->iov_len);
2295 skb_copy_from_linear_data(lb,
2298 skb_put(hb, tocopy);
2300 remaining -= tocopy;
2301 push_rxbufs(card, lb);
2304 if (remaining != 0 || hb->len != len)
2306 ("nicstar%d: Huge buffer len mismatch.\n",
2308 #endif /* EXTRA_DEBUG */
2309 ATM_SKB(hb)->vcc = vcc;
2310 __net_timestamp(hb);
2312 atomic_inc(&vcc->stats->rx);
2317 recycle_iov_buf(card, iovb);
2322 static void recycle_rx_buf(ns_dev * card, struct sk_buff *skb)
2324 if (unlikely(NS_PRV_BUFTYPE(skb) == BUF_NONE)) {
2325 printk("nicstar%d: What kind of rx buffer is this?\n",
2327 dev_kfree_skb_any(skb);
2329 push_rxbufs(card, skb);
2332 static void recycle_iovec_rx_bufs(ns_dev * card, struct iovec *iov, int count)
2335 recycle_rx_buf(card, (struct sk_buff *)(iov++)->iov_base);
2338 static void recycle_iov_buf(ns_dev * card, struct sk_buff *iovb)
2340 if (card->iovpool.count < card->iovnr.max) {
2341 skb_queue_tail(&card->iovpool.queue, iovb);
2342 card->iovpool.count++;
2344 dev_kfree_skb_any(iovb);
2347 static void dequeue_sm_buf(ns_dev * card, struct sk_buff *sb)
2349 skb_unlink(sb, &card->sbpool.queue);
2350 if (card->sbfqc < card->sbnr.init) {
2351 struct sk_buff *new_sb;
2352 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
2353 NS_PRV_BUFTYPE(new_sb) = BUF_SM;
2354 skb_queue_tail(&card->sbpool.queue, new_sb);
2355 skb_reserve(new_sb, NS_AAL0_HEADER);
2356 push_rxbufs(card, new_sb);
2359 if (card->sbfqc < card->sbnr.init)
2361 struct sk_buff *new_sb;
2362 if ((new_sb = dev_alloc_skb(NS_SMSKBSIZE)) != NULL) {
2363 NS_PRV_BUFTYPE(new_sb) = BUF_SM;
2364 skb_queue_tail(&card->sbpool.queue, new_sb);
2365 skb_reserve(new_sb, NS_AAL0_HEADER);
2366 push_rxbufs(card, new_sb);
2371 static void dequeue_lg_buf(ns_dev * card, struct sk_buff *lb)
2373 skb_unlink(lb, &card->lbpool.queue);
2374 if (card->lbfqc < card->lbnr.init) {
2375 struct sk_buff *new_lb;
2376 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
2377 NS_PRV_BUFTYPE(new_lb) = BUF_LG;
2378 skb_queue_tail(&card->lbpool.queue, new_lb);
2379 skb_reserve(new_lb, NS_SMBUFSIZE);
2380 push_rxbufs(card, new_lb);
2383 if (card->lbfqc < card->lbnr.init)
2385 struct sk_buff *new_lb;
2386 if ((new_lb = dev_alloc_skb(NS_LGSKBSIZE)) != NULL) {
2387 NS_PRV_BUFTYPE(new_lb) = BUF_LG;
2388 skb_queue_tail(&card->lbpool.queue, new_lb);
2389 skb_reserve(new_lb, NS_SMBUFSIZE);
2390 push_rxbufs(card, new_lb);
2395 static int ns_proc_read(struct atm_dev *dev, loff_t * pos, char *page)
2402 card = (ns_dev *) dev->dev_data;
2403 stat = readl(card->membase + STAT);
2405 return sprintf(page, "Pool count min init max \n");
2407 return sprintf(page, "Small %5d %5d %5d %5d \n",
2408 ns_stat_sfbqc_get(stat), card->sbnr.min,
2409 card->sbnr.init, card->sbnr.max);
2411 return sprintf(page, "Large %5d %5d %5d %5d \n",
2412 ns_stat_lfbqc_get(stat), card->lbnr.min,
2413 card->lbnr.init, card->lbnr.max);
2415 return sprintf(page, "Huge %5d %5d %5d %5d \n",
2416 card->hbpool.count, card->hbnr.min,
2417 card->hbnr.init, card->hbnr.max);
2419 return sprintf(page, "Iovec %5d %5d %5d %5d \n",
2420 card->iovpool.count, card->iovnr.min,
2421 card->iovnr.init, card->iovnr.max);
2425 sprintf(page, "Interrupt counter: %u \n", card->intcnt);
2430 /* Dump 25.6 Mbps PHY registers */
2431 /* Now there's a 25.6 Mbps PHY driver this code isn't needed. I left it
2432 here just in case it's needed for debugging. */
2433 if (card->max_pcr == ATM_25_PCR && !left--) {
2437 for (i = 0; i < 4; i++) {
2438 while (CMD_BUSY(card)) ;
2439 writel(NS_CMD_READ_UTILITY | 0x00000200 | i,
2440 card->membase + CMD);
2441 while (CMD_BUSY(card)) ;
2442 phy_regs[i] = readl(card->membase + DR0) & 0x000000FF;
2445 return sprintf(page, "PHY regs: 0x%02X 0x%02X 0x%02X 0x%02X \n",
2446 phy_regs[0], phy_regs[1], phy_regs[2],
2449 #endif /* 0 - Dump 25.6 Mbps PHY registers */
2452 if (left-- < NS_TST_NUM_ENTRIES) {
2453 if (card->tste2vc[left + 1] == NULL)
2454 return sprintf(page, "%5d - VBR/UBR \n", left + 1);
2456 return sprintf(page, "%5d - %d %d \n", left + 1,
2457 card->tste2vc[left + 1]->tx_vcc->vpi,
2458 card->tste2vc[left + 1]->tx_vcc->vci);
2464 static int ns_ioctl(struct atm_dev *dev, unsigned int cmd, void __user * arg)
2469 unsigned long flags;
2471 card = dev->dev_data;
2475 (pl.buftype, &((pool_levels __user *) arg)->buftype))
2477 switch (pl.buftype) {
2478 case NS_BUFTYPE_SMALL:
2480 ns_stat_sfbqc_get(readl(card->membase + STAT));
2481 pl.level.min = card->sbnr.min;
2482 pl.level.init = card->sbnr.init;
2483 pl.level.max = card->sbnr.max;
2486 case NS_BUFTYPE_LARGE:
2488 ns_stat_lfbqc_get(readl(card->membase + STAT));
2489 pl.level.min = card->lbnr.min;
2490 pl.level.init = card->lbnr.init;
2491 pl.level.max = card->lbnr.max;
2494 case NS_BUFTYPE_HUGE:
2495 pl.count = card->hbpool.count;
2496 pl.level.min = card->hbnr.min;
2497 pl.level.init = card->hbnr.init;
2498 pl.level.max = card->hbnr.max;
2501 case NS_BUFTYPE_IOVEC:
2502 pl.count = card->iovpool.count;
2503 pl.level.min = card->iovnr.min;
2504 pl.level.init = card->iovnr.init;
2505 pl.level.max = card->iovnr.max;
2509 return -ENOIOCTLCMD;
2512 if (!copy_to_user((pool_levels __user *) arg, &pl, sizeof(pl)))
2513 return (sizeof(pl));
2518 if (!capable(CAP_NET_ADMIN))
2520 if (copy_from_user(&pl, (pool_levels __user *) arg, sizeof(pl)))
2522 if (pl.level.min >= pl.level.init
2523 || pl.level.init >= pl.level.max)
2525 if (pl.level.min == 0)
2527 switch (pl.buftype) {
2528 case NS_BUFTYPE_SMALL:
2529 if (pl.level.max > TOP_SB)
2531 card->sbnr.min = pl.level.min;
2532 card->sbnr.init = pl.level.init;
2533 card->sbnr.max = pl.level.max;
2536 case NS_BUFTYPE_LARGE:
2537 if (pl.level.max > TOP_LB)
2539 card->lbnr.min = pl.level.min;
2540 card->lbnr.init = pl.level.init;
2541 card->lbnr.max = pl.level.max;
2544 case NS_BUFTYPE_HUGE:
2545 if (pl.level.max > TOP_HB)
2547 card->hbnr.min = pl.level.min;
2548 card->hbnr.init = pl.level.init;
2549 card->hbnr.max = pl.level.max;
2552 case NS_BUFTYPE_IOVEC:
2553 if (pl.level.max > TOP_IOVB)
2555 card->iovnr.min = pl.level.min;
2556 card->iovnr.init = pl.level.init;
2557 card->iovnr.max = pl.level.max;
2567 if (!capable(CAP_NET_ADMIN))
2569 btype = (long)arg; /* a long is the same size as a pointer or bigger */
2571 case NS_BUFTYPE_SMALL:
2572 while (card->sbfqc < card->sbnr.init) {
2575 sb = __dev_alloc_skb(NS_SMSKBSIZE, GFP_KERNEL);
2578 NS_PRV_BUFTYPE(sb) = BUF_SM;
2579 skb_queue_tail(&card->sbpool.queue, sb);
2580 skb_reserve(sb, NS_AAL0_HEADER);
2581 push_rxbufs(card, sb);
2585 case NS_BUFTYPE_LARGE:
2586 while (card->lbfqc < card->lbnr.init) {
2589 lb = __dev_alloc_skb(NS_LGSKBSIZE, GFP_KERNEL);
2592 NS_PRV_BUFTYPE(lb) = BUF_LG;
2593 skb_queue_tail(&card->lbpool.queue, lb);
2594 skb_reserve(lb, NS_SMBUFSIZE);
2595 push_rxbufs(card, lb);
2599 case NS_BUFTYPE_HUGE:
2600 while (card->hbpool.count > card->hbnr.init) {
2603 spin_lock_irqsave(&card->int_lock, flags);
2604 hb = skb_dequeue(&card->hbpool.queue);
2605 card->hbpool.count--;
2606 spin_unlock_irqrestore(&card->int_lock, flags);
2609 ("nicstar%d: huge buffer count inconsistent.\n",
2612 dev_kfree_skb_any(hb);
2615 while (card->hbpool.count < card->hbnr.init) {
2618 hb = __dev_alloc_skb(NS_HBUFSIZE, GFP_KERNEL);
2621 NS_PRV_BUFTYPE(hb) = BUF_NONE;
2622 spin_lock_irqsave(&card->int_lock, flags);
2623 skb_queue_tail(&card->hbpool.queue, hb);
2624 card->hbpool.count++;
2625 spin_unlock_irqrestore(&card->int_lock, flags);
2629 case NS_BUFTYPE_IOVEC:
2630 while (card->iovpool.count > card->iovnr.init) {
2631 struct sk_buff *iovb;
2633 spin_lock_irqsave(&card->int_lock, flags);
2634 iovb = skb_dequeue(&card->iovpool.queue);
2635 card->iovpool.count--;
2636 spin_unlock_irqrestore(&card->int_lock, flags);
2639 ("nicstar%d: iovec buffer count inconsistent.\n",
2642 dev_kfree_skb_any(iovb);
2645 while (card->iovpool.count < card->iovnr.init) {
2646 struct sk_buff *iovb;
2648 iovb = alloc_skb(NS_IOVBUFSIZE, GFP_KERNEL);
2651 NS_PRV_BUFTYPE(iovb) = BUF_NONE;
2652 spin_lock_irqsave(&card->int_lock, flags);
2653 skb_queue_tail(&card->iovpool.queue, iovb);
2654 card->iovpool.count++;
2655 spin_unlock_irqrestore(&card->int_lock, flags);
2666 if (dev->phy && dev->phy->ioctl) {
2667 return dev->phy->ioctl(dev, cmd, arg);
2669 printk("nicstar%d: %s == NULL \n", card->index,
2670 dev->phy ? "dev->phy->ioctl" : "dev->phy");
2671 return -ENOIOCTLCMD;
2677 static void which_list(ns_dev * card, struct sk_buff *skb)
2679 printk("skb buf_type: 0x%08x\n", NS_PRV_BUFTYPE(skb));
2681 #endif /* EXTRA_DEBUG */
2683 static void ns_poll(struct timer_list *unused)
2687 unsigned long flags;
2690 PRINTK("nicstar: Entering ns_poll().\n");
2691 for (i = 0; i < num_cards; i++) {
2693 if (!spin_trylock_irqsave(&card->int_lock, flags)) {
2694 /* Probably it isn't worth spinning */
2699 stat_r = readl(card->membase + STAT);
2700 if (stat_r & NS_STAT_TSIF)
2701 stat_w |= NS_STAT_TSIF;
2702 if (stat_r & NS_STAT_EOPDU)
2703 stat_w |= NS_STAT_EOPDU;
2708 writel(stat_w, card->membase + STAT);
2709 spin_unlock_irqrestore(&card->int_lock, flags);
2711 mod_timer(&ns_timer, jiffies + NS_POLL_PERIOD);
2712 PRINTK("nicstar: Leaving ns_poll().\n");
2715 static void ns_phy_put(struct atm_dev *dev, unsigned char value,
2719 unsigned long flags;
2721 card = dev->dev_data;
2722 spin_lock_irqsave(&card->res_lock, flags);
2723 while (CMD_BUSY(card)) ;
2724 writel((u32) value, card->membase + DR0);
2725 writel(NS_CMD_WRITE_UTILITY | 0x00000200 | (addr & 0x000000FF),
2726 card->membase + CMD);
2727 spin_unlock_irqrestore(&card->res_lock, flags);
2730 static unsigned char ns_phy_get(struct atm_dev *dev, unsigned long addr)
2733 unsigned long flags;
2736 card = dev->dev_data;
2737 spin_lock_irqsave(&card->res_lock, flags);
2738 while (CMD_BUSY(card)) ;
2739 writel(NS_CMD_READ_UTILITY | 0x00000200 | (addr & 0x000000FF),
2740 card->membase + CMD);
2741 while (CMD_BUSY(card)) ;
2742 data = readl(card->membase + DR0) & 0x000000FF;
2743 spin_unlock_irqrestore(&card->res_lock, flags);
2744 return (unsigned char)data;
2747 module_init(nicstar_init);
2748 module_exit(nicstar_cleanup);