2 * Procfs interface for the PCI bus.
7 #include <linux/init.h>
9 #include <linux/slab.h>
10 #include <linux/module.h>
11 #include <linux/proc_fs.h>
12 #include <linux/seq_file.h>
13 #include <linux/smp_lock.h>
14 #include <linux/capability.h>
15 #include <asm/uaccess.h>
16 #include <asm/byteorder.h>
19 static int proc_initialized; /* = 0 */
22 proc_bus_pci_lseek(struct file *file, loff_t off, int whence)
25 struct inode *inode = file->f_path.dentry->d_inode;
27 mutex_lock(&inode->i_mutex);
33 new = file->f_pos + off;
36 new = inode->i_size + off;
39 if (new < 0 || new > inode->i_size)
43 mutex_unlock(&inode->i_mutex);
48 proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *ppos)
50 const struct inode *ino = file->f_path.dentry->d_inode;
51 const struct proc_dir_entry *dp = PDE(ino);
52 struct pci_dev *dev = dp->data;
53 unsigned int pos = *ppos;
54 unsigned int cnt, size;
57 * Normal users can read only the standardized portion of the
58 * configuration space as several chips lock up when trying to read
59 * undefined locations (think of Intel PIIX4 as a typical example).
62 if (capable(CAP_SYS_ADMIN))
64 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
73 if (pos + nbytes > size)
77 if (!access_ok(VERIFY_WRITE, buf, cnt))
80 if ((pos & 1) && cnt) {
82 pci_user_read_config_byte(dev, pos, &val);
89 if ((pos & 3) && cnt > 2) {
91 pci_user_read_config_word(dev, pos, &val);
92 __put_user(cpu_to_le16(val), (__le16 __user *) buf);
100 pci_user_read_config_dword(dev, pos, &val);
101 __put_user(cpu_to_le32(val), (__le32 __user *) buf);
109 pci_user_read_config_word(dev, pos, &val);
110 __put_user(cpu_to_le16(val), (__le16 __user *) buf);
118 pci_user_read_config_byte(dev, pos, &val);
119 __put_user(val, buf);
130 proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, loff_t *ppos)
132 struct inode *ino = file->f_path.dentry->d_inode;
133 const struct proc_dir_entry *dp = PDE(ino);
134 struct pci_dev *dev = dp->data;
143 if (pos + nbytes > size)
147 if (!access_ok(VERIFY_READ, buf, cnt))
150 if ((pos & 1) && cnt) {
152 __get_user(val, buf);
153 pci_user_write_config_byte(dev, pos, val);
159 if ((pos & 3) && cnt > 2) {
161 __get_user(val, (__le16 __user *) buf);
162 pci_user_write_config_word(dev, pos, le16_to_cpu(val));
170 __get_user(val, (__le32 __user *) buf);
171 pci_user_write_config_dword(dev, pos, le32_to_cpu(val));
179 __get_user(val, (__le16 __user *) buf);
180 pci_user_write_config_word(dev, pos, le16_to_cpu(val));
188 __get_user(val, buf);
189 pci_user_write_config_byte(dev, pos, val);
196 i_size_write(ino, dp->size);
200 struct pci_filp_private {
201 enum pci_mmap_state mmap_state;
205 static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
208 const struct proc_dir_entry *dp = PDE(file->f_dentry->d_inode);
209 struct pci_dev *dev = dp->data;
211 struct pci_filp_private *fpriv = file->private_data;
212 #endif /* HAVE_PCI_MMAP */
218 case PCIIOC_CONTROLLER:
219 ret = pci_domain_nr(dev->bus);
223 case PCIIOC_MMAP_IS_IO:
224 fpriv->mmap_state = pci_mmap_io;
227 case PCIIOC_MMAP_IS_MEM:
228 fpriv->mmap_state = pci_mmap_mem;
231 case PCIIOC_WRITE_COMBINE:
233 fpriv->write_combine = 1;
235 fpriv->write_combine = 0;
238 #endif /* HAVE_PCI_MMAP */
250 static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
252 struct inode *inode = file->f_path.dentry->d_inode;
253 const struct proc_dir_entry *dp = PDE(inode);
254 struct pci_dev *dev = dp->data;
255 struct pci_filp_private *fpriv = file->private_data;
258 if (!capable(CAP_SYS_RAWIO))
261 /* Make sure the caller is mapping a real resource for this device */
262 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
263 if (pci_mmap_fits(dev, i, vma))
267 if (i >= PCI_ROM_RESOURCE)
270 ret = pci_mmap_page_range(dev, vma,
272 fpriv->write_combine);
279 static int proc_bus_pci_open(struct inode *inode, struct file *file)
281 struct pci_filp_private *fpriv = kmalloc(sizeof(*fpriv), GFP_KERNEL);
286 fpriv->mmap_state = pci_mmap_io;
287 fpriv->write_combine = 0;
289 file->private_data = fpriv;
294 static int proc_bus_pci_release(struct inode *inode, struct file *file)
296 kfree(file->private_data);
297 file->private_data = NULL;
301 #endif /* HAVE_PCI_MMAP */
303 static const struct file_operations proc_bus_pci_operations = {
304 .owner = THIS_MODULE,
305 .llseek = proc_bus_pci_lseek,
306 .read = proc_bus_pci_read,
307 .write = proc_bus_pci_write,
308 .unlocked_ioctl = proc_bus_pci_ioctl,
310 .open = proc_bus_pci_open,
311 .release = proc_bus_pci_release,
312 .mmap = proc_bus_pci_mmap,
313 #ifdef HAVE_ARCH_PCI_GET_UNMAPPED_AREA
314 .get_unmapped_area = get_pci_unmapped_area,
315 #endif /* HAVE_ARCH_PCI_GET_UNMAPPED_AREA */
316 #endif /* HAVE_PCI_MMAP */
320 static void *pci_seq_start(struct seq_file *m, loff_t *pos)
322 struct pci_dev *dev = NULL;
325 for_each_pci_dev(dev) {
332 static void *pci_seq_next(struct seq_file *m, void *v, loff_t *pos)
334 struct pci_dev *dev = v;
337 dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
341 static void pci_seq_stop(struct seq_file *m, void *v)
344 struct pci_dev *dev = v;
349 static int show_device(struct seq_file *m, void *v)
351 const struct pci_dev *dev = v;
352 const struct pci_driver *drv;
358 drv = pci_dev_driver(dev);
359 seq_printf(m, "%02x%02x\t%04x%04x\t%x",
366 /* only print standard and ROM resources to preserve compatibility */
367 for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
368 resource_size_t start, end;
369 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
370 seq_printf(m, "\t%16llx",
371 (unsigned long long)(start |
372 (dev->resource[i].flags & PCI_REGION_FLAG_MASK)));
374 for (i = 0; i <= PCI_ROM_RESOURCE; i++) {
375 resource_size_t start, end;
376 pci_resource_to_user(dev, i, &dev->resource[i], &start, &end);
377 seq_printf(m, "\t%16llx",
378 dev->resource[i].start < dev->resource[i].end ?
379 (unsigned long long)(end - start) + 1 : 0);
383 seq_printf(m, "%s", drv->name);
388 static const struct seq_operations proc_bus_pci_devices_op = {
389 .start = pci_seq_start,
390 .next = pci_seq_next,
391 .stop = pci_seq_stop,
395 static struct proc_dir_entry *proc_bus_pci_dir;
397 int pci_proc_attach_device(struct pci_dev *dev)
399 struct pci_bus *bus = dev->bus;
400 struct proc_dir_entry *e;
403 if (!proc_initialized)
407 if (pci_proc_domain(bus)) {
408 sprintf(name, "%04x:%02x", pci_domain_nr(bus),
411 sprintf(name, "%02x", bus->number);
413 bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
418 sprintf(name, "%02x.%x", PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn));
419 e = proc_create_data(name, S_IFREG | S_IRUGO | S_IWUSR, bus->procdir,
420 &proc_bus_pci_operations, dev);
423 e->size = dev->cfg_size;
429 int pci_proc_detach_device(struct pci_dev *dev)
431 struct proc_dir_entry *e;
433 if ((e = dev->procent)) {
434 if (atomic_read(&e->count) > 1)
436 remove_proc_entry(e->name, dev->bus->procdir);
443 int pci_proc_attach_bus(struct pci_bus* bus)
445 struct proc_dir_entry *de = bus->procdir;
447 if (!proc_initialized)
452 sprintf(name, "%02x", bus->number);
453 de = bus->procdir = proc_mkdir(name, proc_bus_pci_dir);
461 int pci_proc_detach_bus(struct pci_bus* bus)
463 struct proc_dir_entry *de = bus->procdir;
465 remove_proc_entry(de->name, proc_bus_pci_dir);
469 static int proc_bus_pci_dev_open(struct inode *inode, struct file *file)
471 return seq_open(file, &proc_bus_pci_devices_op);
473 static const struct file_operations proc_bus_pci_dev_operations = {
474 .owner = THIS_MODULE,
475 .open = proc_bus_pci_dev_open,
478 .release = seq_release,
481 static int __init pci_proc_init(void)
483 struct pci_dev *dev = NULL;
484 proc_bus_pci_dir = proc_mkdir("bus/pci", NULL);
485 proc_create("devices", 0, proc_bus_pci_dir,
486 &proc_bus_pci_dev_operations);
487 proc_initialized = 1;
488 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
489 pci_proc_attach_device(dev);
494 device_initcall(pci_proc_init);