1 /* Analog Devices 1889 audio driver
3 * This is a driver for the AD1889 PCI audio chipset found
4 * on the HP PA-RISC [BCJ]-xxx0 workstations.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License, version 2, as
12 * published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 * Do we need to take care of CCS register?
25 * Maybe we could use finer grained locking (separate locks for pb/cap)?
27 * Control Interface (mixer) support
28 * Better AC97 support (VSR...)?
32 * SG DMA support (this will need *a lot* of work)
35 #include <linux/init.h>
36 #include <linux/pci.h>
37 #include <linux/dma-mapping.h>
38 #include <linux/slab.h>
39 #include <linux/interrupt.h>
40 #include <linux/compiler.h>
41 #include <linux/delay.h>
42 #include <linux/module.h>
45 #include <sound/core.h>
46 #include <sound/pcm.h>
47 #include <sound/initval.h>
48 #include <sound/ac97_codec.h>
51 #include "ac97/ac97_id.h"
53 #define AD1889_DRVVER "Version: 1.7"
56 MODULE_DESCRIPTION("Analog Devices AD1889 ALSA sound driver");
57 MODULE_LICENSE("GPL");
58 MODULE_SUPPORTED_DEVICE("{{Analog Devices,AD1889}}");
60 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
61 module_param_array(index, int, NULL, 0444);
62 MODULE_PARM_DESC(index, "Index value for the AD1889 soundcard.");
64 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
65 module_param_array(id, charp, NULL, 0444);
66 MODULE_PARM_DESC(id, "ID string for the AD1889 soundcard.");
68 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
69 module_param_array(enable, bool, NULL, 0444);
70 MODULE_PARM_DESC(enable, "Enable AD1889 soundcard.");
72 static char *ac97_quirk[SNDRV_CARDS];
73 module_param_array(ac97_quirk, charp, NULL, 0444);
74 MODULE_PARM_DESC(ac97_quirk, "AC'97 workaround for strange hardware.");
76 #define DEVNAME "ad1889"
77 #define PFX DEVNAME ": "
79 /* keep track of some hw registers */
80 struct ad1889_register_state {
81 u16 reg; /* reg setup */
82 u32 addr; /* dma base address */
83 unsigned long size; /* DMA buffer size */
87 struct snd_card *card;
94 struct snd_ac97 *ac97;
95 struct snd_ac97_bus *ac97_bus;
97 struct snd_info_entry *proc;
99 struct snd_pcm_substream *psubs;
100 struct snd_pcm_substream *csubs;
102 /* playback register state */
103 struct ad1889_register_state wave;
104 struct ad1889_register_state ramc;
110 ad1889_readw(struct snd_ad1889 *chip, unsigned reg)
112 return readw(chip->iobase + reg);
116 ad1889_writew(struct snd_ad1889 *chip, unsigned reg, u16 val)
118 writew(val, chip->iobase + reg);
122 ad1889_readl(struct snd_ad1889 *chip, unsigned reg)
124 return readl(chip->iobase + reg);
128 ad1889_writel(struct snd_ad1889 *chip, unsigned reg, u32 val)
130 writel(val, chip->iobase + reg);
134 ad1889_unmute(struct snd_ad1889 *chip)
137 st = ad1889_readw(chip, AD_DS_WADA) &
138 ~(AD_DS_WADA_RWAM | AD_DS_WADA_LWAM);
139 ad1889_writew(chip, AD_DS_WADA, st);
140 ad1889_readw(chip, AD_DS_WADA);
144 ad1889_mute(struct snd_ad1889 *chip)
147 st = ad1889_readw(chip, AD_DS_WADA) | AD_DS_WADA_RWAM | AD_DS_WADA_LWAM;
148 ad1889_writew(chip, AD_DS_WADA, st);
149 ad1889_readw(chip, AD_DS_WADA);
153 ad1889_load_adc_buffer_address(struct snd_ad1889 *chip, u32 address)
155 ad1889_writel(chip, AD_DMA_ADCBA, address);
156 ad1889_writel(chip, AD_DMA_ADCCA, address);
160 ad1889_load_adc_buffer_count(struct snd_ad1889 *chip, u32 count)
162 ad1889_writel(chip, AD_DMA_ADCBC, count);
163 ad1889_writel(chip, AD_DMA_ADCCC, count);
167 ad1889_load_adc_interrupt_count(struct snd_ad1889 *chip, u32 count)
169 ad1889_writel(chip, AD_DMA_ADCIB, count);
170 ad1889_writel(chip, AD_DMA_ADCIC, count);
174 ad1889_load_wave_buffer_address(struct snd_ad1889 *chip, u32 address)
176 ad1889_writel(chip, AD_DMA_WAVBA, address);
177 ad1889_writel(chip, AD_DMA_WAVCA, address);
181 ad1889_load_wave_buffer_count(struct snd_ad1889 *chip, u32 count)
183 ad1889_writel(chip, AD_DMA_WAVBC, count);
184 ad1889_writel(chip, AD_DMA_WAVCC, count);
188 ad1889_load_wave_interrupt_count(struct snd_ad1889 *chip, u32 count)
190 ad1889_writel(chip, AD_DMA_WAVIB, count);
191 ad1889_writel(chip, AD_DMA_WAVIC, count);
195 ad1889_channel_reset(struct snd_ad1889 *chip, unsigned int channel)
199 if (channel & AD_CHAN_WAV) {
200 /* Disable wave channel */
201 reg = ad1889_readw(chip, AD_DS_WSMC) & ~AD_DS_WSMC_WAEN;
202 ad1889_writew(chip, AD_DS_WSMC, reg);
203 chip->wave.reg = reg;
206 reg = ad1889_readw(chip, AD_DMA_WAV);
207 reg &= AD_DMA_IM_DIS;
209 ad1889_writew(chip, AD_DMA_WAV, reg);
211 /* clear IRQ and address counters and pointers */
212 ad1889_load_wave_buffer_address(chip, 0x0);
213 ad1889_load_wave_buffer_count(chip, 0x0);
214 ad1889_load_wave_interrupt_count(chip, 0x0);
217 ad1889_readw(chip, AD_DMA_WAV);
220 if (channel & AD_CHAN_ADC) {
221 /* Disable ADC channel */
222 reg = ad1889_readw(chip, AD_DS_RAMC) & ~AD_DS_RAMC_ADEN;
223 ad1889_writew(chip, AD_DS_RAMC, reg);
224 chip->ramc.reg = reg;
226 reg = ad1889_readw(chip, AD_DMA_ADC);
227 reg &= AD_DMA_IM_DIS;
229 ad1889_writew(chip, AD_DMA_ADC, reg);
231 ad1889_load_adc_buffer_address(chip, 0x0);
232 ad1889_load_adc_buffer_count(chip, 0x0);
233 ad1889_load_adc_interrupt_count(chip, 0x0);
236 ad1889_readw(chip, AD_DMA_ADC);
241 snd_ad1889_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
243 struct snd_ad1889 *chip = ac97->private_data;
244 return ad1889_readw(chip, AD_AC97_BASE + reg);
248 snd_ad1889_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
250 struct snd_ad1889 *chip = ac97->private_data;
251 ad1889_writew(chip, AD_AC97_BASE + reg, val);
255 snd_ad1889_ac97_ready(struct snd_ad1889 *chip)
257 int retry = 400; /* average needs 352 msec */
259 while (!(ad1889_readw(chip, AD_AC97_ACIC) & AD_AC97_ACIC_ACRDY)
263 dev_err(chip->card->dev, "[%s] Link is not ready.\n",
267 dev_dbg(chip->card->dev, "[%s] ready after %d ms\n", __func__, 400 - retry);
273 snd_ad1889_hw_params(struct snd_pcm_substream *substream,
274 struct snd_pcm_hw_params *hw_params)
276 return snd_pcm_lib_malloc_pages(substream,
277 params_buffer_bytes(hw_params));
281 snd_ad1889_hw_free(struct snd_pcm_substream *substream)
283 return snd_pcm_lib_free_pages(substream);
286 static struct snd_pcm_hardware snd_ad1889_playback_hw = {
287 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
288 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
289 .formats = SNDRV_PCM_FMTBIT_S16_LE,
290 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
291 .rate_min = 8000, /* docs say 7000, but we're lazy */
295 .buffer_bytes_max = BUFFER_BYTES_MAX,
296 .period_bytes_min = PERIOD_BYTES_MIN,
297 .period_bytes_max = PERIOD_BYTES_MAX,
298 .periods_min = PERIODS_MIN,
299 .periods_max = PERIODS_MAX,
303 static struct snd_pcm_hardware snd_ad1889_capture_hw = {
304 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
305 SNDRV_PCM_INFO_MMAP_VALID | SNDRV_PCM_INFO_BLOCK_TRANSFER,
306 .formats = SNDRV_PCM_FMTBIT_S16_LE,
307 .rates = SNDRV_PCM_RATE_48000,
308 .rate_min = 48000, /* docs say we could to VSR, but we're lazy */
312 .buffer_bytes_max = BUFFER_BYTES_MAX,
313 .period_bytes_min = PERIOD_BYTES_MIN,
314 .period_bytes_max = PERIOD_BYTES_MAX,
315 .periods_min = PERIODS_MIN,
316 .periods_max = PERIODS_MAX,
321 snd_ad1889_playback_open(struct snd_pcm_substream *ss)
323 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
324 struct snd_pcm_runtime *rt = ss->runtime;
327 rt->hw = snd_ad1889_playback_hw;
333 snd_ad1889_capture_open(struct snd_pcm_substream *ss)
335 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
336 struct snd_pcm_runtime *rt = ss->runtime;
339 rt->hw = snd_ad1889_capture_hw;
345 snd_ad1889_playback_close(struct snd_pcm_substream *ss)
347 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
353 snd_ad1889_capture_close(struct snd_pcm_substream *ss)
355 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
361 snd_ad1889_playback_prepare(struct snd_pcm_substream *ss)
363 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
364 struct snd_pcm_runtime *rt = ss->runtime;
365 unsigned int size = snd_pcm_lib_buffer_bytes(ss);
366 unsigned int count = snd_pcm_lib_period_bytes(ss);
369 ad1889_channel_reset(chip, AD_CHAN_WAV);
371 reg = ad1889_readw(chip, AD_DS_WSMC);
373 /* Mask out 16-bit / Stereo */
374 reg &= ~(AD_DS_WSMC_WA16 | AD_DS_WSMC_WAST);
376 if (snd_pcm_format_width(rt->format) == 16)
377 reg |= AD_DS_WSMC_WA16;
379 if (rt->channels > 1)
380 reg |= AD_DS_WSMC_WAST;
382 /* let's make sure we don't clobber ourselves */
383 spin_lock_irq(&chip->lock);
385 chip->wave.size = size;
386 chip->wave.reg = reg;
387 chip->wave.addr = rt->dma_addr;
389 ad1889_writew(chip, AD_DS_WSMC, chip->wave.reg);
391 /* Set sample rates on the codec */
392 ad1889_writew(chip, AD_DS_WAS, rt->rate);
395 ad1889_load_wave_buffer_address(chip, chip->wave.addr);
396 ad1889_load_wave_buffer_count(chip, size);
397 ad1889_load_wave_interrupt_count(chip, count);
400 ad1889_readw(chip, AD_DS_WSMC);
402 spin_unlock_irq(&chip->lock);
404 dev_dbg(chip->card->dev,
405 "prepare playback: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
406 chip->wave.addr, count, size, reg, rt->rate);
411 snd_ad1889_capture_prepare(struct snd_pcm_substream *ss)
413 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
414 struct snd_pcm_runtime *rt = ss->runtime;
415 unsigned int size = snd_pcm_lib_buffer_bytes(ss);
416 unsigned int count = snd_pcm_lib_period_bytes(ss);
419 ad1889_channel_reset(chip, AD_CHAN_ADC);
421 reg = ad1889_readw(chip, AD_DS_RAMC);
423 /* Mask out 16-bit / Stereo */
424 reg &= ~(AD_DS_RAMC_AD16 | AD_DS_RAMC_ADST);
426 if (snd_pcm_format_width(rt->format) == 16)
427 reg |= AD_DS_RAMC_AD16;
429 if (rt->channels > 1)
430 reg |= AD_DS_RAMC_ADST;
432 /* let's make sure we don't clobber ourselves */
433 spin_lock_irq(&chip->lock);
435 chip->ramc.size = size;
436 chip->ramc.reg = reg;
437 chip->ramc.addr = rt->dma_addr;
439 ad1889_writew(chip, AD_DS_RAMC, chip->ramc.reg);
442 ad1889_load_adc_buffer_address(chip, chip->ramc.addr);
443 ad1889_load_adc_buffer_count(chip, size);
444 ad1889_load_adc_interrupt_count(chip, count);
447 ad1889_readw(chip, AD_DS_RAMC);
449 spin_unlock_irq(&chip->lock);
451 dev_dbg(chip->card->dev,
452 "prepare capture: addr = 0x%x, count = %u, size = %u, reg = 0x%x, rate = %u\n",
453 chip->ramc.addr, count, size, reg, rt->rate);
457 /* this is called in atomic context with IRQ disabled.
458 Must be as fast as possible and not sleep.
459 DMA should be *triggered* by this call.
460 The WSMC "WAEN" bit triggers DMA Wave On/Off */
462 snd_ad1889_playback_trigger(struct snd_pcm_substream *ss, int cmd)
465 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
467 wsmc = ad1889_readw(chip, AD_DS_WSMC);
470 case SNDRV_PCM_TRIGGER_START:
471 /* enable DMA loop & interrupts */
472 ad1889_writew(chip, AD_DMA_WAV, AD_DMA_LOOP | AD_DMA_IM_CNT);
473 wsmc |= AD_DS_WSMC_WAEN;
474 /* 1 to clear CHSS bit */
475 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_WAVS);
478 case SNDRV_PCM_TRIGGER_STOP:
480 wsmc &= ~AD_DS_WSMC_WAEN;
487 chip->wave.reg = wsmc;
488 ad1889_writew(chip, AD_DS_WSMC, wsmc);
489 ad1889_readw(chip, AD_DS_WSMC); /* flush */
491 /* reset the chip when STOP - will disable IRQs */
492 if (cmd == SNDRV_PCM_TRIGGER_STOP)
493 ad1889_channel_reset(chip, AD_CHAN_WAV);
498 /* this is called in atomic context with IRQ disabled.
499 Must be as fast as possible and not sleep.
500 DMA should be *triggered* by this call.
501 The RAMC "ADEN" bit triggers DMA ADC On/Off */
503 snd_ad1889_capture_trigger(struct snd_pcm_substream *ss, int cmd)
506 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
508 ramc = ad1889_readw(chip, AD_DS_RAMC);
511 case SNDRV_PCM_TRIGGER_START:
512 /* enable DMA loop & interrupts */
513 ad1889_writew(chip, AD_DMA_ADC, AD_DMA_LOOP | AD_DMA_IM_CNT);
514 ramc |= AD_DS_RAMC_ADEN;
515 /* 1 to clear CHSS bit */
516 ad1889_writel(chip, AD_DMA_CHSS, AD_DMA_CHSS_ADCS);
518 case SNDRV_PCM_TRIGGER_STOP:
519 ramc &= ~AD_DS_RAMC_ADEN;
525 chip->ramc.reg = ramc;
526 ad1889_writew(chip, AD_DS_RAMC, ramc);
527 ad1889_readw(chip, AD_DS_RAMC); /* flush */
529 /* reset the chip when STOP - will disable IRQs */
530 if (cmd == SNDRV_PCM_TRIGGER_STOP)
531 ad1889_channel_reset(chip, AD_CHAN_ADC);
536 /* Called in atomic context with IRQ disabled */
537 static snd_pcm_uframes_t
538 snd_ad1889_playback_pointer(struct snd_pcm_substream *ss)
541 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
543 if (unlikely(!(chip->wave.reg & AD_DS_WSMC_WAEN)))
546 ptr = ad1889_readl(chip, AD_DMA_WAVCA);
547 ptr -= chip->wave.addr;
549 if (snd_BUG_ON(ptr >= chip->wave.size))
552 return bytes_to_frames(ss->runtime, ptr);
555 /* Called in atomic context with IRQ disabled */
556 static snd_pcm_uframes_t
557 snd_ad1889_capture_pointer(struct snd_pcm_substream *ss)
560 struct snd_ad1889 *chip = snd_pcm_substream_chip(ss);
562 if (unlikely(!(chip->ramc.reg & AD_DS_RAMC_ADEN)))
565 ptr = ad1889_readl(chip, AD_DMA_ADCCA);
566 ptr -= chip->ramc.addr;
568 if (snd_BUG_ON(ptr >= chip->ramc.size))
571 return bytes_to_frames(ss->runtime, ptr);
574 static const struct snd_pcm_ops snd_ad1889_playback_ops = {
575 .open = snd_ad1889_playback_open,
576 .close = snd_ad1889_playback_close,
577 .ioctl = snd_pcm_lib_ioctl,
578 .hw_params = snd_ad1889_hw_params,
579 .hw_free = snd_ad1889_hw_free,
580 .prepare = snd_ad1889_playback_prepare,
581 .trigger = snd_ad1889_playback_trigger,
582 .pointer = snd_ad1889_playback_pointer,
585 static const struct snd_pcm_ops snd_ad1889_capture_ops = {
586 .open = snd_ad1889_capture_open,
587 .close = snd_ad1889_capture_close,
588 .ioctl = snd_pcm_lib_ioctl,
589 .hw_params = snd_ad1889_hw_params,
590 .hw_free = snd_ad1889_hw_free,
591 .prepare = snd_ad1889_capture_prepare,
592 .trigger = snd_ad1889_capture_trigger,
593 .pointer = snd_ad1889_capture_pointer,
597 snd_ad1889_interrupt(int irq, void *dev_id)
600 struct snd_ad1889 *chip = dev_id;
602 st = ad1889_readl(chip, AD_DMA_DISR);
605 ad1889_writel(chip, AD_DMA_DISR, st);
612 if (st & (AD_DMA_DISR_PMAI|AD_DMA_DISR_PTAI))
613 dev_dbg(chip->card->dev,
614 "Unexpected master or target abort interrupt!\n");
616 if ((st & AD_DMA_DISR_WAVI) && chip->psubs)
617 snd_pcm_period_elapsed(chip->psubs);
618 if ((st & AD_DMA_DISR_ADCI) && chip->csubs)
619 snd_pcm_period_elapsed(chip->csubs);
625 snd_ad1889_pcm_init(struct snd_ad1889 *chip, int device)
630 err = snd_pcm_new(chip->card, chip->card->driver, device, 1, 1, &pcm);
634 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
635 &snd_ad1889_playback_ops);
636 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
637 &snd_ad1889_capture_ops);
639 pcm->private_data = chip;
641 strcpy(pcm->name, chip->card->shortname);
647 err = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
648 snd_dma_pci_data(chip->pci),
649 BUFFER_BYTES_MAX / 2,
653 dev_err(chip->card->dev, "buffer allocation error: %d\n", err);
661 snd_ad1889_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
663 struct snd_ad1889 *chip = entry->private_data;
667 reg = ad1889_readw(chip, AD_DS_WSMC);
668 snd_iprintf(buffer, "Wave output: %s\n",
669 (reg & AD_DS_WSMC_WAEN) ? "enabled" : "disabled");
670 snd_iprintf(buffer, "Wave Channels: %s\n",
671 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
672 snd_iprintf(buffer, "Wave Quality: %d-bit linear\n",
673 (reg & AD_DS_WSMC_WA16) ? 16 : 8);
675 /* WARQ is at offset 12 */
676 tmp = (reg & AD_DS_WSMC_WARQ) ?
677 ((((reg & AD_DS_WSMC_WARQ) >> 12) & 0x01) ? 12 : 18) : 4;
678 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
680 snd_iprintf(buffer, "Wave FIFO: %d %s words\n\n", tmp,
681 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
684 snd_iprintf(buffer, "Synthesis output: %s\n",
685 reg & AD_DS_WSMC_SYEN ? "enabled" : "disabled");
687 /* SYRQ is at offset 4 */
688 tmp = (reg & AD_DS_WSMC_SYRQ) ?
689 ((((reg & AD_DS_WSMC_SYRQ) >> 4) & 0x01) ? 12 : 18) : 4;
690 tmp /= (reg & AD_DS_WSMC_WAST) ? 2 : 1;
692 snd_iprintf(buffer, "Synthesis FIFO: %d %s words\n\n", tmp,
693 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
695 reg = ad1889_readw(chip, AD_DS_RAMC);
696 snd_iprintf(buffer, "ADC input: %s\n",
697 (reg & AD_DS_RAMC_ADEN) ? "enabled" : "disabled");
698 snd_iprintf(buffer, "ADC Channels: %s\n",
699 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
700 snd_iprintf(buffer, "ADC Quality: %d-bit linear\n",
701 (reg & AD_DS_RAMC_AD16) ? 16 : 8);
703 /* ACRQ is at offset 4 */
704 tmp = (reg & AD_DS_RAMC_ACRQ) ?
705 ((((reg & AD_DS_RAMC_ACRQ) >> 4) & 0x01) ? 12 : 18) : 4;
706 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
708 snd_iprintf(buffer, "ADC FIFO: %d %s words\n\n", tmp,
709 (reg & AD_DS_RAMC_ADST) ? "stereo" : "mono");
711 snd_iprintf(buffer, "Resampler input: %s\n",
712 reg & AD_DS_RAMC_REEN ? "enabled" : "disabled");
714 /* RERQ is at offset 12 */
715 tmp = (reg & AD_DS_RAMC_RERQ) ?
716 ((((reg & AD_DS_RAMC_RERQ) >> 12) & 0x01) ? 12 : 18) : 4;
717 tmp /= (reg & AD_DS_RAMC_ADST) ? 2 : 1;
719 snd_iprintf(buffer, "Resampler FIFO: %d %s words\n\n", tmp,
720 (reg & AD_DS_WSMC_WAST) ? "stereo" : "mono");
723 /* doc says LSB represents -1.5dB, but the max value (-94.5dB)
724 suggests that LSB is -3dB, which is more coherent with the logarithmic
725 nature of the dB scale */
726 reg = ad1889_readw(chip, AD_DS_WADA);
727 snd_iprintf(buffer, "Left: %s, -%d dB\n",
728 (reg & AD_DS_WADA_LWAM) ? "mute" : "unmute",
729 ((reg & AD_DS_WADA_LWAA) >> 8) * 3);
730 reg = ad1889_readw(chip, AD_DS_WADA);
731 snd_iprintf(buffer, "Right: %s, -%d dB\n",
732 (reg & AD_DS_WADA_RWAM) ? "mute" : "unmute",
733 (reg & AD_DS_WADA_RWAA) * 3);
735 reg = ad1889_readw(chip, AD_DS_WAS);
736 snd_iprintf(buffer, "Wave samplerate: %u Hz\n", reg);
737 reg = ad1889_readw(chip, AD_DS_RES);
738 snd_iprintf(buffer, "Resampler samplerate: %u Hz\n", reg);
742 snd_ad1889_proc_init(struct snd_ad1889 *chip)
744 struct snd_info_entry *entry;
746 if (!snd_card_proc_new(chip->card, chip->card->driver, &entry))
747 snd_info_set_text_ops(entry, chip, snd_ad1889_proc_read);
750 static const struct ac97_quirk ac97_quirks[] = {
752 .subvendor = 0x11d4, /* AD */
753 .subdevice = 0x1889, /* AD1889 */
754 .codec_id = AC97_ID_AD1819,
756 .type = AC97_TUNE_HP_ONLY
762 snd_ad1889_ac97_xinit(struct snd_ad1889 *chip)
766 reg = ad1889_readw(chip, AD_AC97_ACIC);
767 reg |= AD_AC97_ACIC_ACRD; /* Reset Disable */
768 ad1889_writew(chip, AD_AC97_ACIC, reg);
769 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
771 /* Interface Enable */
772 reg |= AD_AC97_ACIC_ACIE;
773 ad1889_writew(chip, AD_AC97_ACIC, reg);
775 snd_ad1889_ac97_ready(chip);
777 /* Audio Stream Output | Variable Sample Rate Mode */
778 reg = ad1889_readw(chip, AD_AC97_ACIC);
779 reg |= AD_AC97_ACIC_ASOE | AD_AC97_ACIC_VSRM;
780 ad1889_writew(chip, AD_AC97_ACIC, reg);
781 ad1889_readw(chip, AD_AC97_ACIC); /* flush posted write */
786 snd_ad1889_ac97_bus_free(struct snd_ac97_bus *bus)
788 struct snd_ad1889 *chip = bus->private_data;
789 chip->ac97_bus = NULL;
793 snd_ad1889_ac97_free(struct snd_ac97 *ac97)
795 struct snd_ad1889 *chip = ac97->private_data;
800 snd_ad1889_ac97_init(struct snd_ad1889 *chip, const char *quirk_override)
803 struct snd_ac97_template ac97;
804 static struct snd_ac97_bus_ops ops = {
805 .write = snd_ad1889_ac97_write,
806 .read = snd_ad1889_ac97_read,
809 /* doing that here, it works. */
810 snd_ad1889_ac97_xinit(chip);
812 err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus);
816 chip->ac97_bus->private_free = snd_ad1889_ac97_bus_free;
818 memset(&ac97, 0, sizeof(ac97));
819 ac97.private_data = chip;
820 ac97.private_free = snd_ad1889_ac97_free;
821 ac97.pci = chip->pci;
823 err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97);
827 snd_ac97_tune_hardware(chip->ac97, ac97_quirks, quirk_override);
833 snd_ad1889_free(struct snd_ad1889 *chip)
838 spin_lock_irq(&chip->lock);
842 /* Turn off interrupt on count and zero DMA registers */
843 ad1889_channel_reset(chip, AD_CHAN_WAV | AD_CHAN_ADC);
845 /* clear DISR. If we don't, we'd better jump off the Eiffel Tower */
846 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PTAI | AD_DMA_DISR_PMAI);
847 ad1889_readl(chip, AD_DMA_DISR); /* flush, dammit! */
849 spin_unlock_irq(&chip->lock);
852 free_irq(chip->irq, chip);
855 iounmap(chip->iobase);
856 pci_release_regions(chip->pci);
857 pci_disable_device(chip->pci);
863 snd_ad1889_dev_free(struct snd_device *device)
865 struct snd_ad1889 *chip = device->device_data;
866 return snd_ad1889_free(chip);
870 snd_ad1889_init(struct snd_ad1889 *chip)
872 ad1889_writew(chip, AD_DS_CCS, AD_DS_CCS_CLKEN); /* turn on clock */
873 ad1889_readw(chip, AD_DS_CCS); /* flush posted write */
877 /* enable Master and Target abort interrupts */
878 ad1889_writel(chip, AD_DMA_DISR, AD_DMA_DISR_PMAE | AD_DMA_DISR_PTAE);
884 snd_ad1889_create(struct snd_card *card,
886 struct snd_ad1889 **rchip)
890 struct snd_ad1889 *chip;
891 static struct snd_device_ops ops = {
892 .dev_free = snd_ad1889_dev_free,
897 if ((err = pci_enable_device(pci)) < 0)
900 /* check PCI availability (32bit DMA) */
901 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(32)) < 0 ||
902 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32)) < 0) {
903 dev_err(card->dev, "error setting 32-bit DMA mask.\n");
904 pci_disable_device(pci);
908 /* allocate chip specific data with zero-filled memory */
909 if ((chip = kzalloc(sizeof(*chip), GFP_KERNEL)) == NULL) {
910 pci_disable_device(pci);
915 card->private_data = chip;
919 /* (1) PCI resource allocation */
920 if ((err = pci_request_regions(pci, card->driver)) < 0)
923 chip->bar = pci_resource_start(pci, 0);
924 chip->iobase = pci_ioremap_bar(pci, 0);
925 if (chip->iobase == NULL) {
926 dev_err(card->dev, "unable to reserve region.\n");
933 spin_lock_init(&chip->lock); /* only now can we call ad1889_free */
935 if (request_irq(pci->irq, snd_ad1889_interrupt,
936 IRQF_SHARED, KBUILD_MODNAME, chip)) {
937 dev_err(card->dev, "cannot obtain IRQ %d\n", pci->irq);
938 snd_ad1889_free(chip);
942 chip->irq = pci->irq;
943 synchronize_irq(chip->irq);
945 /* (2) initialization of the chip hardware */
946 if ((err = snd_ad1889_init(chip)) < 0) {
947 snd_ad1889_free(chip);
951 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
952 snd_ad1889_free(chip);
962 pci_disable_device(pci);
968 snd_ad1889_probe(struct pci_dev *pci,
969 const struct pci_device_id *pci_id)
973 struct snd_card *card;
974 struct snd_ad1889 *chip;
977 if (devno >= SNDRV_CARDS)
979 if (!enable[devno]) {
985 err = snd_card_new(&pci->dev, index[devno], id[devno], THIS_MODULE,
987 /* XXX REVISIT: we can probably allocate chip in this call */
991 strcpy(card->driver, "AD1889");
992 strcpy(card->shortname, "Analog Devices AD1889");
995 err = snd_ad1889_create(card, pci, &chip);
1000 sprintf(card->longname, "%s at 0x%lx irq %i",
1001 card->shortname, chip->bar, chip->irq);
1004 /* register AC97 mixer */
1005 err = snd_ad1889_ac97_init(chip, ac97_quirk[devno]);
1009 err = snd_ad1889_pcm_init(chip, 0);
1013 /* register proc interface */
1014 snd_ad1889_proc_init(chip);
1017 err = snd_card_register(card);
1022 pci_set_drvdata(pci, card);
1028 snd_card_free(card);
1033 snd_ad1889_remove(struct pci_dev *pci)
1035 snd_card_free(pci_get_drvdata(pci));
1038 static const struct pci_device_id snd_ad1889_ids[] = {
1039 { PCI_DEVICE(PCI_VENDOR_ID_ANALOG_DEVICES, PCI_DEVICE_ID_AD1889JS) },
1042 MODULE_DEVICE_TABLE(pci, snd_ad1889_ids);
1044 static struct pci_driver ad1889_pci_driver = {
1045 .name = KBUILD_MODNAME,
1046 .id_table = snd_ad1889_ids,
1047 .probe = snd_ad1889_probe,
1048 .remove = snd_ad1889_remove,
1051 module_pci_driver(ad1889_pci_driver);