drivers/gpu/drm/omapdrm/omap_drv.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
   4  * Author: Rob Clark <[email protected]>
   5  */
   6
   7 #include <linux/dma-mapping.h>
   8 #include <linux/platform_device.h>
   9 #include <linux/sort.h>
  10 #include <linux/sys_soc.h>
  11
  12 #include <drm/drm_atomic.h>
  13 #include <drm/drm_atomic_helper.h>
  14 #include <drm/drm_bridge.h>
  15 #include <drm/drm_bridge_connector.h>
  16 #include <drm/drm_drv.h>
  17 #include <drm/drm_fb_helper.h>
  18 #include <drm/drm_file.h>
  19 #include <drm/drm_ioctl.h>
  20 #include <drm/drm_panel.h>
  21 #include <drm/drm_prime.h>
  22 #include <drm/drm_probe_helper.h>
  23 #include <drm/drm_vblank.h>
  24
  25 #include "omap_dmm_tiler.h"
  26 #include "omap_drv.h"
  27
  28 #define DRIVER_NAME             MODULE_NAME
  29 #define DRIVER_DESC             "OMAP DRM"
  30 #define DRIVER_DATE             "20110917"
  31 #define DRIVER_MAJOR            1
  32 #define DRIVER_MINOR            0
  33 #define DRIVER_PATCHLEVEL       0
  34
  35 /*
  36  * mode config funcs
  37  */
  38
  39 /* Notes about mapping DSS and DRM entities:
  40  *    CRTC:        overlay
  41  *    encoder:     manager.. with some extension to allow one primary CRTC
  42  *                 and zero or more video CRTC's to be mapped to one encoder?
  43  *    connector:   dssdev.. manager can be attached/detached from different
  44  *                 devices
  45  */
  46
  47 static void omap_atomic_wait_for_completion(struct drm_device *dev,
  48                                             struct drm_atomic_state *old_state)
  49 {
  50         struct drm_crtc_state *new_crtc_state;
  51         struct drm_crtc *crtc;
  52         unsigned int i;
  53         int ret;
  54
  55         for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
  56                 if (!new_crtc_state->active)
  57                         continue;
  58
  59                 ret = omap_crtc_wait_pending(crtc);
  60
  61                 if (!ret)
  62                         dev_warn(dev->dev,
  63                                  "atomic complete timeout (pipe %u)!\n", i);
  64         }
  65 }
  66
  67 static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
  68 {
  69         struct drm_device *dev = old_state->dev;
  70         struct omap_drm_private *priv = dev->dev_private;
  71         bool fence_cookie = dma_fence_begin_signalling();
  72
  73         dispc_runtime_get(priv->dispc);
  74
  75         /* Apply the atomic update. */
  76         drm_atomic_helper_commit_modeset_disables(dev, old_state);
  77
  78         if (priv->omaprev != 0x3430) {
  79                 /* With the current dss dispc implementation we have to enable
  80                  * the new modeset before we can commit planes. The dispc ovl
  81                  * configuration relies on the video mode configuration been
  82                  * written into the HW when the ovl configuration is
  83                  * calculated.
  84                  *
  85                  * This approach is not ideal because after a mode change the
  86                  * plane update is executed only after the first vblank
  87                  * interrupt. The dispc implementation should be fixed so that
  88                  * it is able use uncommitted drm state information.
  89                  */
  90                 drm_atomic_helper_commit_modeset_enables(dev, old_state);
  91                 omap_atomic_wait_for_completion(dev, old_state);
  92
  93                 drm_atomic_helper_commit_planes(dev, old_state, 0);
  94         } else {
  95                 /*
  96                  * OMAP3 DSS seems to have issues with the work-around above,
  97                  * resulting in endless sync losts if a crtc is enabled without
  98                  * a plane. For now, skip the WA for OMAP3.
  99                  */
 100                 drm_atomic_helper_commit_planes(dev, old_state, 0);
 101
 102                 drm_atomic_helper_commit_modeset_enables(dev, old_state);
 103         }
 104
 105         drm_atomic_helper_commit_hw_done(old_state);
 106
 107         dma_fence_end_signalling(fence_cookie);
 108
 109         /*
 110          * Wait for completion of the page flips to ensure that old buffers
 111          * can't be touched by the hardware anymore before cleaning up planes.
 112          */
 113         omap_atomic_wait_for_completion(dev, old_state);
 114
 115         drm_atomic_helper_cleanup_planes(dev, old_state);
 116
 117         dispc_runtime_put(priv->dispc);
 118 }
 119
 120 static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
 121         .atomic_commit_tail = omap_atomic_commit_tail,
 122 };
 123
 124 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
 125         .fb_create = omap_framebuffer_create,
 126         .output_poll_changed = drm_fb_helper_output_poll_changed,
 127         .atomic_check = drm_atomic_helper_check,
 128         .atomic_commit = drm_atomic_helper_commit,
 129 };
 130
 131 static void omap_disconnect_pipelines(struct drm_device *ddev)
 132 {
 133         struct omap_drm_private *priv = ddev->dev_private;
 134         unsigned int i;
 135
 136         for (i = 0; i < priv->num_pipes; i++) {
 137                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 138
 139                 omapdss_device_disconnect(NULL, pipe->output);
 140
 141                 omapdss_device_put(pipe->output);
 142                 pipe->output = NULL;
 143         }
 144
 145         memset(&priv->channels, 0, sizeof(priv->channels));
 146
 147         priv->num_pipes = 0;
 148 }
 149
 150 static int omap_connect_pipelines(struct drm_device *ddev)
 151 {
 152         struct omap_drm_private *priv = ddev->dev_private;
 153         struct omap_dss_device *output = NULL;
 154         int r;
 155
 156         for_each_dss_output(output) {
 157                 r = omapdss_device_connect(priv->dss, NULL, output);
 158                 if (r == -EPROBE_DEFER) {
 159                         omapdss_device_put(output);
 160                         return r;
 161                 } else if (r) {
 162                         dev_warn(output->dev, "could not connect output %s\n",
 163                                  output->name);
 164                 } else {
 165                         struct omap_drm_pipeline *pipe;
 166
 167                         pipe = &priv->pipes[priv->num_pipes++];
 168                         pipe->output = omapdss_device_get(output);
 169
 170                         if (priv->num_pipes == ARRAY_SIZE(priv->pipes)) {
 171                                 /* To balance the 'for_each_dss_output' loop */
 172                                 omapdss_device_put(output);
 173                                 break;
 174                         }
 175                 }
 176         }
 177
 178         return 0;
 179 }
 180
 181 static int omap_compare_pipelines(const void *a, const void *b)
 182 {
 183         const struct omap_drm_pipeline *pipe1 = a;
 184         const struct omap_drm_pipeline *pipe2 = b;
 185
 186         if (pipe1->alias_id > pipe2->alias_id)
 187                 return 1;
 188         else if (pipe1->alias_id < pipe2->alias_id)
 189                 return -1;
 190         return 0;
 191 }
 192
 193 static int omap_modeset_init_properties(struct drm_device *dev)
 194 {
 195         struct omap_drm_private *priv = dev->dev_private;
 196         unsigned int num_planes = dispc_get_num_ovls(priv->dispc);
 197
 198         priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
 199                                                       num_planes - 1);
 200         if (!priv->zorder_prop)
 201                 return -ENOMEM;
 202
 203         return 0;
 204 }
 205
 206 static int omap_display_id(struct omap_dss_device *output)
 207 {
 208         struct device_node *node = NULL;
 209
 210         if (output->bridge) {
 211                 struct drm_bridge *bridge = output->bridge;
 212
 213                 while (drm_bridge_get_next_bridge(bridge))
 214                         bridge = drm_bridge_get_next_bridge(bridge);
 215
 216                 node = bridge->of_node;
 217         }
 218
 219         return node ? of_alias_get_id(node, "display") : -ENODEV;
 220 }
 221
 222 static int omap_modeset_init(struct drm_device *dev)
 223 {
 224         struct omap_drm_private *priv = dev->dev_private;
 225         int num_ovls = dispc_get_num_ovls(priv->dispc);
 226         int num_mgrs = dispc_get_num_mgrs(priv->dispc);
 227         unsigned int i;
 228         int ret;
 229         u32 plane_crtc_mask;
 230
 231         if (!omapdss_stack_is_ready())
 232                 return -EPROBE_DEFER;
 233
 234         drm_mode_config_init(dev);
 235
 236         ret = omap_modeset_init_properties(dev);
 237         if (ret < 0)
 238                 return ret;
 239
 240         /*
 241          * This function creates exactly one connector, encoder, crtc,
 242          * and primary plane per each connected dss-device. Each
 243          * connector->encoder->crtc chain is expected to be separate
 244          * and each crtc is connect to a single dss-channel. If the
 245          * configuration does not match the expectations or exceeds
 246          * the available resources, the configuration is rejected.
 247          */
 248         ret = omap_connect_pipelines(dev);
 249         if (ret < 0)
 250                 return ret;
 251
 252         if (priv->num_pipes > num_mgrs || priv->num_pipes > num_ovls) {
 253                 dev_err(dev->dev, "%s(): Too many connected displays\n",
 254                         __func__);
 255                 return -EINVAL;
 256         }
 257
 258         /* Create all planes first. They can all be put to any CRTC. */
 259         plane_crtc_mask = (1 << priv->num_pipes) - 1;
 260
 261         for (i = 0; i < num_ovls; i++) {
 262                 enum drm_plane_type type = i < priv->num_pipes
 263                                          ? DRM_PLANE_TYPE_PRIMARY
 264                                          : DRM_PLANE_TYPE_OVERLAY;
 265                 struct drm_plane *plane;
 266
 267                 if (WARN_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)))
 268                         return -EINVAL;
 269
 270                 plane = omap_plane_init(dev, i, type, plane_crtc_mask);
 271                 if (IS_ERR(plane))
 272                         return PTR_ERR(plane);
 273
 274                 priv->planes[priv->num_planes++] = plane;
 275         }
 276
 277         /*
 278          * Create the encoders, attach the bridges and get the pipeline alias
 279          * IDs.
 280          */
 281         for (i = 0; i < priv->num_pipes; i++) {
 282                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 283                 int id;
 284
 285                 pipe->encoder = omap_encoder_init(dev, pipe->output);
 286                 if (!pipe->encoder)
 287                         return -ENOMEM;
 288
 289                 if (pipe->output->bridge) {
 290                         ret = drm_bridge_attach(pipe->encoder,
 291                                                 pipe->output->bridge, NULL,
 292                                                 DRM_BRIDGE_ATTACH_NO_CONNECTOR);
 293                         if (ret < 0) {
 294                                 dev_err(priv->dev,
 295                                         "unable to attach bridge %pOF\n",
 296                                         pipe->output->bridge->of_node);
 297                                 return ret;
 298                         }
 299                 }
 300
 301                 id = omap_display_id(pipe->output);
 302                 pipe->alias_id = id >= 0 ? id : i;
 303         }
 304
 305         /* Sort the pipelines by DT aliases. */
 306         sort(priv->pipes, priv->num_pipes, sizeof(priv->pipes[0]),
 307              omap_compare_pipelines, NULL);
 308
 309         /*
 310          * Populate the pipeline lookup table by DISPC channel. Only one display
 311          * is allowed per channel.
 312          */
 313         for (i = 0; i < priv->num_pipes; ++i) {
 314                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 315                 enum omap_channel channel = pipe->output->dispc_channel;
 316
 317                 if (WARN_ON(priv->channels[channel] != NULL))
 318                         return -EINVAL;
 319
 320                 priv->channels[channel] = pipe;
 321         }
 322
 323         /* Create the connectors and CRTCs. */
 324         for (i = 0; i < priv->num_pipes; i++) {
 325                 struct omap_drm_pipeline *pipe = &priv->pipes[i];
 326                 struct drm_encoder *encoder = pipe->encoder;
 327                 struct drm_crtc *crtc;
 328
 329                 pipe->connector = drm_bridge_connector_init(dev, encoder);
 330                 if (IS_ERR(pipe->connector)) {
 331                         dev_err(priv->dev,
 332                                 "unable to create bridge connector for %s\n",
 333                                 pipe->output->name);
 334                         return PTR_ERR(pipe->connector);
 335                 }
 336
 337                 drm_connector_attach_encoder(pipe->connector, encoder);
 338
 339                 crtc = omap_crtc_init(dev, pipe, priv->planes[i]);
 340                 if (IS_ERR(crtc))
 341                         return PTR_ERR(crtc);
 342
 343                 encoder->possible_crtcs = 1 << i;
 344                 pipe->crtc = crtc;
 345         }
 346
 347         DBG("registered %u planes, %u crtcs/encoders/connectors\n",
 348             priv->num_planes, priv->num_pipes);
 349
 350         dev->mode_config.min_width = 8;
 351         dev->mode_config.min_height = 2;
 352
 353         /*
 354          * Note: these values are used for multiple independent things:
 355          * connector mode filtering, buffer sizes, crtc sizes...
 356          * Use big enough values here to cover all use cases, and do more
 357          * specific checking in the respective code paths.
 358          */
 359         dev->mode_config.max_width = 8192;
 360         dev->mode_config.max_height = 8192;
 361
 362         /* We want the zpos to be normalized */
 363         dev->mode_config.normalize_zpos = true;
 364
 365         dev->mode_config.funcs = &omap_mode_config_funcs;
 366         dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
 367
 368         drm_mode_config_reset(dev);
 369
 370         omap_drm_irq_install(dev);
 371
 372         return 0;
 373 }
 374
 375 static void omap_modeset_fini(struct drm_device *ddev)
 376 {
 377         omap_drm_irq_uninstall(ddev);
 378
 379         drm_mode_config_cleanup(ddev);
 380 }
 381
 382 /*
 383  * Enable the HPD in external components if supported
 384  */
 385 static void omap_modeset_enable_external_hpd(struct drm_device *ddev)
 386 {
 387         struct omap_drm_private *priv = ddev->dev_private;
 388         unsigned int i;
 389
 390         for (i = 0; i < priv->num_pipes; i++) {
 391                 struct drm_connector *connector = priv->pipes[i].connector;
 392
 393                 if (!connector)
 394                         continue;
 395
 396                 if (priv->pipes[i].output->bridge)
 397                         drm_bridge_connector_enable_hpd(connector);
 398         }
 399 }
 400
 401 /*
 402  * Disable the HPD in external components if supported
 403  */
 404 static void omap_modeset_disable_external_hpd(struct drm_device *ddev)
 405 {
 406         struct omap_drm_private *priv = ddev->dev_private;
 407         unsigned int i;
 408
 409         for (i = 0; i < priv->num_pipes; i++) {
 410                 struct drm_connector *connector = priv->pipes[i].connector;
 411
 412                 if (!connector)
 413                         continue;
 414
 415                 if (priv->pipes[i].output->bridge)
 416                         drm_bridge_connector_disable_hpd(connector);
 417         }
 418 }
 419
 420 /*
 421  * drm ioctl funcs
 422  */
 423
 424
 425 static int ioctl_get_param(struct drm_device *dev, void *data,
 426                 struct drm_file *file_priv)
 427 {
 428         struct omap_drm_private *priv = dev->dev_private;
 429         struct drm_omap_param *args = data;
 430
 431         DBG("%p: param=%llu", dev, args->param);
 432
 433         switch (args->param) {
 434         case OMAP_PARAM_CHIPSET_ID:
 435                 args->value = priv->omaprev;
 436                 break;
 437         default:
 438                 DBG("unknown parameter %lld", args->param);
 439                 return -EINVAL;
 440         }
 441
 442         return 0;
 443 }
 444
 445 #define OMAP_BO_USER_MASK       0x00ffffff      /* flags settable by userspace */
 446
 447 static int ioctl_gem_new(struct drm_device *dev, void *data,
 448                 struct drm_file *file_priv)
 449 {
 450         struct drm_omap_gem_new *args = data;
 451         u32 flags = args->flags & OMAP_BO_USER_MASK;
 452
 453         VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
 454              args->size.bytes, flags);
 455
 456         return omap_gem_new_handle(dev, file_priv, args->size, flags,
 457                                    &args->handle);
 458 }
 459
 460 static int ioctl_gem_info(struct drm_device *dev, void *data,
 461                 struct drm_file *file_priv)
 462 {
 463         struct drm_omap_gem_info *args = data;
 464         struct drm_gem_object *obj;
 465         int ret = 0;
 466
 467         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 468
 469         obj = drm_gem_object_lookup(file_priv, args->handle);
 470         if (!obj)
 471                 return -ENOENT;
 472
 473         args->size = omap_gem_mmap_size(obj);
 474         args->offset = omap_gem_mmap_offset(obj);
 475
 476         drm_gem_object_put(obj);
 477
 478         return ret;
 479 }
 480
 481 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
 482         DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param,
 483                           DRM_RENDER_ALLOW),
 484         DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, drm_invalid_op,
 485                           DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
 486         DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
 487                           DRM_RENDER_ALLOW),
 488         /* Deprecated, to be removed. */
 489         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
 490                           DRM_RENDER_ALLOW),
 491         /* Deprecated, to be removed. */
 492         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
 493                           DRM_RENDER_ALLOW),
 494         DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
 495                           DRM_RENDER_ALLOW),
 496 };
 497
 498 /*
 499  * drm driver funcs
 500  */
 501
 502 static int dev_open(struct drm_device *dev, struct drm_file *file)
 503 {
 504         file->driver_priv = NULL;
 505
 506         DBG("open: dev=%p, file=%p", dev, file);
 507
 508         return 0;
 509 }
 510
 511 static const struct file_operations omapdriver_fops = {
 512         .owner = THIS_MODULE,
 513         .open = drm_open,
 514         .unlocked_ioctl = drm_ioctl,
 515         .compat_ioctl = drm_compat_ioctl,
 516         .release = drm_release,
 517         .mmap = omap_gem_mmap,
 518         .poll = drm_poll,
 519         .read = drm_read,
 520         .llseek = noop_llseek,
 521 };
 522
 523 static const struct drm_driver omap_drm_driver = {
 524         .driver_features = DRIVER_MODESET | DRIVER_GEM  |
 525                 DRIVER_ATOMIC | DRIVER_RENDER,
 526         .open = dev_open,
 527         .lastclose = drm_fb_helper_lastclose,
 528 #ifdef CONFIG_DEBUG_FS
 529         .debugfs_init = omap_debugfs_init,
 530 #endif
 531         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 532         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 533         .gem_prime_import = omap_gem_prime_import,
 534         .dumb_create = omap_gem_dumb_create,
 535         .dumb_map_offset = omap_gem_dumb_map_offset,
 536         .ioctls = ioctls,
 537         .num_ioctls = DRM_OMAP_NUM_IOCTLS,
 538         .fops = &omapdriver_fops,
 539         .name = DRIVER_NAME,
 540         .desc = DRIVER_DESC,
 541         .date = DRIVER_DATE,
 542         .major = DRIVER_MAJOR,
 543         .minor = DRIVER_MINOR,
 544         .patchlevel = DRIVER_PATCHLEVEL,
 545 };
 546
 547 static const struct soc_device_attribute omapdrm_soc_devices[] = {
 548         { .family = "OMAP3", .data = (void *)0x3430 },
 549         { .family = "OMAP4", .data = (void *)0x4430 },
 550         { .family = "OMAP5", .data = (void *)0x5430 },
 551         { .family = "DRA7",  .data = (void *)0x0752 },
 552         { /* sentinel */ }
 553 };
 554
 555 static int omapdrm_init(struct omap_drm_private *priv, struct device *dev)
 556 {
 557         const struct soc_device_attribute *soc;
 558         struct dss_pdata *pdata = dev->platform_data;
 559         struct drm_device *ddev;
 560         int ret;
 561
 562         DBG("%s", dev_name(dev));
 563
 564         /* Allocate and initialize the DRM device. */
 565         ddev = drm_dev_alloc(&omap_drm_driver, dev);
 566         if (IS_ERR(ddev))
 567                 return PTR_ERR(ddev);
 568
 569         priv->ddev = ddev;
 570         ddev->dev_private = priv;
 571
 572         priv->dev = dev;
 573         priv->dss = pdata->dss;
 574         priv->dispc = dispc_get_dispc(priv->dss);
 575
 576         priv->dss->mgr_ops_priv = priv;
 577
 578         soc = soc_device_match(omapdrm_soc_devices);
 579         priv->omaprev = soc ? (unsigned int)soc->data : 0;
 580         priv->wq = alloc_ordered_workqueue("omapdrm", 0);
 581
 582         mutex_init(&priv->list_lock);
 583         INIT_LIST_HEAD(&priv->obj_list);
 584
 585         /* Get memory bandwidth limits */
 586         priv->max_bandwidth = dispc_get_memory_bandwidth_limit(priv->dispc);
 587
 588         omap_gem_init(ddev);
 589
 590         ret = omap_modeset_init(ddev);
 591         if (ret) {
 592                 dev_err(priv->dev, "omap_modeset_init failed: ret=%d\n", ret);
 593                 goto err_gem_deinit;
 594         }
 595
 596         /* Initialize vblank handling, start with all CRTCs disabled. */
 597         ret = drm_vblank_init(ddev, priv->num_pipes);
 598         if (ret) {
 599                 dev_err(priv->dev, "could not init vblank\n");
 600                 goto err_cleanup_modeset;
 601         }
 602
 603         omap_fbdev_init(ddev);
 604
 605         drm_kms_helper_poll_init(ddev);
 606         omap_modeset_enable_external_hpd(ddev);
 607
 608         /*
 609          * Register the DRM device with the core and the connectors with
 610          * sysfs.
 611          */
 612         ret = drm_dev_register(ddev, 0);
 613         if (ret)
 614                 goto err_cleanup_helpers;
 615
 616         return 0;
 617
 618 err_cleanup_helpers:
 619         omap_modeset_disable_external_hpd(ddev);
 620         drm_kms_helper_poll_fini(ddev);
 621
 622         omap_fbdev_fini(ddev);
 623 err_cleanup_modeset:
 624         omap_modeset_fini(ddev);
 625 err_gem_deinit:
 626         omap_gem_deinit(ddev);
 627         destroy_workqueue(priv->wq);
 628         omap_disconnect_pipelines(ddev);
 629         drm_dev_put(ddev);
 630         return ret;
 631 }
 632
 633 static void omapdrm_cleanup(struct omap_drm_private *priv)
 634 {
 635         struct drm_device *ddev = priv->ddev;
 636
 637         DBG("");
 638
 639         drm_dev_unregister(ddev);
 640
 641         omap_modeset_disable_external_hpd(ddev);
 642         drm_kms_helper_poll_fini(ddev);
 643
 644         omap_fbdev_fini(ddev);
 645
 646         drm_atomic_helper_shutdown(ddev);
 647
 648         omap_modeset_fini(ddev);
 649         omap_gem_deinit(ddev);
 650
 651         destroy_workqueue(priv->wq);
 652
 653         omap_disconnect_pipelines(ddev);
 654
 655         drm_dev_put(ddev);
 656 }
 657
 658 static int pdev_probe(struct platform_device *pdev)
 659 {
 660         struct omap_drm_private *priv;
 661         int ret;
 662
 663         ret = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
 664         if (ret) {
 665                 dev_err(&pdev->dev, "Failed to set the DMA mask\n");
 666                 return ret;
 667         }
 668
 669         /* Allocate and initialize the driver private structure. */
 670         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 671         if (!priv)
 672                 return -ENOMEM;
 673
 674         platform_set_drvdata(pdev, priv);
 675
 676         ret = omapdrm_init(priv, &pdev->dev);
 677         if (ret < 0)
 678                 kfree(priv);
 679
 680         return ret;
 681 }
 682
 683 static int pdev_remove(struct platform_device *pdev)
 684 {
 685         struct omap_drm_private *priv = platform_get_drvdata(pdev);
 686
 687         omapdrm_cleanup(priv);
 688         kfree(priv);
 689
 690         return 0;
 691 }
 692
 693 #ifdef CONFIG_PM_SLEEP
 694 static int omap_drm_suspend(struct device *dev)
 695 {
 696         struct omap_drm_private *priv = dev_get_drvdata(dev);
 697         struct drm_device *drm_dev = priv->ddev;
 698
 699         return drm_mode_config_helper_suspend(drm_dev);
 700 }
 701
 702 static int omap_drm_resume(struct device *dev)
 703 {
 704         struct omap_drm_private *priv = dev_get_drvdata(dev);
 705         struct drm_device *drm_dev = priv->ddev;
 706
 707         drm_mode_config_helper_resume(drm_dev);
 708
 709         return omap_gem_resume(drm_dev);
 710 }
 711 #endif
 712
 713 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
 714
 715 static struct platform_driver pdev = {
 716         .driver = {
 717                 .name = "omapdrm",
 718                 .pm = &omapdrm_pm_ops,
 719         },
 720         .probe = pdev_probe,
 721         .remove = pdev_remove,
 722 };
 723
 724 static struct platform_driver * const drivers[] = {
 725         &omap_dmm_driver,
 726         &pdev,
 727 };
 728
 729 static int __init omap_drm_init(void)
 730 {
 731         int r;
 732
 733         DBG("init");
 734
 735         r = omap_dss_init();
 736         if (r)
 737                 return r;
 738
 739         r = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
 740         if (r) {
 741                 omap_dss_exit();
 742                 return r;
 743         }
 744
 745         return 0;
 746 }
 747
 748 static void __exit omap_drm_fini(void)
 749 {
 750         DBG("fini");
 751
 752         platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
 753
 754         omap_dss_exit();
 755 }
 756
 757 module_init(omap_drm_init);
 758 module_exit(omap_drm_fini);
 759
 760 MODULE_AUTHOR("Rob Clark <[email protected]>");
 761 MODULE_AUTHOR("Tomi Valkeinen <[email protected]>");
 762 MODULE_DESCRIPTION("OMAP DRM Display Driver");
 763 MODULE_ALIAS("platform:" DRIVER_NAME);
 764 MODULE_LICENSE("GPL v2");