drivers/scsi/pm8001/pm8001_sas.h

   1 /*
   2  * PMC-Sierra PM8001/8081/8088/8089 SAS/SATA based host adapters driver
   3  *
   4  * Copyright (c) 2008-2009 USI Co., Ltd.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions, and the following disclaimer,
  12  *    without modification.
  13  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  14  *    substantially similar to the "NO WARRANTY" disclaimer below
  15  *    ("Disclaimer") and any redistribution must be conditioned upon
  16  *    including a substantially similar Disclaimer requirement for further
  17  *    binary redistribution.
  18  * 3. Neither the names of the above-listed copyright holders nor the names
  19  *    of any contributors may be used to endorse or promote products derived
  20  *    from this software without specific prior written permission.
  21  *
  22  * Alternatively, this software may be distributed under the terms of the
  23  * GNU General Public License ("GPL") version 2 as published by the Free
  24  * Software Foundation.
  25  *
  26  * NO WARRANTY
  27  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  30  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  31  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  33  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  34  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  35  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  36  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  37  * POSSIBILITY OF SUCH DAMAGES.
  38  *
  39  */
  40
  41 #ifndef _PM8001_SAS_H_
  42 #define _PM8001_SAS_H_
  43
  44 #include <linux/kernel.h>
  45 #include <linux/module.h>
  46 #include <linux/spinlock.h>
  47 #include <linux/delay.h>
  48 #include <linux/types.h>
  49 #include <linux/ctype.h>
  50 #include <linux/dma-mapping.h>
  51 #include <linux/pci.h>
  52 #include <linux/interrupt.h>
  53 #include <linux/workqueue.h>
  54 #include <scsi/libsas.h>
  55 #include <scsi/scsi_tcq.h>
  56 #include <scsi/sas_ata.h>
  57 #include <linux/atomic.h>
  58 #include "pm8001_defs.h"
  59
  60 #define DRV_NAME                "pm80xx"
  61 #define DRV_VERSION             "0.1.39"
  62 #define PM8001_FAIL_LOGGING     0x01 /* Error message logging */
  63 #define PM8001_INIT_LOGGING     0x02 /* driver init logging */
  64 #define PM8001_DISC_LOGGING     0x04 /* discovery layer logging */
  65 #define PM8001_IO_LOGGING       0x08 /* I/O path logging */
  66 #define PM8001_EH_LOGGING       0x10 /* libsas EH function logging*/
  67 #define PM8001_IOCTL_LOGGING    0x20 /* IOCTL message logging */
  68 #define PM8001_MSG_LOGGING      0x40 /* misc message logging */
  69 #define PM8001_DEV_LOGGING      0x80 /* development message logging */
  70 #define PM8001_DEVIO_LOGGING    0x100 /* development io message logging */
  71 #define PM8001_IOERR_LOGGING    0x200 /* development io err message logging */
  72 #define pm8001_printk(format, arg...)   pr_info("%s:: %s  %d:" \
  73                         format, pm8001_ha->name, __func__, __LINE__, ## arg)
  74 #define PM8001_CHECK_LOGGING(HBA, LEVEL, CMD)   \
  75 do {                                            \
  76         if (unlikely(HBA->logging_level & LEVEL))       \
  77                 do {                                    \
  78                         CMD;                            \
  79                 } while (0);                            \
  80 } while (0);
  81
  82 #define PM8001_EH_DBG(HBA, CMD)                 \
  83         PM8001_CHECK_LOGGING(HBA, PM8001_EH_LOGGING, CMD)
  84
  85 #define PM8001_INIT_DBG(HBA, CMD)               \
  86         PM8001_CHECK_LOGGING(HBA, PM8001_INIT_LOGGING, CMD)
  87
  88 #define PM8001_DISC_DBG(HBA, CMD)               \
  89         PM8001_CHECK_LOGGING(HBA, PM8001_DISC_LOGGING, CMD)
  90
  91 #define PM8001_IO_DBG(HBA, CMD)         \
  92         PM8001_CHECK_LOGGING(HBA, PM8001_IO_LOGGING, CMD)
  93
  94 #define PM8001_FAIL_DBG(HBA, CMD)               \
  95         PM8001_CHECK_LOGGING(HBA, PM8001_FAIL_LOGGING, CMD)
  96
  97 #define PM8001_IOCTL_DBG(HBA, CMD)              \
  98         PM8001_CHECK_LOGGING(HBA, PM8001_IOCTL_LOGGING, CMD)
  99
 100 #define PM8001_MSG_DBG(HBA, CMD)                \
 101         PM8001_CHECK_LOGGING(HBA, PM8001_MSG_LOGGING, CMD)
 102
 103 #define PM8001_DEV_DBG(HBA, CMD)                \
 104         PM8001_CHECK_LOGGING(HBA, PM8001_DEV_LOGGING, CMD)
 105
 106 #define PM8001_DEVIO_DBG(HBA, CMD)              \
 107         PM8001_CHECK_LOGGING(HBA, PM8001_DEVIO_LOGGING, CMD)
 108
 109 #define PM8001_IOERR_DBG(HBA, CMD)              \
 110         PM8001_CHECK_LOGGING(HBA, PM8001_IOERR_LOGGING, CMD)
 111
 112 #define PM8001_USE_TASKLET
 113 #define PM8001_USE_MSIX
 114 #define PM8001_READ_VPD
 115
 116
 117 #define IS_SPCV_12G(dev)        ((dev->device == 0X8074)                \
 118                                 || (dev->device == 0X8076)              \
 119                                 || (dev->device == 0X8077)              \
 120                                 || (dev->device == 0X8070)              \
 121                                 || (dev->device == 0X8072))
 122
 123 #define PM8001_NAME_LENGTH              32/* generic length of strings */
 124 extern struct list_head hba_list;
 125 extern const struct pm8001_dispatch pm8001_8001_dispatch;
 126 extern const struct pm8001_dispatch pm8001_80xx_dispatch;
 127
 128 struct pm8001_hba_info;
 129 struct pm8001_ccb_info;
 130 struct pm8001_device;
 131 /* define task management IU */
 132 struct pm8001_tmf_task {
 133         u8      tmf;
 134         u32     tag_of_task_to_be_managed;
 135 };
 136 struct pm8001_ioctl_payload {
 137         u32     signature;
 138         u16     major_function;
 139         u16     minor_function;
 140         u16     length;
 141         u16     status;
 142         u16     offset;
 143         u16     id;
 144         u8      *func_specific;
 145 };
 146
 147 #define MPI_FATAL_ERROR_TABLE_OFFSET_MASK 0xFFFFFF
 148 #define MPI_FATAL_ERROR_TABLE_SIZE(value) ((0xFF000000 & value) >> SHIFT24)
 149 #define MPI_FATAL_EDUMP_TABLE_LO_OFFSET            0x00     /* HNFBUFL */
 150 #define MPI_FATAL_EDUMP_TABLE_HI_OFFSET            0x04     /* HNFBUFH */
 151 #define MPI_FATAL_EDUMP_TABLE_LENGTH               0x08     /* HNFBLEN */
 152 #define MPI_FATAL_EDUMP_TABLE_HANDSHAKE            0x0C     /* FDDHSHK */
 153 #define MPI_FATAL_EDUMP_TABLE_STATUS               0x10     /* FDDTSTAT */
 154 #define MPI_FATAL_EDUMP_TABLE_ACCUM_LEN            0x14     /* ACCDDLEN */
 155 #define MPI_FATAL_EDUMP_TABLE_TOTAL_LEN            0x18     /* TOTALLEN */
 156 #define MPI_FATAL_EDUMP_TABLE_SIGNATURE            0x1C     /* SIGNITURE */
 157 #define MPI_FATAL_EDUMP_HANDSHAKE_RDY              0x1
 158 #define MPI_FATAL_EDUMP_HANDSHAKE_BUSY             0x0
 159 #define MPI_FATAL_EDUMP_TABLE_STAT_RSVD                 0x0
 160 #define MPI_FATAL_EDUMP_TABLE_STAT_DMA_FAILED           0x1
 161 #define MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_MORE_DATA 0x2
 162 #define MPI_FATAL_EDUMP_TABLE_STAT_NF_SUCCESS_DONE      0x3
 163 #define TYPE_GSM_SPACE        1
 164 #define TYPE_QUEUE            2
 165 #define TYPE_FATAL            3
 166 #define TYPE_NON_FATAL        4
 167 #define TYPE_INBOUND          1
 168 #define TYPE_OUTBOUND         2
 169 struct forensic_data {
 170         u32  data_type;
 171         union {
 172                 struct {
 173                         u32  direct_len;
 174                         u32  direct_offset;
 175                         void  *direct_data;
 176                 } gsm_buf;
 177                 struct {
 178                         u16  queue_type;
 179                         u16  queue_index;
 180                         u32  direct_len;
 181                         void  *direct_data;
 182                 } queue_buf;
 183                 struct {
 184                         u32  direct_len;
 185                         u32  direct_offset;
 186                         u32  read_len;
 187                         void  *direct_data;
 188                 } data_buf;
 189         };
 190 };
 191
 192 /* bit31-26 - mask bar */
 193 #define SCRATCH_PAD0_BAR_MASK                    0xFC000000
 194 /* bit25-0  - offset mask */
 195 #define SCRATCH_PAD0_OFFSET_MASK                 0x03FFFFFF
 196 /* if AAP error state */
 197 #define SCRATCH_PAD0_AAPERR_MASK                 0xFFFFFFFF
 198 /* Inbound doorbell bit7 */
 199 #define SPCv_MSGU_CFG_TABLE_NONFATAL_DUMP        0x80
 200 /* Inbound doorbell bit7 SPCV */
 201 #define SPCV_MSGU_CFG_TABLE_TRANSFER_DEBUG_INFO  0x80
 202 #define MAIN_MERRDCTO_MERRDCES                   0xA0/* DWORD 0x28) */
 203
 204 struct pm8001_dispatch {
 205         char *name;
 206         int (*chip_init)(struct pm8001_hba_info *pm8001_ha);
 207         int (*chip_soft_rst)(struct pm8001_hba_info *pm8001_ha);
 208         void (*chip_rst)(struct pm8001_hba_info *pm8001_ha);
 209         int (*chip_ioremap)(struct pm8001_hba_info *pm8001_ha);
 210         void (*chip_iounmap)(struct pm8001_hba_info *pm8001_ha);
 211         irqreturn_t (*isr)(struct pm8001_hba_info *pm8001_ha, u8 vec);
 212         u32 (*is_our_interrupt)(struct pm8001_hba_info *pm8001_ha);
 213         int (*isr_process_oq)(struct pm8001_hba_info *pm8001_ha, u8 vec);
 214         void (*interrupt_enable)(struct pm8001_hba_info *pm8001_ha, u8 vec);
 215         void (*interrupt_disable)(struct pm8001_hba_info *pm8001_ha, u8 vec);
 216         void (*make_prd)(struct scatterlist *scatter, int nr, void *prd);
 217         int (*smp_req)(struct pm8001_hba_info *pm8001_ha,
 218                 struct pm8001_ccb_info *ccb);
 219         int (*ssp_io_req)(struct pm8001_hba_info *pm8001_ha,
 220                 struct pm8001_ccb_info *ccb);
 221         int (*sata_req)(struct pm8001_hba_info *pm8001_ha,
 222                 struct pm8001_ccb_info *ccb);
 223         int (*phy_start_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
 224         int (*phy_stop_req)(struct pm8001_hba_info *pm8001_ha, u8 phy_id);
 225         int (*reg_dev_req)(struct pm8001_hba_info *pm8001_ha,
 226                 struct pm8001_device *pm8001_dev, u32 flag);
 227         int (*dereg_dev_req)(struct pm8001_hba_info *pm8001_ha, u32 device_id);
 228         int (*phy_ctl_req)(struct pm8001_hba_info *pm8001_ha,
 229                 u32 phy_id, u32 phy_op);
 230         int (*task_abort)(struct pm8001_hba_info *pm8001_ha,
 231                 struct pm8001_device *pm8001_dev, u8 flag, u32 task_tag,
 232                 u32 cmd_tag);
 233         int (*ssp_tm_req)(struct pm8001_hba_info *pm8001_ha,
 234                 struct pm8001_ccb_info *ccb, struct pm8001_tmf_task *tmf);
 235         int (*get_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
 236         int (*set_nvmd_req)(struct pm8001_hba_info *pm8001_ha, void *payload);
 237         int (*fw_flash_update_req)(struct pm8001_hba_info *pm8001_ha,
 238                 void *payload);
 239         int (*set_dev_state_req)(struct pm8001_hba_info *pm8001_ha,
 240                 struct pm8001_device *pm8001_dev, u32 state);
 241         int (*sas_diag_start_end_req)(struct pm8001_hba_info *pm8001_ha,
 242                 u32 state);
 243         int (*sas_diag_execute_req)(struct pm8001_hba_info *pm8001_ha,
 244                 u32 state);
 245         int (*sas_re_init_req)(struct pm8001_hba_info *pm8001_ha);
 246 };
 247
 248 struct pm8001_chip_info {
 249         u32     encrypt;
 250         u32     n_phy;
 251         const struct pm8001_dispatch    *dispatch;
 252 };
 253 #define PM8001_CHIP_DISP        (pm8001_ha->chip->dispatch)
 254
 255 struct pm8001_port {
 256         struct asd_sas_port     sas_port;
 257         u8                      port_attached;
 258         u16                     wide_port_phymap;
 259         u8                      port_state;
 260         struct list_head        list;
 261 };
 262
 263 struct pm8001_phy {
 264         struct pm8001_hba_info  *pm8001_ha;
 265         struct pm8001_port      *port;
 266         struct asd_sas_phy      sas_phy;
 267         struct sas_identify     identify;
 268         struct scsi_device      *sdev;
 269         u64                     dev_sas_addr;
 270         u32                     phy_type;
 271         struct completion       *enable_completion;
 272         u32                     frame_rcvd_size;
 273         u8                      frame_rcvd[32];
 274         u8                      phy_attached;
 275         u8                      phy_state;
 276         enum sas_linkrate       minimum_linkrate;
 277         enum sas_linkrate       maximum_linkrate;
 278         struct completion       *reset_completion;
 279         bool                    port_reset_status;
 280         bool                    reset_success;
 281 };
 282
 283 /* port reset status */
 284 #define PORT_RESET_SUCCESS      0x00
 285 #define PORT_RESET_TMO          0x01
 286
 287 struct pm8001_device {
 288         enum sas_device_type    dev_type;
 289         struct domain_device    *sas_device;
 290         u32                     attached_phy;
 291         u32                     id;
 292         struct completion       *dcompletion;
 293         struct completion       *setds_completion;
 294         u32                     device_id;
 295         u32                     running_req;
 296 };
 297
 298 struct pm8001_prd_imt {
 299         __le32                  len;
 300         __le32                  e;
 301 };
 302
 303 struct pm8001_prd {
 304         __le64                  addr;           /* 64-bit buffer address */
 305         struct pm8001_prd_imt   im_len;         /* 64-bit length */
 306 } __attribute__ ((packed));
 307 /*
 308  * CCB(Command Control Block)
 309  */
 310 struct pm8001_ccb_info {
 311         struct list_head        entry;
 312         struct sas_task         *task;
 313         u32                     n_elem;
 314         u32                     ccb_tag;
 315         dma_addr_t              ccb_dma_handle;
 316         struct pm8001_device    *device;
 317         struct pm8001_prd       buf_prd[PM8001_MAX_DMA_SG];
 318         struct fw_control_ex    *fw_control_context;
 319         u8                      open_retry;
 320 };
 321
 322 struct mpi_mem {
 323         void                    *virt_ptr;
 324         dma_addr_t              phys_addr;
 325         u32                     phys_addr_hi;
 326         u32                     phys_addr_lo;
 327         u32                     total_len;
 328         u32                     num_elements;
 329         u32                     element_size;
 330         u32                     alignment;
 331 };
 332
 333 struct mpi_mem_req {
 334         /* The number of element in the  mpiMemory array */
 335         u32                     count;
 336         /* The array of structures that define memroy regions*/
 337         struct mpi_mem          region[USI_MAX_MEMCNT];
 338 };
 339
 340 struct encrypt {
 341         u32     cipher_mode;
 342         u32     sec_mode;
 343         u32     status;
 344         u32     flag;
 345 };
 346
 347 struct sas_phy_attribute_table {
 348         u32     phystart1_16[16];
 349         u32     outbound_hw_event_pid1_16[16];
 350 };
 351
 352 union main_cfg_table {
 353         struct {
 354         u32                     signature;
 355         u32                     interface_rev;
 356         u32                     firmware_rev;
 357         u32                     max_out_io;
 358         u32                     max_sgl;
 359         u32                     ctrl_cap_flag;
 360         u32                     gst_offset;
 361         u32                     inbound_queue_offset;
 362         u32                     outbound_queue_offset;
 363         u32                     inbound_q_nppd_hppd;
 364         u32                     outbound_hw_event_pid0_3;
 365         u32                     outbound_hw_event_pid4_7;
 366         u32                     outbound_ncq_event_pid0_3;
 367         u32                     outbound_ncq_event_pid4_7;
 368         u32                     outbound_tgt_ITNexus_event_pid0_3;
 369         u32                     outbound_tgt_ITNexus_event_pid4_7;
 370         u32                     outbound_tgt_ssp_event_pid0_3;
 371         u32                     outbound_tgt_ssp_event_pid4_7;
 372         u32                     outbound_tgt_smp_event_pid0_3;
 373         u32                     outbound_tgt_smp_event_pid4_7;
 374         u32                     upper_event_log_addr;
 375         u32                     lower_event_log_addr;
 376         u32                     event_log_size;
 377         u32                     event_log_option;
 378         u32                     upper_iop_event_log_addr;
 379         u32                     lower_iop_event_log_addr;
 380         u32                     iop_event_log_size;
 381         u32                     iop_event_log_option;
 382         u32                     fatal_err_interrupt;
 383         u32                     fatal_err_dump_offset0;
 384         u32                     fatal_err_dump_length0;
 385         u32                     fatal_err_dump_offset1;
 386         u32                     fatal_err_dump_length1;
 387         u32                     hda_mode_flag;
 388         u32                     anolog_setup_table_offset;
 389         u32                     rsvd[4];
 390         } pm8001_tbl;
 391
 392         struct {
 393         u32                     signature;
 394         u32                     interface_rev;
 395         u32                     firmware_rev;
 396         u32                     max_out_io;
 397         u32                     max_sgl;
 398         u32                     ctrl_cap_flag;
 399         u32                     gst_offset;
 400         u32                     inbound_queue_offset;
 401         u32                     outbound_queue_offset;
 402         u32                     inbound_q_nppd_hppd;
 403         u32                     rsvd[8];
 404         u32                     crc_core_dump;
 405         u32                     rsvd1;
 406         u32                     upper_event_log_addr;
 407         u32                     lower_event_log_addr;
 408         u32                     event_log_size;
 409         u32                     event_log_severity;
 410         u32                     upper_pcs_event_log_addr;
 411         u32                     lower_pcs_event_log_addr;
 412         u32                     pcs_event_log_size;
 413         u32                     pcs_event_log_severity;
 414         u32                     fatal_err_interrupt;
 415         u32                     fatal_err_dump_offset0;
 416         u32                     fatal_err_dump_length0;
 417         u32                     fatal_err_dump_offset1;
 418         u32                     fatal_err_dump_length1;
 419         u32                     gpio_led_mapping;
 420         u32                     analog_setup_table_offset;
 421         u32                     int_vec_table_offset;
 422         u32                     phy_attr_table_offset;
 423         u32                     port_recovery_timer;
 424         u32                     interrupt_reassertion_delay;
 425         u32                     fatal_n_non_fatal_dump;         /* 0x28 */
 426         u32                     ila_version;
 427         u32                     inc_fw_version;
 428         } pm80xx_tbl;
 429 };
 430
 431 union general_status_table {
 432         struct {
 433         u32                     gst_len_mpistate;
 434         u32                     iq_freeze_state0;
 435         u32                     iq_freeze_state1;
 436         u32                     msgu_tcnt;
 437         u32                     iop_tcnt;
 438         u32                     rsvd;
 439         u32                     phy_state[8];
 440         u32                     gpio_input_val;
 441         u32                     rsvd1[2];
 442         u32                     recover_err_info[8];
 443         } pm8001_tbl;
 444         struct {
 445         u32                     gst_len_mpistate;
 446         u32                     iq_freeze_state0;
 447         u32                     iq_freeze_state1;
 448         u32                     msgu_tcnt;
 449         u32                     iop_tcnt;
 450         u32                     rsvd[9];
 451         u32                     gpio_input_val;
 452         u32                     rsvd1[2];
 453         u32                     recover_err_info[8];
 454         } pm80xx_tbl;
 455 };
 456 struct inbound_queue_table {
 457         u32                     element_pri_size_cnt;
 458         u32                     upper_base_addr;
 459         u32                     lower_base_addr;
 460         u32                     ci_upper_base_addr;
 461         u32                     ci_lower_base_addr;
 462         u32                     pi_pci_bar;
 463         u32                     pi_offset;
 464         u32                     total_length;
 465         void                    *base_virt;
 466         void                    *ci_virt;
 467         u32                     reserved;
 468         __le32                  consumer_index;
 469         u32                     producer_idx;
 470 };
 471 struct outbound_queue_table {
 472         u32                     element_size_cnt;
 473         u32                     upper_base_addr;
 474         u32                     lower_base_addr;
 475         void                    *base_virt;
 476         u32                     pi_upper_base_addr;
 477         u32                     pi_lower_base_addr;
 478         u32                     ci_pci_bar;
 479         u32                     ci_offset;
 480         u32                     total_length;
 481         void                    *pi_virt;
 482         u32                     interrup_vec_cnt_delay;
 483         u32                     dinterrup_to_pci_offset;
 484         __le32                  producer_index;
 485         u32                     consumer_idx;
 486 };
 487 struct pm8001_hba_memspace {
 488         void __iomem            *memvirtaddr;
 489         u64                     membase;
 490         u32                     memsize;
 491 };
 492 struct isr_param {
 493         struct pm8001_hba_info *drv_inst;
 494         u32 irq_id;
 495 };
 496 struct pm8001_hba_info {
 497         char                    name[PM8001_NAME_LENGTH];
 498         struct list_head        list;
 499         unsigned long           flags;
 500         spinlock_t              lock;/* host-wide lock */
 501         spinlock_t              bitmap_lock;
 502         struct pci_dev          *pdev;/* our device */
 503         struct device           *dev;
 504         struct pm8001_hba_memspace io_mem[6];
 505         struct mpi_mem_req      memoryMap;
 506         struct encrypt          encrypt_info; /* support encryption */
 507         struct forensic_data    forensic_info;
 508         u32                     fatal_bar_loc;
 509         u32                     forensic_last_offset;
 510         u32                     fatal_forensic_shift_offset;
 511         u32                     forensic_fatal_step;
 512         u32                     forensic_preserved_accumulated_transfer;
 513         u32                     evtlog_ib_offset;
 514         u32                     evtlog_ob_offset;
 515         void __iomem    *msg_unit_tbl_addr;/*Message Unit Table Addr*/
 516         void __iomem    *main_cfg_tbl_addr;/*Main Config Table Addr*/
 517         void __iomem    *general_stat_tbl_addr;/*General Status Table Addr*/
 518         void __iomem    *inbnd_q_tbl_addr;/*Inbound Queue Config Table Addr*/
 519         void __iomem    *outbnd_q_tbl_addr;/*Outbound Queue Config Table Addr*/
 520         void __iomem    *pspa_q_tbl_addr;
 521                         /*MPI SAS PHY attributes Queue Config Table Addr*/
 522         void __iomem    *ivt_tbl_addr; /*MPI IVT Table Addr */
 523         void __iomem    *fatal_tbl_addr; /*MPI IVT Table Addr */
 524         union main_cfg_table    main_cfg_tbl;
 525         union general_status_table      gs_tbl;
 526         struct inbound_queue_table      inbnd_q_tbl[PM8001_MAX_SPCV_INB_NUM];
 527         struct outbound_queue_table     outbnd_q_tbl[PM8001_MAX_SPCV_OUTB_NUM];
 528         struct sas_phy_attribute_table  phy_attr_table;
 529                                         /* MPI SAS PHY attributes */
 530         u8                      sas_addr[SAS_ADDR_SIZE];
 531         struct sas_ha_struct    *sas;/* SCSI/SAS glue */
 532         struct Scsi_Host        *shost;
 533         u32                     chip_id;
 534         const struct pm8001_chip_info   *chip;
 535         struct completion       *nvmd_completion;
 536         int                     tags_num;
 537         unsigned long           *tags;
 538         struct pm8001_phy       phy[PM8001_MAX_PHYS];
 539         struct pm8001_port      port[PM8001_MAX_PHYS];
 540         u32                     id;
 541         u32                     irq;
 542         u32                     iomb_size; /* SPC and SPCV IOMB size */
 543         struct pm8001_device    *devices;
 544         struct pm8001_ccb_info  *ccb_info;
 545 #ifdef PM8001_USE_MSIX
 546         int                     number_of_intr;/*will be used in remove()*/
 547         char                    intr_drvname[PM8001_MAX_MSIX_VEC]
 548                                 [PM8001_NAME_LENGTH+1+3+1];
 549 #endif
 550 #ifdef PM8001_USE_TASKLET
 551         struct tasklet_struct   tasklet[PM8001_MAX_MSIX_VEC];
 552 #endif
 553         u32                     logging_level;
 554         u32                     link_rate;
 555         u32                     fw_status;
 556         u32                     smp_exp_mode;
 557         bool                    controller_fatal_error;
 558         const struct firmware   *fw_image;
 559         struct isr_param irq_vector[PM8001_MAX_MSIX_VEC];
 560         u32                     reset_in_progress;
 561 };
 562
 563 struct pm8001_work {
 564         struct work_struct work;
 565         struct pm8001_hba_info *pm8001_ha;
 566         void *data;
 567         int handler;
 568 };
 569
 570 struct pm8001_fw_image_header {
 571         u8 vender_id[8];
 572         u8 product_id;
 573         u8 hardware_rev;
 574         u8 dest_partition;
 575         u8 reserved;
 576         u8 fw_rev[4];
 577         __be32  image_length;
 578         __be32 image_crc;
 579         __be32 startup_entry;
 580 } __attribute__((packed, aligned(4)));
 581
 582
 583 /**
 584  * FW Flash Update status values
 585  */
 586 #define FLASH_UPDATE_COMPLETE_PENDING_REBOOT    0x00
 587 #define FLASH_UPDATE_IN_PROGRESS                0x01
 588 #define FLASH_UPDATE_HDR_ERR                    0x02
 589 #define FLASH_UPDATE_OFFSET_ERR                 0x03
 590 #define FLASH_UPDATE_CRC_ERR                    0x04
 591 #define FLASH_UPDATE_LENGTH_ERR                 0x05
 592 #define FLASH_UPDATE_HW_ERR                     0x06
 593 #define FLASH_UPDATE_DNLD_NOT_SUPPORTED         0x10
 594 #define FLASH_UPDATE_DISABLED                   0x11
 595
 596 #define NCQ_READ_LOG_FLAG                       0x80000000
 597 #define NCQ_ABORT_ALL_FLAG                      0x40000000
 598 #define NCQ_2ND_RLE_FLAG                        0x20000000
 599
 600 /* Device states */
 601 #define DS_OPERATIONAL                          0x01
 602 #define DS_PORT_IN_RESET                        0x02
 603 #define DS_IN_RECOVERY                          0x03
 604 #define DS_IN_ERROR                             0x04
 605 #define DS_NON_OPERATIONAL                      0x07
 606
 607 /**
 608  * brief param structure for firmware flash update.
 609  */
 610 struct fw_flash_updata_info {
 611         u32                     cur_image_offset;
 612         u32                     cur_image_len;
 613         u32                     total_image_len;
 614         struct pm8001_prd       sgl;
 615 };
 616
 617 struct fw_control_info {
 618         u32                     retcode;/*ret code (status)*/
 619         u32                     phase;/*ret code phase*/
 620         u32                     phaseCmplt;/*percent complete for the current
 621         update phase */
 622         u32                     version;/*Hex encoded firmware version number*/
 623         u32                     offset;/*Used for downloading firmware  */
 624         u32                     len; /*len of buffer*/
 625         u32                     size;/* Used in OS VPD and Trace get size
 626         operations.*/
 627         u32                     reserved;/* padding required for 64 bit
 628         alignment */
 629         u8                      buffer[1];/* Start of buffer */
 630 };
 631 struct fw_control_ex {
 632         struct fw_control_info *fw_control;
 633         void                    *buffer;/* keep buffer pointer to be
 634         freed when the response comes*/
 635         void                    *virtAddr;/* keep virtual address of the data */
 636         void                    *usrAddr;/* keep virtual address of the
 637         user data */
 638         dma_addr_t              phys_addr;
 639         u32                     len; /* len of buffer  */
 640         void                    *payload; /* pointer to IOCTL Payload */
 641         u8                      inProgress;/*if 1 - the IOCTL request is in
 642         progress */
 643         void                    *param1;
 644         void                    *param2;
 645         void                    *param3;
 646 };
 647
 648 /* pm8001 workqueue */
 649 extern struct workqueue_struct *pm8001_wq;
 650
 651 /******************** function prototype *********************/
 652 int pm8001_tag_alloc(struct pm8001_hba_info *pm8001_ha, u32 *tag_out);
 653 void pm8001_tag_init(struct pm8001_hba_info *pm8001_ha);
 654 u32 pm8001_get_ncq_tag(struct sas_task *task, u32 *tag);
 655 void pm8001_ccb_task_free(struct pm8001_hba_info *pm8001_ha,
 656         struct sas_task *task, struct pm8001_ccb_info *ccb, u32 ccb_idx);
 657 int pm8001_phy_control(struct asd_sas_phy *sas_phy, enum phy_func func,
 658         void *funcdata);
 659 void pm8001_scan_start(struct Scsi_Host *shost);
 660 int pm8001_scan_finished(struct Scsi_Host *shost, unsigned long time);
 661 int pm8001_queue_command(struct sas_task *task, gfp_t gfp_flags);
 662 int pm8001_abort_task(struct sas_task *task);
 663 int pm8001_abort_task_set(struct domain_device *dev, u8 *lun);
 664 int pm8001_clear_aca(struct domain_device *dev, u8 *lun);
 665 int pm8001_clear_task_set(struct domain_device *dev, u8 *lun);
 666 int pm8001_dev_found(struct domain_device *dev);
 667 void pm8001_dev_gone(struct domain_device *dev);
 668 int pm8001_lu_reset(struct domain_device *dev, u8 *lun);
 669 int pm8001_I_T_nexus_reset(struct domain_device *dev);
 670 int pm8001_I_T_nexus_event_handler(struct domain_device *dev);
 671 int pm8001_query_task(struct sas_task *task);
 672 void pm8001_open_reject_retry(
 673         struct pm8001_hba_info *pm8001_ha,
 674         struct sas_task *task_to_close,
 675         struct pm8001_device *device_to_close);
 676 int pm8001_mem_alloc(struct pci_dev *pdev, void **virt_addr,
 677         dma_addr_t *pphys_addr, u32 *pphys_addr_hi, u32 *pphys_addr_lo,
 678         u32 mem_size, u32 align);
 679
 680 void pm8001_chip_iounmap(struct pm8001_hba_info *pm8001_ha);
 681 int pm8001_mpi_build_cmd(struct pm8001_hba_info *pm8001_ha,
 682                         struct inbound_queue_table *circularQ,
 683                         u32 opCode, void *payload, size_t nb,
 684                         u32 responseQueue);
 685 int pm8001_mpi_msg_free_get(struct inbound_queue_table *circularQ,
 686                                 u16 messageSize, void **messagePtr);
 687 u32 pm8001_mpi_msg_free_set(struct pm8001_hba_info *pm8001_ha, void *pMsg,
 688                         struct outbound_queue_table *circularQ, u8 bc);
 689 u32 pm8001_mpi_msg_consume(struct pm8001_hba_info *pm8001_ha,
 690                         struct outbound_queue_table *circularQ,
 691                         void **messagePtr1, u8 *pBC);
 692 int pm8001_chip_set_dev_state_req(struct pm8001_hba_info *pm8001_ha,
 693                         struct pm8001_device *pm8001_dev, u32 state);
 694 int pm8001_chip_fw_flash_update_req(struct pm8001_hba_info *pm8001_ha,
 695                                         void *payload);
 696 int pm8001_chip_fw_flash_update_build(struct pm8001_hba_info *pm8001_ha,
 697                                         void *fw_flash_updata_info, u32 tag);
 698 int pm8001_chip_set_nvmd_req(struct pm8001_hba_info *pm8001_ha, void *payload);
 699 int pm8001_chip_get_nvmd_req(struct pm8001_hba_info *pm8001_ha, void *payload);
 700 int pm8001_chip_ssp_tm_req(struct pm8001_hba_info *pm8001_ha,
 701                                 struct pm8001_ccb_info *ccb,
 702                                 struct pm8001_tmf_task *tmf);
 703 int pm8001_chip_abort_task(struct pm8001_hba_info *pm8001_ha,
 704                                 struct pm8001_device *pm8001_dev,
 705                                 u8 flag, u32 task_tag, u32 cmd_tag);
 706 int pm8001_chip_dereg_dev_req(struct pm8001_hba_info *pm8001_ha, u32 device_id);
 707 void pm8001_chip_make_sg(struct scatterlist *scatter, int nr, void *prd);
 708 void pm8001_work_fn(struct work_struct *work);
 709 int pm8001_handle_event(struct pm8001_hba_info *pm8001_ha,
 710                                         void *data, int handler);
 711 void pm8001_mpi_set_dev_state_resp(struct pm8001_hba_info *pm8001_ha,
 712                                                         void *piomb);
 713 void pm8001_mpi_set_nvmd_resp(struct pm8001_hba_info *pm8001_ha,
 714                                                         void *piomb);
 715 void pm8001_mpi_get_nvmd_resp(struct pm8001_hba_info *pm8001_ha,
 716                                                         void *piomb);
 717 int pm8001_mpi_local_phy_ctl(struct pm8001_hba_info *pm8001_ha,
 718                                                         void *piomb);
 719 void pm8001_get_lrate_mode(struct pm8001_phy *phy, u8 link_rate);
 720 void pm8001_get_attached_sas_addr(struct pm8001_phy *phy, u8 *sas_addr);
 721 void pm8001_bytes_dmaed(struct pm8001_hba_info *pm8001_ha, int i);
 722 int pm8001_mpi_reg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
 723 int pm8001_mpi_dereg_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
 724 int pm8001_mpi_fw_flash_update_resp(struct pm8001_hba_info *pm8001_ha,
 725                                                         void *piomb);
 726 int pm8001_mpi_general_event(struct pm8001_hba_info *pm8001_ha , void *piomb);
 727 int pm8001_mpi_task_abort_resp(struct pm8001_hba_info *pm8001_ha, void *piomb);
 728 struct sas_task *pm8001_alloc_task(void);
 729 void pm8001_task_done(struct sas_task *task);
 730 void pm8001_free_task(struct sas_task *task);
 731 void pm8001_tag_free(struct pm8001_hba_info *pm8001_ha, u32 tag);
 732 struct pm8001_device *pm8001_find_dev(struct pm8001_hba_info *pm8001_ha,
 733                                         u32 device_id);
 734 int pm80xx_set_thermal_config(struct pm8001_hba_info *pm8001_ha);
 735
 736 int pm8001_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue);
 737 void pm8001_set_phy_profile(struct pm8001_hba_info *pm8001_ha,
 738         u32 length, u8 *buf);
 739 void pm8001_set_phy_profile_single(struct pm8001_hba_info *pm8001_ha,
 740                 u32 phy, u32 length, u32 *buf);
 741 int pm80xx_bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue);
 742 ssize_t pm80xx_get_fatal_dump(struct device *cdev,
 743                 struct device_attribute *attr, char *buf);
 744 ssize_t pm8001_get_gsm_dump(struct device *cdev, u32, char *buf);
 745 /* ctl shared API */
 746 extern struct device_attribute *pm8001_host_attrs[];
 747
 748 static inline void
 749 pm8001_ccb_task_free_done(struct pm8001_hba_info *pm8001_ha,
 750                         struct sas_task *task, struct pm8001_ccb_info *ccb,
 751                         u32 ccb_idx)
 752 {
 753         pm8001_ccb_task_free(pm8001_ha, task, ccb, ccb_idx);
 754         smp_mb(); /*in order to force CPU ordering*/
 755         spin_unlock(&pm8001_ha->lock);
 756         task->task_done(task);
 757         spin_lock(&pm8001_ha->lock);
 758 }
 759
 760 #endif
 761