drivers/acpi/pci_root.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  *  pci_root.c - ACPI PCI Root Bridge Driver ($Revision: 40 $)
   4  *
   5  *  Copyright (C) 2001, 2002 Andy Grover <[email protected]>
   6  *  Copyright (C) 2001, 2002 Paul Diefenbaugh <[email protected]>
   7  */
   8
   9 #define pr_fmt(fmt) "ACPI: " fmt
  10
  11 #include <linux/kernel.h>
  12 #include <linux/module.h>
  13 #include <linux/init.h>
  14 #include <linux/types.h>
  15 #include <linux/mutex.h>
  16 #include <linux/pm.h>
  17 #include <linux/pm_runtime.h>
  18 #include <linux/pci.h>
  19 #include <linux/pci-acpi.h>
  20 #include <linux/dmar.h>
  21 #include <linux/acpi.h>
  22 #include <linux/slab.h>
  23 #include <linux/dmi.h>
  24 #include <linux/platform_data/x86/apple.h>
  25 #include <acpi/apei.h>  /* for acpi_hest_init() */
  26
  27 #include "internal.h"
  28
  29 #define ACPI_PCI_ROOT_CLASS             "pci_bridge"
  30 #define ACPI_PCI_ROOT_DEVICE_NAME       "PCI Root Bridge"
  31 static int acpi_pci_root_add(struct acpi_device *device,
  32                              const struct acpi_device_id *not_used);
  33 static void acpi_pci_root_remove(struct acpi_device *device);
  34
  35 static int acpi_pci_root_scan_dependent(struct acpi_device *adev)
  36 {
  37         acpiphp_check_host_bridge(adev);
  38         return 0;
  39 }
  40
  41 #define ACPI_PCIE_REQ_SUPPORT (OSC_PCI_EXT_CONFIG_SUPPORT \
  42                                 | OSC_PCI_ASPM_SUPPORT \
  43                                 | OSC_PCI_CLOCK_PM_SUPPORT \
  44                                 | OSC_PCI_MSI_SUPPORT)
  45
  46 static const struct acpi_device_id root_device_ids[] = {
  47         {"PNP0A03", 0},
  48         {"", 0},
  49 };
  50
  51 static struct acpi_scan_handler pci_root_handler = {
  52         .ids = root_device_ids,
  53         .attach = acpi_pci_root_add,
  54         .detach = acpi_pci_root_remove,
  55         .hotplug = {
  56                 .enabled = true,
  57                 .scan_dependent = acpi_pci_root_scan_dependent,
  58         },
  59 };
  60
  61 /**
  62  * acpi_is_root_bridge - determine whether an ACPI CA node is a PCI root bridge
  63  * @handle:  the ACPI CA node in question.
  64  *
  65  * Note: we could make this API take a struct acpi_device * instead, but
  66  * for now, it's more convenient to operate on an acpi_handle.
  67  */
  68 int acpi_is_root_bridge(acpi_handle handle)
  69 {
  70         struct acpi_device *device = acpi_fetch_acpi_dev(handle);
  71         int ret;
  72
  73         if (!device)
  74                 return 0;
  75
  76         ret = acpi_match_device_ids(device, root_device_ids);
  77         if (ret)
  78                 return 0;
  79         else
  80                 return 1;
  81 }
  82 EXPORT_SYMBOL_GPL(acpi_is_root_bridge);
  83
  84 static acpi_status
  85 get_root_bridge_busnr_callback(struct acpi_resource *resource, void *data)
  86 {
  87         struct resource *res = data;
  88         struct acpi_resource_address64 address;
  89         acpi_status status;
  90
  91         status = acpi_resource_to_address64(resource, &address);
  92         if (ACPI_FAILURE(status))
  93                 return AE_OK;
  94
  95         if ((address.address.address_length > 0) &&
  96             (address.resource_type == ACPI_BUS_NUMBER_RANGE)) {
  97                 res->start = address.address.minimum;
  98                 res->end = address.address.minimum + address.address.address_length - 1;
  99         }
 100
 101         return AE_OK;
 102 }
 103
 104 static acpi_status try_get_root_bridge_busnr(acpi_handle handle,
 105                                              struct resource *res)
 106 {
 107         acpi_status status;
 108
 109         res->start = -1;
 110         status =
 111             acpi_walk_resources(handle, METHOD_NAME__CRS,
 112                                 get_root_bridge_busnr_callback, res);
 113         if (ACPI_FAILURE(status))
 114                 return status;
 115         if (res->start == -1)
 116                 return AE_ERROR;
 117         return AE_OK;
 118 }
 119
 120 struct pci_osc_bit_struct {
 121         u32 bit;
 122         char *desc;
 123 };
 124
 125 static struct pci_osc_bit_struct pci_osc_support_bit[] = {
 126         { OSC_PCI_EXT_CONFIG_SUPPORT, "ExtendedConfig" },
 127         { OSC_PCI_ASPM_SUPPORT, "ASPM" },
 128         { OSC_PCI_CLOCK_PM_SUPPORT, "ClockPM" },
 129         { OSC_PCI_SEGMENT_GROUPS_SUPPORT, "Segments" },
 130         { OSC_PCI_MSI_SUPPORT, "MSI" },
 131         { OSC_PCI_EDR_SUPPORT, "EDR" },
 132         { OSC_PCI_HPX_TYPE_3_SUPPORT, "HPX-Type3" },
 133 };
 134
 135 static struct pci_osc_bit_struct pci_osc_control_bit[] = {
 136         { OSC_PCI_EXPRESS_NATIVE_HP_CONTROL, "PCIeHotplug" },
 137         { OSC_PCI_SHPC_NATIVE_HP_CONTROL, "SHPCHotplug" },
 138         { OSC_PCI_EXPRESS_PME_CONTROL, "PME" },
 139         { OSC_PCI_EXPRESS_AER_CONTROL, "AER" },
 140         { OSC_PCI_EXPRESS_CAPABILITY_CONTROL, "PCIeCapability" },
 141         { OSC_PCI_EXPRESS_LTR_CONTROL, "LTR" },
 142         { OSC_PCI_EXPRESS_DPC_CONTROL, "DPC" },
 143 };
 144
 145 static void decode_osc_bits(struct acpi_pci_root *root, char *msg, u32 word,
 146                             struct pci_osc_bit_struct *table, int size)
 147 {
 148         char buf[80];
 149         int i, len = 0;
 150         struct pci_osc_bit_struct *entry;
 151
 152         buf[0] = '\0';
 153         for (i = 0, entry = table; i < size; i++, entry++)
 154                 if (word & entry->bit)
 155                         len += scnprintf(buf + len, sizeof(buf) - len, "%s%s",
 156                                         len ? " " : "", entry->desc);
 157
 158         dev_info(&root->device->dev, "_OSC: %s [%s]\n", msg, buf);
 159 }
 160
 161 static void decode_osc_support(struct acpi_pci_root *root, char *msg, u32 word)
 162 {
 163         decode_osc_bits(root, msg, word, pci_osc_support_bit,
 164                         ARRAY_SIZE(pci_osc_support_bit));
 165 }
 166
 167 static void decode_osc_control(struct acpi_pci_root *root, char *msg, u32 word)
 168 {
 169         decode_osc_bits(root, msg, word, pci_osc_control_bit,
 170                         ARRAY_SIZE(pci_osc_control_bit));
 171 }
 172
 173 static u8 pci_osc_uuid_str[] = "33DB4D5B-1FF7-401C-9657-7441C03DD766";
 174
 175 static acpi_status acpi_pci_run_osc(acpi_handle handle,
 176                                     const u32 *capbuf, u32 *retval)
 177 {
 178         struct acpi_osc_context context = {
 179                 .uuid_str = pci_osc_uuid_str,
 180                 .rev = 1,
 181                 .cap.length = 12,
 182                 .cap.pointer = (void *)capbuf,
 183         };
 184         acpi_status status;
 185
 186         status = acpi_run_osc(handle, &context);
 187         if (ACPI_SUCCESS(status)) {
 188                 *retval = *((u32 *)(context.ret.pointer + 8));
 189                 kfree(context.ret.pointer);
 190         }
 191         return status;
 192 }
 193
 194 static acpi_status acpi_pci_query_osc(struct acpi_pci_root *root,
 195                                         u32 support,
 196                                         u32 *control)
 197 {
 198         acpi_status status;
 199         u32 result, capbuf[3];
 200
 201         support |= root->osc_support_set;
 202
 203         capbuf[OSC_QUERY_DWORD] = OSC_QUERY_ENABLE;
 204         capbuf[OSC_SUPPORT_DWORD] = support;
 205         capbuf[OSC_CONTROL_DWORD] = *control | root->osc_control_set;
 206
 207         status = acpi_pci_run_osc(root->device->handle, capbuf, &result);
 208         if (ACPI_SUCCESS(status)) {
 209                 root->osc_support_set = support;
 210                 *control = result;
 211         }
 212         return status;
 213 }
 214
 215 struct acpi_pci_root *acpi_pci_find_root(acpi_handle handle)
 216 {
 217         struct acpi_device *device = acpi_fetch_acpi_dev(handle);
 218         struct acpi_pci_root *root;
 219
 220         if (!device || acpi_match_device_ids(device, root_device_ids))
 221                 return NULL;
 222
 223         root = acpi_driver_data(device);
 224
 225         return root;
 226 }
 227 EXPORT_SYMBOL_GPL(acpi_pci_find_root);
 228
 229 struct acpi_handle_node {
 230         struct list_head node;
 231         acpi_handle handle;
 232 };
 233
 234 /**
 235  * acpi_get_pci_dev - convert ACPI CA handle to struct pci_dev
 236  * @handle: the handle in question
 237  *
 238  * Given an ACPI CA handle, the desired PCI device is located in the
 239  * list of PCI devices.
 240  *
 241  * If the device is found, its reference count is increased and this
 242  * function returns a pointer to its data structure.  The caller must
 243  * decrement the reference count by calling pci_dev_put().
 244  * If no device is found, %NULL is returned.
 245  */
 246 struct pci_dev *acpi_get_pci_dev(acpi_handle handle)
 247 {
 248         int dev, fn;
 249         unsigned long long adr;
 250         acpi_status status;
 251         acpi_handle phandle;
 252         struct pci_bus *pbus;
 253         struct pci_dev *pdev = NULL;
 254         struct acpi_handle_node *node, *tmp;
 255         struct acpi_pci_root *root;
 256         LIST_HEAD(device_list);
 257
 258         /*
 259          * Walk up the ACPI CA namespace until we reach a PCI root bridge.
 260          */
 261         phandle = handle;
 262         while (!acpi_is_root_bridge(phandle)) {
 263                 node = kzalloc(sizeof(struct acpi_handle_node), GFP_KERNEL);
 264                 if (!node)
 265                         goto out;
 266
 267                 INIT_LIST_HEAD(&node->node);
 268                 node->handle = phandle;
 269                 list_add(&node->node, &device_list);
 270
 271                 status = acpi_get_parent(phandle, &phandle);
 272                 if (ACPI_FAILURE(status))
 273                         goto out;
 274         }
 275
 276         root = acpi_pci_find_root(phandle);
 277         if (!root)
 278                 goto out;
 279
 280         pbus = root->bus;
 281
 282         /*
 283          * Now, walk back down the PCI device tree until we return to our
 284          * original handle. Assumes that everything between the PCI root
 285          * bridge and the device we're looking for must be a P2P bridge.
 286          */
 287         list_for_each_entry(node, &device_list, node) {
 288                 acpi_handle hnd = node->handle;
 289                 status = acpi_evaluate_integer(hnd, "_ADR", NULL, &adr);
 290                 if (ACPI_FAILURE(status))
 291                         goto out;
 292                 dev = (adr >> 16) & 0xffff;
 293                 fn  = adr & 0xffff;
 294
 295                 pdev = pci_get_slot(pbus, PCI_DEVFN(dev, fn));
 296                 if (!pdev || hnd == handle)
 297                         break;
 298
 299                 pbus = pdev->subordinate;
 300                 pci_dev_put(pdev);
 301
 302                 /*
 303                  * This function may be called for a non-PCI device that has a
 304                  * PCI parent (eg. a disk under a PCI SATA controller).  In that
 305                  * case pdev->subordinate will be NULL for the parent.
 306                  */
 307                 if (!pbus) {
 308                         dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n");
 309                         pdev = NULL;
 310                         break;
 311                 }
 312         }
 313 out:
 314         list_for_each_entry_safe(node, tmp, &device_list, node)
 315                 kfree(node);
 316
 317         return pdev;
 318 }
 319 EXPORT_SYMBOL_GPL(acpi_get_pci_dev);
 320
 321 /**
 322  * acpi_pci_osc_control_set - Request control of PCI root _OSC features.
 323  * @handle: ACPI handle of a PCI root bridge (or PCIe Root Complex).
 324  * @mask: Mask of _OSC bits to request control of, place to store control mask.
 325  * @support: _OSC supported capability.
 326  *
 327  * Run _OSC query for @mask and if that is successful, compare the returned
 328  * mask of control bits with @req.  If all of the @req bits are set in the
 329  * returned mask, run _OSC request for it.
 330  *
 331  * The variable at the @mask address may be modified regardless of whether or
 332  * not the function returns success.  On success it will contain the mask of
 333  * _OSC bits the BIOS has granted control of, but its contents are meaningless
 334  * on failure.
 335  **/
 336 static acpi_status acpi_pci_osc_control_set(acpi_handle handle, u32 *mask, u32 support)
 337 {
 338         u32 req = OSC_PCI_EXPRESS_CAPABILITY_CONTROL;
 339         struct acpi_pci_root *root;
 340         acpi_status status;
 341         u32 ctrl, capbuf[3];
 342
 343         if (!mask)
 344                 return AE_BAD_PARAMETER;
 345
 346         root = acpi_pci_find_root(handle);
 347         if (!root)
 348                 return AE_NOT_EXIST;
 349
 350         ctrl   = *mask;
 351         *mask |= root->osc_control_set;
 352
 353         /* Need to check the available controls bits before requesting them. */
 354         do {
 355                 status = acpi_pci_query_osc(root, support, mask);
 356                 if (ACPI_FAILURE(status))
 357                         return status;
 358                 if (ctrl == *mask)
 359                         break;
 360                 decode_osc_control(root, "platform does not support",
 361                                    ctrl & ~(*mask));
 362                 ctrl = *mask;
 363         } while (*mask);
 364
 365         /* No need to request _OSC if the control was already granted. */
 366         if ((root->osc_control_set & ctrl) == ctrl)
 367                 return AE_OK;
 368
 369         if ((ctrl & req) != req) {
 370                 decode_osc_control(root, "not requesting control; platform does not support",
 371                                    req & ~(ctrl));
 372                 return AE_SUPPORT;
 373         }
 374
 375         capbuf[OSC_QUERY_DWORD] = 0;
 376         capbuf[OSC_SUPPORT_DWORD] = root->osc_support_set;
 377         capbuf[OSC_CONTROL_DWORD] = ctrl;
 378         status = acpi_pci_run_osc(handle, capbuf, mask);
 379         if (ACPI_FAILURE(status))
 380                 return status;
 381
 382         root->osc_control_set = *mask;
 383         return AE_OK;
 384 }
 385
 386 static u32 calculate_support(void)
 387 {
 388         u32 support;
 389
 390         /*
 391          * All supported architectures that use ACPI have support for
 392          * PCI domains, so we indicate this in _OSC support capabilities.
 393          */
 394         support = OSC_PCI_SEGMENT_GROUPS_SUPPORT;
 395         support |= OSC_PCI_HPX_TYPE_3_SUPPORT;
 396         if (pci_ext_cfg_avail())
 397                 support |= OSC_PCI_EXT_CONFIG_SUPPORT;
 398         if (pcie_aspm_support_enabled())
 399                 support |= OSC_PCI_ASPM_SUPPORT | OSC_PCI_CLOCK_PM_SUPPORT;
 400         if (pci_msi_enabled())
 401                 support |= OSC_PCI_MSI_SUPPORT;
 402         if (IS_ENABLED(CONFIG_PCIE_EDR))
 403                 support |= OSC_PCI_EDR_SUPPORT;
 404
 405         return support;
 406 }
 407
 408 static u32 calculate_control(void)
 409 {
 410         u32 control;
 411
 412         control = OSC_PCI_EXPRESS_CAPABILITY_CONTROL
 413                 | OSC_PCI_EXPRESS_PME_CONTROL;
 414
 415         if (IS_ENABLED(CONFIG_PCIEASPM))
 416                 control |= OSC_PCI_EXPRESS_LTR_CONTROL;
 417
 418         if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
 419                 control |= OSC_PCI_EXPRESS_NATIVE_HP_CONTROL;
 420
 421         if (IS_ENABLED(CONFIG_HOTPLUG_PCI_SHPC))
 422                 control |= OSC_PCI_SHPC_NATIVE_HP_CONTROL;
 423
 424         if (pci_aer_available())
 425                 control |= OSC_PCI_EXPRESS_AER_CONTROL;
 426
 427         /*
 428          * Per the Downstream Port Containment Related Enhancements ECN to
 429          * the PCI Firmware Spec, r3.2, sec 4.5.1, table 4-5,
 430          * OSC_PCI_EXPRESS_DPC_CONTROL indicates the OS supports both DPC
 431          * and EDR.
 432          */
 433         if (IS_ENABLED(CONFIG_PCIE_DPC) && IS_ENABLED(CONFIG_PCIE_EDR))
 434                 control |= OSC_PCI_EXPRESS_DPC_CONTROL;
 435
 436         return control;
 437 }
 438
 439 static bool os_control_query_checks(struct acpi_pci_root *root, u32 support)
 440 {
 441         struct acpi_device *device = root->device;
 442
 443         if (pcie_ports_disabled) {
 444                 dev_info(&device->dev, "PCIe port services disabled; not requesting _OSC control\n");
 445                 return false;
 446         }
 447
 448         if ((support & ACPI_PCIE_REQ_SUPPORT) != ACPI_PCIE_REQ_SUPPORT) {
 449                 decode_osc_support(root, "not requesting OS control; OS requires",
 450                                    ACPI_PCIE_REQ_SUPPORT);
 451                 return false;
 452         }
 453
 454         return true;
 455 }
 456
 457 static void negotiate_os_control(struct acpi_pci_root *root, int *no_aspm,
 458                                  bool is_pcie)
 459 {
 460         u32 support, control = 0, requested = 0;
 461         acpi_status status;
 462         struct acpi_device *device = root->device;
 463         acpi_handle handle = device->handle;
 464
 465         /*
 466          * Apple always return failure on _OSC calls when _OSI("Darwin") has
 467          * been called successfully. We know the feature set supported by the
 468          * platform, so avoid calling _OSC at all
 469          */
 470         if (x86_apple_machine) {
 471                 root->osc_control_set = ~OSC_PCI_EXPRESS_PME_CONTROL;
 472                 decode_osc_control(root, "OS assumes control of",
 473                                    root->osc_control_set);
 474                 return;
 475         }
 476
 477         support = calculate_support();
 478
 479         decode_osc_support(root, "OS supports", support);
 480
 481         if (os_control_query_checks(root, support))
 482                 requested = control = calculate_control();
 483
 484         status = acpi_pci_osc_control_set(handle, &control, support);
 485         if (ACPI_SUCCESS(status)) {
 486                 if (control)
 487                         decode_osc_control(root, "OS now controls", control);
 488
 489                 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
 490                         /*
 491                          * We have ASPM control, but the FADT indicates that
 492                          * it's unsupported. Leave existing configuration
 493                          * intact and prevent the OS from touching it.
 494                          */
 495                         dev_info(&device->dev, "FADT indicates ASPM is unsupported, using BIOS configuration\n");
 496                         *no_aspm = 1;
 497                 }
 498         } else {
 499                 /*
 500                  * We want to disable ASPM here, but aspm_disabled
 501                  * needs to remain in its state from boot so that we
 502                  * properly handle PCIe 1.1 devices.  So we set this
 503                  * flag here, to defer the action until after the ACPI
 504                  * root scan.
 505                  */
 506                 *no_aspm = 1;
 507
 508                 /* _OSC is optional for PCI host bridges */
 509                 if ((status == AE_NOT_FOUND) && !is_pcie)
 510                         return;
 511
 512                 if (control) {
 513                         decode_osc_control(root, "OS requested", requested);
 514                         decode_osc_control(root, "platform willing to grant", control);
 515                 }
 516
 517                 dev_info(&device->dev, "_OSC: platform retains control of PCIe features (%s)\n",
 518                          acpi_format_exception(status));
 519         }
 520 }
 521
 522 static int acpi_pci_root_add(struct acpi_device *device,
 523                              const struct acpi_device_id *not_used)
 524 {
 525         unsigned long long segment, bus;
 526         acpi_status status;
 527         int result;
 528         struct acpi_pci_root *root;
 529         acpi_handle handle = device->handle;
 530         int no_aspm = 0;
 531         bool hotadd = system_state == SYSTEM_RUNNING;
 532         bool is_pcie;
 533
 534         root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
 535         if (!root)
 536                 return -ENOMEM;
 537
 538         segment = 0;
 539         status = acpi_evaluate_integer(handle, METHOD_NAME__SEG, NULL,
 540                                        &segment);
 541         if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
 542                 dev_err(&device->dev,  "can't evaluate _SEG\n");
 543                 result = -ENODEV;
 544                 goto end;
 545         }
 546
 547         /* Check _CRS first, then _BBN.  If no _BBN, default to zero. */
 548         root->secondary.flags = IORESOURCE_BUS;
 549         status = try_get_root_bridge_busnr(handle, &root->secondary);
 550         if (ACPI_FAILURE(status)) {
 551                 /*
 552                  * We need both the start and end of the downstream bus range
 553                  * to interpret _CBA (MMCONFIG base address), so it really is
 554                  * supposed to be in _CRS.  If we don't find it there, all we
 555                  * can do is assume [_BBN-0xFF] or [0-0xFF].
 556                  */
 557                 root->secondary.end = 0xFF;
 558                 dev_warn(&device->dev,
 559                          FW_BUG "no secondary bus range in _CRS\n");
 560                 status = acpi_evaluate_integer(handle, METHOD_NAME__BBN,
 561                                                NULL, &bus);
 562                 if (ACPI_SUCCESS(status))
 563                         root->secondary.start = bus;
 564                 else if (status == AE_NOT_FOUND)
 565                         root->secondary.start = 0;
 566                 else {
 567                         dev_err(&device->dev, "can't evaluate _BBN\n");
 568                         result = -ENODEV;
 569                         goto end;
 570                 }
 571         }
 572
 573         root->device = device;
 574         root->segment = segment & 0xFFFF;
 575         strcpy(acpi_device_name(device), ACPI_PCI_ROOT_DEVICE_NAME);
 576         strcpy(acpi_device_class(device), ACPI_PCI_ROOT_CLASS);
 577         device->driver_data = root;
 578
 579         if (hotadd && dmar_device_add(handle)) {
 580                 result = -ENXIO;
 581                 goto end;
 582         }
 583
 584         pr_info("%s [%s] (domain %04x %pR)\n",
 585                acpi_device_name(device), acpi_device_bid(device),
 586                root->segment, &root->secondary);
 587
 588         root->mcfg_addr = acpi_pci_root_get_mcfg_addr(handle);
 589
 590         is_pcie = strcmp(acpi_device_hid(device), "PNP0A08") == 0;
 591         negotiate_os_control(root, &no_aspm, is_pcie);
 592
 593         /*
 594          * TBD: Need PCI interface for enumeration/configuration of roots.
 595          */
 596
 597         /*
 598          * Scan the Root Bridge
 599          * --------------------
 600          * Must do this prior to any attempt to bind the root device, as the
 601          * PCI namespace does not get created until this call is made (and
 602          * thus the root bridge's pci_dev does not exist).
 603          */
 604         root->bus = pci_acpi_scan_root(root);
 605         if (!root->bus) {
 606                 dev_err(&device->dev,
 607                         "Bus %04x:%02x not present in PCI namespace\n",
 608                         root->segment, (unsigned int)root->secondary.start);
 609                 device->driver_data = NULL;
 610                 result = -ENODEV;
 611                 goto remove_dmar;
 612         }
 613
 614         if (no_aspm)
 615                 pcie_no_aspm();
 616
 617         pci_acpi_add_bus_pm_notifier(device);
 618         device_set_wakeup_capable(root->bus->bridge, device->wakeup.flags.valid);
 619
 620         if (hotadd) {
 621                 pcibios_resource_survey_bus(root->bus);
 622                 pci_assign_unassigned_root_bus_resources(root->bus);
 623                 /*
 624                  * This is only called for the hotadd case. For the boot-time
 625                  * case, we need to wait until after PCI initialization in
 626                  * order to deal with IOAPICs mapped in on a PCI BAR.
 627                  *
 628                  * This is currently x86-specific, because acpi_ioapic_add()
 629                  * is an empty function without CONFIG_ACPI_HOTPLUG_IOAPIC.
 630                  * And CONFIG_ACPI_HOTPLUG_IOAPIC depends on CONFIG_X86_IO_APIC
 631                  * (see drivers/acpi/Kconfig).
 632                  */
 633                 acpi_ioapic_add(root->device->handle);
 634         }
 635
 636         pci_lock_rescan_remove();
 637         pci_bus_add_devices(root->bus);
 638         pci_unlock_rescan_remove();
 639         return 1;
 640
 641 remove_dmar:
 642         if (hotadd)
 643                 dmar_device_remove(handle);
 644 end:
 645         kfree(root);
 646         return result;
 647 }
 648
 649 static void acpi_pci_root_remove(struct acpi_device *device)
 650 {
 651         struct acpi_pci_root *root = acpi_driver_data(device);
 652
 653         pci_lock_rescan_remove();
 654
 655         pci_stop_root_bus(root->bus);
 656
 657         pci_ioapic_remove(root);
 658         device_set_wakeup_capable(root->bus->bridge, false);
 659         pci_acpi_remove_bus_pm_notifier(device);
 660
 661         pci_remove_root_bus(root->bus);
 662         WARN_ON(acpi_ioapic_remove(root));
 663
 664         dmar_device_remove(device->handle);
 665
 666         pci_unlock_rescan_remove();
 667
 668         kfree(root);
 669 }
 670
 671 /*
 672  * Following code to support acpi_pci_root_create() is copied from
 673  * arch/x86/pci/acpi.c and modified so it could be reused by x86, IA64
 674  * and ARM64.
 675  */
 676 static void acpi_pci_root_validate_resources(struct device *dev,
 677                                              struct list_head *resources,
 678                                              unsigned long type)
 679 {
 680         LIST_HEAD(list);
 681         struct resource *res1, *res2, *root = NULL;
 682         struct resource_entry *tmp, *entry, *entry2;
 683
 684         BUG_ON((type & (IORESOURCE_MEM | IORESOURCE_IO)) == 0);
 685         root = (type & IORESOURCE_MEM) ? &iomem_resource : &ioport_resource;
 686
 687         list_splice_init(resources, &list);
 688         resource_list_for_each_entry_safe(entry, tmp, &list) {
 689                 bool free = false;
 690                 resource_size_t end;
 691
 692                 res1 = entry->res;
 693                 if (!(res1->flags & type))
 694                         goto next;
 695
 696                 /* Exclude non-addressable range or non-addressable portion */
 697                 end = min(res1->end, root->end);
 698                 if (end <= res1->start) {
 699                         dev_info(dev, "host bridge window %pR (ignored, not CPU addressable)\n",
 700                                  res1);
 701                         free = true;
 702                         goto next;
 703                 } else if (res1->end != end) {
 704                         dev_info(dev, "host bridge window %pR ([%#llx-%#llx] ignored, not CPU addressable)\n",
 705                                  res1, (unsigned long long)end + 1,
 706                                  (unsigned long long)res1->end);
 707                         res1->end = end;
 708                 }
 709
 710                 resource_list_for_each_entry(entry2, resources) {
 711                         res2 = entry2->res;
 712                         if (!(res2->flags & type))
 713                                 continue;
 714
 715                         /*
 716                          * I don't like throwing away windows because then
 717                          * our resources no longer match the ACPI _CRS, but
 718                          * the kernel resource tree doesn't allow overlaps.
 719                          */
 720                         if (resource_union(res1, res2, res2)) {
 721                                 dev_info(dev, "host bridge window expanded to %pR; %pR ignored\n",
 722                                          res2, res1);
 723                                 free = true;
 724                                 goto next;
 725                         }
 726                 }
 727
 728 next:
 729                 resource_list_del(entry);
 730                 if (free)
 731                         resource_list_free_entry(entry);
 732                 else
 733                         resource_list_add_tail(entry, resources);
 734         }
 735 }
 736
 737 static void acpi_pci_root_remap_iospace(struct fwnode_handle *fwnode,
 738                         struct resource_entry *entry)
 739 {
 740 #ifdef PCI_IOBASE
 741         struct resource *res = entry->res;
 742         resource_size_t cpu_addr = res->start;
 743         resource_size_t pci_addr = cpu_addr - entry->offset;
 744         resource_size_t length = resource_size(res);
 745         unsigned long port;
 746
 747         if (pci_register_io_range(fwnode, cpu_addr, length))
 748                 goto err;
 749
 750         port = pci_address_to_pio(cpu_addr);
 751         if (port == (unsigned long)-1)
 752                 goto err;
 753
 754         res->start = port;
 755         res->end = port + length - 1;
 756         entry->offset = port - pci_addr;
 757
 758         if (pci_remap_iospace(res, cpu_addr) < 0)
 759                 goto err;
 760
 761         pr_info("Remapped I/O %pa to %pR\n", &cpu_addr, res);
 762         return;
 763 err:
 764         res->flags |= IORESOURCE_DISABLED;
 765 #endif
 766 }
 767
 768 int acpi_pci_probe_root_resources(struct acpi_pci_root_info *info)
 769 {
 770         int ret;
 771         struct list_head *list = &info->resources;
 772         struct acpi_device *device = info->bridge;
 773         struct resource_entry *entry, *tmp;
 774         unsigned long flags;
 775
 776         flags = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_MEM_8AND16BIT;
 777         ret = acpi_dev_get_resources(device, list,
 778                                      acpi_dev_filter_resource_type_cb,
 779                                      (void *)flags);
 780         if (ret < 0)
 781                 dev_warn(&device->dev,
 782                          "failed to parse _CRS method, error code %d\n", ret);
 783         else if (ret == 0)
 784                 dev_dbg(&device->dev,
 785                         "no IO and memory resources present in _CRS\n");
 786         else {
 787                 resource_list_for_each_entry_safe(entry, tmp, list) {
 788                         if (entry->res->flags & IORESOURCE_IO)
 789                                 acpi_pci_root_remap_iospace(&device->fwnode,
 790                                                 entry);
 791
 792                         if (entry->res->flags & IORESOURCE_DISABLED)
 793                                 resource_list_destroy_entry(entry);
 794                         else
 795                                 entry->res->name = info->name;
 796                 }
 797                 acpi_pci_root_validate_resources(&device->dev, list,
 798                                                  IORESOURCE_MEM);
 799                 acpi_pci_root_validate_resources(&device->dev, list,
 800                                                  IORESOURCE_IO);
 801         }
 802
 803         return ret;
 804 }
 805
 806 static void pci_acpi_root_add_resources(struct acpi_pci_root_info *info)
 807 {
 808         struct resource_entry *entry, *tmp;
 809         struct resource *res, *conflict, *root = NULL;
 810
 811         resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
 812                 res = entry->res;
 813                 if (res->flags & IORESOURCE_MEM)
 814                         root = &iomem_resource;
 815                 else if (res->flags & IORESOURCE_IO)
 816                         root = &ioport_resource;
 817                 else
 818                         continue;
 819
 820                 /*
 821                  * Some legacy x86 host bridge drivers use iomem_resource and
 822                  * ioport_resource as default resource pool, skip it.
 823                  */
 824                 if (res == root)
 825                         continue;
 826
 827                 conflict = insert_resource_conflict(root, res);
 828                 if (conflict) {
 829                         dev_info(&info->bridge->dev,
 830                                  "ignoring host bridge window %pR (conflicts with %s %pR)\n",
 831                                  res, conflict->name, conflict);
 832                         resource_list_destroy_entry(entry);
 833                 }
 834         }
 835 }
 836
 837 static void __acpi_pci_root_release_info(struct acpi_pci_root_info *info)
 838 {
 839         struct resource *res;
 840         struct resource_entry *entry, *tmp;
 841
 842         if (!info)
 843                 return;
 844
 845         resource_list_for_each_entry_safe(entry, tmp, &info->resources) {
 846                 res = entry->res;
 847                 if (res->parent &&
 848                     (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
 849                         release_resource(res);
 850                 resource_list_destroy_entry(entry);
 851         }
 852
 853         info->ops->release_info(info);
 854 }
 855
 856 static void acpi_pci_root_release_info(struct pci_host_bridge *bridge)
 857 {
 858         struct resource *res;
 859         struct resource_entry *entry;
 860
 861         resource_list_for_each_entry(entry, &bridge->windows) {
 862                 res = entry->res;
 863                 if (res->flags & IORESOURCE_IO)
 864                         pci_unmap_iospace(res);
 865                 if (res->parent &&
 866                     (res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
 867                         release_resource(res);
 868         }
 869         __acpi_pci_root_release_info(bridge->release_data);
 870 }
 871
 872 struct pci_bus *acpi_pci_root_create(struct acpi_pci_root *root,
 873                                      struct acpi_pci_root_ops *ops,
 874                                      struct acpi_pci_root_info *info,
 875                                      void *sysdata)
 876 {
 877         int ret, busnum = root->secondary.start;
 878         struct acpi_device *device = root->device;
 879         int node = acpi_get_node(device->handle);
 880         struct pci_bus *bus;
 881         struct pci_host_bridge *host_bridge;
 882         union acpi_object *obj;
 883
 884         info->root = root;
 885         info->bridge = device;
 886         info->ops = ops;
 887         INIT_LIST_HEAD(&info->resources);
 888         snprintf(info->name, sizeof(info->name), "PCI Bus %04x:%02x",
 889                  root->segment, busnum);
 890
 891         if (ops->init_info && ops->init_info(info))
 892                 goto out_release_info;
 893         if (ops->prepare_resources)
 894                 ret = ops->prepare_resources(info);
 895         else
 896                 ret = acpi_pci_probe_root_resources(info);
 897         if (ret < 0)
 898                 goto out_release_info;
 899
 900         pci_acpi_root_add_resources(info);
 901         pci_add_resource(&info->resources, &root->secondary);
 902         bus = pci_create_root_bus(NULL, busnum, ops->pci_ops,
 903                                   sysdata, &info->resources);
 904         if (!bus)
 905                 goto out_release_info;
 906
 907         host_bridge = to_pci_host_bridge(bus->bridge);
 908         if (!(root->osc_control_set & OSC_PCI_EXPRESS_NATIVE_HP_CONTROL))
 909                 host_bridge->native_pcie_hotplug = 0;
 910         if (!(root->osc_control_set & OSC_PCI_SHPC_NATIVE_HP_CONTROL))
 911                 host_bridge->native_shpc_hotplug = 0;
 912         if (!(root->osc_control_set & OSC_PCI_EXPRESS_AER_CONTROL))
 913                 host_bridge->native_aer = 0;
 914         if (!(root->osc_control_set & OSC_PCI_EXPRESS_PME_CONTROL))
 915                 host_bridge->native_pme = 0;
 916         if (!(root->osc_control_set & OSC_PCI_EXPRESS_LTR_CONTROL))
 917                 host_bridge->native_ltr = 0;
 918         if (!(root->osc_control_set & OSC_PCI_EXPRESS_DPC_CONTROL))
 919                 host_bridge->native_dpc = 0;
 920
 921         /*
 922          * Evaluate the "PCI Boot Configuration" _DSM Function.  If it
 923          * exists and returns 0, we must preserve any PCI resource
 924          * assignments made by firmware for this host bridge.
 925          */
 926         obj = acpi_evaluate_dsm(ACPI_HANDLE(bus->bridge), &pci_acpi_dsm_guid, 1,
 927                                 DSM_PCI_PRESERVE_BOOT_CONFIG, NULL);
 928         if (obj && obj->type == ACPI_TYPE_INTEGER && obj->integer.value == 0)
 929                 host_bridge->preserve_config = 1;
 930         ACPI_FREE(obj);
 931
 932         pci_scan_child_bus(bus);
 933         pci_set_host_bridge_release(host_bridge, acpi_pci_root_release_info,
 934                                     info);
 935         if (node != NUMA_NO_NODE)
 936                 dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
 937         return bus;
 938
 939 out_release_info:
 940         __acpi_pci_root_release_info(info);
 941         return NULL;
 942 }
 943
 944 void __init acpi_pci_root_init(void)
 945 {
 946         acpi_hest_init();
 947         if (acpi_pci_disabled)
 948                 return;
 949
 950         pci_acpi_crs_quirks();
 951         acpi_scan_add_handler_with_hotplug(&pci_root_handler, "pci_root");
 952 }